1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Register map access API 4 // 5 // Copyright 2011 Wolfson Microelectronics plc 6 // 7 // Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 8 9 #include <linux/device.h> 10 #include <linux/slab.h> 11 #include <linux/export.h> 12 #include <linux/mutex.h> 13 #include <linux/err.h> 14 #include <linux/property.h> 15 #include <linux/rbtree.h> 16 #include <linux/sched.h> 17 #include <linux/delay.h> 18 #include <linux/log2.h> 19 #include <linux/hwspinlock.h> 20 #include <asm/unaligned.h> 21 22 #define CREATE_TRACE_POINTS 23 #include "trace.h" 24 25 #include "internal.h" 26 27 /* 28 * Sometimes for failures during very early init the trace 29 * infrastructure isn't available early enough to be used. For this 30 * sort of problem defining LOG_DEVICE will add printks for basic 31 * register I/O on a specific device. 32 */ 33 #undef LOG_DEVICE 34 35 #ifdef LOG_DEVICE 36 static inline bool regmap_should_log(struct regmap *map) 37 { 38 return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0); 39 } 40 #else 41 static inline bool regmap_should_log(struct regmap *map) { return false; } 42 #endif 43 44 45 static int _regmap_update_bits(struct regmap *map, unsigned int reg, 46 unsigned int mask, unsigned int val, 47 bool *change, bool force_write); 48 49 static int _regmap_bus_reg_read(void *context, unsigned int reg, 50 unsigned int *val); 51 static int _regmap_bus_read(void *context, unsigned int reg, 52 unsigned int *val); 53 static int _regmap_bus_formatted_write(void *context, unsigned int reg, 54 unsigned int val); 55 static int _regmap_bus_reg_write(void *context, unsigned int reg, 56 unsigned int val); 57 static int _regmap_bus_raw_write(void *context, unsigned int reg, 58 unsigned int val); 59 60 bool regmap_reg_in_ranges(unsigned int reg, 61 const struct regmap_range *ranges, 62 unsigned int nranges) 63 { 64 const struct regmap_range *r; 65 int i; 66 67 for (i = 0, r = ranges; i < nranges; i++, r++) 68 if (regmap_reg_in_range(reg, r)) 69 return true; 70 return false; 71 } 72 EXPORT_SYMBOL_GPL(regmap_reg_in_ranges); 73 74 bool regmap_check_range_table(struct regmap *map, unsigned int reg, 75 const struct regmap_access_table *table) 76 { 77 /* Check "no ranges" first */ 78 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges)) 79 return false; 80 81 /* In case zero "yes ranges" are supplied, any reg is OK */ 82 if (!table->n_yes_ranges) 83 return true; 84 85 return regmap_reg_in_ranges(reg, table->yes_ranges, 86 table->n_yes_ranges); 87 } 88 EXPORT_SYMBOL_GPL(regmap_check_range_table); 89 90 bool regmap_writeable(struct regmap *map, unsigned int reg) 91 { 92 if (map->max_register && reg > map->max_register) 93 return false; 94 95 if (map->writeable_reg) 96 return map->writeable_reg(map->dev, reg); 97 98 if (map->wr_table) 99 return regmap_check_range_table(map, reg, map->wr_table); 100 101 return true; 102 } 103 104 bool regmap_cached(struct regmap *map, unsigned int reg) 105 { 106 int ret; 107 unsigned int val; 108 109 if (map->cache_type == REGCACHE_NONE) 110 return false; 111 112 if (!map->cache_ops) 113 return false; 114 115 if (map->max_register && reg > map->max_register) 116 return false; 117 118 map->lock(map->lock_arg); 119 ret = regcache_read(map, reg, &val); 120 map->unlock(map->lock_arg); 121 if (ret) 122 return false; 123 124 return true; 125 } 126 127 bool regmap_readable(struct regmap *map, unsigned int reg) 128 { 129 if (!map->reg_read) 130 return false; 131 132 if (map->max_register && reg > map->max_register) 133 return false; 134 135 if (map->format.format_write) 136 return false; 137 138 if (map->readable_reg) 139 return map->readable_reg(map->dev, reg); 140 141 if (map->rd_table) 142 return regmap_check_range_table(map, reg, map->rd_table); 143 144 return true; 145 } 146 147 bool regmap_volatile(struct regmap *map, unsigned int reg) 148 { 149 if (!map->format.format_write && !regmap_readable(map, reg)) 150 return false; 151 152 if (map->volatile_reg) 153 return map->volatile_reg(map->dev, reg); 154 155 if (map->volatile_table) 156 return regmap_check_range_table(map, reg, map->volatile_table); 157 158 if (map->cache_ops) 159 return false; 160 else 161 return true; 162 } 163 164 bool regmap_precious(struct regmap *map, unsigned int reg) 165 { 166 if (!regmap_readable(map, reg)) 167 return false; 168 169 if (map->precious_reg) 170 return map->precious_reg(map->dev, reg); 171 172 if (map->precious_table) 173 return regmap_check_range_table(map, reg, map->precious_table); 174 175 return false; 176 } 177 178 bool regmap_writeable_noinc(struct regmap *map, unsigned int reg) 179 { 180 if (map->writeable_noinc_reg) 181 return map->writeable_noinc_reg(map->dev, reg); 182 183 if (map->wr_noinc_table) 184 return regmap_check_range_table(map, reg, map->wr_noinc_table); 185 186 return true; 187 } 188 189 bool regmap_readable_noinc(struct regmap *map, unsigned int reg) 190 { 191 if (map->readable_noinc_reg) 192 return map->readable_noinc_reg(map->dev, reg); 193 194 if (map->rd_noinc_table) 195 return regmap_check_range_table(map, reg, map->rd_noinc_table); 196 197 return true; 198 } 199 200 static bool regmap_volatile_range(struct regmap *map, unsigned int reg, 201 size_t num) 202 { 203 unsigned int i; 204 205 for (i = 0; i < num; i++) 206 if (!regmap_volatile(map, reg + regmap_get_offset(map, i))) 207 return false; 208 209 return true; 210 } 211 212 static void regmap_format_12_20_write(struct regmap *map, 213 unsigned int reg, unsigned int val) 214 { 215 u8 *out = map->work_buf; 216 217 out[0] = reg >> 4; 218 out[1] = (reg << 4) | (val >> 16); 219 out[2] = val >> 8; 220 out[3] = val; 221 } 222 223 224 static void regmap_format_2_6_write(struct regmap *map, 225 unsigned int reg, unsigned int val) 226 { 227 u8 *out = map->work_buf; 228 229 *out = (reg << 6) | val; 230 } 231 232 static void regmap_format_4_12_write(struct regmap *map, 233 unsigned int reg, unsigned int val) 234 { 235 __be16 *out = map->work_buf; 236 *out = cpu_to_be16((reg << 12) | val); 237 } 238 239 static void regmap_format_7_9_write(struct regmap *map, 240 unsigned int reg, unsigned int val) 241 { 242 __be16 *out = map->work_buf; 243 *out = cpu_to_be16((reg << 9) | val); 244 } 245 246 static void regmap_format_7_17_write(struct regmap *map, 247 unsigned int reg, unsigned int val) 248 { 249 u8 *out = map->work_buf; 250 251 out[2] = val; 252 out[1] = val >> 8; 253 out[0] = (val >> 16) | (reg << 1); 254 } 255 256 static void regmap_format_10_14_write(struct regmap *map, 257 unsigned int reg, unsigned int val) 258 { 259 u8 *out = map->work_buf; 260 261 out[2] = val; 262 out[1] = (val >> 8) | (reg << 6); 263 out[0] = reg >> 2; 264 } 265 266 static void regmap_format_8(void *buf, unsigned int val, unsigned int shift) 267 { 268 u8 *b = buf; 269 270 b[0] = val << shift; 271 } 272 273 static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift) 274 { 275 put_unaligned_be16(val << shift, buf); 276 } 277 278 static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift) 279 { 280 put_unaligned_le16(val << shift, buf); 281 } 282 283 static void regmap_format_16_native(void *buf, unsigned int val, 284 unsigned int shift) 285 { 286 u16 v = val << shift; 287 288 memcpy(buf, &v, sizeof(v)); 289 } 290 291 static void regmap_format_24(void *buf, unsigned int val, unsigned int shift) 292 { 293 u8 *b = buf; 294 295 val <<= shift; 296 297 b[0] = val >> 16; 298 b[1] = val >> 8; 299 b[2] = val; 300 } 301 302 static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift) 303 { 304 put_unaligned_be32(val << shift, buf); 305 } 306 307 static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift) 308 { 309 put_unaligned_le32(val << shift, buf); 310 } 311 312 static void regmap_format_32_native(void *buf, unsigned int val, 313 unsigned int shift) 314 { 315 u32 v = val << shift; 316 317 memcpy(buf, &v, sizeof(v)); 318 } 319 320 #ifdef CONFIG_64BIT 321 static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift) 322 { 323 put_unaligned_be64((u64) val << shift, buf); 324 } 325 326 static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift) 327 { 328 put_unaligned_le64((u64) val << shift, buf); 329 } 330 331 static void regmap_format_64_native(void *buf, unsigned int val, 332 unsigned int shift) 333 { 334 u64 v = (u64) val << shift; 335 336 memcpy(buf, &v, sizeof(v)); 337 } 338 #endif 339 340 static void regmap_parse_inplace_noop(void *buf) 341 { 342 } 343 344 static unsigned int regmap_parse_8(const void *buf) 345 { 346 const u8 *b = buf; 347 348 return b[0]; 349 } 350 351 static unsigned int regmap_parse_16_be(const void *buf) 352 { 353 return get_unaligned_be16(buf); 354 } 355 356 static unsigned int regmap_parse_16_le(const void *buf) 357 { 358 return get_unaligned_le16(buf); 359 } 360 361 static void regmap_parse_16_be_inplace(void *buf) 362 { 363 u16 v = get_unaligned_be16(buf); 364 365 memcpy(buf, &v, sizeof(v)); 366 } 367 368 static void regmap_parse_16_le_inplace(void *buf) 369 { 370 u16 v = get_unaligned_le16(buf); 371 372 memcpy(buf, &v, sizeof(v)); 373 } 374 375 static unsigned int regmap_parse_16_native(const void *buf) 376 { 377 u16 v; 378 379 memcpy(&v, buf, sizeof(v)); 380 return v; 381 } 382 383 static unsigned int regmap_parse_24(const void *buf) 384 { 385 const u8 *b = buf; 386 unsigned int ret = b[2]; 387 ret |= ((unsigned int)b[1]) << 8; 388 ret |= ((unsigned int)b[0]) << 16; 389 390 return ret; 391 } 392 393 static unsigned int regmap_parse_32_be(const void *buf) 394 { 395 return get_unaligned_be32(buf); 396 } 397 398 static unsigned int regmap_parse_32_le(const void *buf) 399 { 400 return get_unaligned_le32(buf); 401 } 402 403 static void regmap_parse_32_be_inplace(void *buf) 404 { 405 u32 v = get_unaligned_be32(buf); 406 407 memcpy(buf, &v, sizeof(v)); 408 } 409 410 static void regmap_parse_32_le_inplace(void *buf) 411 { 412 u32 v = get_unaligned_le32(buf); 413 414 memcpy(buf, &v, sizeof(v)); 415 } 416 417 static unsigned int regmap_parse_32_native(const void *buf) 418 { 419 u32 v; 420 421 memcpy(&v, buf, sizeof(v)); 422 return v; 423 } 424 425 #ifdef CONFIG_64BIT 426 static unsigned int regmap_parse_64_be(const void *buf) 427 { 428 return get_unaligned_be64(buf); 429 } 430 431 static unsigned int regmap_parse_64_le(const void *buf) 432 { 433 return get_unaligned_le64(buf); 434 } 435 436 static void regmap_parse_64_be_inplace(void *buf) 437 { 438 u64 v = get_unaligned_be64(buf); 439 440 memcpy(buf, &v, sizeof(v)); 441 } 442 443 static void regmap_parse_64_le_inplace(void *buf) 444 { 445 u64 v = get_unaligned_le64(buf); 446 447 memcpy(buf, &v, sizeof(v)); 448 } 449 450 static unsigned int regmap_parse_64_native(const void *buf) 451 { 452 u64 v; 453 454 memcpy(&v, buf, sizeof(v)); 455 return v; 456 } 457 #endif 458 459 static void regmap_lock_hwlock(void *__map) 460 { 461 struct regmap *map = __map; 462 463 hwspin_lock_timeout(map->hwlock, UINT_MAX); 464 } 465 466 static void regmap_lock_hwlock_irq(void *__map) 467 { 468 struct regmap *map = __map; 469 470 hwspin_lock_timeout_irq(map->hwlock, UINT_MAX); 471 } 472 473 static void regmap_lock_hwlock_irqsave(void *__map) 474 { 475 struct regmap *map = __map; 476 477 hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX, 478 &map->spinlock_flags); 479 } 480 481 static void regmap_unlock_hwlock(void *__map) 482 { 483 struct regmap *map = __map; 484 485 hwspin_unlock(map->hwlock); 486 } 487 488 static void regmap_unlock_hwlock_irq(void *__map) 489 { 490 struct regmap *map = __map; 491 492 hwspin_unlock_irq(map->hwlock); 493 } 494 495 static void regmap_unlock_hwlock_irqrestore(void *__map) 496 { 497 struct regmap *map = __map; 498 499 hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags); 500 } 501 502 static void regmap_lock_unlock_none(void *__map) 503 { 504 505 } 506 507 static void regmap_lock_mutex(void *__map) 508 { 509 struct regmap *map = __map; 510 mutex_lock(&map->mutex); 511 } 512 513 static void regmap_unlock_mutex(void *__map) 514 { 515 struct regmap *map = __map; 516 mutex_unlock(&map->mutex); 517 } 518 519 static void regmap_lock_spinlock(void *__map) 520 __acquires(&map->spinlock) 521 { 522 struct regmap *map = __map; 523 unsigned long flags; 524 525 spin_lock_irqsave(&map->spinlock, flags); 526 map->spinlock_flags = flags; 527 } 528 529 static void regmap_unlock_spinlock(void *__map) 530 __releases(&map->spinlock) 531 { 532 struct regmap *map = __map; 533 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags); 534 } 535 536 static void regmap_lock_raw_spinlock(void *__map) 537 __acquires(&map->raw_spinlock) 538 { 539 struct regmap *map = __map; 540 unsigned long flags; 541 542 raw_spin_lock_irqsave(&map->raw_spinlock, flags); 543 map->raw_spinlock_flags = flags; 544 } 545 546 static void regmap_unlock_raw_spinlock(void *__map) 547 __releases(&map->raw_spinlock) 548 { 549 struct regmap *map = __map; 550 raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags); 551 } 552 553 static void dev_get_regmap_release(struct device *dev, void *res) 554 { 555 /* 556 * We don't actually have anything to do here; the goal here 557 * is not to manage the regmap but to provide a simple way to 558 * get the regmap back given a struct device. 559 */ 560 } 561 562 static bool _regmap_range_add(struct regmap *map, 563 struct regmap_range_node *data) 564 { 565 struct rb_root *root = &map->range_tree; 566 struct rb_node **new = &(root->rb_node), *parent = NULL; 567 568 while (*new) { 569 struct regmap_range_node *this = 570 rb_entry(*new, struct regmap_range_node, node); 571 572 parent = *new; 573 if (data->range_max < this->range_min) 574 new = &((*new)->rb_left); 575 else if (data->range_min > this->range_max) 576 new = &((*new)->rb_right); 577 else 578 return false; 579 } 580 581 rb_link_node(&data->node, parent, new); 582 rb_insert_color(&data->node, root); 583 584 return true; 585 } 586 587 static struct regmap_range_node *_regmap_range_lookup(struct regmap *map, 588 unsigned int reg) 589 { 590 struct rb_node *node = map->range_tree.rb_node; 591 592 while (node) { 593 struct regmap_range_node *this = 594 rb_entry(node, struct regmap_range_node, node); 595 596 if (reg < this->range_min) 597 node = node->rb_left; 598 else if (reg > this->range_max) 599 node = node->rb_right; 600 else 601 return this; 602 } 603 604 return NULL; 605 } 606 607 static void regmap_range_exit(struct regmap *map) 608 { 609 struct rb_node *next; 610 struct regmap_range_node *range_node; 611 612 next = rb_first(&map->range_tree); 613 while (next) { 614 range_node = rb_entry(next, struct regmap_range_node, node); 615 next = rb_next(&range_node->node); 616 rb_erase(&range_node->node, &map->range_tree); 617 kfree(range_node); 618 } 619 620 kfree(map->selector_work_buf); 621 } 622 623 static int regmap_set_name(struct regmap *map, const struct regmap_config *config) 624 { 625 if (config->name) { 626 const char *name = kstrdup_const(config->name, GFP_KERNEL); 627 628 if (!name) 629 return -ENOMEM; 630 631 kfree_const(map->name); 632 map->name = name; 633 } 634 635 return 0; 636 } 637 638 int regmap_attach_dev(struct device *dev, struct regmap *map, 639 const struct regmap_config *config) 640 { 641 struct regmap **m; 642 int ret; 643 644 map->dev = dev; 645 646 ret = regmap_set_name(map, config); 647 if (ret) 648 return ret; 649 650 regmap_debugfs_init(map); 651 652 /* Add a devres resource for dev_get_regmap() */ 653 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL); 654 if (!m) { 655 regmap_debugfs_exit(map); 656 return -ENOMEM; 657 } 658 *m = map; 659 devres_add(dev, m); 660 661 return 0; 662 } 663 EXPORT_SYMBOL_GPL(regmap_attach_dev); 664 665 static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus, 666 const struct regmap_config *config) 667 { 668 enum regmap_endian endian; 669 670 /* Retrieve the endianness specification from the regmap config */ 671 endian = config->reg_format_endian; 672 673 /* If the regmap config specified a non-default value, use that */ 674 if (endian != REGMAP_ENDIAN_DEFAULT) 675 return endian; 676 677 /* Retrieve the endianness specification from the bus config */ 678 if (bus && bus->reg_format_endian_default) 679 endian = bus->reg_format_endian_default; 680 681 /* If the bus specified a non-default value, use that */ 682 if (endian != REGMAP_ENDIAN_DEFAULT) 683 return endian; 684 685 /* Use this if no other value was found */ 686 return REGMAP_ENDIAN_BIG; 687 } 688 689 enum regmap_endian regmap_get_val_endian(struct device *dev, 690 const struct regmap_bus *bus, 691 const struct regmap_config *config) 692 { 693 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL; 694 enum regmap_endian endian; 695 696 /* Retrieve the endianness specification from the regmap config */ 697 endian = config->val_format_endian; 698 699 /* If the regmap config specified a non-default value, use that */ 700 if (endian != REGMAP_ENDIAN_DEFAULT) 701 return endian; 702 703 /* If the firmware node exist try to get endianness from it */ 704 if (fwnode_property_read_bool(fwnode, "big-endian")) 705 endian = REGMAP_ENDIAN_BIG; 706 else if (fwnode_property_read_bool(fwnode, "little-endian")) 707 endian = REGMAP_ENDIAN_LITTLE; 708 else if (fwnode_property_read_bool(fwnode, "native-endian")) 709 endian = REGMAP_ENDIAN_NATIVE; 710 711 /* If the endianness was specified in fwnode, use that */ 712 if (endian != REGMAP_ENDIAN_DEFAULT) 713 return endian; 714 715 /* Retrieve the endianness specification from the bus config */ 716 if (bus && bus->val_format_endian_default) 717 endian = bus->val_format_endian_default; 718 719 /* If the bus specified a non-default value, use that */ 720 if (endian != REGMAP_ENDIAN_DEFAULT) 721 return endian; 722 723 /* Use this if no other value was found */ 724 return REGMAP_ENDIAN_BIG; 725 } 726 EXPORT_SYMBOL_GPL(regmap_get_val_endian); 727 728 struct regmap *__regmap_init(struct device *dev, 729 const struct regmap_bus *bus, 730 void *bus_context, 731 const struct regmap_config *config, 732 struct lock_class_key *lock_key, 733 const char *lock_name) 734 { 735 struct regmap *map; 736 int ret = -EINVAL; 737 enum regmap_endian reg_endian, val_endian; 738 int i, j; 739 740 if (!config) 741 goto err; 742 743 map = kzalloc(sizeof(*map), GFP_KERNEL); 744 if (map == NULL) { 745 ret = -ENOMEM; 746 goto err; 747 } 748 749 ret = regmap_set_name(map, config); 750 if (ret) 751 goto err_map; 752 753 ret = -EINVAL; /* Later error paths rely on this */ 754 755 if (config->disable_locking) { 756 map->lock = map->unlock = regmap_lock_unlock_none; 757 map->can_sleep = config->can_sleep; 758 regmap_debugfs_disable(map); 759 } else if (config->lock && config->unlock) { 760 map->lock = config->lock; 761 map->unlock = config->unlock; 762 map->lock_arg = config->lock_arg; 763 map->can_sleep = config->can_sleep; 764 } else if (config->use_hwlock) { 765 map->hwlock = hwspin_lock_request_specific(config->hwlock_id); 766 if (!map->hwlock) { 767 ret = -ENXIO; 768 goto err_name; 769 } 770 771 switch (config->hwlock_mode) { 772 case HWLOCK_IRQSTATE: 773 map->lock = regmap_lock_hwlock_irqsave; 774 map->unlock = regmap_unlock_hwlock_irqrestore; 775 break; 776 case HWLOCK_IRQ: 777 map->lock = regmap_lock_hwlock_irq; 778 map->unlock = regmap_unlock_hwlock_irq; 779 break; 780 default: 781 map->lock = regmap_lock_hwlock; 782 map->unlock = regmap_unlock_hwlock; 783 break; 784 } 785 786 map->lock_arg = map; 787 } else { 788 if ((bus && bus->fast_io) || 789 config->fast_io) { 790 if (config->use_raw_spinlock) { 791 raw_spin_lock_init(&map->raw_spinlock); 792 map->lock = regmap_lock_raw_spinlock; 793 map->unlock = regmap_unlock_raw_spinlock; 794 lockdep_set_class_and_name(&map->raw_spinlock, 795 lock_key, lock_name); 796 } else { 797 spin_lock_init(&map->spinlock); 798 map->lock = regmap_lock_spinlock; 799 map->unlock = regmap_unlock_spinlock; 800 lockdep_set_class_and_name(&map->spinlock, 801 lock_key, lock_name); 802 } 803 } else { 804 mutex_init(&map->mutex); 805 map->lock = regmap_lock_mutex; 806 map->unlock = regmap_unlock_mutex; 807 map->can_sleep = true; 808 lockdep_set_class_and_name(&map->mutex, 809 lock_key, lock_name); 810 } 811 map->lock_arg = map; 812 } 813 814 /* 815 * When we write in fast-paths with regmap_bulk_write() don't allocate 816 * scratch buffers with sleeping allocations. 817 */ 818 if ((bus && bus->fast_io) || config->fast_io) 819 map->alloc_flags = GFP_ATOMIC; 820 else 821 map->alloc_flags = GFP_KERNEL; 822 823 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8); 824 map->format.pad_bytes = config->pad_bits / 8; 825 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8); 826 map->format.buf_size = DIV_ROUND_UP(config->reg_bits + 827 config->val_bits + config->pad_bits, 8); 828 map->reg_shift = config->pad_bits % 8; 829 if (config->reg_stride) 830 map->reg_stride = config->reg_stride; 831 else 832 map->reg_stride = 1; 833 if (is_power_of_2(map->reg_stride)) 834 map->reg_stride_order = ilog2(map->reg_stride); 835 else 836 map->reg_stride_order = -1; 837 map->use_single_read = config->use_single_read || !bus || !bus->read; 838 map->use_single_write = config->use_single_write || !bus || !bus->write; 839 map->can_multi_write = config->can_multi_write && bus && bus->write; 840 if (bus) { 841 map->max_raw_read = bus->max_raw_read; 842 map->max_raw_write = bus->max_raw_write; 843 } 844 map->dev = dev; 845 map->bus = bus; 846 map->bus_context = bus_context; 847 map->max_register = config->max_register; 848 map->wr_table = config->wr_table; 849 map->rd_table = config->rd_table; 850 map->volatile_table = config->volatile_table; 851 map->precious_table = config->precious_table; 852 map->wr_noinc_table = config->wr_noinc_table; 853 map->rd_noinc_table = config->rd_noinc_table; 854 map->writeable_reg = config->writeable_reg; 855 map->readable_reg = config->readable_reg; 856 map->volatile_reg = config->volatile_reg; 857 map->precious_reg = config->precious_reg; 858 map->writeable_noinc_reg = config->writeable_noinc_reg; 859 map->readable_noinc_reg = config->readable_noinc_reg; 860 map->cache_type = config->cache_type; 861 862 spin_lock_init(&map->async_lock); 863 INIT_LIST_HEAD(&map->async_list); 864 INIT_LIST_HEAD(&map->async_free); 865 init_waitqueue_head(&map->async_waitq); 866 867 if (config->read_flag_mask || 868 config->write_flag_mask || 869 config->zero_flag_mask) { 870 map->read_flag_mask = config->read_flag_mask; 871 map->write_flag_mask = config->write_flag_mask; 872 } else if (bus) { 873 map->read_flag_mask = bus->read_flag_mask; 874 } 875 876 if (!bus) { 877 map->reg_read = config->reg_read; 878 map->reg_write = config->reg_write; 879 880 map->defer_caching = false; 881 goto skip_format_initialization; 882 } else if (!bus->read || !bus->write) { 883 map->reg_read = _regmap_bus_reg_read; 884 map->reg_write = _regmap_bus_reg_write; 885 map->reg_update_bits = bus->reg_update_bits; 886 887 map->defer_caching = false; 888 goto skip_format_initialization; 889 } else { 890 map->reg_read = _regmap_bus_read; 891 map->reg_update_bits = bus->reg_update_bits; 892 } 893 894 reg_endian = regmap_get_reg_endian(bus, config); 895 val_endian = regmap_get_val_endian(dev, bus, config); 896 897 switch (config->reg_bits + map->reg_shift) { 898 case 2: 899 switch (config->val_bits) { 900 case 6: 901 map->format.format_write = regmap_format_2_6_write; 902 break; 903 default: 904 goto err_hwlock; 905 } 906 break; 907 908 case 4: 909 switch (config->val_bits) { 910 case 12: 911 map->format.format_write = regmap_format_4_12_write; 912 break; 913 default: 914 goto err_hwlock; 915 } 916 break; 917 918 case 7: 919 switch (config->val_bits) { 920 case 9: 921 map->format.format_write = regmap_format_7_9_write; 922 break; 923 case 17: 924 map->format.format_write = regmap_format_7_17_write; 925 break; 926 default: 927 goto err_hwlock; 928 } 929 break; 930 931 case 10: 932 switch (config->val_bits) { 933 case 14: 934 map->format.format_write = regmap_format_10_14_write; 935 break; 936 default: 937 goto err_hwlock; 938 } 939 break; 940 941 case 12: 942 switch (config->val_bits) { 943 case 20: 944 map->format.format_write = regmap_format_12_20_write; 945 break; 946 default: 947 goto err_hwlock; 948 } 949 break; 950 951 case 8: 952 map->format.format_reg = regmap_format_8; 953 break; 954 955 case 16: 956 switch (reg_endian) { 957 case REGMAP_ENDIAN_BIG: 958 map->format.format_reg = regmap_format_16_be; 959 break; 960 case REGMAP_ENDIAN_LITTLE: 961 map->format.format_reg = regmap_format_16_le; 962 break; 963 case REGMAP_ENDIAN_NATIVE: 964 map->format.format_reg = regmap_format_16_native; 965 break; 966 default: 967 goto err_hwlock; 968 } 969 break; 970 971 case 24: 972 if (reg_endian != REGMAP_ENDIAN_BIG) 973 goto err_hwlock; 974 map->format.format_reg = regmap_format_24; 975 break; 976 977 case 32: 978 switch (reg_endian) { 979 case REGMAP_ENDIAN_BIG: 980 map->format.format_reg = regmap_format_32_be; 981 break; 982 case REGMAP_ENDIAN_LITTLE: 983 map->format.format_reg = regmap_format_32_le; 984 break; 985 case REGMAP_ENDIAN_NATIVE: 986 map->format.format_reg = regmap_format_32_native; 987 break; 988 default: 989 goto err_hwlock; 990 } 991 break; 992 993 #ifdef CONFIG_64BIT 994 case 64: 995 switch (reg_endian) { 996 case REGMAP_ENDIAN_BIG: 997 map->format.format_reg = regmap_format_64_be; 998 break; 999 case REGMAP_ENDIAN_LITTLE: 1000 map->format.format_reg = regmap_format_64_le; 1001 break; 1002 case REGMAP_ENDIAN_NATIVE: 1003 map->format.format_reg = regmap_format_64_native; 1004 break; 1005 default: 1006 goto err_hwlock; 1007 } 1008 break; 1009 #endif 1010 1011 default: 1012 goto err_hwlock; 1013 } 1014 1015 if (val_endian == REGMAP_ENDIAN_NATIVE) 1016 map->format.parse_inplace = regmap_parse_inplace_noop; 1017 1018 switch (config->val_bits) { 1019 case 8: 1020 map->format.format_val = regmap_format_8; 1021 map->format.parse_val = regmap_parse_8; 1022 map->format.parse_inplace = regmap_parse_inplace_noop; 1023 break; 1024 case 16: 1025 switch (val_endian) { 1026 case REGMAP_ENDIAN_BIG: 1027 map->format.format_val = regmap_format_16_be; 1028 map->format.parse_val = regmap_parse_16_be; 1029 map->format.parse_inplace = regmap_parse_16_be_inplace; 1030 break; 1031 case REGMAP_ENDIAN_LITTLE: 1032 map->format.format_val = regmap_format_16_le; 1033 map->format.parse_val = regmap_parse_16_le; 1034 map->format.parse_inplace = regmap_parse_16_le_inplace; 1035 break; 1036 case REGMAP_ENDIAN_NATIVE: 1037 map->format.format_val = regmap_format_16_native; 1038 map->format.parse_val = regmap_parse_16_native; 1039 break; 1040 default: 1041 goto err_hwlock; 1042 } 1043 break; 1044 case 24: 1045 if (val_endian != REGMAP_ENDIAN_BIG) 1046 goto err_hwlock; 1047 map->format.format_val = regmap_format_24; 1048 map->format.parse_val = regmap_parse_24; 1049 break; 1050 case 32: 1051 switch (val_endian) { 1052 case REGMAP_ENDIAN_BIG: 1053 map->format.format_val = regmap_format_32_be; 1054 map->format.parse_val = regmap_parse_32_be; 1055 map->format.parse_inplace = regmap_parse_32_be_inplace; 1056 break; 1057 case REGMAP_ENDIAN_LITTLE: 1058 map->format.format_val = regmap_format_32_le; 1059 map->format.parse_val = regmap_parse_32_le; 1060 map->format.parse_inplace = regmap_parse_32_le_inplace; 1061 break; 1062 case REGMAP_ENDIAN_NATIVE: 1063 map->format.format_val = regmap_format_32_native; 1064 map->format.parse_val = regmap_parse_32_native; 1065 break; 1066 default: 1067 goto err_hwlock; 1068 } 1069 break; 1070 #ifdef CONFIG_64BIT 1071 case 64: 1072 switch (val_endian) { 1073 case REGMAP_ENDIAN_BIG: 1074 map->format.format_val = regmap_format_64_be; 1075 map->format.parse_val = regmap_parse_64_be; 1076 map->format.parse_inplace = regmap_parse_64_be_inplace; 1077 break; 1078 case REGMAP_ENDIAN_LITTLE: 1079 map->format.format_val = regmap_format_64_le; 1080 map->format.parse_val = regmap_parse_64_le; 1081 map->format.parse_inplace = regmap_parse_64_le_inplace; 1082 break; 1083 case REGMAP_ENDIAN_NATIVE: 1084 map->format.format_val = regmap_format_64_native; 1085 map->format.parse_val = regmap_parse_64_native; 1086 break; 1087 default: 1088 goto err_hwlock; 1089 } 1090 break; 1091 #endif 1092 } 1093 1094 if (map->format.format_write) { 1095 if ((reg_endian != REGMAP_ENDIAN_BIG) || 1096 (val_endian != REGMAP_ENDIAN_BIG)) 1097 goto err_hwlock; 1098 map->use_single_write = true; 1099 } 1100 1101 if (!map->format.format_write && 1102 !(map->format.format_reg && map->format.format_val)) 1103 goto err_hwlock; 1104 1105 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL); 1106 if (map->work_buf == NULL) { 1107 ret = -ENOMEM; 1108 goto err_hwlock; 1109 } 1110 1111 if (map->format.format_write) { 1112 map->defer_caching = false; 1113 map->reg_write = _regmap_bus_formatted_write; 1114 } else if (map->format.format_val) { 1115 map->defer_caching = true; 1116 map->reg_write = _regmap_bus_raw_write; 1117 } 1118 1119 skip_format_initialization: 1120 1121 map->range_tree = RB_ROOT; 1122 for (i = 0; i < config->num_ranges; i++) { 1123 const struct regmap_range_cfg *range_cfg = &config->ranges[i]; 1124 struct regmap_range_node *new; 1125 1126 /* Sanity check */ 1127 if (range_cfg->range_max < range_cfg->range_min) { 1128 dev_err(map->dev, "Invalid range %d: %d < %d\n", i, 1129 range_cfg->range_max, range_cfg->range_min); 1130 goto err_range; 1131 } 1132 1133 if (range_cfg->range_max > map->max_register) { 1134 dev_err(map->dev, "Invalid range %d: %d > %d\n", i, 1135 range_cfg->range_max, map->max_register); 1136 goto err_range; 1137 } 1138 1139 if (range_cfg->selector_reg > map->max_register) { 1140 dev_err(map->dev, 1141 "Invalid range %d: selector out of map\n", i); 1142 goto err_range; 1143 } 1144 1145 if (range_cfg->window_len == 0) { 1146 dev_err(map->dev, "Invalid range %d: window_len 0\n", 1147 i); 1148 goto err_range; 1149 } 1150 1151 /* Make sure, that this register range has no selector 1152 or data window within its boundary */ 1153 for (j = 0; j < config->num_ranges; j++) { 1154 unsigned int sel_reg = config->ranges[j].selector_reg; 1155 unsigned int win_min = config->ranges[j].window_start; 1156 unsigned int win_max = win_min + 1157 config->ranges[j].window_len - 1; 1158 1159 /* Allow data window inside its own virtual range */ 1160 if (j == i) 1161 continue; 1162 1163 if (range_cfg->range_min <= sel_reg && 1164 sel_reg <= range_cfg->range_max) { 1165 dev_err(map->dev, 1166 "Range %d: selector for %d in window\n", 1167 i, j); 1168 goto err_range; 1169 } 1170 1171 if (!(win_max < range_cfg->range_min || 1172 win_min > range_cfg->range_max)) { 1173 dev_err(map->dev, 1174 "Range %d: window for %d in window\n", 1175 i, j); 1176 goto err_range; 1177 } 1178 } 1179 1180 new = kzalloc(sizeof(*new), GFP_KERNEL); 1181 if (new == NULL) { 1182 ret = -ENOMEM; 1183 goto err_range; 1184 } 1185 1186 new->map = map; 1187 new->name = range_cfg->name; 1188 new->range_min = range_cfg->range_min; 1189 new->range_max = range_cfg->range_max; 1190 new->selector_reg = range_cfg->selector_reg; 1191 new->selector_mask = range_cfg->selector_mask; 1192 new->selector_shift = range_cfg->selector_shift; 1193 new->window_start = range_cfg->window_start; 1194 new->window_len = range_cfg->window_len; 1195 1196 if (!_regmap_range_add(map, new)) { 1197 dev_err(map->dev, "Failed to add range %d\n", i); 1198 kfree(new); 1199 goto err_range; 1200 } 1201 1202 if (map->selector_work_buf == NULL) { 1203 map->selector_work_buf = 1204 kzalloc(map->format.buf_size, GFP_KERNEL); 1205 if (map->selector_work_buf == NULL) { 1206 ret = -ENOMEM; 1207 goto err_range; 1208 } 1209 } 1210 } 1211 1212 ret = regcache_init(map, config); 1213 if (ret != 0) 1214 goto err_range; 1215 1216 if (dev) { 1217 ret = regmap_attach_dev(dev, map, config); 1218 if (ret != 0) 1219 goto err_regcache; 1220 } else { 1221 regmap_debugfs_init(map); 1222 } 1223 1224 return map; 1225 1226 err_regcache: 1227 regcache_exit(map); 1228 err_range: 1229 regmap_range_exit(map); 1230 kfree(map->work_buf); 1231 err_hwlock: 1232 if (map->hwlock) 1233 hwspin_lock_free(map->hwlock); 1234 err_name: 1235 kfree_const(map->name); 1236 err_map: 1237 kfree(map); 1238 err: 1239 return ERR_PTR(ret); 1240 } 1241 EXPORT_SYMBOL_GPL(__regmap_init); 1242 1243 static void devm_regmap_release(struct device *dev, void *res) 1244 { 1245 regmap_exit(*(struct regmap **)res); 1246 } 1247 1248 struct regmap *__devm_regmap_init(struct device *dev, 1249 const struct regmap_bus *bus, 1250 void *bus_context, 1251 const struct regmap_config *config, 1252 struct lock_class_key *lock_key, 1253 const char *lock_name) 1254 { 1255 struct regmap **ptr, *regmap; 1256 1257 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL); 1258 if (!ptr) 1259 return ERR_PTR(-ENOMEM); 1260 1261 regmap = __regmap_init(dev, bus, bus_context, config, 1262 lock_key, lock_name); 1263 if (!IS_ERR(regmap)) { 1264 *ptr = regmap; 1265 devres_add(dev, ptr); 1266 } else { 1267 devres_free(ptr); 1268 } 1269 1270 return regmap; 1271 } 1272 EXPORT_SYMBOL_GPL(__devm_regmap_init); 1273 1274 static void regmap_field_init(struct regmap_field *rm_field, 1275 struct regmap *regmap, struct reg_field reg_field) 1276 { 1277 rm_field->regmap = regmap; 1278 rm_field->reg = reg_field.reg; 1279 rm_field->shift = reg_field.lsb; 1280 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb); 1281 rm_field->id_size = reg_field.id_size; 1282 rm_field->id_offset = reg_field.id_offset; 1283 } 1284 1285 /** 1286 * devm_regmap_field_alloc() - Allocate and initialise a register field. 1287 * 1288 * @dev: Device that will be interacted with 1289 * @regmap: regmap bank in which this register field is located. 1290 * @reg_field: Register field with in the bank. 1291 * 1292 * The return value will be an ERR_PTR() on error or a valid pointer 1293 * to a struct regmap_field. The regmap_field will be automatically freed 1294 * by the device management code. 1295 */ 1296 struct regmap_field *devm_regmap_field_alloc(struct device *dev, 1297 struct regmap *regmap, struct reg_field reg_field) 1298 { 1299 struct regmap_field *rm_field = devm_kzalloc(dev, 1300 sizeof(*rm_field), GFP_KERNEL); 1301 if (!rm_field) 1302 return ERR_PTR(-ENOMEM); 1303 1304 regmap_field_init(rm_field, regmap, reg_field); 1305 1306 return rm_field; 1307 1308 } 1309 EXPORT_SYMBOL_GPL(devm_regmap_field_alloc); 1310 1311 1312 /** 1313 * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field. 1314 * 1315 * @regmap: regmap bank in which this register field is located. 1316 * @rm_field: regmap register fields within the bank. 1317 * @reg_field: Register fields within the bank. 1318 * @num_fields: Number of register fields. 1319 * 1320 * The return value will be an -ENOMEM on error or zero for success. 1321 * Newly allocated regmap_fields should be freed by calling 1322 * regmap_field_bulk_free() 1323 */ 1324 int regmap_field_bulk_alloc(struct regmap *regmap, 1325 struct regmap_field **rm_field, 1326 const struct reg_field *reg_field, 1327 int num_fields) 1328 { 1329 struct regmap_field *rf; 1330 int i; 1331 1332 rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL); 1333 if (!rf) 1334 return -ENOMEM; 1335 1336 for (i = 0; i < num_fields; i++) { 1337 regmap_field_init(&rf[i], regmap, reg_field[i]); 1338 rm_field[i] = &rf[i]; 1339 } 1340 1341 return 0; 1342 } 1343 EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc); 1344 1345 /** 1346 * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register 1347 * fields. 1348 * 1349 * @dev: Device that will be interacted with 1350 * @regmap: regmap bank in which this register field is located. 1351 * @rm_field: regmap register fields within the bank. 1352 * @reg_field: Register fields within the bank. 1353 * @num_fields: Number of register fields. 1354 * 1355 * The return value will be an -ENOMEM on error or zero for success. 1356 * Newly allocated regmap_fields will be automatically freed by the 1357 * device management code. 1358 */ 1359 int devm_regmap_field_bulk_alloc(struct device *dev, 1360 struct regmap *regmap, 1361 struct regmap_field **rm_field, 1362 const struct reg_field *reg_field, 1363 int num_fields) 1364 { 1365 struct regmap_field *rf; 1366 int i; 1367 1368 rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL); 1369 if (!rf) 1370 return -ENOMEM; 1371 1372 for (i = 0; i < num_fields; i++) { 1373 regmap_field_init(&rf[i], regmap, reg_field[i]); 1374 rm_field[i] = &rf[i]; 1375 } 1376 1377 return 0; 1378 } 1379 EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc); 1380 1381 /** 1382 * regmap_field_bulk_free() - Free register field allocated using 1383 * regmap_field_bulk_alloc. 1384 * 1385 * @field: regmap fields which should be freed. 1386 */ 1387 void regmap_field_bulk_free(struct regmap_field *field) 1388 { 1389 kfree(field); 1390 } 1391 EXPORT_SYMBOL_GPL(regmap_field_bulk_free); 1392 1393 /** 1394 * devm_regmap_field_bulk_free() - Free a bulk register field allocated using 1395 * devm_regmap_field_bulk_alloc. 1396 * 1397 * @dev: Device that will be interacted with 1398 * @field: regmap field which should be freed. 1399 * 1400 * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually 1401 * drivers need not call this function, as the memory allocated via devm 1402 * will be freed as per device-driver life-cycle. 1403 */ 1404 void devm_regmap_field_bulk_free(struct device *dev, 1405 struct regmap_field *field) 1406 { 1407 devm_kfree(dev, field); 1408 } 1409 EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free); 1410 1411 /** 1412 * devm_regmap_field_free() - Free a register field allocated using 1413 * devm_regmap_field_alloc. 1414 * 1415 * @dev: Device that will be interacted with 1416 * @field: regmap field which should be freed. 1417 * 1418 * Free register field allocated using devm_regmap_field_alloc(). Usually 1419 * drivers need not call this function, as the memory allocated via devm 1420 * will be freed as per device-driver life-cyle. 1421 */ 1422 void devm_regmap_field_free(struct device *dev, 1423 struct regmap_field *field) 1424 { 1425 devm_kfree(dev, field); 1426 } 1427 EXPORT_SYMBOL_GPL(devm_regmap_field_free); 1428 1429 /** 1430 * regmap_field_alloc() - Allocate and initialise a register field. 1431 * 1432 * @regmap: regmap bank in which this register field is located. 1433 * @reg_field: Register field with in the bank. 1434 * 1435 * The return value will be an ERR_PTR() on error or a valid pointer 1436 * to a struct regmap_field. The regmap_field should be freed by the 1437 * user once its finished working with it using regmap_field_free(). 1438 */ 1439 struct regmap_field *regmap_field_alloc(struct regmap *regmap, 1440 struct reg_field reg_field) 1441 { 1442 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL); 1443 1444 if (!rm_field) 1445 return ERR_PTR(-ENOMEM); 1446 1447 regmap_field_init(rm_field, regmap, reg_field); 1448 1449 return rm_field; 1450 } 1451 EXPORT_SYMBOL_GPL(regmap_field_alloc); 1452 1453 /** 1454 * regmap_field_free() - Free register field allocated using 1455 * regmap_field_alloc. 1456 * 1457 * @field: regmap field which should be freed. 1458 */ 1459 void regmap_field_free(struct regmap_field *field) 1460 { 1461 kfree(field); 1462 } 1463 EXPORT_SYMBOL_GPL(regmap_field_free); 1464 1465 /** 1466 * regmap_reinit_cache() - Reinitialise the current register cache 1467 * 1468 * @map: Register map to operate on. 1469 * @config: New configuration. Only the cache data will be used. 1470 * 1471 * Discard any existing register cache for the map and initialize a 1472 * new cache. This can be used to restore the cache to defaults or to 1473 * update the cache configuration to reflect runtime discovery of the 1474 * hardware. 1475 * 1476 * No explicit locking is done here, the user needs to ensure that 1477 * this function will not race with other calls to regmap. 1478 */ 1479 int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config) 1480 { 1481 int ret; 1482 1483 regcache_exit(map); 1484 regmap_debugfs_exit(map); 1485 1486 map->max_register = config->max_register; 1487 map->writeable_reg = config->writeable_reg; 1488 map->readable_reg = config->readable_reg; 1489 map->volatile_reg = config->volatile_reg; 1490 map->precious_reg = config->precious_reg; 1491 map->writeable_noinc_reg = config->writeable_noinc_reg; 1492 map->readable_noinc_reg = config->readable_noinc_reg; 1493 map->cache_type = config->cache_type; 1494 1495 ret = regmap_set_name(map, config); 1496 if (ret) 1497 return ret; 1498 1499 regmap_debugfs_init(map); 1500 1501 map->cache_bypass = false; 1502 map->cache_only = false; 1503 1504 return regcache_init(map, config); 1505 } 1506 EXPORT_SYMBOL_GPL(regmap_reinit_cache); 1507 1508 /** 1509 * regmap_exit() - Free a previously allocated register map 1510 * 1511 * @map: Register map to operate on. 1512 */ 1513 void regmap_exit(struct regmap *map) 1514 { 1515 struct regmap_async *async; 1516 1517 regcache_exit(map); 1518 regmap_debugfs_exit(map); 1519 regmap_range_exit(map); 1520 if (map->bus && map->bus->free_context) 1521 map->bus->free_context(map->bus_context); 1522 kfree(map->work_buf); 1523 while (!list_empty(&map->async_free)) { 1524 async = list_first_entry_or_null(&map->async_free, 1525 struct regmap_async, 1526 list); 1527 list_del(&async->list); 1528 kfree(async->work_buf); 1529 kfree(async); 1530 } 1531 if (map->hwlock) 1532 hwspin_lock_free(map->hwlock); 1533 if (map->lock == regmap_lock_mutex) 1534 mutex_destroy(&map->mutex); 1535 kfree_const(map->name); 1536 kfree(map->patch); 1537 if (map->bus && map->bus->free_on_exit) 1538 kfree(map->bus); 1539 kfree(map); 1540 } 1541 EXPORT_SYMBOL_GPL(regmap_exit); 1542 1543 static int dev_get_regmap_match(struct device *dev, void *res, void *data) 1544 { 1545 struct regmap **r = res; 1546 if (!r || !*r) { 1547 WARN_ON(!r || !*r); 1548 return 0; 1549 } 1550 1551 /* If the user didn't specify a name match any */ 1552 if (data) 1553 return !strcmp((*r)->name, data); 1554 else 1555 return 1; 1556 } 1557 1558 /** 1559 * dev_get_regmap() - Obtain the regmap (if any) for a device 1560 * 1561 * @dev: Device to retrieve the map for 1562 * @name: Optional name for the register map, usually NULL. 1563 * 1564 * Returns the regmap for the device if one is present, or NULL. If 1565 * name is specified then it must match the name specified when 1566 * registering the device, if it is NULL then the first regmap found 1567 * will be used. Devices with multiple register maps are very rare, 1568 * generic code should normally not need to specify a name. 1569 */ 1570 struct regmap *dev_get_regmap(struct device *dev, const char *name) 1571 { 1572 struct regmap **r = devres_find(dev, dev_get_regmap_release, 1573 dev_get_regmap_match, (void *)name); 1574 1575 if (!r) 1576 return NULL; 1577 return *r; 1578 } 1579 EXPORT_SYMBOL_GPL(dev_get_regmap); 1580 1581 /** 1582 * regmap_get_device() - Obtain the device from a regmap 1583 * 1584 * @map: Register map to operate on. 1585 * 1586 * Returns the underlying device that the regmap has been created for. 1587 */ 1588 struct device *regmap_get_device(struct regmap *map) 1589 { 1590 return map->dev; 1591 } 1592 EXPORT_SYMBOL_GPL(regmap_get_device); 1593 1594 static int _regmap_select_page(struct regmap *map, unsigned int *reg, 1595 struct regmap_range_node *range, 1596 unsigned int val_num) 1597 { 1598 void *orig_work_buf; 1599 unsigned int win_offset; 1600 unsigned int win_page; 1601 bool page_chg; 1602 int ret; 1603 1604 win_offset = (*reg - range->range_min) % range->window_len; 1605 win_page = (*reg - range->range_min) / range->window_len; 1606 1607 if (val_num > 1) { 1608 /* Bulk write shouldn't cross range boundary */ 1609 if (*reg + val_num - 1 > range->range_max) 1610 return -EINVAL; 1611 1612 /* ... or single page boundary */ 1613 if (val_num > range->window_len - win_offset) 1614 return -EINVAL; 1615 } 1616 1617 /* It is possible to have selector register inside data window. 1618 In that case, selector register is located on every page and 1619 it needs no page switching, when accessed alone. */ 1620 if (val_num > 1 || 1621 range->window_start + win_offset != range->selector_reg) { 1622 /* Use separate work_buf during page switching */ 1623 orig_work_buf = map->work_buf; 1624 map->work_buf = map->selector_work_buf; 1625 1626 ret = _regmap_update_bits(map, range->selector_reg, 1627 range->selector_mask, 1628 win_page << range->selector_shift, 1629 &page_chg, false); 1630 1631 map->work_buf = orig_work_buf; 1632 1633 if (ret != 0) 1634 return ret; 1635 } 1636 1637 *reg = range->window_start + win_offset; 1638 1639 return 0; 1640 } 1641 1642 static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes, 1643 unsigned long mask) 1644 { 1645 u8 *buf; 1646 int i; 1647 1648 if (!mask || !map->work_buf) 1649 return; 1650 1651 buf = map->work_buf; 1652 1653 for (i = 0; i < max_bytes; i++) 1654 buf[i] |= (mask >> (8 * i)) & 0xff; 1655 } 1656 1657 static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg, 1658 const void *val, size_t val_len, bool noinc) 1659 { 1660 struct regmap_range_node *range; 1661 unsigned long flags; 1662 void *work_val = map->work_buf + map->format.reg_bytes + 1663 map->format.pad_bytes; 1664 void *buf; 1665 int ret = -ENOTSUPP; 1666 size_t len; 1667 int i; 1668 1669 WARN_ON(!map->bus); 1670 1671 /* Check for unwritable or noinc registers in range 1672 * before we start 1673 */ 1674 if (!regmap_writeable_noinc(map, reg)) { 1675 for (i = 0; i < val_len / map->format.val_bytes; i++) { 1676 unsigned int element = 1677 reg + regmap_get_offset(map, i); 1678 if (!regmap_writeable(map, element) || 1679 regmap_writeable_noinc(map, element)) 1680 return -EINVAL; 1681 } 1682 } 1683 1684 if (!map->cache_bypass && map->format.parse_val) { 1685 unsigned int ival; 1686 int val_bytes = map->format.val_bytes; 1687 for (i = 0; i < val_len / val_bytes; i++) { 1688 ival = map->format.parse_val(val + (i * val_bytes)); 1689 ret = regcache_write(map, 1690 reg + regmap_get_offset(map, i), 1691 ival); 1692 if (ret) { 1693 dev_err(map->dev, 1694 "Error in caching of register: %x ret: %d\n", 1695 reg + regmap_get_offset(map, i), ret); 1696 return ret; 1697 } 1698 } 1699 if (map->cache_only) { 1700 map->cache_dirty = true; 1701 return 0; 1702 } 1703 } 1704 1705 range = _regmap_range_lookup(map, reg); 1706 if (range) { 1707 int val_num = val_len / map->format.val_bytes; 1708 int win_offset = (reg - range->range_min) % range->window_len; 1709 int win_residue = range->window_len - win_offset; 1710 1711 /* If the write goes beyond the end of the window split it */ 1712 while (val_num > win_residue) { 1713 dev_dbg(map->dev, "Writing window %d/%zu\n", 1714 win_residue, val_len / map->format.val_bytes); 1715 ret = _regmap_raw_write_impl(map, reg, val, 1716 win_residue * 1717 map->format.val_bytes, noinc); 1718 if (ret != 0) 1719 return ret; 1720 1721 reg += win_residue; 1722 val_num -= win_residue; 1723 val += win_residue * map->format.val_bytes; 1724 val_len -= win_residue * map->format.val_bytes; 1725 1726 win_offset = (reg - range->range_min) % 1727 range->window_len; 1728 win_residue = range->window_len - win_offset; 1729 } 1730 1731 ret = _regmap_select_page(map, ®, range, noinc ? 1 : val_num); 1732 if (ret != 0) 1733 return ret; 1734 } 1735 1736 map->format.format_reg(map->work_buf, reg, map->reg_shift); 1737 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes, 1738 map->write_flag_mask); 1739 1740 /* 1741 * Essentially all I/O mechanisms will be faster with a single 1742 * buffer to write. Since register syncs often generate raw 1743 * writes of single registers optimise that case. 1744 */ 1745 if (val != work_val && val_len == map->format.val_bytes) { 1746 memcpy(work_val, val, map->format.val_bytes); 1747 val = work_val; 1748 } 1749 1750 if (map->async && map->bus->async_write) { 1751 struct regmap_async *async; 1752 1753 trace_regmap_async_write_start(map, reg, val_len); 1754 1755 spin_lock_irqsave(&map->async_lock, flags); 1756 async = list_first_entry_or_null(&map->async_free, 1757 struct regmap_async, 1758 list); 1759 if (async) 1760 list_del(&async->list); 1761 spin_unlock_irqrestore(&map->async_lock, flags); 1762 1763 if (!async) { 1764 async = map->bus->async_alloc(); 1765 if (!async) 1766 return -ENOMEM; 1767 1768 async->work_buf = kzalloc(map->format.buf_size, 1769 GFP_KERNEL | GFP_DMA); 1770 if (!async->work_buf) { 1771 kfree(async); 1772 return -ENOMEM; 1773 } 1774 } 1775 1776 async->map = map; 1777 1778 /* If the caller supplied the value we can use it safely. */ 1779 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes + 1780 map->format.reg_bytes + map->format.val_bytes); 1781 1782 spin_lock_irqsave(&map->async_lock, flags); 1783 list_add_tail(&async->list, &map->async_list); 1784 spin_unlock_irqrestore(&map->async_lock, flags); 1785 1786 if (val != work_val) 1787 ret = map->bus->async_write(map->bus_context, 1788 async->work_buf, 1789 map->format.reg_bytes + 1790 map->format.pad_bytes, 1791 val, val_len, async); 1792 else 1793 ret = map->bus->async_write(map->bus_context, 1794 async->work_buf, 1795 map->format.reg_bytes + 1796 map->format.pad_bytes + 1797 val_len, NULL, 0, async); 1798 1799 if (ret != 0) { 1800 dev_err(map->dev, "Failed to schedule write: %d\n", 1801 ret); 1802 1803 spin_lock_irqsave(&map->async_lock, flags); 1804 list_move(&async->list, &map->async_free); 1805 spin_unlock_irqrestore(&map->async_lock, flags); 1806 } 1807 1808 return ret; 1809 } 1810 1811 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes); 1812 1813 /* If we're doing a single register write we can probably just 1814 * send the work_buf directly, otherwise try to do a gather 1815 * write. 1816 */ 1817 if (val == work_val) 1818 ret = map->bus->write(map->bus_context, map->work_buf, 1819 map->format.reg_bytes + 1820 map->format.pad_bytes + 1821 val_len); 1822 else if (map->bus->gather_write) 1823 ret = map->bus->gather_write(map->bus_context, map->work_buf, 1824 map->format.reg_bytes + 1825 map->format.pad_bytes, 1826 val, val_len); 1827 else 1828 ret = -ENOTSUPP; 1829 1830 /* If that didn't work fall back on linearising by hand. */ 1831 if (ret == -ENOTSUPP) { 1832 len = map->format.reg_bytes + map->format.pad_bytes + val_len; 1833 buf = kzalloc(len, GFP_KERNEL); 1834 if (!buf) 1835 return -ENOMEM; 1836 1837 memcpy(buf, map->work_buf, map->format.reg_bytes); 1838 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes, 1839 val, val_len); 1840 ret = map->bus->write(map->bus_context, buf, len); 1841 1842 kfree(buf); 1843 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) { 1844 /* regcache_drop_region() takes lock that we already have, 1845 * thus call map->cache_ops->drop() directly 1846 */ 1847 if (map->cache_ops && map->cache_ops->drop) 1848 map->cache_ops->drop(map, reg, reg + 1); 1849 } 1850 1851 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes); 1852 1853 return ret; 1854 } 1855 1856 /** 1857 * regmap_can_raw_write - Test if regmap_raw_write() is supported 1858 * 1859 * @map: Map to check. 1860 */ 1861 bool regmap_can_raw_write(struct regmap *map) 1862 { 1863 return map->bus && map->bus->write && map->format.format_val && 1864 map->format.format_reg; 1865 } 1866 EXPORT_SYMBOL_GPL(regmap_can_raw_write); 1867 1868 /** 1869 * regmap_get_raw_read_max - Get the maximum size we can read 1870 * 1871 * @map: Map to check. 1872 */ 1873 size_t regmap_get_raw_read_max(struct regmap *map) 1874 { 1875 return map->max_raw_read; 1876 } 1877 EXPORT_SYMBOL_GPL(regmap_get_raw_read_max); 1878 1879 /** 1880 * regmap_get_raw_write_max - Get the maximum size we can read 1881 * 1882 * @map: Map to check. 1883 */ 1884 size_t regmap_get_raw_write_max(struct regmap *map) 1885 { 1886 return map->max_raw_write; 1887 } 1888 EXPORT_SYMBOL_GPL(regmap_get_raw_write_max); 1889 1890 static int _regmap_bus_formatted_write(void *context, unsigned int reg, 1891 unsigned int val) 1892 { 1893 int ret; 1894 struct regmap_range_node *range; 1895 struct regmap *map = context; 1896 1897 WARN_ON(!map->bus || !map->format.format_write); 1898 1899 range = _regmap_range_lookup(map, reg); 1900 if (range) { 1901 ret = _regmap_select_page(map, ®, range, 1); 1902 if (ret != 0) 1903 return ret; 1904 } 1905 1906 map->format.format_write(map, reg, val); 1907 1908 trace_regmap_hw_write_start(map, reg, 1); 1909 1910 ret = map->bus->write(map->bus_context, map->work_buf, 1911 map->format.buf_size); 1912 1913 trace_regmap_hw_write_done(map, reg, 1); 1914 1915 return ret; 1916 } 1917 1918 static int _regmap_bus_reg_write(void *context, unsigned int reg, 1919 unsigned int val) 1920 { 1921 struct regmap *map = context; 1922 1923 return map->bus->reg_write(map->bus_context, reg, val); 1924 } 1925 1926 static int _regmap_bus_raw_write(void *context, unsigned int reg, 1927 unsigned int val) 1928 { 1929 struct regmap *map = context; 1930 1931 WARN_ON(!map->bus || !map->format.format_val); 1932 1933 map->format.format_val(map->work_buf + map->format.reg_bytes 1934 + map->format.pad_bytes, val, 0); 1935 return _regmap_raw_write_impl(map, reg, 1936 map->work_buf + 1937 map->format.reg_bytes + 1938 map->format.pad_bytes, 1939 map->format.val_bytes, 1940 false); 1941 } 1942 1943 static inline void *_regmap_map_get_context(struct regmap *map) 1944 { 1945 return (map->bus) ? map : map->bus_context; 1946 } 1947 1948 int _regmap_write(struct regmap *map, unsigned int reg, 1949 unsigned int val) 1950 { 1951 int ret; 1952 void *context = _regmap_map_get_context(map); 1953 1954 if (!regmap_writeable(map, reg)) 1955 return -EIO; 1956 1957 if (!map->cache_bypass && !map->defer_caching) { 1958 ret = regcache_write(map, reg, val); 1959 if (ret != 0) 1960 return ret; 1961 if (map->cache_only) { 1962 map->cache_dirty = true; 1963 return 0; 1964 } 1965 } 1966 1967 ret = map->reg_write(context, reg, val); 1968 if (ret == 0) { 1969 if (regmap_should_log(map)) 1970 dev_info(map->dev, "%x <= %x\n", reg, val); 1971 1972 trace_regmap_reg_write(map, reg, val); 1973 } 1974 1975 return ret; 1976 } 1977 1978 /** 1979 * regmap_write() - Write a value to a single register 1980 * 1981 * @map: Register map to write to 1982 * @reg: Register to write to 1983 * @val: Value to be written 1984 * 1985 * A value of zero will be returned on success, a negative errno will 1986 * be returned in error cases. 1987 */ 1988 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val) 1989 { 1990 int ret; 1991 1992 if (!IS_ALIGNED(reg, map->reg_stride)) 1993 return -EINVAL; 1994 1995 map->lock(map->lock_arg); 1996 1997 ret = _regmap_write(map, reg, val); 1998 1999 map->unlock(map->lock_arg); 2000 2001 return ret; 2002 } 2003 EXPORT_SYMBOL_GPL(regmap_write); 2004 2005 /** 2006 * regmap_write_async() - Write a value to a single register asynchronously 2007 * 2008 * @map: Register map to write to 2009 * @reg: Register to write to 2010 * @val: Value to be written 2011 * 2012 * A value of zero will be returned on success, a negative errno will 2013 * be returned in error cases. 2014 */ 2015 int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val) 2016 { 2017 int ret; 2018 2019 if (!IS_ALIGNED(reg, map->reg_stride)) 2020 return -EINVAL; 2021 2022 map->lock(map->lock_arg); 2023 2024 map->async = true; 2025 2026 ret = _regmap_write(map, reg, val); 2027 2028 map->async = false; 2029 2030 map->unlock(map->lock_arg); 2031 2032 return ret; 2033 } 2034 EXPORT_SYMBOL_GPL(regmap_write_async); 2035 2036 int _regmap_raw_write(struct regmap *map, unsigned int reg, 2037 const void *val, size_t val_len, bool noinc) 2038 { 2039 size_t val_bytes = map->format.val_bytes; 2040 size_t val_count = val_len / val_bytes; 2041 size_t chunk_count, chunk_bytes; 2042 size_t chunk_regs = val_count; 2043 int ret, i; 2044 2045 if (!val_count) 2046 return -EINVAL; 2047 2048 if (map->use_single_write) 2049 chunk_regs = 1; 2050 else if (map->max_raw_write && val_len > map->max_raw_write) 2051 chunk_regs = map->max_raw_write / val_bytes; 2052 2053 chunk_count = val_count / chunk_regs; 2054 chunk_bytes = chunk_regs * val_bytes; 2055 2056 /* Write as many bytes as possible with chunk_size */ 2057 for (i = 0; i < chunk_count; i++) { 2058 ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc); 2059 if (ret) 2060 return ret; 2061 2062 reg += regmap_get_offset(map, chunk_regs); 2063 val += chunk_bytes; 2064 val_len -= chunk_bytes; 2065 } 2066 2067 /* Write remaining bytes */ 2068 if (val_len) 2069 ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc); 2070 2071 return ret; 2072 } 2073 2074 /** 2075 * regmap_raw_write() - Write raw values to one or more registers 2076 * 2077 * @map: Register map to write to 2078 * @reg: Initial register to write to 2079 * @val: Block of data to be written, laid out for direct transmission to the 2080 * device 2081 * @val_len: Length of data pointed to by val. 2082 * 2083 * This function is intended to be used for things like firmware 2084 * download where a large block of data needs to be transferred to the 2085 * device. No formatting will be done on the data provided. 2086 * 2087 * A value of zero will be returned on success, a negative errno will 2088 * be returned in error cases. 2089 */ 2090 int regmap_raw_write(struct regmap *map, unsigned int reg, 2091 const void *val, size_t val_len) 2092 { 2093 int ret; 2094 2095 if (!regmap_can_raw_write(map)) 2096 return -EINVAL; 2097 if (val_len % map->format.val_bytes) 2098 return -EINVAL; 2099 2100 map->lock(map->lock_arg); 2101 2102 ret = _regmap_raw_write(map, reg, val, val_len, false); 2103 2104 map->unlock(map->lock_arg); 2105 2106 return ret; 2107 } 2108 EXPORT_SYMBOL_GPL(regmap_raw_write); 2109 2110 /** 2111 * regmap_noinc_write(): Write data from a register without incrementing the 2112 * register number 2113 * 2114 * @map: Register map to write to 2115 * @reg: Register to write to 2116 * @val: Pointer to data buffer 2117 * @val_len: Length of output buffer in bytes. 2118 * 2119 * The regmap API usually assumes that bulk bus write operations will write a 2120 * range of registers. Some devices have certain registers for which a write 2121 * operation can write to an internal FIFO. 2122 * 2123 * The target register must be volatile but registers after it can be 2124 * completely unrelated cacheable registers. 2125 * 2126 * This will attempt multiple writes as required to write val_len bytes. 2127 * 2128 * A value of zero will be returned on success, a negative errno will be 2129 * returned in error cases. 2130 */ 2131 int regmap_noinc_write(struct regmap *map, unsigned int reg, 2132 const void *val, size_t val_len) 2133 { 2134 size_t write_len; 2135 int ret; 2136 2137 if (!map->bus) 2138 return -EINVAL; 2139 if (!map->bus->write) 2140 return -ENOTSUPP; 2141 if (val_len % map->format.val_bytes) 2142 return -EINVAL; 2143 if (!IS_ALIGNED(reg, map->reg_stride)) 2144 return -EINVAL; 2145 if (val_len == 0) 2146 return -EINVAL; 2147 2148 map->lock(map->lock_arg); 2149 2150 if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) { 2151 ret = -EINVAL; 2152 goto out_unlock; 2153 } 2154 2155 while (val_len) { 2156 if (map->max_raw_write && map->max_raw_write < val_len) 2157 write_len = map->max_raw_write; 2158 else 2159 write_len = val_len; 2160 ret = _regmap_raw_write(map, reg, val, write_len, true); 2161 if (ret) 2162 goto out_unlock; 2163 val = ((u8 *)val) + write_len; 2164 val_len -= write_len; 2165 } 2166 2167 out_unlock: 2168 map->unlock(map->lock_arg); 2169 return ret; 2170 } 2171 EXPORT_SYMBOL_GPL(regmap_noinc_write); 2172 2173 /** 2174 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a 2175 * register field. 2176 * 2177 * @field: Register field to write to 2178 * @mask: Bitmask to change 2179 * @val: Value to be written 2180 * @change: Boolean indicating if a write was done 2181 * @async: Boolean indicating asynchronously 2182 * @force: Boolean indicating use force update 2183 * 2184 * Perform a read/modify/write cycle on the register field with change, 2185 * async, force option. 2186 * 2187 * A value of zero will be returned on success, a negative errno will 2188 * be returned in error cases. 2189 */ 2190 int regmap_field_update_bits_base(struct regmap_field *field, 2191 unsigned int mask, unsigned int val, 2192 bool *change, bool async, bool force) 2193 { 2194 mask = (mask << field->shift) & field->mask; 2195 2196 return regmap_update_bits_base(field->regmap, field->reg, 2197 mask, val << field->shift, 2198 change, async, force); 2199 } 2200 EXPORT_SYMBOL_GPL(regmap_field_update_bits_base); 2201 2202 /** 2203 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a 2204 * register field with port ID 2205 * 2206 * @field: Register field to write to 2207 * @id: port ID 2208 * @mask: Bitmask to change 2209 * @val: Value to be written 2210 * @change: Boolean indicating if a write was done 2211 * @async: Boolean indicating asynchronously 2212 * @force: Boolean indicating use force update 2213 * 2214 * A value of zero will be returned on success, a negative errno will 2215 * be returned in error cases. 2216 */ 2217 int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, 2218 unsigned int mask, unsigned int val, 2219 bool *change, bool async, bool force) 2220 { 2221 if (id >= field->id_size) 2222 return -EINVAL; 2223 2224 mask = (mask << field->shift) & field->mask; 2225 2226 return regmap_update_bits_base(field->regmap, 2227 field->reg + (field->id_offset * id), 2228 mask, val << field->shift, 2229 change, async, force); 2230 } 2231 EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base); 2232 2233 /** 2234 * regmap_bulk_write() - Write multiple registers to the device 2235 * 2236 * @map: Register map to write to 2237 * @reg: First register to be write from 2238 * @val: Block of data to be written, in native register size for device 2239 * @val_count: Number of registers to write 2240 * 2241 * This function is intended to be used for writing a large block of 2242 * data to the device either in single transfer or multiple transfer. 2243 * 2244 * A value of zero will be returned on success, a negative errno will 2245 * be returned in error cases. 2246 */ 2247 int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, 2248 size_t val_count) 2249 { 2250 int ret = 0, i; 2251 size_t val_bytes = map->format.val_bytes; 2252 2253 if (!IS_ALIGNED(reg, map->reg_stride)) 2254 return -EINVAL; 2255 2256 /* 2257 * Some devices don't support bulk write, for them we have a series of 2258 * single write operations. 2259 */ 2260 if (!map->bus || !map->format.parse_inplace) { 2261 map->lock(map->lock_arg); 2262 for (i = 0; i < val_count; i++) { 2263 unsigned int ival; 2264 2265 switch (val_bytes) { 2266 case 1: 2267 ival = *(u8 *)(val + (i * val_bytes)); 2268 break; 2269 case 2: 2270 ival = *(u16 *)(val + (i * val_bytes)); 2271 break; 2272 case 4: 2273 ival = *(u32 *)(val + (i * val_bytes)); 2274 break; 2275 #ifdef CONFIG_64BIT 2276 case 8: 2277 ival = *(u64 *)(val + (i * val_bytes)); 2278 break; 2279 #endif 2280 default: 2281 ret = -EINVAL; 2282 goto out; 2283 } 2284 2285 ret = _regmap_write(map, 2286 reg + regmap_get_offset(map, i), 2287 ival); 2288 if (ret != 0) 2289 goto out; 2290 } 2291 out: 2292 map->unlock(map->lock_arg); 2293 } else { 2294 void *wval; 2295 2296 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags); 2297 if (!wval) 2298 return -ENOMEM; 2299 2300 for (i = 0; i < val_count * val_bytes; i += val_bytes) 2301 map->format.parse_inplace(wval + i); 2302 2303 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count); 2304 2305 kfree(wval); 2306 } 2307 return ret; 2308 } 2309 EXPORT_SYMBOL_GPL(regmap_bulk_write); 2310 2311 /* 2312 * _regmap_raw_multi_reg_write() 2313 * 2314 * the (register,newvalue) pairs in regs have not been formatted, but 2315 * they are all in the same page and have been changed to being page 2316 * relative. The page register has been written if that was necessary. 2317 */ 2318 static int _regmap_raw_multi_reg_write(struct regmap *map, 2319 const struct reg_sequence *regs, 2320 size_t num_regs) 2321 { 2322 int ret; 2323 void *buf; 2324 int i; 2325 u8 *u8; 2326 size_t val_bytes = map->format.val_bytes; 2327 size_t reg_bytes = map->format.reg_bytes; 2328 size_t pad_bytes = map->format.pad_bytes; 2329 size_t pair_size = reg_bytes + pad_bytes + val_bytes; 2330 size_t len = pair_size * num_regs; 2331 2332 if (!len) 2333 return -EINVAL; 2334 2335 buf = kzalloc(len, GFP_KERNEL); 2336 if (!buf) 2337 return -ENOMEM; 2338 2339 /* We have to linearise by hand. */ 2340 2341 u8 = buf; 2342 2343 for (i = 0; i < num_regs; i++) { 2344 unsigned int reg = regs[i].reg; 2345 unsigned int val = regs[i].def; 2346 trace_regmap_hw_write_start(map, reg, 1); 2347 map->format.format_reg(u8, reg, map->reg_shift); 2348 u8 += reg_bytes + pad_bytes; 2349 map->format.format_val(u8, val, 0); 2350 u8 += val_bytes; 2351 } 2352 u8 = buf; 2353 *u8 |= map->write_flag_mask; 2354 2355 ret = map->bus->write(map->bus_context, buf, len); 2356 2357 kfree(buf); 2358 2359 for (i = 0; i < num_regs; i++) { 2360 int reg = regs[i].reg; 2361 trace_regmap_hw_write_done(map, reg, 1); 2362 } 2363 return ret; 2364 } 2365 2366 static unsigned int _regmap_register_page(struct regmap *map, 2367 unsigned int reg, 2368 struct regmap_range_node *range) 2369 { 2370 unsigned int win_page = (reg - range->range_min) / range->window_len; 2371 2372 return win_page; 2373 } 2374 2375 static int _regmap_range_multi_paged_reg_write(struct regmap *map, 2376 struct reg_sequence *regs, 2377 size_t num_regs) 2378 { 2379 int ret; 2380 int i, n; 2381 struct reg_sequence *base; 2382 unsigned int this_page = 0; 2383 unsigned int page_change = 0; 2384 /* 2385 * the set of registers are not neccessarily in order, but 2386 * since the order of write must be preserved this algorithm 2387 * chops the set each time the page changes. This also applies 2388 * if there is a delay required at any point in the sequence. 2389 */ 2390 base = regs; 2391 for (i = 0, n = 0; i < num_regs; i++, n++) { 2392 unsigned int reg = regs[i].reg; 2393 struct regmap_range_node *range; 2394 2395 range = _regmap_range_lookup(map, reg); 2396 if (range) { 2397 unsigned int win_page = _regmap_register_page(map, reg, 2398 range); 2399 2400 if (i == 0) 2401 this_page = win_page; 2402 if (win_page != this_page) { 2403 this_page = win_page; 2404 page_change = 1; 2405 } 2406 } 2407 2408 /* If we have both a page change and a delay make sure to 2409 * write the regs and apply the delay before we change the 2410 * page. 2411 */ 2412 2413 if (page_change || regs[i].delay_us) { 2414 2415 /* For situations where the first write requires 2416 * a delay we need to make sure we don't call 2417 * raw_multi_reg_write with n=0 2418 * This can't occur with page breaks as we 2419 * never write on the first iteration 2420 */ 2421 if (regs[i].delay_us && i == 0) 2422 n = 1; 2423 2424 ret = _regmap_raw_multi_reg_write(map, base, n); 2425 if (ret != 0) 2426 return ret; 2427 2428 if (regs[i].delay_us) { 2429 if (map->can_sleep) 2430 fsleep(regs[i].delay_us); 2431 else 2432 udelay(regs[i].delay_us); 2433 } 2434 2435 base += n; 2436 n = 0; 2437 2438 if (page_change) { 2439 ret = _regmap_select_page(map, 2440 &base[n].reg, 2441 range, 1); 2442 if (ret != 0) 2443 return ret; 2444 2445 page_change = 0; 2446 } 2447 2448 } 2449 2450 } 2451 if (n > 0) 2452 return _regmap_raw_multi_reg_write(map, base, n); 2453 return 0; 2454 } 2455 2456 static int _regmap_multi_reg_write(struct regmap *map, 2457 const struct reg_sequence *regs, 2458 size_t num_regs) 2459 { 2460 int i; 2461 int ret; 2462 2463 if (!map->can_multi_write) { 2464 for (i = 0; i < num_regs; i++) { 2465 ret = _regmap_write(map, regs[i].reg, regs[i].def); 2466 if (ret != 0) 2467 return ret; 2468 2469 if (regs[i].delay_us) { 2470 if (map->can_sleep) 2471 fsleep(regs[i].delay_us); 2472 else 2473 udelay(regs[i].delay_us); 2474 } 2475 } 2476 return 0; 2477 } 2478 2479 if (!map->format.parse_inplace) 2480 return -EINVAL; 2481 2482 if (map->writeable_reg) 2483 for (i = 0; i < num_regs; i++) { 2484 int reg = regs[i].reg; 2485 if (!map->writeable_reg(map->dev, reg)) 2486 return -EINVAL; 2487 if (!IS_ALIGNED(reg, map->reg_stride)) 2488 return -EINVAL; 2489 } 2490 2491 if (!map->cache_bypass) { 2492 for (i = 0; i < num_regs; i++) { 2493 unsigned int val = regs[i].def; 2494 unsigned int reg = regs[i].reg; 2495 ret = regcache_write(map, reg, val); 2496 if (ret) { 2497 dev_err(map->dev, 2498 "Error in caching of register: %x ret: %d\n", 2499 reg, ret); 2500 return ret; 2501 } 2502 } 2503 if (map->cache_only) { 2504 map->cache_dirty = true; 2505 return 0; 2506 } 2507 } 2508 2509 WARN_ON(!map->bus); 2510 2511 for (i = 0; i < num_regs; i++) { 2512 unsigned int reg = regs[i].reg; 2513 struct regmap_range_node *range; 2514 2515 /* Coalesce all the writes between a page break or a delay 2516 * in a sequence 2517 */ 2518 range = _regmap_range_lookup(map, reg); 2519 if (range || regs[i].delay_us) { 2520 size_t len = sizeof(struct reg_sequence)*num_regs; 2521 struct reg_sequence *base = kmemdup(regs, len, 2522 GFP_KERNEL); 2523 if (!base) 2524 return -ENOMEM; 2525 ret = _regmap_range_multi_paged_reg_write(map, base, 2526 num_regs); 2527 kfree(base); 2528 2529 return ret; 2530 } 2531 } 2532 return _regmap_raw_multi_reg_write(map, regs, num_regs); 2533 } 2534 2535 /** 2536 * regmap_multi_reg_write() - Write multiple registers to the device 2537 * 2538 * @map: Register map to write to 2539 * @regs: Array of structures containing register,value to be written 2540 * @num_regs: Number of registers to write 2541 * 2542 * Write multiple registers to the device where the set of register, value 2543 * pairs are supplied in any order, possibly not all in a single range. 2544 * 2545 * The 'normal' block write mode will send ultimately send data on the 2546 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are 2547 * addressed. However, this alternative block multi write mode will send 2548 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device 2549 * must of course support the mode. 2550 * 2551 * A value of zero will be returned on success, a negative errno will be 2552 * returned in error cases. 2553 */ 2554 int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, 2555 int num_regs) 2556 { 2557 int ret; 2558 2559 map->lock(map->lock_arg); 2560 2561 ret = _regmap_multi_reg_write(map, regs, num_regs); 2562 2563 map->unlock(map->lock_arg); 2564 2565 return ret; 2566 } 2567 EXPORT_SYMBOL_GPL(regmap_multi_reg_write); 2568 2569 /** 2570 * regmap_multi_reg_write_bypassed() - Write multiple registers to the 2571 * device but not the cache 2572 * 2573 * @map: Register map to write to 2574 * @regs: Array of structures containing register,value to be written 2575 * @num_regs: Number of registers to write 2576 * 2577 * Write multiple registers to the device but not the cache where the set 2578 * of register are supplied in any order. 2579 * 2580 * This function is intended to be used for writing a large block of data 2581 * atomically to the device in single transfer for those I2C client devices 2582 * that implement this alternative block write mode. 2583 * 2584 * A value of zero will be returned on success, a negative errno will 2585 * be returned in error cases. 2586 */ 2587 int regmap_multi_reg_write_bypassed(struct regmap *map, 2588 const struct reg_sequence *regs, 2589 int num_regs) 2590 { 2591 int ret; 2592 bool bypass; 2593 2594 map->lock(map->lock_arg); 2595 2596 bypass = map->cache_bypass; 2597 map->cache_bypass = true; 2598 2599 ret = _regmap_multi_reg_write(map, regs, num_regs); 2600 2601 map->cache_bypass = bypass; 2602 2603 map->unlock(map->lock_arg); 2604 2605 return ret; 2606 } 2607 EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed); 2608 2609 /** 2610 * regmap_raw_write_async() - Write raw values to one or more registers 2611 * asynchronously 2612 * 2613 * @map: Register map to write to 2614 * @reg: Initial register to write to 2615 * @val: Block of data to be written, laid out for direct transmission to the 2616 * device. Must be valid until regmap_async_complete() is called. 2617 * @val_len: Length of data pointed to by val. 2618 * 2619 * This function is intended to be used for things like firmware 2620 * download where a large block of data needs to be transferred to the 2621 * device. No formatting will be done on the data provided. 2622 * 2623 * If supported by the underlying bus the write will be scheduled 2624 * asynchronously, helping maximise I/O speed on higher speed buses 2625 * like SPI. regmap_async_complete() can be called to ensure that all 2626 * asynchrnous writes have been completed. 2627 * 2628 * A value of zero will be returned on success, a negative errno will 2629 * be returned in error cases. 2630 */ 2631 int regmap_raw_write_async(struct regmap *map, unsigned int reg, 2632 const void *val, size_t val_len) 2633 { 2634 int ret; 2635 2636 if (val_len % map->format.val_bytes) 2637 return -EINVAL; 2638 if (!IS_ALIGNED(reg, map->reg_stride)) 2639 return -EINVAL; 2640 2641 map->lock(map->lock_arg); 2642 2643 map->async = true; 2644 2645 ret = _regmap_raw_write(map, reg, val, val_len, false); 2646 2647 map->async = false; 2648 2649 map->unlock(map->lock_arg); 2650 2651 return ret; 2652 } 2653 EXPORT_SYMBOL_GPL(regmap_raw_write_async); 2654 2655 static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val, 2656 unsigned int val_len, bool noinc) 2657 { 2658 struct regmap_range_node *range; 2659 int ret; 2660 2661 WARN_ON(!map->bus); 2662 2663 if (!map->bus || !map->bus->read) 2664 return -EINVAL; 2665 2666 range = _regmap_range_lookup(map, reg); 2667 if (range) { 2668 ret = _regmap_select_page(map, ®, range, 2669 noinc ? 1 : val_len / map->format.val_bytes); 2670 if (ret != 0) 2671 return ret; 2672 } 2673 2674 map->format.format_reg(map->work_buf, reg, map->reg_shift); 2675 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes, 2676 map->read_flag_mask); 2677 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes); 2678 2679 ret = map->bus->read(map->bus_context, map->work_buf, 2680 map->format.reg_bytes + map->format.pad_bytes, 2681 val, val_len); 2682 2683 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes); 2684 2685 return ret; 2686 } 2687 2688 static int _regmap_bus_reg_read(void *context, unsigned int reg, 2689 unsigned int *val) 2690 { 2691 struct regmap *map = context; 2692 2693 return map->bus->reg_read(map->bus_context, reg, val); 2694 } 2695 2696 static int _regmap_bus_read(void *context, unsigned int reg, 2697 unsigned int *val) 2698 { 2699 int ret; 2700 struct regmap *map = context; 2701 void *work_val = map->work_buf + map->format.reg_bytes + 2702 map->format.pad_bytes; 2703 2704 if (!map->format.parse_val) 2705 return -EINVAL; 2706 2707 ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false); 2708 if (ret == 0) 2709 *val = map->format.parse_val(work_val); 2710 2711 return ret; 2712 } 2713 2714 static int _regmap_read(struct regmap *map, unsigned int reg, 2715 unsigned int *val) 2716 { 2717 int ret; 2718 void *context = _regmap_map_get_context(map); 2719 2720 if (!map->cache_bypass) { 2721 ret = regcache_read(map, reg, val); 2722 if (ret == 0) 2723 return 0; 2724 } 2725 2726 if (map->cache_only) 2727 return -EBUSY; 2728 2729 if (!regmap_readable(map, reg)) 2730 return -EIO; 2731 2732 ret = map->reg_read(context, reg, val); 2733 if (ret == 0) { 2734 if (regmap_should_log(map)) 2735 dev_info(map->dev, "%x => %x\n", reg, *val); 2736 2737 trace_regmap_reg_read(map, reg, *val); 2738 2739 if (!map->cache_bypass) 2740 regcache_write(map, reg, *val); 2741 } 2742 2743 return ret; 2744 } 2745 2746 /** 2747 * regmap_read() - Read a value from a single register 2748 * 2749 * @map: Register map to read from 2750 * @reg: Register to be read from 2751 * @val: Pointer to store read value 2752 * 2753 * A value of zero will be returned on success, a negative errno will 2754 * be returned in error cases. 2755 */ 2756 int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val) 2757 { 2758 int ret; 2759 2760 if (!IS_ALIGNED(reg, map->reg_stride)) 2761 return -EINVAL; 2762 2763 map->lock(map->lock_arg); 2764 2765 ret = _regmap_read(map, reg, val); 2766 2767 map->unlock(map->lock_arg); 2768 2769 return ret; 2770 } 2771 EXPORT_SYMBOL_GPL(regmap_read); 2772 2773 /** 2774 * regmap_raw_read() - Read raw data from the device 2775 * 2776 * @map: Register map to read from 2777 * @reg: First register to be read from 2778 * @val: Pointer to store read value 2779 * @val_len: Size of data to read 2780 * 2781 * A value of zero will be returned on success, a negative errno will 2782 * be returned in error cases. 2783 */ 2784 int regmap_raw_read(struct regmap *map, unsigned int reg, void *val, 2785 size_t val_len) 2786 { 2787 size_t val_bytes = map->format.val_bytes; 2788 size_t val_count = val_len / val_bytes; 2789 unsigned int v; 2790 int ret, i; 2791 2792 if (!map->bus) 2793 return -EINVAL; 2794 if (val_len % map->format.val_bytes) 2795 return -EINVAL; 2796 if (!IS_ALIGNED(reg, map->reg_stride)) 2797 return -EINVAL; 2798 if (val_count == 0) 2799 return -EINVAL; 2800 2801 map->lock(map->lock_arg); 2802 2803 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass || 2804 map->cache_type == REGCACHE_NONE) { 2805 size_t chunk_count, chunk_bytes; 2806 size_t chunk_regs = val_count; 2807 2808 if (!map->bus->read) { 2809 ret = -ENOTSUPP; 2810 goto out; 2811 } 2812 2813 if (map->use_single_read) 2814 chunk_regs = 1; 2815 else if (map->max_raw_read && val_len > map->max_raw_read) 2816 chunk_regs = map->max_raw_read / val_bytes; 2817 2818 chunk_count = val_count / chunk_regs; 2819 chunk_bytes = chunk_regs * val_bytes; 2820 2821 /* Read bytes that fit into whole chunks */ 2822 for (i = 0; i < chunk_count; i++) { 2823 ret = _regmap_raw_read(map, reg, val, chunk_bytes, false); 2824 if (ret != 0) 2825 goto out; 2826 2827 reg += regmap_get_offset(map, chunk_regs); 2828 val += chunk_bytes; 2829 val_len -= chunk_bytes; 2830 } 2831 2832 /* Read remaining bytes */ 2833 if (val_len) { 2834 ret = _regmap_raw_read(map, reg, val, val_len, false); 2835 if (ret != 0) 2836 goto out; 2837 } 2838 } else { 2839 /* Otherwise go word by word for the cache; should be low 2840 * cost as we expect to hit the cache. 2841 */ 2842 for (i = 0; i < val_count; i++) { 2843 ret = _regmap_read(map, reg + regmap_get_offset(map, i), 2844 &v); 2845 if (ret != 0) 2846 goto out; 2847 2848 map->format.format_val(val + (i * val_bytes), v, 0); 2849 } 2850 } 2851 2852 out: 2853 map->unlock(map->lock_arg); 2854 2855 return ret; 2856 } 2857 EXPORT_SYMBOL_GPL(regmap_raw_read); 2858 2859 /** 2860 * regmap_noinc_read(): Read data from a register without incrementing the 2861 * register number 2862 * 2863 * @map: Register map to read from 2864 * @reg: Register to read from 2865 * @val: Pointer to data buffer 2866 * @val_len: Length of output buffer in bytes. 2867 * 2868 * The regmap API usually assumes that bulk bus read operations will read a 2869 * range of registers. Some devices have certain registers for which a read 2870 * operation read will read from an internal FIFO. 2871 * 2872 * The target register must be volatile but registers after it can be 2873 * completely unrelated cacheable registers. 2874 * 2875 * This will attempt multiple reads as required to read val_len bytes. 2876 * 2877 * A value of zero will be returned on success, a negative errno will be 2878 * returned in error cases. 2879 */ 2880 int regmap_noinc_read(struct regmap *map, unsigned int reg, 2881 void *val, size_t val_len) 2882 { 2883 size_t read_len; 2884 int ret; 2885 2886 if (!map->bus) 2887 return -EINVAL; 2888 if (!map->bus->read) 2889 return -ENOTSUPP; 2890 if (val_len % map->format.val_bytes) 2891 return -EINVAL; 2892 if (!IS_ALIGNED(reg, map->reg_stride)) 2893 return -EINVAL; 2894 if (val_len == 0) 2895 return -EINVAL; 2896 2897 map->lock(map->lock_arg); 2898 2899 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) { 2900 ret = -EINVAL; 2901 goto out_unlock; 2902 } 2903 2904 while (val_len) { 2905 if (map->max_raw_read && map->max_raw_read < val_len) 2906 read_len = map->max_raw_read; 2907 else 2908 read_len = val_len; 2909 ret = _regmap_raw_read(map, reg, val, read_len, true); 2910 if (ret) 2911 goto out_unlock; 2912 val = ((u8 *)val) + read_len; 2913 val_len -= read_len; 2914 } 2915 2916 out_unlock: 2917 map->unlock(map->lock_arg); 2918 return ret; 2919 } 2920 EXPORT_SYMBOL_GPL(regmap_noinc_read); 2921 2922 /** 2923 * regmap_field_read(): Read a value to a single register field 2924 * 2925 * @field: Register field to read from 2926 * @val: Pointer to store read value 2927 * 2928 * A value of zero will be returned on success, a negative errno will 2929 * be returned in error cases. 2930 */ 2931 int regmap_field_read(struct regmap_field *field, unsigned int *val) 2932 { 2933 int ret; 2934 unsigned int reg_val; 2935 ret = regmap_read(field->regmap, field->reg, ®_val); 2936 if (ret != 0) 2937 return ret; 2938 2939 reg_val &= field->mask; 2940 reg_val >>= field->shift; 2941 *val = reg_val; 2942 2943 return ret; 2944 } 2945 EXPORT_SYMBOL_GPL(regmap_field_read); 2946 2947 /** 2948 * regmap_fields_read() - Read a value to a single register field with port ID 2949 * 2950 * @field: Register field to read from 2951 * @id: port ID 2952 * @val: Pointer to store read value 2953 * 2954 * A value of zero will be returned on success, a negative errno will 2955 * be returned in error cases. 2956 */ 2957 int regmap_fields_read(struct regmap_field *field, unsigned int id, 2958 unsigned int *val) 2959 { 2960 int ret; 2961 unsigned int reg_val; 2962 2963 if (id >= field->id_size) 2964 return -EINVAL; 2965 2966 ret = regmap_read(field->regmap, 2967 field->reg + (field->id_offset * id), 2968 ®_val); 2969 if (ret != 0) 2970 return ret; 2971 2972 reg_val &= field->mask; 2973 reg_val >>= field->shift; 2974 *val = reg_val; 2975 2976 return ret; 2977 } 2978 EXPORT_SYMBOL_GPL(regmap_fields_read); 2979 2980 /** 2981 * regmap_bulk_read() - Read multiple registers from the device 2982 * 2983 * @map: Register map to read from 2984 * @reg: First register to be read from 2985 * @val: Pointer to store read value, in native register size for device 2986 * @val_count: Number of registers to read 2987 * 2988 * A value of zero will be returned on success, a negative errno will 2989 * be returned in error cases. 2990 */ 2991 int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, 2992 size_t val_count) 2993 { 2994 int ret, i; 2995 size_t val_bytes = map->format.val_bytes; 2996 bool vol = regmap_volatile_range(map, reg, val_count); 2997 2998 if (!IS_ALIGNED(reg, map->reg_stride)) 2999 return -EINVAL; 3000 if (val_count == 0) 3001 return -EINVAL; 3002 3003 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) { 3004 ret = regmap_raw_read(map, reg, val, val_bytes * val_count); 3005 if (ret != 0) 3006 return ret; 3007 3008 for (i = 0; i < val_count * val_bytes; i += val_bytes) 3009 map->format.parse_inplace(val + i); 3010 } else { 3011 #ifdef CONFIG_64BIT 3012 u64 *u64 = val; 3013 #endif 3014 u32 *u32 = val; 3015 u16 *u16 = val; 3016 u8 *u8 = val; 3017 3018 map->lock(map->lock_arg); 3019 3020 for (i = 0; i < val_count; i++) { 3021 unsigned int ival; 3022 3023 ret = _regmap_read(map, reg + regmap_get_offset(map, i), 3024 &ival); 3025 if (ret != 0) 3026 goto out; 3027 3028 switch (map->format.val_bytes) { 3029 #ifdef CONFIG_64BIT 3030 case 8: 3031 u64[i] = ival; 3032 break; 3033 #endif 3034 case 4: 3035 u32[i] = ival; 3036 break; 3037 case 2: 3038 u16[i] = ival; 3039 break; 3040 case 1: 3041 u8[i] = ival; 3042 break; 3043 default: 3044 ret = -EINVAL; 3045 goto out; 3046 } 3047 } 3048 3049 out: 3050 map->unlock(map->lock_arg); 3051 } 3052 3053 return ret; 3054 } 3055 EXPORT_SYMBOL_GPL(regmap_bulk_read); 3056 3057 static int _regmap_update_bits(struct regmap *map, unsigned int reg, 3058 unsigned int mask, unsigned int val, 3059 bool *change, bool force_write) 3060 { 3061 int ret; 3062 unsigned int tmp, orig; 3063 3064 if (change) 3065 *change = false; 3066 3067 if (regmap_volatile(map, reg) && map->reg_update_bits) { 3068 ret = map->reg_update_bits(map->bus_context, reg, mask, val); 3069 if (ret == 0 && change) 3070 *change = true; 3071 } else { 3072 ret = _regmap_read(map, reg, &orig); 3073 if (ret != 0) 3074 return ret; 3075 3076 tmp = orig & ~mask; 3077 tmp |= val & mask; 3078 3079 if (force_write || (tmp != orig)) { 3080 ret = _regmap_write(map, reg, tmp); 3081 if (ret == 0 && change) 3082 *change = true; 3083 } 3084 } 3085 3086 return ret; 3087 } 3088 3089 /** 3090 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register 3091 * 3092 * @map: Register map to update 3093 * @reg: Register to update 3094 * @mask: Bitmask to change 3095 * @val: New value for bitmask 3096 * @change: Boolean indicating if a write was done 3097 * @async: Boolean indicating asynchronously 3098 * @force: Boolean indicating use force update 3099 * 3100 * Perform a read/modify/write cycle on a register map with change, async, force 3101 * options. 3102 * 3103 * If async is true: 3104 * 3105 * With most buses the read must be done synchronously so this is most useful 3106 * for devices with a cache which do not need to interact with the hardware to 3107 * determine the current register value. 3108 * 3109 * Returns zero for success, a negative number on error. 3110 */ 3111 int regmap_update_bits_base(struct regmap *map, unsigned int reg, 3112 unsigned int mask, unsigned int val, 3113 bool *change, bool async, bool force) 3114 { 3115 int ret; 3116 3117 map->lock(map->lock_arg); 3118 3119 map->async = async; 3120 3121 ret = _regmap_update_bits(map, reg, mask, val, change, force); 3122 3123 map->async = false; 3124 3125 map->unlock(map->lock_arg); 3126 3127 return ret; 3128 } 3129 EXPORT_SYMBOL_GPL(regmap_update_bits_base); 3130 3131 /** 3132 * regmap_test_bits() - Check if all specified bits are set in a register. 3133 * 3134 * @map: Register map to operate on 3135 * @reg: Register to read from 3136 * @bits: Bits to test 3137 * 3138 * Returns 0 if at least one of the tested bits is not set, 1 if all tested 3139 * bits are set and a negative error number if the underlying regmap_read() 3140 * fails. 3141 */ 3142 int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits) 3143 { 3144 unsigned int val, ret; 3145 3146 ret = regmap_read(map, reg, &val); 3147 if (ret) 3148 return ret; 3149 3150 return (val & bits) == bits; 3151 } 3152 EXPORT_SYMBOL_GPL(regmap_test_bits); 3153 3154 void regmap_async_complete_cb(struct regmap_async *async, int ret) 3155 { 3156 struct regmap *map = async->map; 3157 bool wake; 3158 3159 trace_regmap_async_io_complete(map); 3160 3161 spin_lock(&map->async_lock); 3162 list_move(&async->list, &map->async_free); 3163 wake = list_empty(&map->async_list); 3164 3165 if (ret != 0) 3166 map->async_ret = ret; 3167 3168 spin_unlock(&map->async_lock); 3169 3170 if (wake) 3171 wake_up(&map->async_waitq); 3172 } 3173 EXPORT_SYMBOL_GPL(regmap_async_complete_cb); 3174 3175 static int regmap_async_is_done(struct regmap *map) 3176 { 3177 unsigned long flags; 3178 int ret; 3179 3180 spin_lock_irqsave(&map->async_lock, flags); 3181 ret = list_empty(&map->async_list); 3182 spin_unlock_irqrestore(&map->async_lock, flags); 3183 3184 return ret; 3185 } 3186 3187 /** 3188 * regmap_async_complete - Ensure all asynchronous I/O has completed. 3189 * 3190 * @map: Map to operate on. 3191 * 3192 * Blocks until any pending asynchronous I/O has completed. Returns 3193 * an error code for any failed I/O operations. 3194 */ 3195 int regmap_async_complete(struct regmap *map) 3196 { 3197 unsigned long flags; 3198 int ret; 3199 3200 /* Nothing to do with no async support */ 3201 if (!map->bus || !map->bus->async_write) 3202 return 0; 3203 3204 trace_regmap_async_complete_start(map); 3205 3206 wait_event(map->async_waitq, regmap_async_is_done(map)); 3207 3208 spin_lock_irqsave(&map->async_lock, flags); 3209 ret = map->async_ret; 3210 map->async_ret = 0; 3211 spin_unlock_irqrestore(&map->async_lock, flags); 3212 3213 trace_regmap_async_complete_done(map); 3214 3215 return ret; 3216 } 3217 EXPORT_SYMBOL_GPL(regmap_async_complete); 3218 3219 /** 3220 * regmap_register_patch - Register and apply register updates to be applied 3221 * on device initialistion 3222 * 3223 * @map: Register map to apply updates to. 3224 * @regs: Values to update. 3225 * @num_regs: Number of entries in regs. 3226 * 3227 * Register a set of register updates to be applied to the device 3228 * whenever the device registers are synchronised with the cache and 3229 * apply them immediately. Typically this is used to apply 3230 * corrections to be applied to the device defaults on startup, such 3231 * as the updates some vendors provide to undocumented registers. 3232 * 3233 * The caller must ensure that this function cannot be called 3234 * concurrently with either itself or regcache_sync(). 3235 */ 3236 int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, 3237 int num_regs) 3238 { 3239 struct reg_sequence *p; 3240 int ret; 3241 bool bypass; 3242 3243 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n", 3244 num_regs)) 3245 return 0; 3246 3247 p = krealloc(map->patch, 3248 sizeof(struct reg_sequence) * (map->patch_regs + num_regs), 3249 GFP_KERNEL); 3250 if (p) { 3251 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs)); 3252 map->patch = p; 3253 map->patch_regs += num_regs; 3254 } else { 3255 return -ENOMEM; 3256 } 3257 3258 map->lock(map->lock_arg); 3259 3260 bypass = map->cache_bypass; 3261 3262 map->cache_bypass = true; 3263 map->async = true; 3264 3265 ret = _regmap_multi_reg_write(map, regs, num_regs); 3266 3267 map->async = false; 3268 map->cache_bypass = bypass; 3269 3270 map->unlock(map->lock_arg); 3271 3272 regmap_async_complete(map); 3273 3274 return ret; 3275 } 3276 EXPORT_SYMBOL_GPL(regmap_register_patch); 3277 3278 /** 3279 * regmap_get_val_bytes() - Report the size of a register value 3280 * 3281 * @map: Register map to operate on. 3282 * 3283 * Report the size of a register value, mainly intended to for use by 3284 * generic infrastructure built on top of regmap. 3285 */ 3286 int regmap_get_val_bytes(struct regmap *map) 3287 { 3288 if (map->format.format_write) 3289 return -EINVAL; 3290 3291 return map->format.val_bytes; 3292 } 3293 EXPORT_SYMBOL_GPL(regmap_get_val_bytes); 3294 3295 /** 3296 * regmap_get_max_register() - Report the max register value 3297 * 3298 * @map: Register map to operate on. 3299 * 3300 * Report the max register value, mainly intended to for use by 3301 * generic infrastructure built on top of regmap. 3302 */ 3303 int regmap_get_max_register(struct regmap *map) 3304 { 3305 return map->max_register ? map->max_register : -EINVAL; 3306 } 3307 EXPORT_SYMBOL_GPL(regmap_get_max_register); 3308 3309 /** 3310 * regmap_get_reg_stride() - Report the register address stride 3311 * 3312 * @map: Register map to operate on. 3313 * 3314 * Report the register address stride, mainly intended to for use by 3315 * generic infrastructure built on top of regmap. 3316 */ 3317 int regmap_get_reg_stride(struct regmap *map) 3318 { 3319 return map->reg_stride; 3320 } 3321 EXPORT_SYMBOL_GPL(regmap_get_reg_stride); 3322 3323 int regmap_parse_val(struct regmap *map, const void *buf, 3324 unsigned int *val) 3325 { 3326 if (!map->format.parse_val) 3327 return -EINVAL; 3328 3329 *val = map->format.parse_val(buf); 3330 3331 return 0; 3332 } 3333 EXPORT_SYMBOL_GPL(regmap_parse_val); 3334 3335 static int __init regmap_initcall(void) 3336 { 3337 regmap_debugfs_initcall(); 3338 3339 return 0; 3340 } 3341 postcore_initcall(regmap_initcall); 3342