1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Register map access API 4 // 5 // Copyright 2011 Wolfson Microelectronics plc 6 // 7 // Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 8 9 #include <linux/device.h> 10 #include <linux/slab.h> 11 #include <linux/export.h> 12 #include <linux/mutex.h> 13 #include <linux/err.h> 14 #include <linux/property.h> 15 #include <linux/rbtree.h> 16 #include <linux/sched.h> 17 #include <linux/delay.h> 18 #include <linux/log2.h> 19 #include <linux/hwspinlock.h> 20 #include <asm/unaligned.h> 21 22 #define CREATE_TRACE_POINTS 23 #include "trace.h" 24 25 #include "internal.h" 26 27 /* 28 * Sometimes for failures during very early init the trace 29 * infrastructure isn't available early enough to be used. For this 30 * sort of problem defining LOG_DEVICE will add printks for basic 31 * register I/O on a specific device. 32 */ 33 #undef LOG_DEVICE 34 35 #ifdef LOG_DEVICE 36 static inline bool regmap_should_log(struct regmap *map) 37 { 38 return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0); 39 } 40 #else 41 static inline bool regmap_should_log(struct regmap *map) { return false; } 42 #endif 43 44 45 static int _regmap_update_bits(struct regmap *map, unsigned int reg, 46 unsigned int mask, unsigned int val, 47 bool *change, bool force_write); 48 49 static int _regmap_bus_reg_read(void *context, unsigned int reg, 50 unsigned int *val); 51 static int _regmap_bus_read(void *context, unsigned int reg, 52 unsigned int *val); 53 static int _regmap_bus_formatted_write(void *context, unsigned int reg, 54 unsigned int val); 55 static int _regmap_bus_reg_write(void *context, unsigned int reg, 56 unsigned int val); 57 static int _regmap_bus_raw_write(void *context, unsigned int reg, 58 unsigned int val); 59 60 bool regmap_reg_in_ranges(unsigned int reg, 61 const struct regmap_range *ranges, 62 unsigned int nranges) 63 { 64 const struct regmap_range *r; 65 int i; 66 67 for (i = 0, r = ranges; i < nranges; i++, r++) 68 if (regmap_reg_in_range(reg, r)) 69 return true; 70 return false; 71 } 72 EXPORT_SYMBOL_GPL(regmap_reg_in_ranges); 73 74 bool regmap_check_range_table(struct regmap *map, unsigned int reg, 75 const struct regmap_access_table *table) 76 { 77 /* Check "no ranges" first */ 78 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges)) 79 return false; 80 81 /* In case zero "yes ranges" are supplied, any reg is OK */ 82 if (!table->n_yes_ranges) 83 return true; 84 85 return regmap_reg_in_ranges(reg, table->yes_ranges, 86 table->n_yes_ranges); 87 } 88 EXPORT_SYMBOL_GPL(regmap_check_range_table); 89 90 bool regmap_writeable(struct regmap *map, unsigned int reg) 91 { 92 if (map->max_register && reg > map->max_register) 93 return false; 94 95 if (map->writeable_reg) 96 return map->writeable_reg(map->dev, reg); 97 98 if (map->wr_table) 99 return regmap_check_range_table(map, reg, map->wr_table); 100 101 return true; 102 } 103 104 bool regmap_cached(struct regmap *map, unsigned int reg) 105 { 106 int ret; 107 unsigned int val; 108 109 if (map->cache_type == REGCACHE_NONE) 110 return false; 111 112 if (!map->cache_ops) 113 return false; 114 115 if (map->max_register && reg > map->max_register) 116 return false; 117 118 map->lock(map->lock_arg); 119 ret = regcache_read(map, reg, &val); 120 map->unlock(map->lock_arg); 121 if (ret) 122 return false; 123 124 return true; 125 } 126 127 bool regmap_readable(struct regmap *map, unsigned int reg) 128 { 129 if (!map->reg_read) 130 return false; 131 132 if (map->max_register && reg > map->max_register) 133 return false; 134 135 if (map->format.format_write) 136 return false; 137 138 if (map->readable_reg) 139 return map->readable_reg(map->dev, reg); 140 141 if (map->rd_table) 142 return regmap_check_range_table(map, reg, map->rd_table); 143 144 return true; 145 } 146 147 bool regmap_volatile(struct regmap *map, unsigned int reg) 148 { 149 if (!map->format.format_write && !regmap_readable(map, reg)) 150 return false; 151 152 if (map->volatile_reg) 153 return map->volatile_reg(map->dev, reg); 154 155 if (map->volatile_table) 156 return regmap_check_range_table(map, reg, map->volatile_table); 157 158 if (map->cache_ops) 159 return false; 160 else 161 return true; 162 } 163 164 bool regmap_precious(struct regmap *map, unsigned int reg) 165 { 166 if (!regmap_readable(map, reg)) 167 return false; 168 169 if (map->precious_reg) 170 return map->precious_reg(map->dev, reg); 171 172 if (map->precious_table) 173 return regmap_check_range_table(map, reg, map->precious_table); 174 175 return false; 176 } 177 178 bool regmap_writeable_noinc(struct regmap *map, unsigned int reg) 179 { 180 if (map->writeable_noinc_reg) 181 return map->writeable_noinc_reg(map->dev, reg); 182 183 if (map->wr_noinc_table) 184 return regmap_check_range_table(map, reg, map->wr_noinc_table); 185 186 return true; 187 } 188 189 bool regmap_readable_noinc(struct regmap *map, unsigned int reg) 190 { 191 if (map->readable_noinc_reg) 192 return map->readable_noinc_reg(map->dev, reg); 193 194 if (map->rd_noinc_table) 195 return regmap_check_range_table(map, reg, map->rd_noinc_table); 196 197 return true; 198 } 199 200 static bool regmap_volatile_range(struct regmap *map, unsigned int reg, 201 size_t num) 202 { 203 unsigned int i; 204 205 for (i = 0; i < num; i++) 206 if (!regmap_volatile(map, reg + regmap_get_offset(map, i))) 207 return false; 208 209 return true; 210 } 211 212 static void regmap_format_12_20_write(struct regmap *map, 213 unsigned int reg, unsigned int val) 214 { 215 u8 *out = map->work_buf; 216 217 out[0] = reg >> 4; 218 out[1] = (reg << 4) | (val >> 16); 219 out[2] = val >> 8; 220 out[3] = val; 221 } 222 223 224 static void regmap_format_2_6_write(struct regmap *map, 225 unsigned int reg, unsigned int val) 226 { 227 u8 *out = map->work_buf; 228 229 *out = (reg << 6) | val; 230 } 231 232 static void regmap_format_4_12_write(struct regmap *map, 233 unsigned int reg, unsigned int val) 234 { 235 __be16 *out = map->work_buf; 236 *out = cpu_to_be16((reg << 12) | val); 237 } 238 239 static void regmap_format_7_9_write(struct regmap *map, 240 unsigned int reg, unsigned int val) 241 { 242 __be16 *out = map->work_buf; 243 *out = cpu_to_be16((reg << 9) | val); 244 } 245 246 static void regmap_format_7_17_write(struct regmap *map, 247 unsigned int reg, unsigned int val) 248 { 249 u8 *out = map->work_buf; 250 251 out[2] = val; 252 out[1] = val >> 8; 253 out[0] = (val >> 16) | (reg << 1); 254 } 255 256 static void regmap_format_10_14_write(struct regmap *map, 257 unsigned int reg, unsigned int val) 258 { 259 u8 *out = map->work_buf; 260 261 out[2] = val; 262 out[1] = (val >> 8) | (reg << 6); 263 out[0] = reg >> 2; 264 } 265 266 static void regmap_format_8(void *buf, unsigned int val, unsigned int shift) 267 { 268 u8 *b = buf; 269 270 b[0] = val << shift; 271 } 272 273 static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift) 274 { 275 put_unaligned_be16(val << shift, buf); 276 } 277 278 static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift) 279 { 280 put_unaligned_le16(val << shift, buf); 281 } 282 283 static void regmap_format_16_native(void *buf, unsigned int val, 284 unsigned int shift) 285 { 286 u16 v = val << shift; 287 288 memcpy(buf, &v, sizeof(v)); 289 } 290 291 static void regmap_format_24(void *buf, unsigned int val, unsigned int shift) 292 { 293 u8 *b = buf; 294 295 val <<= shift; 296 297 b[0] = val >> 16; 298 b[1] = val >> 8; 299 b[2] = val; 300 } 301 302 static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift) 303 { 304 put_unaligned_be32(val << shift, buf); 305 } 306 307 static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift) 308 { 309 put_unaligned_le32(val << shift, buf); 310 } 311 312 static void regmap_format_32_native(void *buf, unsigned int val, 313 unsigned int shift) 314 { 315 u32 v = val << shift; 316 317 memcpy(buf, &v, sizeof(v)); 318 } 319 320 #ifdef CONFIG_64BIT 321 static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift) 322 { 323 put_unaligned_be64((u64) val << shift, buf); 324 } 325 326 static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift) 327 { 328 put_unaligned_le64((u64) val << shift, buf); 329 } 330 331 static void regmap_format_64_native(void *buf, unsigned int val, 332 unsigned int shift) 333 { 334 u64 v = (u64) val << shift; 335 336 memcpy(buf, &v, sizeof(v)); 337 } 338 #endif 339 340 static void regmap_parse_inplace_noop(void *buf) 341 { 342 } 343 344 static unsigned int regmap_parse_8(const void *buf) 345 { 346 const u8 *b = buf; 347 348 return b[0]; 349 } 350 351 static unsigned int regmap_parse_16_be(const void *buf) 352 { 353 return get_unaligned_be16(buf); 354 } 355 356 static unsigned int regmap_parse_16_le(const void *buf) 357 { 358 return get_unaligned_le16(buf); 359 } 360 361 static void regmap_parse_16_be_inplace(void *buf) 362 { 363 u16 v = get_unaligned_be16(buf); 364 365 memcpy(buf, &v, sizeof(v)); 366 } 367 368 static void regmap_parse_16_le_inplace(void *buf) 369 { 370 u16 v = get_unaligned_le16(buf); 371 372 memcpy(buf, &v, sizeof(v)); 373 } 374 375 static unsigned int regmap_parse_16_native(const void *buf) 376 { 377 u16 v; 378 379 memcpy(&v, buf, sizeof(v)); 380 return v; 381 } 382 383 static unsigned int regmap_parse_24(const void *buf) 384 { 385 const u8 *b = buf; 386 unsigned int ret = b[2]; 387 ret |= ((unsigned int)b[1]) << 8; 388 ret |= ((unsigned int)b[0]) << 16; 389 390 return ret; 391 } 392 393 static unsigned int regmap_parse_32_be(const void *buf) 394 { 395 return get_unaligned_be32(buf); 396 } 397 398 static unsigned int regmap_parse_32_le(const void *buf) 399 { 400 return get_unaligned_le32(buf); 401 } 402 403 static void regmap_parse_32_be_inplace(void *buf) 404 { 405 u32 v = get_unaligned_be32(buf); 406 407 memcpy(buf, &v, sizeof(v)); 408 } 409 410 static void regmap_parse_32_le_inplace(void *buf) 411 { 412 u32 v = get_unaligned_le32(buf); 413 414 memcpy(buf, &v, sizeof(v)); 415 } 416 417 static unsigned int regmap_parse_32_native(const void *buf) 418 { 419 u32 v; 420 421 memcpy(&v, buf, sizeof(v)); 422 return v; 423 } 424 425 #ifdef CONFIG_64BIT 426 static unsigned int regmap_parse_64_be(const void *buf) 427 { 428 return get_unaligned_be64(buf); 429 } 430 431 static unsigned int regmap_parse_64_le(const void *buf) 432 { 433 return get_unaligned_le64(buf); 434 } 435 436 static void regmap_parse_64_be_inplace(void *buf) 437 { 438 u64 v = get_unaligned_be64(buf); 439 440 memcpy(buf, &v, sizeof(v)); 441 } 442 443 static void regmap_parse_64_le_inplace(void *buf) 444 { 445 u64 v = get_unaligned_le64(buf); 446 447 memcpy(buf, &v, sizeof(v)); 448 } 449 450 static unsigned int regmap_parse_64_native(const void *buf) 451 { 452 u64 v; 453 454 memcpy(&v, buf, sizeof(v)); 455 return v; 456 } 457 #endif 458 459 static void regmap_lock_hwlock(void *__map) 460 { 461 struct regmap *map = __map; 462 463 hwspin_lock_timeout(map->hwlock, UINT_MAX); 464 } 465 466 static void regmap_lock_hwlock_irq(void *__map) 467 { 468 struct regmap *map = __map; 469 470 hwspin_lock_timeout_irq(map->hwlock, UINT_MAX); 471 } 472 473 static void regmap_lock_hwlock_irqsave(void *__map) 474 { 475 struct regmap *map = __map; 476 477 hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX, 478 &map->spinlock_flags); 479 } 480 481 static void regmap_unlock_hwlock(void *__map) 482 { 483 struct regmap *map = __map; 484 485 hwspin_unlock(map->hwlock); 486 } 487 488 static void regmap_unlock_hwlock_irq(void *__map) 489 { 490 struct regmap *map = __map; 491 492 hwspin_unlock_irq(map->hwlock); 493 } 494 495 static void regmap_unlock_hwlock_irqrestore(void *__map) 496 { 497 struct regmap *map = __map; 498 499 hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags); 500 } 501 502 static void regmap_lock_unlock_none(void *__map) 503 { 504 505 } 506 507 static void regmap_lock_mutex(void *__map) 508 { 509 struct regmap *map = __map; 510 mutex_lock(&map->mutex); 511 } 512 513 static void regmap_unlock_mutex(void *__map) 514 { 515 struct regmap *map = __map; 516 mutex_unlock(&map->mutex); 517 } 518 519 static void regmap_lock_spinlock(void *__map) 520 __acquires(&map->spinlock) 521 { 522 struct regmap *map = __map; 523 unsigned long flags; 524 525 spin_lock_irqsave(&map->spinlock, flags); 526 map->spinlock_flags = flags; 527 } 528 529 static void regmap_unlock_spinlock(void *__map) 530 __releases(&map->spinlock) 531 { 532 struct regmap *map = __map; 533 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags); 534 } 535 536 static void regmap_lock_raw_spinlock(void *__map) 537 __acquires(&map->raw_spinlock) 538 { 539 struct regmap *map = __map; 540 unsigned long flags; 541 542 raw_spin_lock_irqsave(&map->raw_spinlock, flags); 543 map->raw_spinlock_flags = flags; 544 } 545 546 static void regmap_unlock_raw_spinlock(void *__map) 547 __releases(&map->raw_spinlock) 548 { 549 struct regmap *map = __map; 550 raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags); 551 } 552 553 static void dev_get_regmap_release(struct device *dev, void *res) 554 { 555 /* 556 * We don't actually have anything to do here; the goal here 557 * is not to manage the regmap but to provide a simple way to 558 * get the regmap back given a struct device. 559 */ 560 } 561 562 static bool _regmap_range_add(struct regmap *map, 563 struct regmap_range_node *data) 564 { 565 struct rb_root *root = &map->range_tree; 566 struct rb_node **new = &(root->rb_node), *parent = NULL; 567 568 while (*new) { 569 struct regmap_range_node *this = 570 rb_entry(*new, struct regmap_range_node, node); 571 572 parent = *new; 573 if (data->range_max < this->range_min) 574 new = &((*new)->rb_left); 575 else if (data->range_min > this->range_max) 576 new = &((*new)->rb_right); 577 else 578 return false; 579 } 580 581 rb_link_node(&data->node, parent, new); 582 rb_insert_color(&data->node, root); 583 584 return true; 585 } 586 587 static struct regmap_range_node *_regmap_range_lookup(struct regmap *map, 588 unsigned int reg) 589 { 590 struct rb_node *node = map->range_tree.rb_node; 591 592 while (node) { 593 struct regmap_range_node *this = 594 rb_entry(node, struct regmap_range_node, node); 595 596 if (reg < this->range_min) 597 node = node->rb_left; 598 else if (reg > this->range_max) 599 node = node->rb_right; 600 else 601 return this; 602 } 603 604 return NULL; 605 } 606 607 static void regmap_range_exit(struct regmap *map) 608 { 609 struct rb_node *next; 610 struct regmap_range_node *range_node; 611 612 next = rb_first(&map->range_tree); 613 while (next) { 614 range_node = rb_entry(next, struct regmap_range_node, node); 615 next = rb_next(&range_node->node); 616 rb_erase(&range_node->node, &map->range_tree); 617 kfree(range_node); 618 } 619 620 kfree(map->selector_work_buf); 621 } 622 623 static int regmap_set_name(struct regmap *map, const struct regmap_config *config) 624 { 625 if (config->name) { 626 const char *name = kstrdup_const(config->name, GFP_KERNEL); 627 628 if (!name) 629 return -ENOMEM; 630 631 kfree_const(map->name); 632 map->name = name; 633 } 634 635 return 0; 636 } 637 638 int regmap_attach_dev(struct device *dev, struct regmap *map, 639 const struct regmap_config *config) 640 { 641 struct regmap **m; 642 int ret; 643 644 map->dev = dev; 645 646 ret = regmap_set_name(map, config); 647 if (ret) 648 return ret; 649 650 regmap_debugfs_exit(map); 651 regmap_debugfs_init(map); 652 653 /* Add a devres resource for dev_get_regmap() */ 654 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL); 655 if (!m) { 656 regmap_debugfs_exit(map); 657 return -ENOMEM; 658 } 659 *m = map; 660 devres_add(dev, m); 661 662 return 0; 663 } 664 EXPORT_SYMBOL_GPL(regmap_attach_dev); 665 666 static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus, 667 const struct regmap_config *config) 668 { 669 enum regmap_endian endian; 670 671 /* Retrieve the endianness specification from the regmap config */ 672 endian = config->reg_format_endian; 673 674 /* If the regmap config specified a non-default value, use that */ 675 if (endian != REGMAP_ENDIAN_DEFAULT) 676 return endian; 677 678 /* Retrieve the endianness specification from the bus config */ 679 if (bus && bus->reg_format_endian_default) 680 endian = bus->reg_format_endian_default; 681 682 /* If the bus specified a non-default value, use that */ 683 if (endian != REGMAP_ENDIAN_DEFAULT) 684 return endian; 685 686 /* Use this if no other value was found */ 687 return REGMAP_ENDIAN_BIG; 688 } 689 690 enum regmap_endian regmap_get_val_endian(struct device *dev, 691 const struct regmap_bus *bus, 692 const struct regmap_config *config) 693 { 694 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL; 695 enum regmap_endian endian; 696 697 /* Retrieve the endianness specification from the regmap config */ 698 endian = config->val_format_endian; 699 700 /* If the regmap config specified a non-default value, use that */ 701 if (endian != REGMAP_ENDIAN_DEFAULT) 702 return endian; 703 704 /* If the firmware node exist try to get endianness from it */ 705 if (fwnode_property_read_bool(fwnode, "big-endian")) 706 endian = REGMAP_ENDIAN_BIG; 707 else if (fwnode_property_read_bool(fwnode, "little-endian")) 708 endian = REGMAP_ENDIAN_LITTLE; 709 else if (fwnode_property_read_bool(fwnode, "native-endian")) 710 endian = REGMAP_ENDIAN_NATIVE; 711 712 /* If the endianness was specified in fwnode, use that */ 713 if (endian != REGMAP_ENDIAN_DEFAULT) 714 return endian; 715 716 /* Retrieve the endianness specification from the bus config */ 717 if (bus && bus->val_format_endian_default) 718 endian = bus->val_format_endian_default; 719 720 /* If the bus specified a non-default value, use that */ 721 if (endian != REGMAP_ENDIAN_DEFAULT) 722 return endian; 723 724 /* Use this if no other value was found */ 725 return REGMAP_ENDIAN_BIG; 726 } 727 EXPORT_SYMBOL_GPL(regmap_get_val_endian); 728 729 struct regmap *__regmap_init(struct device *dev, 730 const struct regmap_bus *bus, 731 void *bus_context, 732 const struct regmap_config *config, 733 struct lock_class_key *lock_key, 734 const char *lock_name) 735 { 736 struct regmap *map; 737 int ret = -EINVAL; 738 enum regmap_endian reg_endian, val_endian; 739 int i, j; 740 741 if (!config) 742 goto err; 743 744 map = kzalloc(sizeof(*map), GFP_KERNEL); 745 if (map == NULL) { 746 ret = -ENOMEM; 747 goto err; 748 } 749 750 ret = regmap_set_name(map, config); 751 if (ret) 752 goto err_map; 753 754 ret = -EINVAL; /* Later error paths rely on this */ 755 756 if (config->disable_locking) { 757 map->lock = map->unlock = regmap_lock_unlock_none; 758 map->can_sleep = config->can_sleep; 759 regmap_debugfs_disable(map); 760 } else if (config->lock && config->unlock) { 761 map->lock = config->lock; 762 map->unlock = config->unlock; 763 map->lock_arg = config->lock_arg; 764 map->can_sleep = config->can_sleep; 765 } else if (config->use_hwlock) { 766 map->hwlock = hwspin_lock_request_specific(config->hwlock_id); 767 if (!map->hwlock) { 768 ret = -ENXIO; 769 goto err_name; 770 } 771 772 switch (config->hwlock_mode) { 773 case HWLOCK_IRQSTATE: 774 map->lock = regmap_lock_hwlock_irqsave; 775 map->unlock = regmap_unlock_hwlock_irqrestore; 776 break; 777 case HWLOCK_IRQ: 778 map->lock = regmap_lock_hwlock_irq; 779 map->unlock = regmap_unlock_hwlock_irq; 780 break; 781 default: 782 map->lock = regmap_lock_hwlock; 783 map->unlock = regmap_unlock_hwlock; 784 break; 785 } 786 787 map->lock_arg = map; 788 } else { 789 if ((bus && bus->fast_io) || 790 config->fast_io) { 791 if (config->use_raw_spinlock) { 792 raw_spin_lock_init(&map->raw_spinlock); 793 map->lock = regmap_lock_raw_spinlock; 794 map->unlock = regmap_unlock_raw_spinlock; 795 lockdep_set_class_and_name(&map->raw_spinlock, 796 lock_key, lock_name); 797 } else { 798 spin_lock_init(&map->spinlock); 799 map->lock = regmap_lock_spinlock; 800 map->unlock = regmap_unlock_spinlock; 801 lockdep_set_class_and_name(&map->spinlock, 802 lock_key, lock_name); 803 } 804 } else { 805 mutex_init(&map->mutex); 806 map->lock = regmap_lock_mutex; 807 map->unlock = regmap_unlock_mutex; 808 map->can_sleep = true; 809 lockdep_set_class_and_name(&map->mutex, 810 lock_key, lock_name); 811 } 812 map->lock_arg = map; 813 } 814 815 /* 816 * When we write in fast-paths with regmap_bulk_write() don't allocate 817 * scratch buffers with sleeping allocations. 818 */ 819 if ((bus && bus->fast_io) || config->fast_io) 820 map->alloc_flags = GFP_ATOMIC; 821 else 822 map->alloc_flags = GFP_KERNEL; 823 824 map->reg_base = config->reg_base; 825 826 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8); 827 map->format.pad_bytes = config->pad_bits / 8; 828 map->format.reg_downshift = config->reg_downshift; 829 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8); 830 map->format.buf_size = DIV_ROUND_UP(config->reg_bits + 831 config->val_bits + config->pad_bits, 8); 832 map->reg_shift = config->pad_bits % 8; 833 if (config->reg_stride) 834 map->reg_stride = config->reg_stride; 835 else 836 map->reg_stride = 1; 837 if (is_power_of_2(map->reg_stride)) 838 map->reg_stride_order = ilog2(map->reg_stride); 839 else 840 map->reg_stride_order = -1; 841 map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read)); 842 map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write)); 843 map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write)); 844 if (bus) { 845 map->max_raw_read = bus->max_raw_read; 846 map->max_raw_write = bus->max_raw_write; 847 } else if (config->max_raw_read && config->max_raw_write) { 848 map->max_raw_read = config->max_raw_read; 849 map->max_raw_write = config->max_raw_write; 850 } 851 map->dev = dev; 852 map->bus = bus; 853 map->bus_context = bus_context; 854 map->max_register = config->max_register; 855 map->wr_table = config->wr_table; 856 map->rd_table = config->rd_table; 857 map->volatile_table = config->volatile_table; 858 map->precious_table = config->precious_table; 859 map->wr_noinc_table = config->wr_noinc_table; 860 map->rd_noinc_table = config->rd_noinc_table; 861 map->writeable_reg = config->writeable_reg; 862 map->readable_reg = config->readable_reg; 863 map->volatile_reg = config->volatile_reg; 864 map->precious_reg = config->precious_reg; 865 map->writeable_noinc_reg = config->writeable_noinc_reg; 866 map->readable_noinc_reg = config->readable_noinc_reg; 867 map->cache_type = config->cache_type; 868 869 spin_lock_init(&map->async_lock); 870 INIT_LIST_HEAD(&map->async_list); 871 INIT_LIST_HEAD(&map->async_free); 872 init_waitqueue_head(&map->async_waitq); 873 874 if (config->read_flag_mask || 875 config->write_flag_mask || 876 config->zero_flag_mask) { 877 map->read_flag_mask = config->read_flag_mask; 878 map->write_flag_mask = config->write_flag_mask; 879 } else if (bus) { 880 map->read_flag_mask = bus->read_flag_mask; 881 } 882 883 if (config && config->read && config->write) { 884 map->reg_read = _regmap_bus_read; 885 886 /* Bulk read/write */ 887 map->read = config->read; 888 map->write = config->write; 889 890 reg_endian = REGMAP_ENDIAN_NATIVE; 891 val_endian = REGMAP_ENDIAN_NATIVE; 892 } else if (!bus) { 893 map->reg_read = config->reg_read; 894 map->reg_write = config->reg_write; 895 map->reg_update_bits = config->reg_update_bits; 896 897 map->defer_caching = false; 898 goto skip_format_initialization; 899 } else if (!bus->read || !bus->write) { 900 map->reg_read = _regmap_bus_reg_read; 901 map->reg_write = _regmap_bus_reg_write; 902 map->reg_update_bits = bus->reg_update_bits; 903 904 map->defer_caching = false; 905 goto skip_format_initialization; 906 } else { 907 map->reg_read = _regmap_bus_read; 908 map->reg_update_bits = bus->reg_update_bits; 909 /* Bulk read/write */ 910 map->read = bus->read; 911 map->write = bus->write; 912 913 reg_endian = regmap_get_reg_endian(bus, config); 914 val_endian = regmap_get_val_endian(dev, bus, config); 915 } 916 917 switch (config->reg_bits + map->reg_shift) { 918 case 2: 919 switch (config->val_bits) { 920 case 6: 921 map->format.format_write = regmap_format_2_6_write; 922 break; 923 default: 924 goto err_hwlock; 925 } 926 break; 927 928 case 4: 929 switch (config->val_bits) { 930 case 12: 931 map->format.format_write = regmap_format_4_12_write; 932 break; 933 default: 934 goto err_hwlock; 935 } 936 break; 937 938 case 7: 939 switch (config->val_bits) { 940 case 9: 941 map->format.format_write = regmap_format_7_9_write; 942 break; 943 case 17: 944 map->format.format_write = regmap_format_7_17_write; 945 break; 946 default: 947 goto err_hwlock; 948 } 949 break; 950 951 case 10: 952 switch (config->val_bits) { 953 case 14: 954 map->format.format_write = regmap_format_10_14_write; 955 break; 956 default: 957 goto err_hwlock; 958 } 959 break; 960 961 case 12: 962 switch (config->val_bits) { 963 case 20: 964 map->format.format_write = regmap_format_12_20_write; 965 break; 966 default: 967 goto err_hwlock; 968 } 969 break; 970 971 case 8: 972 map->format.format_reg = regmap_format_8; 973 break; 974 975 case 16: 976 switch (reg_endian) { 977 case REGMAP_ENDIAN_BIG: 978 map->format.format_reg = regmap_format_16_be; 979 break; 980 case REGMAP_ENDIAN_LITTLE: 981 map->format.format_reg = regmap_format_16_le; 982 break; 983 case REGMAP_ENDIAN_NATIVE: 984 map->format.format_reg = regmap_format_16_native; 985 break; 986 default: 987 goto err_hwlock; 988 } 989 break; 990 991 case 24: 992 if (reg_endian != REGMAP_ENDIAN_BIG) 993 goto err_hwlock; 994 map->format.format_reg = regmap_format_24; 995 break; 996 997 case 32: 998 switch (reg_endian) { 999 case REGMAP_ENDIAN_BIG: 1000 map->format.format_reg = regmap_format_32_be; 1001 break; 1002 case REGMAP_ENDIAN_LITTLE: 1003 map->format.format_reg = regmap_format_32_le; 1004 break; 1005 case REGMAP_ENDIAN_NATIVE: 1006 map->format.format_reg = regmap_format_32_native; 1007 break; 1008 default: 1009 goto err_hwlock; 1010 } 1011 break; 1012 1013 #ifdef CONFIG_64BIT 1014 case 64: 1015 switch (reg_endian) { 1016 case REGMAP_ENDIAN_BIG: 1017 map->format.format_reg = regmap_format_64_be; 1018 break; 1019 case REGMAP_ENDIAN_LITTLE: 1020 map->format.format_reg = regmap_format_64_le; 1021 break; 1022 case REGMAP_ENDIAN_NATIVE: 1023 map->format.format_reg = regmap_format_64_native; 1024 break; 1025 default: 1026 goto err_hwlock; 1027 } 1028 break; 1029 #endif 1030 1031 default: 1032 goto err_hwlock; 1033 } 1034 1035 if (val_endian == REGMAP_ENDIAN_NATIVE) 1036 map->format.parse_inplace = regmap_parse_inplace_noop; 1037 1038 switch (config->val_bits) { 1039 case 8: 1040 map->format.format_val = regmap_format_8; 1041 map->format.parse_val = regmap_parse_8; 1042 map->format.parse_inplace = regmap_parse_inplace_noop; 1043 break; 1044 case 16: 1045 switch (val_endian) { 1046 case REGMAP_ENDIAN_BIG: 1047 map->format.format_val = regmap_format_16_be; 1048 map->format.parse_val = regmap_parse_16_be; 1049 map->format.parse_inplace = regmap_parse_16_be_inplace; 1050 break; 1051 case REGMAP_ENDIAN_LITTLE: 1052 map->format.format_val = regmap_format_16_le; 1053 map->format.parse_val = regmap_parse_16_le; 1054 map->format.parse_inplace = regmap_parse_16_le_inplace; 1055 break; 1056 case REGMAP_ENDIAN_NATIVE: 1057 map->format.format_val = regmap_format_16_native; 1058 map->format.parse_val = regmap_parse_16_native; 1059 break; 1060 default: 1061 goto err_hwlock; 1062 } 1063 break; 1064 case 24: 1065 if (val_endian != REGMAP_ENDIAN_BIG) 1066 goto err_hwlock; 1067 map->format.format_val = regmap_format_24; 1068 map->format.parse_val = regmap_parse_24; 1069 break; 1070 case 32: 1071 switch (val_endian) { 1072 case REGMAP_ENDIAN_BIG: 1073 map->format.format_val = regmap_format_32_be; 1074 map->format.parse_val = regmap_parse_32_be; 1075 map->format.parse_inplace = regmap_parse_32_be_inplace; 1076 break; 1077 case REGMAP_ENDIAN_LITTLE: 1078 map->format.format_val = regmap_format_32_le; 1079 map->format.parse_val = regmap_parse_32_le; 1080 map->format.parse_inplace = regmap_parse_32_le_inplace; 1081 break; 1082 case REGMAP_ENDIAN_NATIVE: 1083 map->format.format_val = regmap_format_32_native; 1084 map->format.parse_val = regmap_parse_32_native; 1085 break; 1086 default: 1087 goto err_hwlock; 1088 } 1089 break; 1090 #ifdef CONFIG_64BIT 1091 case 64: 1092 switch (val_endian) { 1093 case REGMAP_ENDIAN_BIG: 1094 map->format.format_val = regmap_format_64_be; 1095 map->format.parse_val = regmap_parse_64_be; 1096 map->format.parse_inplace = regmap_parse_64_be_inplace; 1097 break; 1098 case REGMAP_ENDIAN_LITTLE: 1099 map->format.format_val = regmap_format_64_le; 1100 map->format.parse_val = regmap_parse_64_le; 1101 map->format.parse_inplace = regmap_parse_64_le_inplace; 1102 break; 1103 case REGMAP_ENDIAN_NATIVE: 1104 map->format.format_val = regmap_format_64_native; 1105 map->format.parse_val = regmap_parse_64_native; 1106 break; 1107 default: 1108 goto err_hwlock; 1109 } 1110 break; 1111 #endif 1112 } 1113 1114 if (map->format.format_write) { 1115 if ((reg_endian != REGMAP_ENDIAN_BIG) || 1116 (val_endian != REGMAP_ENDIAN_BIG)) 1117 goto err_hwlock; 1118 map->use_single_write = true; 1119 } 1120 1121 if (!map->format.format_write && 1122 !(map->format.format_reg && map->format.format_val)) 1123 goto err_hwlock; 1124 1125 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL); 1126 if (map->work_buf == NULL) { 1127 ret = -ENOMEM; 1128 goto err_hwlock; 1129 } 1130 1131 if (map->format.format_write) { 1132 map->defer_caching = false; 1133 map->reg_write = _regmap_bus_formatted_write; 1134 } else if (map->format.format_val) { 1135 map->defer_caching = true; 1136 map->reg_write = _regmap_bus_raw_write; 1137 } 1138 1139 skip_format_initialization: 1140 1141 map->range_tree = RB_ROOT; 1142 for (i = 0; i < config->num_ranges; i++) { 1143 const struct regmap_range_cfg *range_cfg = &config->ranges[i]; 1144 struct regmap_range_node *new; 1145 1146 /* Sanity check */ 1147 if (range_cfg->range_max < range_cfg->range_min) { 1148 dev_err(map->dev, "Invalid range %d: %d < %d\n", i, 1149 range_cfg->range_max, range_cfg->range_min); 1150 goto err_range; 1151 } 1152 1153 if (range_cfg->range_max > map->max_register) { 1154 dev_err(map->dev, "Invalid range %d: %d > %d\n", i, 1155 range_cfg->range_max, map->max_register); 1156 goto err_range; 1157 } 1158 1159 if (range_cfg->selector_reg > map->max_register) { 1160 dev_err(map->dev, 1161 "Invalid range %d: selector out of map\n", i); 1162 goto err_range; 1163 } 1164 1165 if (range_cfg->window_len == 0) { 1166 dev_err(map->dev, "Invalid range %d: window_len 0\n", 1167 i); 1168 goto err_range; 1169 } 1170 1171 /* Make sure, that this register range has no selector 1172 or data window within its boundary */ 1173 for (j = 0; j < config->num_ranges; j++) { 1174 unsigned int sel_reg = config->ranges[j].selector_reg; 1175 unsigned int win_min = config->ranges[j].window_start; 1176 unsigned int win_max = win_min + 1177 config->ranges[j].window_len - 1; 1178 1179 /* Allow data window inside its own virtual range */ 1180 if (j == i) 1181 continue; 1182 1183 if (range_cfg->range_min <= sel_reg && 1184 sel_reg <= range_cfg->range_max) { 1185 dev_err(map->dev, 1186 "Range %d: selector for %d in window\n", 1187 i, j); 1188 goto err_range; 1189 } 1190 1191 if (!(win_max < range_cfg->range_min || 1192 win_min > range_cfg->range_max)) { 1193 dev_err(map->dev, 1194 "Range %d: window for %d in window\n", 1195 i, j); 1196 goto err_range; 1197 } 1198 } 1199 1200 new = kzalloc(sizeof(*new), GFP_KERNEL); 1201 if (new == NULL) { 1202 ret = -ENOMEM; 1203 goto err_range; 1204 } 1205 1206 new->map = map; 1207 new->name = range_cfg->name; 1208 new->range_min = range_cfg->range_min; 1209 new->range_max = range_cfg->range_max; 1210 new->selector_reg = range_cfg->selector_reg; 1211 new->selector_mask = range_cfg->selector_mask; 1212 new->selector_shift = range_cfg->selector_shift; 1213 new->window_start = range_cfg->window_start; 1214 new->window_len = range_cfg->window_len; 1215 1216 if (!_regmap_range_add(map, new)) { 1217 dev_err(map->dev, "Failed to add range %d\n", i); 1218 kfree(new); 1219 goto err_range; 1220 } 1221 1222 if (map->selector_work_buf == NULL) { 1223 map->selector_work_buf = 1224 kzalloc(map->format.buf_size, GFP_KERNEL); 1225 if (map->selector_work_buf == NULL) { 1226 ret = -ENOMEM; 1227 goto err_range; 1228 } 1229 } 1230 } 1231 1232 ret = regcache_init(map, config); 1233 if (ret != 0) 1234 goto err_range; 1235 1236 if (dev) { 1237 ret = regmap_attach_dev(dev, map, config); 1238 if (ret != 0) 1239 goto err_regcache; 1240 } else { 1241 regmap_debugfs_init(map); 1242 } 1243 1244 return map; 1245 1246 err_regcache: 1247 regcache_exit(map); 1248 err_range: 1249 regmap_range_exit(map); 1250 kfree(map->work_buf); 1251 err_hwlock: 1252 if (map->hwlock) 1253 hwspin_lock_free(map->hwlock); 1254 err_name: 1255 kfree_const(map->name); 1256 err_map: 1257 kfree(map); 1258 err: 1259 return ERR_PTR(ret); 1260 } 1261 EXPORT_SYMBOL_GPL(__regmap_init); 1262 1263 static void devm_regmap_release(struct device *dev, void *res) 1264 { 1265 regmap_exit(*(struct regmap **)res); 1266 } 1267 1268 struct regmap *__devm_regmap_init(struct device *dev, 1269 const struct regmap_bus *bus, 1270 void *bus_context, 1271 const struct regmap_config *config, 1272 struct lock_class_key *lock_key, 1273 const char *lock_name) 1274 { 1275 struct regmap **ptr, *regmap; 1276 1277 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL); 1278 if (!ptr) 1279 return ERR_PTR(-ENOMEM); 1280 1281 regmap = __regmap_init(dev, bus, bus_context, config, 1282 lock_key, lock_name); 1283 if (!IS_ERR(regmap)) { 1284 *ptr = regmap; 1285 devres_add(dev, ptr); 1286 } else { 1287 devres_free(ptr); 1288 } 1289 1290 return regmap; 1291 } 1292 EXPORT_SYMBOL_GPL(__devm_regmap_init); 1293 1294 static void regmap_field_init(struct regmap_field *rm_field, 1295 struct regmap *regmap, struct reg_field reg_field) 1296 { 1297 rm_field->regmap = regmap; 1298 rm_field->reg = reg_field.reg; 1299 rm_field->shift = reg_field.lsb; 1300 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb); 1301 rm_field->id_size = reg_field.id_size; 1302 rm_field->id_offset = reg_field.id_offset; 1303 } 1304 1305 /** 1306 * devm_regmap_field_alloc() - Allocate and initialise a register field. 1307 * 1308 * @dev: Device that will be interacted with 1309 * @regmap: regmap bank in which this register field is located. 1310 * @reg_field: Register field with in the bank. 1311 * 1312 * The return value will be an ERR_PTR() on error or a valid pointer 1313 * to a struct regmap_field. The regmap_field will be automatically freed 1314 * by the device management code. 1315 */ 1316 struct regmap_field *devm_regmap_field_alloc(struct device *dev, 1317 struct regmap *regmap, struct reg_field reg_field) 1318 { 1319 struct regmap_field *rm_field = devm_kzalloc(dev, 1320 sizeof(*rm_field), GFP_KERNEL); 1321 if (!rm_field) 1322 return ERR_PTR(-ENOMEM); 1323 1324 regmap_field_init(rm_field, regmap, reg_field); 1325 1326 return rm_field; 1327 1328 } 1329 EXPORT_SYMBOL_GPL(devm_regmap_field_alloc); 1330 1331 1332 /** 1333 * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field. 1334 * 1335 * @regmap: regmap bank in which this register field is located. 1336 * @rm_field: regmap register fields within the bank. 1337 * @reg_field: Register fields within the bank. 1338 * @num_fields: Number of register fields. 1339 * 1340 * The return value will be an -ENOMEM on error or zero for success. 1341 * Newly allocated regmap_fields should be freed by calling 1342 * regmap_field_bulk_free() 1343 */ 1344 int regmap_field_bulk_alloc(struct regmap *regmap, 1345 struct regmap_field **rm_field, 1346 const struct reg_field *reg_field, 1347 int num_fields) 1348 { 1349 struct regmap_field *rf; 1350 int i; 1351 1352 rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL); 1353 if (!rf) 1354 return -ENOMEM; 1355 1356 for (i = 0; i < num_fields; i++) { 1357 regmap_field_init(&rf[i], regmap, reg_field[i]); 1358 rm_field[i] = &rf[i]; 1359 } 1360 1361 return 0; 1362 } 1363 EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc); 1364 1365 /** 1366 * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register 1367 * fields. 1368 * 1369 * @dev: Device that will be interacted with 1370 * @regmap: regmap bank in which this register field is located. 1371 * @rm_field: regmap register fields within the bank. 1372 * @reg_field: Register fields within the bank. 1373 * @num_fields: Number of register fields. 1374 * 1375 * The return value will be an -ENOMEM on error or zero for success. 1376 * Newly allocated regmap_fields will be automatically freed by the 1377 * device management code. 1378 */ 1379 int devm_regmap_field_bulk_alloc(struct device *dev, 1380 struct regmap *regmap, 1381 struct regmap_field **rm_field, 1382 const struct reg_field *reg_field, 1383 int num_fields) 1384 { 1385 struct regmap_field *rf; 1386 int i; 1387 1388 rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL); 1389 if (!rf) 1390 return -ENOMEM; 1391 1392 for (i = 0; i < num_fields; i++) { 1393 regmap_field_init(&rf[i], regmap, reg_field[i]); 1394 rm_field[i] = &rf[i]; 1395 } 1396 1397 return 0; 1398 } 1399 EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc); 1400 1401 /** 1402 * regmap_field_bulk_free() - Free register field allocated using 1403 * regmap_field_bulk_alloc. 1404 * 1405 * @field: regmap fields which should be freed. 1406 */ 1407 void regmap_field_bulk_free(struct regmap_field *field) 1408 { 1409 kfree(field); 1410 } 1411 EXPORT_SYMBOL_GPL(regmap_field_bulk_free); 1412 1413 /** 1414 * devm_regmap_field_bulk_free() - Free a bulk register field allocated using 1415 * devm_regmap_field_bulk_alloc. 1416 * 1417 * @dev: Device that will be interacted with 1418 * @field: regmap field which should be freed. 1419 * 1420 * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually 1421 * drivers need not call this function, as the memory allocated via devm 1422 * will be freed as per device-driver life-cycle. 1423 */ 1424 void devm_regmap_field_bulk_free(struct device *dev, 1425 struct regmap_field *field) 1426 { 1427 devm_kfree(dev, field); 1428 } 1429 EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free); 1430 1431 /** 1432 * devm_regmap_field_free() - Free a register field allocated using 1433 * devm_regmap_field_alloc. 1434 * 1435 * @dev: Device that will be interacted with 1436 * @field: regmap field which should be freed. 1437 * 1438 * Free register field allocated using devm_regmap_field_alloc(). Usually 1439 * drivers need not call this function, as the memory allocated via devm 1440 * will be freed as per device-driver life-cyle. 1441 */ 1442 void devm_regmap_field_free(struct device *dev, 1443 struct regmap_field *field) 1444 { 1445 devm_kfree(dev, field); 1446 } 1447 EXPORT_SYMBOL_GPL(devm_regmap_field_free); 1448 1449 /** 1450 * regmap_field_alloc() - Allocate and initialise a register field. 1451 * 1452 * @regmap: regmap bank in which this register field is located. 1453 * @reg_field: Register field with in the bank. 1454 * 1455 * The return value will be an ERR_PTR() on error or a valid pointer 1456 * to a struct regmap_field. The regmap_field should be freed by the 1457 * user once its finished working with it using regmap_field_free(). 1458 */ 1459 struct regmap_field *regmap_field_alloc(struct regmap *regmap, 1460 struct reg_field reg_field) 1461 { 1462 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL); 1463 1464 if (!rm_field) 1465 return ERR_PTR(-ENOMEM); 1466 1467 regmap_field_init(rm_field, regmap, reg_field); 1468 1469 return rm_field; 1470 } 1471 EXPORT_SYMBOL_GPL(regmap_field_alloc); 1472 1473 /** 1474 * regmap_field_free() - Free register field allocated using 1475 * regmap_field_alloc. 1476 * 1477 * @field: regmap field which should be freed. 1478 */ 1479 void regmap_field_free(struct regmap_field *field) 1480 { 1481 kfree(field); 1482 } 1483 EXPORT_SYMBOL_GPL(regmap_field_free); 1484 1485 /** 1486 * regmap_reinit_cache() - Reinitialise the current register cache 1487 * 1488 * @map: Register map to operate on. 1489 * @config: New configuration. Only the cache data will be used. 1490 * 1491 * Discard any existing register cache for the map and initialize a 1492 * new cache. This can be used to restore the cache to defaults or to 1493 * update the cache configuration to reflect runtime discovery of the 1494 * hardware. 1495 * 1496 * No explicit locking is done here, the user needs to ensure that 1497 * this function will not race with other calls to regmap. 1498 */ 1499 int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config) 1500 { 1501 int ret; 1502 1503 regcache_exit(map); 1504 regmap_debugfs_exit(map); 1505 1506 map->max_register = config->max_register; 1507 map->writeable_reg = config->writeable_reg; 1508 map->readable_reg = config->readable_reg; 1509 map->volatile_reg = config->volatile_reg; 1510 map->precious_reg = config->precious_reg; 1511 map->writeable_noinc_reg = config->writeable_noinc_reg; 1512 map->readable_noinc_reg = config->readable_noinc_reg; 1513 map->cache_type = config->cache_type; 1514 1515 ret = regmap_set_name(map, config); 1516 if (ret) 1517 return ret; 1518 1519 regmap_debugfs_init(map); 1520 1521 map->cache_bypass = false; 1522 map->cache_only = false; 1523 1524 return regcache_init(map, config); 1525 } 1526 EXPORT_SYMBOL_GPL(regmap_reinit_cache); 1527 1528 /** 1529 * regmap_exit() - Free a previously allocated register map 1530 * 1531 * @map: Register map to operate on. 1532 */ 1533 void regmap_exit(struct regmap *map) 1534 { 1535 struct regmap_async *async; 1536 1537 regcache_exit(map); 1538 regmap_debugfs_exit(map); 1539 regmap_range_exit(map); 1540 if (map->bus && map->bus->free_context) 1541 map->bus->free_context(map->bus_context); 1542 kfree(map->work_buf); 1543 while (!list_empty(&map->async_free)) { 1544 async = list_first_entry_or_null(&map->async_free, 1545 struct regmap_async, 1546 list); 1547 list_del(&async->list); 1548 kfree(async->work_buf); 1549 kfree(async); 1550 } 1551 if (map->hwlock) 1552 hwspin_lock_free(map->hwlock); 1553 if (map->lock == regmap_lock_mutex) 1554 mutex_destroy(&map->mutex); 1555 kfree_const(map->name); 1556 kfree(map->patch); 1557 if (map->bus && map->bus->free_on_exit) 1558 kfree(map->bus); 1559 kfree(map); 1560 } 1561 EXPORT_SYMBOL_GPL(regmap_exit); 1562 1563 static int dev_get_regmap_match(struct device *dev, void *res, void *data) 1564 { 1565 struct regmap **r = res; 1566 if (!r || !*r) { 1567 WARN_ON(!r || !*r); 1568 return 0; 1569 } 1570 1571 /* If the user didn't specify a name match any */ 1572 if (data) 1573 return !strcmp((*r)->name, data); 1574 else 1575 return 1; 1576 } 1577 1578 /** 1579 * dev_get_regmap() - Obtain the regmap (if any) for a device 1580 * 1581 * @dev: Device to retrieve the map for 1582 * @name: Optional name for the register map, usually NULL. 1583 * 1584 * Returns the regmap for the device if one is present, or NULL. If 1585 * name is specified then it must match the name specified when 1586 * registering the device, if it is NULL then the first regmap found 1587 * will be used. Devices with multiple register maps are very rare, 1588 * generic code should normally not need to specify a name. 1589 */ 1590 struct regmap *dev_get_regmap(struct device *dev, const char *name) 1591 { 1592 struct regmap **r = devres_find(dev, dev_get_regmap_release, 1593 dev_get_regmap_match, (void *)name); 1594 1595 if (!r) 1596 return NULL; 1597 return *r; 1598 } 1599 EXPORT_SYMBOL_GPL(dev_get_regmap); 1600 1601 /** 1602 * regmap_get_device() - Obtain the device from a regmap 1603 * 1604 * @map: Register map to operate on. 1605 * 1606 * Returns the underlying device that the regmap has been created for. 1607 */ 1608 struct device *regmap_get_device(struct regmap *map) 1609 { 1610 return map->dev; 1611 } 1612 EXPORT_SYMBOL_GPL(regmap_get_device); 1613 1614 static int _regmap_select_page(struct regmap *map, unsigned int *reg, 1615 struct regmap_range_node *range, 1616 unsigned int val_num) 1617 { 1618 void *orig_work_buf; 1619 unsigned int win_offset; 1620 unsigned int win_page; 1621 bool page_chg; 1622 int ret; 1623 1624 win_offset = (*reg - range->range_min) % range->window_len; 1625 win_page = (*reg - range->range_min) / range->window_len; 1626 1627 if (val_num > 1) { 1628 /* Bulk write shouldn't cross range boundary */ 1629 if (*reg + val_num - 1 > range->range_max) 1630 return -EINVAL; 1631 1632 /* ... or single page boundary */ 1633 if (val_num > range->window_len - win_offset) 1634 return -EINVAL; 1635 } 1636 1637 /* It is possible to have selector register inside data window. 1638 In that case, selector register is located on every page and 1639 it needs no page switching, when accessed alone. */ 1640 if (val_num > 1 || 1641 range->window_start + win_offset != range->selector_reg) { 1642 /* Use separate work_buf during page switching */ 1643 orig_work_buf = map->work_buf; 1644 map->work_buf = map->selector_work_buf; 1645 1646 ret = _regmap_update_bits(map, range->selector_reg, 1647 range->selector_mask, 1648 win_page << range->selector_shift, 1649 &page_chg, false); 1650 1651 map->work_buf = orig_work_buf; 1652 1653 if (ret != 0) 1654 return ret; 1655 } 1656 1657 *reg = range->window_start + win_offset; 1658 1659 return 0; 1660 } 1661 1662 static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes, 1663 unsigned long mask) 1664 { 1665 u8 *buf; 1666 int i; 1667 1668 if (!mask || !map->work_buf) 1669 return; 1670 1671 buf = map->work_buf; 1672 1673 for (i = 0; i < max_bytes; i++) 1674 buf[i] |= (mask >> (8 * i)) & 0xff; 1675 } 1676 1677 static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg, 1678 const void *val, size_t val_len, bool noinc) 1679 { 1680 struct regmap_range_node *range; 1681 unsigned long flags; 1682 void *work_val = map->work_buf + map->format.reg_bytes + 1683 map->format.pad_bytes; 1684 void *buf; 1685 int ret = -ENOTSUPP; 1686 size_t len; 1687 int i; 1688 1689 /* Check for unwritable or noinc registers in range 1690 * before we start 1691 */ 1692 if (!regmap_writeable_noinc(map, reg)) { 1693 for (i = 0; i < val_len / map->format.val_bytes; i++) { 1694 unsigned int element = 1695 reg + regmap_get_offset(map, i); 1696 if (!regmap_writeable(map, element) || 1697 regmap_writeable_noinc(map, element)) 1698 return -EINVAL; 1699 } 1700 } 1701 1702 if (!map->cache_bypass && map->format.parse_val) { 1703 unsigned int ival; 1704 int val_bytes = map->format.val_bytes; 1705 for (i = 0; i < val_len / val_bytes; i++) { 1706 ival = map->format.parse_val(val + (i * val_bytes)); 1707 ret = regcache_write(map, 1708 reg + regmap_get_offset(map, i), 1709 ival); 1710 if (ret) { 1711 dev_err(map->dev, 1712 "Error in caching of register: %x ret: %d\n", 1713 reg + regmap_get_offset(map, i), ret); 1714 return ret; 1715 } 1716 } 1717 if (map->cache_only) { 1718 map->cache_dirty = true; 1719 return 0; 1720 } 1721 } 1722 1723 range = _regmap_range_lookup(map, reg); 1724 if (range) { 1725 int val_num = val_len / map->format.val_bytes; 1726 int win_offset = (reg - range->range_min) % range->window_len; 1727 int win_residue = range->window_len - win_offset; 1728 1729 /* If the write goes beyond the end of the window split it */ 1730 while (val_num > win_residue) { 1731 dev_dbg(map->dev, "Writing window %d/%zu\n", 1732 win_residue, val_len / map->format.val_bytes); 1733 ret = _regmap_raw_write_impl(map, reg, val, 1734 win_residue * 1735 map->format.val_bytes, noinc); 1736 if (ret != 0) 1737 return ret; 1738 1739 reg += win_residue; 1740 val_num -= win_residue; 1741 val += win_residue * map->format.val_bytes; 1742 val_len -= win_residue * map->format.val_bytes; 1743 1744 win_offset = (reg - range->range_min) % 1745 range->window_len; 1746 win_residue = range->window_len - win_offset; 1747 } 1748 1749 ret = _regmap_select_page(map, ®, range, noinc ? 1 : val_num); 1750 if (ret != 0) 1751 return ret; 1752 } 1753 1754 reg += map->reg_base; 1755 reg >>= map->format.reg_downshift; 1756 map->format.format_reg(map->work_buf, reg, map->reg_shift); 1757 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes, 1758 map->write_flag_mask); 1759 1760 /* 1761 * Essentially all I/O mechanisms will be faster with a single 1762 * buffer to write. Since register syncs often generate raw 1763 * writes of single registers optimise that case. 1764 */ 1765 if (val != work_val && val_len == map->format.val_bytes) { 1766 memcpy(work_val, val, map->format.val_bytes); 1767 val = work_val; 1768 } 1769 1770 if (map->async && map->bus && map->bus->async_write) { 1771 struct regmap_async *async; 1772 1773 trace_regmap_async_write_start(map, reg, val_len); 1774 1775 spin_lock_irqsave(&map->async_lock, flags); 1776 async = list_first_entry_or_null(&map->async_free, 1777 struct regmap_async, 1778 list); 1779 if (async) 1780 list_del(&async->list); 1781 spin_unlock_irqrestore(&map->async_lock, flags); 1782 1783 if (!async) { 1784 async = map->bus->async_alloc(); 1785 if (!async) 1786 return -ENOMEM; 1787 1788 async->work_buf = kzalloc(map->format.buf_size, 1789 GFP_KERNEL | GFP_DMA); 1790 if (!async->work_buf) { 1791 kfree(async); 1792 return -ENOMEM; 1793 } 1794 } 1795 1796 async->map = map; 1797 1798 /* If the caller supplied the value we can use it safely. */ 1799 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes + 1800 map->format.reg_bytes + map->format.val_bytes); 1801 1802 spin_lock_irqsave(&map->async_lock, flags); 1803 list_add_tail(&async->list, &map->async_list); 1804 spin_unlock_irqrestore(&map->async_lock, flags); 1805 1806 if (val != work_val) 1807 ret = map->bus->async_write(map->bus_context, 1808 async->work_buf, 1809 map->format.reg_bytes + 1810 map->format.pad_bytes, 1811 val, val_len, async); 1812 else 1813 ret = map->bus->async_write(map->bus_context, 1814 async->work_buf, 1815 map->format.reg_bytes + 1816 map->format.pad_bytes + 1817 val_len, NULL, 0, async); 1818 1819 if (ret != 0) { 1820 dev_err(map->dev, "Failed to schedule write: %d\n", 1821 ret); 1822 1823 spin_lock_irqsave(&map->async_lock, flags); 1824 list_move(&async->list, &map->async_free); 1825 spin_unlock_irqrestore(&map->async_lock, flags); 1826 } 1827 1828 return ret; 1829 } 1830 1831 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes); 1832 1833 /* If we're doing a single register write we can probably just 1834 * send the work_buf directly, otherwise try to do a gather 1835 * write. 1836 */ 1837 if (val == work_val) 1838 ret = map->write(map->bus_context, map->work_buf, 1839 map->format.reg_bytes + 1840 map->format.pad_bytes + 1841 val_len); 1842 else if (map->bus && map->bus->gather_write) 1843 ret = map->bus->gather_write(map->bus_context, map->work_buf, 1844 map->format.reg_bytes + 1845 map->format.pad_bytes, 1846 val, val_len); 1847 else 1848 ret = -ENOTSUPP; 1849 1850 /* If that didn't work fall back on linearising by hand. */ 1851 if (ret == -ENOTSUPP) { 1852 len = map->format.reg_bytes + map->format.pad_bytes + val_len; 1853 buf = kzalloc(len, GFP_KERNEL); 1854 if (!buf) 1855 return -ENOMEM; 1856 1857 memcpy(buf, map->work_buf, map->format.reg_bytes); 1858 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes, 1859 val, val_len); 1860 ret = map->write(map->bus_context, buf, len); 1861 1862 kfree(buf); 1863 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) { 1864 /* regcache_drop_region() takes lock that we already have, 1865 * thus call map->cache_ops->drop() directly 1866 */ 1867 if (map->cache_ops && map->cache_ops->drop) 1868 map->cache_ops->drop(map, reg, reg + 1); 1869 } 1870 1871 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes); 1872 1873 return ret; 1874 } 1875 1876 /** 1877 * regmap_can_raw_write - Test if regmap_raw_write() is supported 1878 * 1879 * @map: Map to check. 1880 */ 1881 bool regmap_can_raw_write(struct regmap *map) 1882 { 1883 return map->write && map->format.format_val && map->format.format_reg; 1884 } 1885 EXPORT_SYMBOL_GPL(regmap_can_raw_write); 1886 1887 /** 1888 * regmap_get_raw_read_max - Get the maximum size we can read 1889 * 1890 * @map: Map to check. 1891 */ 1892 size_t regmap_get_raw_read_max(struct regmap *map) 1893 { 1894 return map->max_raw_read; 1895 } 1896 EXPORT_SYMBOL_GPL(regmap_get_raw_read_max); 1897 1898 /** 1899 * regmap_get_raw_write_max - Get the maximum size we can read 1900 * 1901 * @map: Map to check. 1902 */ 1903 size_t regmap_get_raw_write_max(struct regmap *map) 1904 { 1905 return map->max_raw_write; 1906 } 1907 EXPORT_SYMBOL_GPL(regmap_get_raw_write_max); 1908 1909 static int _regmap_bus_formatted_write(void *context, unsigned int reg, 1910 unsigned int val) 1911 { 1912 int ret; 1913 struct regmap_range_node *range; 1914 struct regmap *map = context; 1915 1916 WARN_ON(!map->format.format_write); 1917 1918 range = _regmap_range_lookup(map, reg); 1919 if (range) { 1920 ret = _regmap_select_page(map, ®, range, 1); 1921 if (ret != 0) 1922 return ret; 1923 } 1924 1925 reg += map->reg_base; 1926 reg >>= map->format.reg_downshift; 1927 map->format.format_write(map, reg, val); 1928 1929 trace_regmap_hw_write_start(map, reg, 1); 1930 1931 ret = map->write(map->bus_context, map->work_buf, map->format.buf_size); 1932 1933 trace_regmap_hw_write_done(map, reg, 1); 1934 1935 return ret; 1936 } 1937 1938 static int _regmap_bus_reg_write(void *context, unsigned int reg, 1939 unsigned int val) 1940 { 1941 struct regmap *map = context; 1942 1943 return map->bus->reg_write(map->bus_context, reg, val); 1944 } 1945 1946 static int _regmap_bus_raw_write(void *context, unsigned int reg, 1947 unsigned int val) 1948 { 1949 struct regmap *map = context; 1950 1951 WARN_ON(!map->format.format_val); 1952 1953 map->format.format_val(map->work_buf + map->format.reg_bytes 1954 + map->format.pad_bytes, val, 0); 1955 return _regmap_raw_write_impl(map, reg, 1956 map->work_buf + 1957 map->format.reg_bytes + 1958 map->format.pad_bytes, 1959 map->format.val_bytes, 1960 false); 1961 } 1962 1963 static inline void *_regmap_map_get_context(struct regmap *map) 1964 { 1965 return (map->bus || (!map->bus && map->read)) ? map : map->bus_context; 1966 } 1967 1968 int _regmap_write(struct regmap *map, unsigned int reg, 1969 unsigned int val) 1970 { 1971 int ret; 1972 void *context = _regmap_map_get_context(map); 1973 1974 if (!regmap_writeable(map, reg)) 1975 return -EIO; 1976 1977 if (!map->cache_bypass && !map->defer_caching) { 1978 ret = regcache_write(map, reg, val); 1979 if (ret != 0) 1980 return ret; 1981 if (map->cache_only) { 1982 map->cache_dirty = true; 1983 return 0; 1984 } 1985 } 1986 1987 ret = map->reg_write(context, reg, val); 1988 if (ret == 0) { 1989 if (regmap_should_log(map)) 1990 dev_info(map->dev, "%x <= %x\n", reg, val); 1991 1992 trace_regmap_reg_write(map, reg, val); 1993 } 1994 1995 return ret; 1996 } 1997 1998 /** 1999 * regmap_write() - Write a value to a single register 2000 * 2001 * @map: Register map to write to 2002 * @reg: Register to write to 2003 * @val: Value to be written 2004 * 2005 * A value of zero will be returned on success, a negative errno will 2006 * be returned in error cases. 2007 */ 2008 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val) 2009 { 2010 int ret; 2011 2012 if (!IS_ALIGNED(reg, map->reg_stride)) 2013 return -EINVAL; 2014 2015 map->lock(map->lock_arg); 2016 2017 ret = _regmap_write(map, reg, val); 2018 2019 map->unlock(map->lock_arg); 2020 2021 return ret; 2022 } 2023 EXPORT_SYMBOL_GPL(regmap_write); 2024 2025 /** 2026 * regmap_write_async() - Write a value to a single register asynchronously 2027 * 2028 * @map: Register map to write to 2029 * @reg: Register to write to 2030 * @val: Value to be written 2031 * 2032 * A value of zero will be returned on success, a negative errno will 2033 * be returned in error cases. 2034 */ 2035 int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val) 2036 { 2037 int ret; 2038 2039 if (!IS_ALIGNED(reg, map->reg_stride)) 2040 return -EINVAL; 2041 2042 map->lock(map->lock_arg); 2043 2044 map->async = true; 2045 2046 ret = _regmap_write(map, reg, val); 2047 2048 map->async = false; 2049 2050 map->unlock(map->lock_arg); 2051 2052 return ret; 2053 } 2054 EXPORT_SYMBOL_GPL(regmap_write_async); 2055 2056 int _regmap_raw_write(struct regmap *map, unsigned int reg, 2057 const void *val, size_t val_len, bool noinc) 2058 { 2059 size_t val_bytes = map->format.val_bytes; 2060 size_t val_count = val_len / val_bytes; 2061 size_t chunk_count, chunk_bytes; 2062 size_t chunk_regs = val_count; 2063 int ret, i; 2064 2065 if (!val_count) 2066 return -EINVAL; 2067 2068 if (map->use_single_write) 2069 chunk_regs = 1; 2070 else if (map->max_raw_write && val_len > map->max_raw_write) 2071 chunk_regs = map->max_raw_write / val_bytes; 2072 2073 chunk_count = val_count / chunk_regs; 2074 chunk_bytes = chunk_regs * val_bytes; 2075 2076 /* Write as many bytes as possible with chunk_size */ 2077 for (i = 0; i < chunk_count; i++) { 2078 ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc); 2079 if (ret) 2080 return ret; 2081 2082 reg += regmap_get_offset(map, chunk_regs); 2083 val += chunk_bytes; 2084 val_len -= chunk_bytes; 2085 } 2086 2087 /* Write remaining bytes */ 2088 if (val_len) 2089 ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc); 2090 2091 return ret; 2092 } 2093 2094 /** 2095 * regmap_raw_write() - Write raw values to one or more registers 2096 * 2097 * @map: Register map to write to 2098 * @reg: Initial register to write to 2099 * @val: Block of data to be written, laid out for direct transmission to the 2100 * device 2101 * @val_len: Length of data pointed to by val. 2102 * 2103 * This function is intended to be used for things like firmware 2104 * download where a large block of data needs to be transferred to the 2105 * device. No formatting will be done on the data provided. 2106 * 2107 * A value of zero will be returned on success, a negative errno will 2108 * be returned in error cases. 2109 */ 2110 int regmap_raw_write(struct regmap *map, unsigned int reg, 2111 const void *val, size_t val_len) 2112 { 2113 int ret; 2114 2115 if (!regmap_can_raw_write(map)) 2116 return -EINVAL; 2117 if (val_len % map->format.val_bytes) 2118 return -EINVAL; 2119 2120 map->lock(map->lock_arg); 2121 2122 ret = _regmap_raw_write(map, reg, val, val_len, false); 2123 2124 map->unlock(map->lock_arg); 2125 2126 return ret; 2127 } 2128 EXPORT_SYMBOL_GPL(regmap_raw_write); 2129 2130 /** 2131 * regmap_noinc_write(): Write data from a register without incrementing the 2132 * register number 2133 * 2134 * @map: Register map to write to 2135 * @reg: Register to write to 2136 * @val: Pointer to data buffer 2137 * @val_len: Length of output buffer in bytes. 2138 * 2139 * The regmap API usually assumes that bulk bus write operations will write a 2140 * range of registers. Some devices have certain registers for which a write 2141 * operation can write to an internal FIFO. 2142 * 2143 * The target register must be volatile but registers after it can be 2144 * completely unrelated cacheable registers. 2145 * 2146 * This will attempt multiple writes as required to write val_len bytes. 2147 * 2148 * A value of zero will be returned on success, a negative errno will be 2149 * returned in error cases. 2150 */ 2151 int regmap_noinc_write(struct regmap *map, unsigned int reg, 2152 const void *val, size_t val_len) 2153 { 2154 size_t write_len; 2155 int ret; 2156 2157 if (!map->write) 2158 return -ENOTSUPP; 2159 2160 if (val_len % map->format.val_bytes) 2161 return -EINVAL; 2162 if (!IS_ALIGNED(reg, map->reg_stride)) 2163 return -EINVAL; 2164 if (val_len == 0) 2165 return -EINVAL; 2166 2167 map->lock(map->lock_arg); 2168 2169 if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) { 2170 ret = -EINVAL; 2171 goto out_unlock; 2172 } 2173 2174 while (val_len) { 2175 if (map->max_raw_write && map->max_raw_write < val_len) 2176 write_len = map->max_raw_write; 2177 else 2178 write_len = val_len; 2179 ret = _regmap_raw_write(map, reg, val, write_len, true); 2180 if (ret) 2181 goto out_unlock; 2182 val = ((u8 *)val) + write_len; 2183 val_len -= write_len; 2184 } 2185 2186 out_unlock: 2187 map->unlock(map->lock_arg); 2188 return ret; 2189 } 2190 EXPORT_SYMBOL_GPL(regmap_noinc_write); 2191 2192 /** 2193 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a 2194 * register field. 2195 * 2196 * @field: Register field to write to 2197 * @mask: Bitmask to change 2198 * @val: Value to be written 2199 * @change: Boolean indicating if a write was done 2200 * @async: Boolean indicating asynchronously 2201 * @force: Boolean indicating use force update 2202 * 2203 * Perform a read/modify/write cycle on the register field with change, 2204 * async, force option. 2205 * 2206 * A value of zero will be returned on success, a negative errno will 2207 * be returned in error cases. 2208 */ 2209 int regmap_field_update_bits_base(struct regmap_field *field, 2210 unsigned int mask, unsigned int val, 2211 bool *change, bool async, bool force) 2212 { 2213 mask = (mask << field->shift) & field->mask; 2214 2215 return regmap_update_bits_base(field->regmap, field->reg, 2216 mask, val << field->shift, 2217 change, async, force); 2218 } 2219 EXPORT_SYMBOL_GPL(regmap_field_update_bits_base); 2220 2221 /** 2222 * regmap_field_test_bits() - Check if all specified bits are set in a 2223 * register field. 2224 * 2225 * @field: Register field to operate on 2226 * @bits: Bits to test 2227 * 2228 * Returns -1 if the underlying regmap_field_read() fails, 0 if at least one of the 2229 * tested bits is not set and 1 if all tested bits are set. 2230 */ 2231 int regmap_field_test_bits(struct regmap_field *field, unsigned int bits) 2232 { 2233 unsigned int val, ret; 2234 2235 ret = regmap_field_read(field, &val); 2236 if (ret) 2237 return ret; 2238 2239 return (val & bits) == bits; 2240 } 2241 EXPORT_SYMBOL_GPL(regmap_field_test_bits); 2242 2243 /** 2244 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a 2245 * register field with port ID 2246 * 2247 * @field: Register field to write to 2248 * @id: port ID 2249 * @mask: Bitmask to change 2250 * @val: Value to be written 2251 * @change: Boolean indicating if a write was done 2252 * @async: Boolean indicating asynchronously 2253 * @force: Boolean indicating use force update 2254 * 2255 * A value of zero will be returned on success, a negative errno will 2256 * be returned in error cases. 2257 */ 2258 int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, 2259 unsigned int mask, unsigned int val, 2260 bool *change, bool async, bool force) 2261 { 2262 if (id >= field->id_size) 2263 return -EINVAL; 2264 2265 mask = (mask << field->shift) & field->mask; 2266 2267 return regmap_update_bits_base(field->regmap, 2268 field->reg + (field->id_offset * id), 2269 mask, val << field->shift, 2270 change, async, force); 2271 } 2272 EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base); 2273 2274 /** 2275 * regmap_bulk_write() - Write multiple registers to the device 2276 * 2277 * @map: Register map to write to 2278 * @reg: First register to be write from 2279 * @val: Block of data to be written, in native register size for device 2280 * @val_count: Number of registers to write 2281 * 2282 * This function is intended to be used for writing a large block of 2283 * data to the device either in single transfer or multiple transfer. 2284 * 2285 * A value of zero will be returned on success, a negative errno will 2286 * be returned in error cases. 2287 */ 2288 int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, 2289 size_t val_count) 2290 { 2291 int ret = 0, i; 2292 size_t val_bytes = map->format.val_bytes; 2293 2294 if (!IS_ALIGNED(reg, map->reg_stride)) 2295 return -EINVAL; 2296 2297 /* 2298 * Some devices don't support bulk write, for them we have a series of 2299 * single write operations. 2300 */ 2301 if (!map->write || !map->format.parse_inplace) { 2302 map->lock(map->lock_arg); 2303 for (i = 0; i < val_count; i++) { 2304 unsigned int ival; 2305 2306 switch (val_bytes) { 2307 case 1: 2308 ival = *(u8 *)(val + (i * val_bytes)); 2309 break; 2310 case 2: 2311 ival = *(u16 *)(val + (i * val_bytes)); 2312 break; 2313 case 4: 2314 ival = *(u32 *)(val + (i * val_bytes)); 2315 break; 2316 #ifdef CONFIG_64BIT 2317 case 8: 2318 ival = *(u64 *)(val + (i * val_bytes)); 2319 break; 2320 #endif 2321 default: 2322 ret = -EINVAL; 2323 goto out; 2324 } 2325 2326 ret = _regmap_write(map, 2327 reg + regmap_get_offset(map, i), 2328 ival); 2329 if (ret != 0) 2330 goto out; 2331 } 2332 out: 2333 map->unlock(map->lock_arg); 2334 } else { 2335 void *wval; 2336 2337 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags); 2338 if (!wval) 2339 return -ENOMEM; 2340 2341 for (i = 0; i < val_count * val_bytes; i += val_bytes) 2342 map->format.parse_inplace(wval + i); 2343 2344 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count); 2345 2346 kfree(wval); 2347 } 2348 return ret; 2349 } 2350 EXPORT_SYMBOL_GPL(regmap_bulk_write); 2351 2352 /* 2353 * _regmap_raw_multi_reg_write() 2354 * 2355 * the (register,newvalue) pairs in regs have not been formatted, but 2356 * they are all in the same page and have been changed to being page 2357 * relative. The page register has been written if that was necessary. 2358 */ 2359 static int _regmap_raw_multi_reg_write(struct regmap *map, 2360 const struct reg_sequence *regs, 2361 size_t num_regs) 2362 { 2363 int ret; 2364 void *buf; 2365 int i; 2366 u8 *u8; 2367 size_t val_bytes = map->format.val_bytes; 2368 size_t reg_bytes = map->format.reg_bytes; 2369 size_t pad_bytes = map->format.pad_bytes; 2370 size_t pair_size = reg_bytes + pad_bytes + val_bytes; 2371 size_t len = pair_size * num_regs; 2372 2373 if (!len) 2374 return -EINVAL; 2375 2376 buf = kzalloc(len, GFP_KERNEL); 2377 if (!buf) 2378 return -ENOMEM; 2379 2380 /* We have to linearise by hand. */ 2381 2382 u8 = buf; 2383 2384 for (i = 0; i < num_regs; i++) { 2385 unsigned int reg = regs[i].reg; 2386 unsigned int val = regs[i].def; 2387 trace_regmap_hw_write_start(map, reg, 1); 2388 reg += map->reg_base; 2389 reg >>= map->format.reg_downshift; 2390 map->format.format_reg(u8, reg, map->reg_shift); 2391 u8 += reg_bytes + pad_bytes; 2392 map->format.format_val(u8, val, 0); 2393 u8 += val_bytes; 2394 } 2395 u8 = buf; 2396 *u8 |= map->write_flag_mask; 2397 2398 ret = map->write(map->bus_context, buf, len); 2399 2400 kfree(buf); 2401 2402 for (i = 0; i < num_regs; i++) { 2403 int reg = regs[i].reg; 2404 trace_regmap_hw_write_done(map, reg, 1); 2405 } 2406 return ret; 2407 } 2408 2409 static unsigned int _regmap_register_page(struct regmap *map, 2410 unsigned int reg, 2411 struct regmap_range_node *range) 2412 { 2413 unsigned int win_page = (reg - range->range_min) / range->window_len; 2414 2415 return win_page; 2416 } 2417 2418 static int _regmap_range_multi_paged_reg_write(struct regmap *map, 2419 struct reg_sequence *regs, 2420 size_t num_regs) 2421 { 2422 int ret; 2423 int i, n; 2424 struct reg_sequence *base; 2425 unsigned int this_page = 0; 2426 unsigned int page_change = 0; 2427 /* 2428 * the set of registers are not neccessarily in order, but 2429 * since the order of write must be preserved this algorithm 2430 * chops the set each time the page changes. This also applies 2431 * if there is a delay required at any point in the sequence. 2432 */ 2433 base = regs; 2434 for (i = 0, n = 0; i < num_regs; i++, n++) { 2435 unsigned int reg = regs[i].reg; 2436 struct regmap_range_node *range; 2437 2438 range = _regmap_range_lookup(map, reg); 2439 if (range) { 2440 unsigned int win_page = _regmap_register_page(map, reg, 2441 range); 2442 2443 if (i == 0) 2444 this_page = win_page; 2445 if (win_page != this_page) { 2446 this_page = win_page; 2447 page_change = 1; 2448 } 2449 } 2450 2451 /* If we have both a page change and a delay make sure to 2452 * write the regs and apply the delay before we change the 2453 * page. 2454 */ 2455 2456 if (page_change || regs[i].delay_us) { 2457 2458 /* For situations where the first write requires 2459 * a delay we need to make sure we don't call 2460 * raw_multi_reg_write with n=0 2461 * This can't occur with page breaks as we 2462 * never write on the first iteration 2463 */ 2464 if (regs[i].delay_us && i == 0) 2465 n = 1; 2466 2467 ret = _regmap_raw_multi_reg_write(map, base, n); 2468 if (ret != 0) 2469 return ret; 2470 2471 if (regs[i].delay_us) { 2472 if (map->can_sleep) 2473 fsleep(regs[i].delay_us); 2474 else 2475 udelay(regs[i].delay_us); 2476 } 2477 2478 base += n; 2479 n = 0; 2480 2481 if (page_change) { 2482 ret = _regmap_select_page(map, 2483 &base[n].reg, 2484 range, 1); 2485 if (ret != 0) 2486 return ret; 2487 2488 page_change = 0; 2489 } 2490 2491 } 2492 2493 } 2494 if (n > 0) 2495 return _regmap_raw_multi_reg_write(map, base, n); 2496 return 0; 2497 } 2498 2499 static int _regmap_multi_reg_write(struct regmap *map, 2500 const struct reg_sequence *regs, 2501 size_t num_regs) 2502 { 2503 int i; 2504 int ret; 2505 2506 if (!map->can_multi_write) { 2507 for (i = 0; i < num_regs; i++) { 2508 ret = _regmap_write(map, regs[i].reg, regs[i].def); 2509 if (ret != 0) 2510 return ret; 2511 2512 if (regs[i].delay_us) { 2513 if (map->can_sleep) 2514 fsleep(regs[i].delay_us); 2515 else 2516 udelay(regs[i].delay_us); 2517 } 2518 } 2519 return 0; 2520 } 2521 2522 if (!map->format.parse_inplace) 2523 return -EINVAL; 2524 2525 if (map->writeable_reg) 2526 for (i = 0; i < num_regs; i++) { 2527 int reg = regs[i].reg; 2528 if (!map->writeable_reg(map->dev, reg)) 2529 return -EINVAL; 2530 if (!IS_ALIGNED(reg, map->reg_stride)) 2531 return -EINVAL; 2532 } 2533 2534 if (!map->cache_bypass) { 2535 for (i = 0; i < num_regs; i++) { 2536 unsigned int val = regs[i].def; 2537 unsigned int reg = regs[i].reg; 2538 ret = regcache_write(map, reg, val); 2539 if (ret) { 2540 dev_err(map->dev, 2541 "Error in caching of register: %x ret: %d\n", 2542 reg, ret); 2543 return ret; 2544 } 2545 } 2546 if (map->cache_only) { 2547 map->cache_dirty = true; 2548 return 0; 2549 } 2550 } 2551 2552 WARN_ON(!map->bus); 2553 2554 for (i = 0; i < num_regs; i++) { 2555 unsigned int reg = regs[i].reg; 2556 struct regmap_range_node *range; 2557 2558 /* Coalesce all the writes between a page break or a delay 2559 * in a sequence 2560 */ 2561 range = _regmap_range_lookup(map, reg); 2562 if (range || regs[i].delay_us) { 2563 size_t len = sizeof(struct reg_sequence)*num_regs; 2564 struct reg_sequence *base = kmemdup(regs, len, 2565 GFP_KERNEL); 2566 if (!base) 2567 return -ENOMEM; 2568 ret = _regmap_range_multi_paged_reg_write(map, base, 2569 num_regs); 2570 kfree(base); 2571 2572 return ret; 2573 } 2574 } 2575 return _regmap_raw_multi_reg_write(map, regs, num_regs); 2576 } 2577 2578 /** 2579 * regmap_multi_reg_write() - Write multiple registers to the device 2580 * 2581 * @map: Register map to write to 2582 * @regs: Array of structures containing register,value to be written 2583 * @num_regs: Number of registers to write 2584 * 2585 * Write multiple registers to the device where the set of register, value 2586 * pairs are supplied in any order, possibly not all in a single range. 2587 * 2588 * The 'normal' block write mode will send ultimately send data on the 2589 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are 2590 * addressed. However, this alternative block multi write mode will send 2591 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device 2592 * must of course support the mode. 2593 * 2594 * A value of zero will be returned on success, a negative errno will be 2595 * returned in error cases. 2596 */ 2597 int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, 2598 int num_regs) 2599 { 2600 int ret; 2601 2602 map->lock(map->lock_arg); 2603 2604 ret = _regmap_multi_reg_write(map, regs, num_regs); 2605 2606 map->unlock(map->lock_arg); 2607 2608 return ret; 2609 } 2610 EXPORT_SYMBOL_GPL(regmap_multi_reg_write); 2611 2612 /** 2613 * regmap_multi_reg_write_bypassed() - Write multiple registers to the 2614 * device but not the cache 2615 * 2616 * @map: Register map to write to 2617 * @regs: Array of structures containing register,value to be written 2618 * @num_regs: Number of registers to write 2619 * 2620 * Write multiple registers to the device but not the cache where the set 2621 * of register are supplied in any order. 2622 * 2623 * This function is intended to be used for writing a large block of data 2624 * atomically to the device in single transfer for those I2C client devices 2625 * that implement this alternative block write mode. 2626 * 2627 * A value of zero will be returned on success, a negative errno will 2628 * be returned in error cases. 2629 */ 2630 int regmap_multi_reg_write_bypassed(struct regmap *map, 2631 const struct reg_sequence *regs, 2632 int num_regs) 2633 { 2634 int ret; 2635 bool bypass; 2636 2637 map->lock(map->lock_arg); 2638 2639 bypass = map->cache_bypass; 2640 map->cache_bypass = true; 2641 2642 ret = _regmap_multi_reg_write(map, regs, num_regs); 2643 2644 map->cache_bypass = bypass; 2645 2646 map->unlock(map->lock_arg); 2647 2648 return ret; 2649 } 2650 EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed); 2651 2652 /** 2653 * regmap_raw_write_async() - Write raw values to one or more registers 2654 * asynchronously 2655 * 2656 * @map: Register map to write to 2657 * @reg: Initial register to write to 2658 * @val: Block of data to be written, laid out for direct transmission to the 2659 * device. Must be valid until regmap_async_complete() is called. 2660 * @val_len: Length of data pointed to by val. 2661 * 2662 * This function is intended to be used for things like firmware 2663 * download where a large block of data needs to be transferred to the 2664 * device. No formatting will be done on the data provided. 2665 * 2666 * If supported by the underlying bus the write will be scheduled 2667 * asynchronously, helping maximise I/O speed on higher speed buses 2668 * like SPI. regmap_async_complete() can be called to ensure that all 2669 * asynchrnous writes have been completed. 2670 * 2671 * A value of zero will be returned on success, a negative errno will 2672 * be returned in error cases. 2673 */ 2674 int regmap_raw_write_async(struct regmap *map, unsigned int reg, 2675 const void *val, size_t val_len) 2676 { 2677 int ret; 2678 2679 if (val_len % map->format.val_bytes) 2680 return -EINVAL; 2681 if (!IS_ALIGNED(reg, map->reg_stride)) 2682 return -EINVAL; 2683 2684 map->lock(map->lock_arg); 2685 2686 map->async = true; 2687 2688 ret = _regmap_raw_write(map, reg, val, val_len, false); 2689 2690 map->async = false; 2691 2692 map->unlock(map->lock_arg); 2693 2694 return ret; 2695 } 2696 EXPORT_SYMBOL_GPL(regmap_raw_write_async); 2697 2698 static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val, 2699 unsigned int val_len, bool noinc) 2700 { 2701 struct regmap_range_node *range; 2702 int ret; 2703 2704 if (!map->read) 2705 return -EINVAL; 2706 2707 range = _regmap_range_lookup(map, reg); 2708 if (range) { 2709 ret = _regmap_select_page(map, ®, range, 2710 noinc ? 1 : val_len / map->format.val_bytes); 2711 if (ret != 0) 2712 return ret; 2713 } 2714 2715 reg += map->reg_base; 2716 reg >>= map->format.reg_downshift; 2717 map->format.format_reg(map->work_buf, reg, map->reg_shift); 2718 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes, 2719 map->read_flag_mask); 2720 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes); 2721 2722 ret = map->read(map->bus_context, map->work_buf, 2723 map->format.reg_bytes + map->format.pad_bytes, 2724 val, val_len); 2725 2726 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes); 2727 2728 return ret; 2729 } 2730 2731 static int _regmap_bus_reg_read(void *context, unsigned int reg, 2732 unsigned int *val) 2733 { 2734 struct regmap *map = context; 2735 2736 return map->bus->reg_read(map->bus_context, reg, val); 2737 } 2738 2739 static int _regmap_bus_read(void *context, unsigned int reg, 2740 unsigned int *val) 2741 { 2742 int ret; 2743 struct regmap *map = context; 2744 void *work_val = map->work_buf + map->format.reg_bytes + 2745 map->format.pad_bytes; 2746 2747 if (!map->format.parse_val) 2748 return -EINVAL; 2749 2750 ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false); 2751 if (ret == 0) 2752 *val = map->format.parse_val(work_val); 2753 2754 return ret; 2755 } 2756 2757 static int _regmap_read(struct regmap *map, unsigned int reg, 2758 unsigned int *val) 2759 { 2760 int ret; 2761 void *context = _regmap_map_get_context(map); 2762 2763 if (!map->cache_bypass) { 2764 ret = regcache_read(map, reg, val); 2765 if (ret == 0) 2766 return 0; 2767 } 2768 2769 if (map->cache_only) 2770 return -EBUSY; 2771 2772 if (!regmap_readable(map, reg)) 2773 return -EIO; 2774 2775 ret = map->reg_read(context, reg, val); 2776 if (ret == 0) { 2777 if (regmap_should_log(map)) 2778 dev_info(map->dev, "%x => %x\n", reg, *val); 2779 2780 trace_regmap_reg_read(map, reg, *val); 2781 2782 if (!map->cache_bypass) 2783 regcache_write(map, reg, *val); 2784 } 2785 2786 return ret; 2787 } 2788 2789 /** 2790 * regmap_read() - Read a value from a single register 2791 * 2792 * @map: Register map to read from 2793 * @reg: Register to be read from 2794 * @val: Pointer to store read value 2795 * 2796 * A value of zero will be returned on success, a negative errno will 2797 * be returned in error cases. 2798 */ 2799 int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val) 2800 { 2801 int ret; 2802 2803 if (!IS_ALIGNED(reg, map->reg_stride)) 2804 return -EINVAL; 2805 2806 map->lock(map->lock_arg); 2807 2808 ret = _regmap_read(map, reg, val); 2809 2810 map->unlock(map->lock_arg); 2811 2812 return ret; 2813 } 2814 EXPORT_SYMBOL_GPL(regmap_read); 2815 2816 /** 2817 * regmap_raw_read() - Read raw data from the device 2818 * 2819 * @map: Register map to read from 2820 * @reg: First register to be read from 2821 * @val: Pointer to store read value 2822 * @val_len: Size of data to read 2823 * 2824 * A value of zero will be returned on success, a negative errno will 2825 * be returned in error cases. 2826 */ 2827 int regmap_raw_read(struct regmap *map, unsigned int reg, void *val, 2828 size_t val_len) 2829 { 2830 size_t val_bytes = map->format.val_bytes; 2831 size_t val_count = val_len / val_bytes; 2832 unsigned int v; 2833 int ret, i; 2834 2835 if (val_len % map->format.val_bytes) 2836 return -EINVAL; 2837 if (!IS_ALIGNED(reg, map->reg_stride)) 2838 return -EINVAL; 2839 if (val_count == 0) 2840 return -EINVAL; 2841 2842 map->lock(map->lock_arg); 2843 2844 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass || 2845 map->cache_type == REGCACHE_NONE) { 2846 size_t chunk_count, chunk_bytes; 2847 size_t chunk_regs = val_count; 2848 2849 if (!map->read) { 2850 ret = -ENOTSUPP; 2851 goto out; 2852 } 2853 2854 if (map->use_single_read) 2855 chunk_regs = 1; 2856 else if (map->max_raw_read && val_len > map->max_raw_read) 2857 chunk_regs = map->max_raw_read / val_bytes; 2858 2859 chunk_count = val_count / chunk_regs; 2860 chunk_bytes = chunk_regs * val_bytes; 2861 2862 /* Read bytes that fit into whole chunks */ 2863 for (i = 0; i < chunk_count; i++) { 2864 ret = _regmap_raw_read(map, reg, val, chunk_bytes, false); 2865 if (ret != 0) 2866 goto out; 2867 2868 reg += regmap_get_offset(map, chunk_regs); 2869 val += chunk_bytes; 2870 val_len -= chunk_bytes; 2871 } 2872 2873 /* Read remaining bytes */ 2874 if (val_len) { 2875 ret = _regmap_raw_read(map, reg, val, val_len, false); 2876 if (ret != 0) 2877 goto out; 2878 } 2879 } else { 2880 /* Otherwise go word by word for the cache; should be low 2881 * cost as we expect to hit the cache. 2882 */ 2883 for (i = 0; i < val_count; i++) { 2884 ret = _regmap_read(map, reg + regmap_get_offset(map, i), 2885 &v); 2886 if (ret != 0) 2887 goto out; 2888 2889 map->format.format_val(val + (i * val_bytes), v, 0); 2890 } 2891 } 2892 2893 out: 2894 map->unlock(map->lock_arg); 2895 2896 return ret; 2897 } 2898 EXPORT_SYMBOL_GPL(regmap_raw_read); 2899 2900 /** 2901 * regmap_noinc_read(): Read data from a register without incrementing the 2902 * register number 2903 * 2904 * @map: Register map to read from 2905 * @reg: Register to read from 2906 * @val: Pointer to data buffer 2907 * @val_len: Length of output buffer in bytes. 2908 * 2909 * The regmap API usually assumes that bulk read operations will read a 2910 * range of registers. Some devices have certain registers for which a read 2911 * operation read will read from an internal FIFO. 2912 * 2913 * The target register must be volatile but registers after it can be 2914 * completely unrelated cacheable registers. 2915 * 2916 * This will attempt multiple reads as required to read val_len bytes. 2917 * 2918 * A value of zero will be returned on success, a negative errno will be 2919 * returned in error cases. 2920 */ 2921 int regmap_noinc_read(struct regmap *map, unsigned int reg, 2922 void *val, size_t val_len) 2923 { 2924 size_t read_len; 2925 int ret; 2926 2927 if (!map->read) 2928 return -ENOTSUPP; 2929 2930 if (val_len % map->format.val_bytes) 2931 return -EINVAL; 2932 if (!IS_ALIGNED(reg, map->reg_stride)) 2933 return -EINVAL; 2934 if (val_len == 0) 2935 return -EINVAL; 2936 2937 map->lock(map->lock_arg); 2938 2939 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) { 2940 ret = -EINVAL; 2941 goto out_unlock; 2942 } 2943 2944 while (val_len) { 2945 if (map->max_raw_read && map->max_raw_read < val_len) 2946 read_len = map->max_raw_read; 2947 else 2948 read_len = val_len; 2949 ret = _regmap_raw_read(map, reg, val, read_len, true); 2950 if (ret) 2951 goto out_unlock; 2952 val = ((u8 *)val) + read_len; 2953 val_len -= read_len; 2954 } 2955 2956 out_unlock: 2957 map->unlock(map->lock_arg); 2958 return ret; 2959 } 2960 EXPORT_SYMBOL_GPL(regmap_noinc_read); 2961 2962 /** 2963 * regmap_field_read(): Read a value to a single register field 2964 * 2965 * @field: Register field to read from 2966 * @val: Pointer to store read value 2967 * 2968 * A value of zero will be returned on success, a negative errno will 2969 * be returned in error cases. 2970 */ 2971 int regmap_field_read(struct regmap_field *field, unsigned int *val) 2972 { 2973 int ret; 2974 unsigned int reg_val; 2975 ret = regmap_read(field->regmap, field->reg, ®_val); 2976 if (ret != 0) 2977 return ret; 2978 2979 reg_val &= field->mask; 2980 reg_val >>= field->shift; 2981 *val = reg_val; 2982 2983 return ret; 2984 } 2985 EXPORT_SYMBOL_GPL(regmap_field_read); 2986 2987 /** 2988 * regmap_fields_read() - Read a value to a single register field with port ID 2989 * 2990 * @field: Register field to read from 2991 * @id: port ID 2992 * @val: Pointer to store read value 2993 * 2994 * A value of zero will be returned on success, a negative errno will 2995 * be returned in error cases. 2996 */ 2997 int regmap_fields_read(struct regmap_field *field, unsigned int id, 2998 unsigned int *val) 2999 { 3000 int ret; 3001 unsigned int reg_val; 3002 3003 if (id >= field->id_size) 3004 return -EINVAL; 3005 3006 ret = regmap_read(field->regmap, 3007 field->reg + (field->id_offset * id), 3008 ®_val); 3009 if (ret != 0) 3010 return ret; 3011 3012 reg_val &= field->mask; 3013 reg_val >>= field->shift; 3014 *val = reg_val; 3015 3016 return ret; 3017 } 3018 EXPORT_SYMBOL_GPL(regmap_fields_read); 3019 3020 /** 3021 * regmap_bulk_read() - Read multiple registers from the device 3022 * 3023 * @map: Register map to read from 3024 * @reg: First register to be read from 3025 * @val: Pointer to store read value, in native register size for device 3026 * @val_count: Number of registers to read 3027 * 3028 * A value of zero will be returned on success, a negative errno will 3029 * be returned in error cases. 3030 */ 3031 int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, 3032 size_t val_count) 3033 { 3034 int ret, i; 3035 size_t val_bytes = map->format.val_bytes; 3036 bool vol = regmap_volatile_range(map, reg, val_count); 3037 3038 if (!IS_ALIGNED(reg, map->reg_stride)) 3039 return -EINVAL; 3040 if (val_count == 0) 3041 return -EINVAL; 3042 3043 if (map->read && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) { 3044 ret = regmap_raw_read(map, reg, val, val_bytes * val_count); 3045 if (ret != 0) 3046 return ret; 3047 3048 for (i = 0; i < val_count * val_bytes; i += val_bytes) 3049 map->format.parse_inplace(val + i); 3050 } else { 3051 #ifdef CONFIG_64BIT 3052 u64 *u64 = val; 3053 #endif 3054 u32 *u32 = val; 3055 u16 *u16 = val; 3056 u8 *u8 = val; 3057 3058 map->lock(map->lock_arg); 3059 3060 for (i = 0; i < val_count; i++) { 3061 unsigned int ival; 3062 3063 ret = _regmap_read(map, reg + regmap_get_offset(map, i), 3064 &ival); 3065 if (ret != 0) 3066 goto out; 3067 3068 switch (map->format.val_bytes) { 3069 #ifdef CONFIG_64BIT 3070 case 8: 3071 u64[i] = ival; 3072 break; 3073 #endif 3074 case 4: 3075 u32[i] = ival; 3076 break; 3077 case 2: 3078 u16[i] = ival; 3079 break; 3080 case 1: 3081 u8[i] = ival; 3082 break; 3083 default: 3084 ret = -EINVAL; 3085 goto out; 3086 } 3087 } 3088 3089 out: 3090 map->unlock(map->lock_arg); 3091 } 3092 3093 return ret; 3094 } 3095 EXPORT_SYMBOL_GPL(regmap_bulk_read); 3096 3097 static int _regmap_update_bits(struct regmap *map, unsigned int reg, 3098 unsigned int mask, unsigned int val, 3099 bool *change, bool force_write) 3100 { 3101 int ret; 3102 unsigned int tmp, orig; 3103 3104 if (change) 3105 *change = false; 3106 3107 if (regmap_volatile(map, reg) && map->reg_update_bits) { 3108 ret = map->reg_update_bits(map->bus_context, reg, mask, val); 3109 if (ret == 0 && change) 3110 *change = true; 3111 } else { 3112 ret = _regmap_read(map, reg, &orig); 3113 if (ret != 0) 3114 return ret; 3115 3116 tmp = orig & ~mask; 3117 tmp |= val & mask; 3118 3119 if (force_write || (tmp != orig)) { 3120 ret = _regmap_write(map, reg, tmp); 3121 if (ret == 0 && change) 3122 *change = true; 3123 } 3124 } 3125 3126 return ret; 3127 } 3128 3129 /** 3130 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register 3131 * 3132 * @map: Register map to update 3133 * @reg: Register to update 3134 * @mask: Bitmask to change 3135 * @val: New value for bitmask 3136 * @change: Boolean indicating if a write was done 3137 * @async: Boolean indicating asynchronously 3138 * @force: Boolean indicating use force update 3139 * 3140 * Perform a read/modify/write cycle on a register map with change, async, force 3141 * options. 3142 * 3143 * If async is true: 3144 * 3145 * With most buses the read must be done synchronously so this is most useful 3146 * for devices with a cache which do not need to interact with the hardware to 3147 * determine the current register value. 3148 * 3149 * Returns zero for success, a negative number on error. 3150 */ 3151 int regmap_update_bits_base(struct regmap *map, unsigned int reg, 3152 unsigned int mask, unsigned int val, 3153 bool *change, bool async, bool force) 3154 { 3155 int ret; 3156 3157 map->lock(map->lock_arg); 3158 3159 map->async = async; 3160 3161 ret = _regmap_update_bits(map, reg, mask, val, change, force); 3162 3163 map->async = false; 3164 3165 map->unlock(map->lock_arg); 3166 3167 return ret; 3168 } 3169 EXPORT_SYMBOL_GPL(regmap_update_bits_base); 3170 3171 /** 3172 * regmap_test_bits() - Check if all specified bits are set in a register. 3173 * 3174 * @map: Register map to operate on 3175 * @reg: Register to read from 3176 * @bits: Bits to test 3177 * 3178 * Returns 0 if at least one of the tested bits is not set, 1 if all tested 3179 * bits are set and a negative error number if the underlying regmap_read() 3180 * fails. 3181 */ 3182 int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits) 3183 { 3184 unsigned int val, ret; 3185 3186 ret = regmap_read(map, reg, &val); 3187 if (ret) 3188 return ret; 3189 3190 return (val & bits) == bits; 3191 } 3192 EXPORT_SYMBOL_GPL(regmap_test_bits); 3193 3194 void regmap_async_complete_cb(struct regmap_async *async, int ret) 3195 { 3196 struct regmap *map = async->map; 3197 bool wake; 3198 3199 trace_regmap_async_io_complete(map); 3200 3201 spin_lock(&map->async_lock); 3202 list_move(&async->list, &map->async_free); 3203 wake = list_empty(&map->async_list); 3204 3205 if (ret != 0) 3206 map->async_ret = ret; 3207 3208 spin_unlock(&map->async_lock); 3209 3210 if (wake) 3211 wake_up(&map->async_waitq); 3212 } 3213 EXPORT_SYMBOL_GPL(regmap_async_complete_cb); 3214 3215 static int regmap_async_is_done(struct regmap *map) 3216 { 3217 unsigned long flags; 3218 int ret; 3219 3220 spin_lock_irqsave(&map->async_lock, flags); 3221 ret = list_empty(&map->async_list); 3222 spin_unlock_irqrestore(&map->async_lock, flags); 3223 3224 return ret; 3225 } 3226 3227 /** 3228 * regmap_async_complete - Ensure all asynchronous I/O has completed. 3229 * 3230 * @map: Map to operate on. 3231 * 3232 * Blocks until any pending asynchronous I/O has completed. Returns 3233 * an error code for any failed I/O operations. 3234 */ 3235 int regmap_async_complete(struct regmap *map) 3236 { 3237 unsigned long flags; 3238 int ret; 3239 3240 /* Nothing to do with no async support */ 3241 if (!map->bus || !map->bus->async_write) 3242 return 0; 3243 3244 trace_regmap_async_complete_start(map); 3245 3246 wait_event(map->async_waitq, regmap_async_is_done(map)); 3247 3248 spin_lock_irqsave(&map->async_lock, flags); 3249 ret = map->async_ret; 3250 map->async_ret = 0; 3251 spin_unlock_irqrestore(&map->async_lock, flags); 3252 3253 trace_regmap_async_complete_done(map); 3254 3255 return ret; 3256 } 3257 EXPORT_SYMBOL_GPL(regmap_async_complete); 3258 3259 /** 3260 * regmap_register_patch - Register and apply register updates to be applied 3261 * on device initialistion 3262 * 3263 * @map: Register map to apply updates to. 3264 * @regs: Values to update. 3265 * @num_regs: Number of entries in regs. 3266 * 3267 * Register a set of register updates to be applied to the device 3268 * whenever the device registers are synchronised with the cache and 3269 * apply them immediately. Typically this is used to apply 3270 * corrections to be applied to the device defaults on startup, such 3271 * as the updates some vendors provide to undocumented registers. 3272 * 3273 * The caller must ensure that this function cannot be called 3274 * concurrently with either itself or regcache_sync(). 3275 */ 3276 int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, 3277 int num_regs) 3278 { 3279 struct reg_sequence *p; 3280 int ret; 3281 bool bypass; 3282 3283 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n", 3284 num_regs)) 3285 return 0; 3286 3287 p = krealloc(map->patch, 3288 sizeof(struct reg_sequence) * (map->patch_regs + num_regs), 3289 GFP_KERNEL); 3290 if (p) { 3291 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs)); 3292 map->patch = p; 3293 map->patch_regs += num_regs; 3294 } else { 3295 return -ENOMEM; 3296 } 3297 3298 map->lock(map->lock_arg); 3299 3300 bypass = map->cache_bypass; 3301 3302 map->cache_bypass = true; 3303 map->async = true; 3304 3305 ret = _regmap_multi_reg_write(map, regs, num_regs); 3306 3307 map->async = false; 3308 map->cache_bypass = bypass; 3309 3310 map->unlock(map->lock_arg); 3311 3312 regmap_async_complete(map); 3313 3314 return ret; 3315 } 3316 EXPORT_SYMBOL_GPL(regmap_register_patch); 3317 3318 /** 3319 * regmap_get_val_bytes() - Report the size of a register value 3320 * 3321 * @map: Register map to operate on. 3322 * 3323 * Report the size of a register value, mainly intended to for use by 3324 * generic infrastructure built on top of regmap. 3325 */ 3326 int regmap_get_val_bytes(struct regmap *map) 3327 { 3328 if (map->format.format_write) 3329 return -EINVAL; 3330 3331 return map->format.val_bytes; 3332 } 3333 EXPORT_SYMBOL_GPL(regmap_get_val_bytes); 3334 3335 /** 3336 * regmap_get_max_register() - Report the max register value 3337 * 3338 * @map: Register map to operate on. 3339 * 3340 * Report the max register value, mainly intended to for use by 3341 * generic infrastructure built on top of regmap. 3342 */ 3343 int regmap_get_max_register(struct regmap *map) 3344 { 3345 return map->max_register ? map->max_register : -EINVAL; 3346 } 3347 EXPORT_SYMBOL_GPL(regmap_get_max_register); 3348 3349 /** 3350 * regmap_get_reg_stride() - Report the register address stride 3351 * 3352 * @map: Register map to operate on. 3353 * 3354 * Report the register address stride, mainly intended to for use by 3355 * generic infrastructure built on top of regmap. 3356 */ 3357 int regmap_get_reg_stride(struct regmap *map) 3358 { 3359 return map->reg_stride; 3360 } 3361 EXPORT_SYMBOL_GPL(regmap_get_reg_stride); 3362 3363 int regmap_parse_val(struct regmap *map, const void *buf, 3364 unsigned int *val) 3365 { 3366 if (!map->format.parse_val) 3367 return -EINVAL; 3368 3369 *val = map->format.parse_val(buf); 3370 3371 return 0; 3372 } 3373 EXPORT_SYMBOL_GPL(regmap_parse_val); 3374 3375 static int __init regmap_initcall(void) 3376 { 3377 regmap_debugfs_initcall(); 3378 3379 return 0; 3380 } 3381 postcore_initcall(regmap_initcall); 3382