xref: /openbmc/linux/drivers/base/regmap/regmap.c (revision 278d3ba6)
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Register map access API
4 //
5 // Copyright 2011 Wolfson Microelectronics plc
6 //
7 // Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 
9 #include <linux/device.h>
10 #include <linux/slab.h>
11 #include <linux/export.h>
12 #include <linux/mutex.h>
13 #include <linux/err.h>
14 #include <linux/property.h>
15 #include <linux/rbtree.h>
16 #include <linux/sched.h>
17 #include <linux/delay.h>
18 #include <linux/log2.h>
19 #include <linux/hwspinlock.h>
20 #include <asm/unaligned.h>
21 
22 #define CREATE_TRACE_POINTS
23 #include "trace.h"
24 
25 #include "internal.h"
26 
27 /*
28  * Sometimes for failures during very early init the trace
29  * infrastructure isn't available early enough to be used.  For this
30  * sort of problem defining LOG_DEVICE will add printks for basic
31  * register I/O on a specific device.
32  */
33 #undef LOG_DEVICE
34 
35 #ifdef LOG_DEVICE
36 static inline bool regmap_should_log(struct regmap *map)
37 {
38 	return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
39 }
40 #else
41 static inline bool regmap_should_log(struct regmap *map) { return false; }
42 #endif
43 
44 
45 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
46 			       unsigned int mask, unsigned int val,
47 			       bool *change, bool force_write);
48 
49 static int _regmap_bus_reg_read(void *context, unsigned int reg,
50 				unsigned int *val);
51 static int _regmap_bus_read(void *context, unsigned int reg,
52 			    unsigned int *val);
53 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
54 				       unsigned int val);
55 static int _regmap_bus_reg_write(void *context, unsigned int reg,
56 				 unsigned int val);
57 static int _regmap_bus_raw_write(void *context, unsigned int reg,
58 				 unsigned int val);
59 
60 bool regmap_reg_in_ranges(unsigned int reg,
61 			  const struct regmap_range *ranges,
62 			  unsigned int nranges)
63 {
64 	const struct regmap_range *r;
65 	int i;
66 
67 	for (i = 0, r = ranges; i < nranges; i++, r++)
68 		if (regmap_reg_in_range(reg, r))
69 			return true;
70 	return false;
71 }
72 EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
73 
74 bool regmap_check_range_table(struct regmap *map, unsigned int reg,
75 			      const struct regmap_access_table *table)
76 {
77 	/* Check "no ranges" first */
78 	if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
79 		return false;
80 
81 	/* In case zero "yes ranges" are supplied, any reg is OK */
82 	if (!table->n_yes_ranges)
83 		return true;
84 
85 	return regmap_reg_in_ranges(reg, table->yes_ranges,
86 				    table->n_yes_ranges);
87 }
88 EXPORT_SYMBOL_GPL(regmap_check_range_table);
89 
90 bool regmap_writeable(struct regmap *map, unsigned int reg)
91 {
92 	if (map->max_register && reg > map->max_register)
93 		return false;
94 
95 	if (map->writeable_reg)
96 		return map->writeable_reg(map->dev, reg);
97 
98 	if (map->wr_table)
99 		return regmap_check_range_table(map, reg, map->wr_table);
100 
101 	return true;
102 }
103 
104 bool regmap_cached(struct regmap *map, unsigned int reg)
105 {
106 	int ret;
107 	unsigned int val;
108 
109 	if (map->cache_type == REGCACHE_NONE)
110 		return false;
111 
112 	if (!map->cache_ops)
113 		return false;
114 
115 	if (map->max_register && reg > map->max_register)
116 		return false;
117 
118 	map->lock(map->lock_arg);
119 	ret = regcache_read(map, reg, &val);
120 	map->unlock(map->lock_arg);
121 	if (ret)
122 		return false;
123 
124 	return true;
125 }
126 
127 bool regmap_readable(struct regmap *map, unsigned int reg)
128 {
129 	if (!map->reg_read)
130 		return false;
131 
132 	if (map->max_register && reg > map->max_register)
133 		return false;
134 
135 	if (map->format.format_write)
136 		return false;
137 
138 	if (map->readable_reg)
139 		return map->readable_reg(map->dev, reg);
140 
141 	if (map->rd_table)
142 		return regmap_check_range_table(map, reg, map->rd_table);
143 
144 	return true;
145 }
146 
147 bool regmap_volatile(struct regmap *map, unsigned int reg)
148 {
149 	if (!map->format.format_write && !regmap_readable(map, reg))
150 		return false;
151 
152 	if (map->volatile_reg)
153 		return map->volatile_reg(map->dev, reg);
154 
155 	if (map->volatile_table)
156 		return regmap_check_range_table(map, reg, map->volatile_table);
157 
158 	if (map->cache_ops)
159 		return false;
160 	else
161 		return true;
162 }
163 
164 bool regmap_precious(struct regmap *map, unsigned int reg)
165 {
166 	if (!regmap_readable(map, reg))
167 		return false;
168 
169 	if (map->precious_reg)
170 		return map->precious_reg(map->dev, reg);
171 
172 	if (map->precious_table)
173 		return regmap_check_range_table(map, reg, map->precious_table);
174 
175 	return false;
176 }
177 
178 bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
179 {
180 	if (map->writeable_noinc_reg)
181 		return map->writeable_noinc_reg(map->dev, reg);
182 
183 	if (map->wr_noinc_table)
184 		return regmap_check_range_table(map, reg, map->wr_noinc_table);
185 
186 	return true;
187 }
188 
189 bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
190 {
191 	if (map->readable_noinc_reg)
192 		return map->readable_noinc_reg(map->dev, reg);
193 
194 	if (map->rd_noinc_table)
195 		return regmap_check_range_table(map, reg, map->rd_noinc_table);
196 
197 	return true;
198 }
199 
200 static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
201 	size_t num)
202 {
203 	unsigned int i;
204 
205 	for (i = 0; i < num; i++)
206 		if (!regmap_volatile(map, reg + regmap_get_offset(map, i)))
207 			return false;
208 
209 	return true;
210 }
211 
212 static void regmap_format_12_20_write(struct regmap *map,
213 				     unsigned int reg, unsigned int val)
214 {
215 	u8 *out = map->work_buf;
216 
217 	out[0] = reg >> 4;
218 	out[1] = (reg << 4) | (val >> 16);
219 	out[2] = val >> 8;
220 	out[3] = val;
221 }
222 
223 
224 static void regmap_format_2_6_write(struct regmap *map,
225 				     unsigned int reg, unsigned int val)
226 {
227 	u8 *out = map->work_buf;
228 
229 	*out = (reg << 6) | val;
230 }
231 
232 static void regmap_format_4_12_write(struct regmap *map,
233 				     unsigned int reg, unsigned int val)
234 {
235 	__be16 *out = map->work_buf;
236 	*out = cpu_to_be16((reg << 12) | val);
237 }
238 
239 static void regmap_format_7_9_write(struct regmap *map,
240 				    unsigned int reg, unsigned int val)
241 {
242 	__be16 *out = map->work_buf;
243 	*out = cpu_to_be16((reg << 9) | val);
244 }
245 
246 static void regmap_format_7_17_write(struct regmap *map,
247 				    unsigned int reg, unsigned int val)
248 {
249 	u8 *out = map->work_buf;
250 
251 	out[2] = val;
252 	out[1] = val >> 8;
253 	out[0] = (val >> 16) | (reg << 1);
254 }
255 
256 static void regmap_format_10_14_write(struct regmap *map,
257 				    unsigned int reg, unsigned int val)
258 {
259 	u8 *out = map->work_buf;
260 
261 	out[2] = val;
262 	out[1] = (val >> 8) | (reg << 6);
263 	out[0] = reg >> 2;
264 }
265 
266 static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
267 {
268 	u8 *b = buf;
269 
270 	b[0] = val << shift;
271 }
272 
273 static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
274 {
275 	put_unaligned_be16(val << shift, buf);
276 }
277 
278 static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
279 {
280 	put_unaligned_le16(val << shift, buf);
281 }
282 
283 static void regmap_format_16_native(void *buf, unsigned int val,
284 				    unsigned int shift)
285 {
286 	u16 v = val << shift;
287 
288 	memcpy(buf, &v, sizeof(v));
289 }
290 
291 static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
292 {
293 	u8 *b = buf;
294 
295 	val <<= shift;
296 
297 	b[0] = val >> 16;
298 	b[1] = val >> 8;
299 	b[2] = val;
300 }
301 
302 static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
303 {
304 	put_unaligned_be32(val << shift, buf);
305 }
306 
307 static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
308 {
309 	put_unaligned_le32(val << shift, buf);
310 }
311 
312 static void regmap_format_32_native(void *buf, unsigned int val,
313 				    unsigned int shift)
314 {
315 	u32 v = val << shift;
316 
317 	memcpy(buf, &v, sizeof(v));
318 }
319 
320 #ifdef CONFIG_64BIT
321 static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
322 {
323 	put_unaligned_be64((u64) val << shift, buf);
324 }
325 
326 static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
327 {
328 	put_unaligned_le64((u64) val << shift, buf);
329 }
330 
331 static void regmap_format_64_native(void *buf, unsigned int val,
332 				    unsigned int shift)
333 {
334 	u64 v = (u64) val << shift;
335 
336 	memcpy(buf, &v, sizeof(v));
337 }
338 #endif
339 
340 static void regmap_parse_inplace_noop(void *buf)
341 {
342 }
343 
344 static unsigned int regmap_parse_8(const void *buf)
345 {
346 	const u8 *b = buf;
347 
348 	return b[0];
349 }
350 
351 static unsigned int regmap_parse_16_be(const void *buf)
352 {
353 	return get_unaligned_be16(buf);
354 }
355 
356 static unsigned int regmap_parse_16_le(const void *buf)
357 {
358 	return get_unaligned_le16(buf);
359 }
360 
361 static void regmap_parse_16_be_inplace(void *buf)
362 {
363 	u16 v = get_unaligned_be16(buf);
364 
365 	memcpy(buf, &v, sizeof(v));
366 }
367 
368 static void regmap_parse_16_le_inplace(void *buf)
369 {
370 	u16 v = get_unaligned_le16(buf);
371 
372 	memcpy(buf, &v, sizeof(v));
373 }
374 
375 static unsigned int regmap_parse_16_native(const void *buf)
376 {
377 	u16 v;
378 
379 	memcpy(&v, buf, sizeof(v));
380 	return v;
381 }
382 
383 static unsigned int regmap_parse_24(const void *buf)
384 {
385 	const u8 *b = buf;
386 	unsigned int ret = b[2];
387 	ret |= ((unsigned int)b[1]) << 8;
388 	ret |= ((unsigned int)b[0]) << 16;
389 
390 	return ret;
391 }
392 
393 static unsigned int regmap_parse_32_be(const void *buf)
394 {
395 	return get_unaligned_be32(buf);
396 }
397 
398 static unsigned int regmap_parse_32_le(const void *buf)
399 {
400 	return get_unaligned_le32(buf);
401 }
402 
403 static void regmap_parse_32_be_inplace(void *buf)
404 {
405 	u32 v = get_unaligned_be32(buf);
406 
407 	memcpy(buf, &v, sizeof(v));
408 }
409 
410 static void regmap_parse_32_le_inplace(void *buf)
411 {
412 	u32 v = get_unaligned_le32(buf);
413 
414 	memcpy(buf, &v, sizeof(v));
415 }
416 
417 static unsigned int regmap_parse_32_native(const void *buf)
418 {
419 	u32 v;
420 
421 	memcpy(&v, buf, sizeof(v));
422 	return v;
423 }
424 
425 #ifdef CONFIG_64BIT
426 static unsigned int regmap_parse_64_be(const void *buf)
427 {
428 	return get_unaligned_be64(buf);
429 }
430 
431 static unsigned int regmap_parse_64_le(const void *buf)
432 {
433 	return get_unaligned_le64(buf);
434 }
435 
436 static void regmap_parse_64_be_inplace(void *buf)
437 {
438 	u64 v =  get_unaligned_be64(buf);
439 
440 	memcpy(buf, &v, sizeof(v));
441 }
442 
443 static void regmap_parse_64_le_inplace(void *buf)
444 {
445 	u64 v = get_unaligned_le64(buf);
446 
447 	memcpy(buf, &v, sizeof(v));
448 }
449 
450 static unsigned int regmap_parse_64_native(const void *buf)
451 {
452 	u64 v;
453 
454 	memcpy(&v, buf, sizeof(v));
455 	return v;
456 }
457 #endif
458 
459 static void regmap_lock_hwlock(void *__map)
460 {
461 	struct regmap *map = __map;
462 
463 	hwspin_lock_timeout(map->hwlock, UINT_MAX);
464 }
465 
466 static void regmap_lock_hwlock_irq(void *__map)
467 {
468 	struct regmap *map = __map;
469 
470 	hwspin_lock_timeout_irq(map->hwlock, UINT_MAX);
471 }
472 
473 static void regmap_lock_hwlock_irqsave(void *__map)
474 {
475 	struct regmap *map = __map;
476 
477 	hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX,
478 				    &map->spinlock_flags);
479 }
480 
481 static void regmap_unlock_hwlock(void *__map)
482 {
483 	struct regmap *map = __map;
484 
485 	hwspin_unlock(map->hwlock);
486 }
487 
488 static void regmap_unlock_hwlock_irq(void *__map)
489 {
490 	struct regmap *map = __map;
491 
492 	hwspin_unlock_irq(map->hwlock);
493 }
494 
495 static void regmap_unlock_hwlock_irqrestore(void *__map)
496 {
497 	struct regmap *map = __map;
498 
499 	hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags);
500 }
501 
502 static void regmap_lock_unlock_none(void *__map)
503 {
504 
505 }
506 
507 static void regmap_lock_mutex(void *__map)
508 {
509 	struct regmap *map = __map;
510 	mutex_lock(&map->mutex);
511 }
512 
513 static void regmap_unlock_mutex(void *__map)
514 {
515 	struct regmap *map = __map;
516 	mutex_unlock(&map->mutex);
517 }
518 
519 static void regmap_lock_spinlock(void *__map)
520 __acquires(&map->spinlock)
521 {
522 	struct regmap *map = __map;
523 	unsigned long flags;
524 
525 	spin_lock_irqsave(&map->spinlock, flags);
526 	map->spinlock_flags = flags;
527 }
528 
529 static void regmap_unlock_spinlock(void *__map)
530 __releases(&map->spinlock)
531 {
532 	struct regmap *map = __map;
533 	spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
534 }
535 
536 static void regmap_lock_raw_spinlock(void *__map)
537 __acquires(&map->raw_spinlock)
538 {
539 	struct regmap *map = __map;
540 	unsigned long flags;
541 
542 	raw_spin_lock_irqsave(&map->raw_spinlock, flags);
543 	map->raw_spinlock_flags = flags;
544 }
545 
546 static void regmap_unlock_raw_spinlock(void *__map)
547 __releases(&map->raw_spinlock)
548 {
549 	struct regmap *map = __map;
550 	raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags);
551 }
552 
553 static void dev_get_regmap_release(struct device *dev, void *res)
554 {
555 	/*
556 	 * We don't actually have anything to do here; the goal here
557 	 * is not to manage the regmap but to provide a simple way to
558 	 * get the regmap back given a struct device.
559 	 */
560 }
561 
562 static bool _regmap_range_add(struct regmap *map,
563 			      struct regmap_range_node *data)
564 {
565 	struct rb_root *root = &map->range_tree;
566 	struct rb_node **new = &(root->rb_node), *parent = NULL;
567 
568 	while (*new) {
569 		struct regmap_range_node *this =
570 			rb_entry(*new, struct regmap_range_node, node);
571 
572 		parent = *new;
573 		if (data->range_max < this->range_min)
574 			new = &((*new)->rb_left);
575 		else if (data->range_min > this->range_max)
576 			new = &((*new)->rb_right);
577 		else
578 			return false;
579 	}
580 
581 	rb_link_node(&data->node, parent, new);
582 	rb_insert_color(&data->node, root);
583 
584 	return true;
585 }
586 
587 static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
588 						      unsigned int reg)
589 {
590 	struct rb_node *node = map->range_tree.rb_node;
591 
592 	while (node) {
593 		struct regmap_range_node *this =
594 			rb_entry(node, struct regmap_range_node, node);
595 
596 		if (reg < this->range_min)
597 			node = node->rb_left;
598 		else if (reg > this->range_max)
599 			node = node->rb_right;
600 		else
601 			return this;
602 	}
603 
604 	return NULL;
605 }
606 
607 static void regmap_range_exit(struct regmap *map)
608 {
609 	struct rb_node *next;
610 	struct regmap_range_node *range_node;
611 
612 	next = rb_first(&map->range_tree);
613 	while (next) {
614 		range_node = rb_entry(next, struct regmap_range_node, node);
615 		next = rb_next(&range_node->node);
616 		rb_erase(&range_node->node, &map->range_tree);
617 		kfree(range_node);
618 	}
619 
620 	kfree(map->selector_work_buf);
621 }
622 
623 static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
624 {
625 	if (config->name) {
626 		const char *name = kstrdup_const(config->name, GFP_KERNEL);
627 
628 		if (!name)
629 			return -ENOMEM;
630 
631 		kfree_const(map->name);
632 		map->name = name;
633 	}
634 
635 	return 0;
636 }
637 
638 int regmap_attach_dev(struct device *dev, struct regmap *map,
639 		      const struct regmap_config *config)
640 {
641 	struct regmap **m;
642 	int ret;
643 
644 	map->dev = dev;
645 
646 	ret = regmap_set_name(map, config);
647 	if (ret)
648 		return ret;
649 
650 	regmap_debugfs_exit(map);
651 	regmap_debugfs_init(map);
652 
653 	/* Add a devres resource for dev_get_regmap() */
654 	m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
655 	if (!m) {
656 		regmap_debugfs_exit(map);
657 		return -ENOMEM;
658 	}
659 	*m = map;
660 	devres_add(dev, m);
661 
662 	return 0;
663 }
664 EXPORT_SYMBOL_GPL(regmap_attach_dev);
665 
666 static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
667 					const struct regmap_config *config)
668 {
669 	enum regmap_endian endian;
670 
671 	/* Retrieve the endianness specification from the regmap config */
672 	endian = config->reg_format_endian;
673 
674 	/* If the regmap config specified a non-default value, use that */
675 	if (endian != REGMAP_ENDIAN_DEFAULT)
676 		return endian;
677 
678 	/* Retrieve the endianness specification from the bus config */
679 	if (bus && bus->reg_format_endian_default)
680 		endian = bus->reg_format_endian_default;
681 
682 	/* If the bus specified a non-default value, use that */
683 	if (endian != REGMAP_ENDIAN_DEFAULT)
684 		return endian;
685 
686 	/* Use this if no other value was found */
687 	return REGMAP_ENDIAN_BIG;
688 }
689 
690 enum regmap_endian regmap_get_val_endian(struct device *dev,
691 					 const struct regmap_bus *bus,
692 					 const struct regmap_config *config)
693 {
694 	struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
695 	enum regmap_endian endian;
696 
697 	/* Retrieve the endianness specification from the regmap config */
698 	endian = config->val_format_endian;
699 
700 	/* If the regmap config specified a non-default value, use that */
701 	if (endian != REGMAP_ENDIAN_DEFAULT)
702 		return endian;
703 
704 	/* If the firmware node exist try to get endianness from it */
705 	if (fwnode_property_read_bool(fwnode, "big-endian"))
706 		endian = REGMAP_ENDIAN_BIG;
707 	else if (fwnode_property_read_bool(fwnode, "little-endian"))
708 		endian = REGMAP_ENDIAN_LITTLE;
709 	else if (fwnode_property_read_bool(fwnode, "native-endian"))
710 		endian = REGMAP_ENDIAN_NATIVE;
711 
712 	/* If the endianness was specified in fwnode, use that */
713 	if (endian != REGMAP_ENDIAN_DEFAULT)
714 		return endian;
715 
716 	/* Retrieve the endianness specification from the bus config */
717 	if (bus && bus->val_format_endian_default)
718 		endian = bus->val_format_endian_default;
719 
720 	/* If the bus specified a non-default value, use that */
721 	if (endian != REGMAP_ENDIAN_DEFAULT)
722 		return endian;
723 
724 	/* Use this if no other value was found */
725 	return REGMAP_ENDIAN_BIG;
726 }
727 EXPORT_SYMBOL_GPL(regmap_get_val_endian);
728 
729 struct regmap *__regmap_init(struct device *dev,
730 			     const struct regmap_bus *bus,
731 			     void *bus_context,
732 			     const struct regmap_config *config,
733 			     struct lock_class_key *lock_key,
734 			     const char *lock_name)
735 {
736 	struct regmap *map;
737 	int ret = -EINVAL;
738 	enum regmap_endian reg_endian, val_endian;
739 	int i, j;
740 
741 	if (!config)
742 		goto err;
743 
744 	map = kzalloc(sizeof(*map), GFP_KERNEL);
745 	if (map == NULL) {
746 		ret = -ENOMEM;
747 		goto err;
748 	}
749 
750 	ret = regmap_set_name(map, config);
751 	if (ret)
752 		goto err_map;
753 
754 	ret = -EINVAL; /* Later error paths rely on this */
755 
756 	if (config->disable_locking) {
757 		map->lock = map->unlock = regmap_lock_unlock_none;
758 		map->can_sleep = config->can_sleep;
759 		regmap_debugfs_disable(map);
760 	} else if (config->lock && config->unlock) {
761 		map->lock = config->lock;
762 		map->unlock = config->unlock;
763 		map->lock_arg = config->lock_arg;
764 		map->can_sleep = config->can_sleep;
765 	} else if (config->use_hwlock) {
766 		map->hwlock = hwspin_lock_request_specific(config->hwlock_id);
767 		if (!map->hwlock) {
768 			ret = -ENXIO;
769 			goto err_name;
770 		}
771 
772 		switch (config->hwlock_mode) {
773 		case HWLOCK_IRQSTATE:
774 			map->lock = regmap_lock_hwlock_irqsave;
775 			map->unlock = regmap_unlock_hwlock_irqrestore;
776 			break;
777 		case HWLOCK_IRQ:
778 			map->lock = regmap_lock_hwlock_irq;
779 			map->unlock = regmap_unlock_hwlock_irq;
780 			break;
781 		default:
782 			map->lock = regmap_lock_hwlock;
783 			map->unlock = regmap_unlock_hwlock;
784 			break;
785 		}
786 
787 		map->lock_arg = map;
788 	} else {
789 		if ((bus && bus->fast_io) ||
790 		    config->fast_io) {
791 			if (config->use_raw_spinlock) {
792 				raw_spin_lock_init(&map->raw_spinlock);
793 				map->lock = regmap_lock_raw_spinlock;
794 				map->unlock = regmap_unlock_raw_spinlock;
795 				lockdep_set_class_and_name(&map->raw_spinlock,
796 							   lock_key, lock_name);
797 			} else {
798 				spin_lock_init(&map->spinlock);
799 				map->lock = regmap_lock_spinlock;
800 				map->unlock = regmap_unlock_spinlock;
801 				lockdep_set_class_and_name(&map->spinlock,
802 							   lock_key, lock_name);
803 			}
804 		} else {
805 			mutex_init(&map->mutex);
806 			map->lock = regmap_lock_mutex;
807 			map->unlock = regmap_unlock_mutex;
808 			map->can_sleep = true;
809 			lockdep_set_class_and_name(&map->mutex,
810 						   lock_key, lock_name);
811 		}
812 		map->lock_arg = map;
813 	}
814 
815 	/*
816 	 * When we write in fast-paths with regmap_bulk_write() don't allocate
817 	 * scratch buffers with sleeping allocations.
818 	 */
819 	if ((bus && bus->fast_io) || config->fast_io)
820 		map->alloc_flags = GFP_ATOMIC;
821 	else
822 		map->alloc_flags = GFP_KERNEL;
823 
824 	map->reg_base = config->reg_base;
825 
826 	map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
827 	map->format.pad_bytes = config->pad_bits / 8;
828 	map->format.reg_downshift = config->reg_downshift;
829 	map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
830 	map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
831 			config->val_bits + config->pad_bits, 8);
832 	map->reg_shift = config->pad_bits % 8;
833 	if (config->reg_stride)
834 		map->reg_stride = config->reg_stride;
835 	else
836 		map->reg_stride = 1;
837 	if (is_power_of_2(map->reg_stride))
838 		map->reg_stride_order = ilog2(map->reg_stride);
839 	else
840 		map->reg_stride_order = -1;
841 	map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read));
842 	map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write));
843 	map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write));
844 	if (bus) {
845 		map->max_raw_read = bus->max_raw_read;
846 		map->max_raw_write = bus->max_raw_write;
847 	} else if (config->max_raw_read && config->max_raw_write) {
848 		map->max_raw_read = config->max_raw_read;
849 		map->max_raw_write = config->max_raw_write;
850 	}
851 	map->dev = dev;
852 	map->bus = bus;
853 	map->bus_context = bus_context;
854 	map->max_register = config->max_register;
855 	map->wr_table = config->wr_table;
856 	map->rd_table = config->rd_table;
857 	map->volatile_table = config->volatile_table;
858 	map->precious_table = config->precious_table;
859 	map->wr_noinc_table = config->wr_noinc_table;
860 	map->rd_noinc_table = config->rd_noinc_table;
861 	map->writeable_reg = config->writeable_reg;
862 	map->readable_reg = config->readable_reg;
863 	map->volatile_reg = config->volatile_reg;
864 	map->precious_reg = config->precious_reg;
865 	map->writeable_noinc_reg = config->writeable_noinc_reg;
866 	map->readable_noinc_reg = config->readable_noinc_reg;
867 	map->cache_type = config->cache_type;
868 
869 	spin_lock_init(&map->async_lock);
870 	INIT_LIST_HEAD(&map->async_list);
871 	INIT_LIST_HEAD(&map->async_free);
872 	init_waitqueue_head(&map->async_waitq);
873 
874 	if (config->read_flag_mask ||
875 	    config->write_flag_mask ||
876 	    config->zero_flag_mask) {
877 		map->read_flag_mask = config->read_flag_mask;
878 		map->write_flag_mask = config->write_flag_mask;
879 	} else if (bus) {
880 		map->read_flag_mask = bus->read_flag_mask;
881 	}
882 
883 	if (config && config->read && config->write) {
884 		map->reg_read  = _regmap_bus_read;
885 		if (config->reg_update_bits)
886 			map->reg_update_bits = config->reg_update_bits;
887 
888 		/* Bulk read/write */
889 		map->read = config->read;
890 		map->write = config->write;
891 
892 		reg_endian = REGMAP_ENDIAN_NATIVE;
893 		val_endian = REGMAP_ENDIAN_NATIVE;
894 	} else if (!bus) {
895 		map->reg_read  = config->reg_read;
896 		map->reg_write = config->reg_write;
897 		map->reg_update_bits = config->reg_update_bits;
898 
899 		map->defer_caching = false;
900 		goto skip_format_initialization;
901 	} else if (!bus->read || !bus->write) {
902 		map->reg_read = _regmap_bus_reg_read;
903 		map->reg_write = _regmap_bus_reg_write;
904 		map->reg_update_bits = bus->reg_update_bits;
905 
906 		map->defer_caching = false;
907 		goto skip_format_initialization;
908 	} else {
909 		map->reg_read  = _regmap_bus_read;
910 		map->reg_update_bits = bus->reg_update_bits;
911 		/* Bulk read/write */
912 		map->read = bus->read;
913 		map->write = bus->write;
914 
915 		reg_endian = regmap_get_reg_endian(bus, config);
916 		val_endian = regmap_get_val_endian(dev, bus, config);
917 	}
918 
919 	switch (config->reg_bits + map->reg_shift) {
920 	case 2:
921 		switch (config->val_bits) {
922 		case 6:
923 			map->format.format_write = regmap_format_2_6_write;
924 			break;
925 		default:
926 			goto err_hwlock;
927 		}
928 		break;
929 
930 	case 4:
931 		switch (config->val_bits) {
932 		case 12:
933 			map->format.format_write = regmap_format_4_12_write;
934 			break;
935 		default:
936 			goto err_hwlock;
937 		}
938 		break;
939 
940 	case 7:
941 		switch (config->val_bits) {
942 		case 9:
943 			map->format.format_write = regmap_format_7_9_write;
944 			break;
945 		case 17:
946 			map->format.format_write = regmap_format_7_17_write;
947 			break;
948 		default:
949 			goto err_hwlock;
950 		}
951 		break;
952 
953 	case 10:
954 		switch (config->val_bits) {
955 		case 14:
956 			map->format.format_write = regmap_format_10_14_write;
957 			break;
958 		default:
959 			goto err_hwlock;
960 		}
961 		break;
962 
963 	case 12:
964 		switch (config->val_bits) {
965 		case 20:
966 			map->format.format_write = regmap_format_12_20_write;
967 			break;
968 		default:
969 			goto err_hwlock;
970 		}
971 		break;
972 
973 	case 8:
974 		map->format.format_reg = regmap_format_8;
975 		break;
976 
977 	case 16:
978 		switch (reg_endian) {
979 		case REGMAP_ENDIAN_BIG:
980 			map->format.format_reg = regmap_format_16_be;
981 			break;
982 		case REGMAP_ENDIAN_LITTLE:
983 			map->format.format_reg = regmap_format_16_le;
984 			break;
985 		case REGMAP_ENDIAN_NATIVE:
986 			map->format.format_reg = regmap_format_16_native;
987 			break;
988 		default:
989 			goto err_hwlock;
990 		}
991 		break;
992 
993 	case 24:
994 		if (reg_endian != REGMAP_ENDIAN_BIG)
995 			goto err_hwlock;
996 		map->format.format_reg = regmap_format_24;
997 		break;
998 
999 	case 32:
1000 		switch (reg_endian) {
1001 		case REGMAP_ENDIAN_BIG:
1002 			map->format.format_reg = regmap_format_32_be;
1003 			break;
1004 		case REGMAP_ENDIAN_LITTLE:
1005 			map->format.format_reg = regmap_format_32_le;
1006 			break;
1007 		case REGMAP_ENDIAN_NATIVE:
1008 			map->format.format_reg = regmap_format_32_native;
1009 			break;
1010 		default:
1011 			goto err_hwlock;
1012 		}
1013 		break;
1014 
1015 #ifdef CONFIG_64BIT
1016 	case 64:
1017 		switch (reg_endian) {
1018 		case REGMAP_ENDIAN_BIG:
1019 			map->format.format_reg = regmap_format_64_be;
1020 			break;
1021 		case REGMAP_ENDIAN_LITTLE:
1022 			map->format.format_reg = regmap_format_64_le;
1023 			break;
1024 		case REGMAP_ENDIAN_NATIVE:
1025 			map->format.format_reg = regmap_format_64_native;
1026 			break;
1027 		default:
1028 			goto err_hwlock;
1029 		}
1030 		break;
1031 #endif
1032 
1033 	default:
1034 		goto err_hwlock;
1035 	}
1036 
1037 	if (val_endian == REGMAP_ENDIAN_NATIVE)
1038 		map->format.parse_inplace = regmap_parse_inplace_noop;
1039 
1040 	switch (config->val_bits) {
1041 	case 8:
1042 		map->format.format_val = regmap_format_8;
1043 		map->format.parse_val = regmap_parse_8;
1044 		map->format.parse_inplace = regmap_parse_inplace_noop;
1045 		break;
1046 	case 16:
1047 		switch (val_endian) {
1048 		case REGMAP_ENDIAN_BIG:
1049 			map->format.format_val = regmap_format_16_be;
1050 			map->format.parse_val = regmap_parse_16_be;
1051 			map->format.parse_inplace = regmap_parse_16_be_inplace;
1052 			break;
1053 		case REGMAP_ENDIAN_LITTLE:
1054 			map->format.format_val = regmap_format_16_le;
1055 			map->format.parse_val = regmap_parse_16_le;
1056 			map->format.parse_inplace = regmap_parse_16_le_inplace;
1057 			break;
1058 		case REGMAP_ENDIAN_NATIVE:
1059 			map->format.format_val = regmap_format_16_native;
1060 			map->format.parse_val = regmap_parse_16_native;
1061 			break;
1062 		default:
1063 			goto err_hwlock;
1064 		}
1065 		break;
1066 	case 24:
1067 		if (val_endian != REGMAP_ENDIAN_BIG)
1068 			goto err_hwlock;
1069 		map->format.format_val = regmap_format_24;
1070 		map->format.parse_val = regmap_parse_24;
1071 		break;
1072 	case 32:
1073 		switch (val_endian) {
1074 		case REGMAP_ENDIAN_BIG:
1075 			map->format.format_val = regmap_format_32_be;
1076 			map->format.parse_val = regmap_parse_32_be;
1077 			map->format.parse_inplace = regmap_parse_32_be_inplace;
1078 			break;
1079 		case REGMAP_ENDIAN_LITTLE:
1080 			map->format.format_val = regmap_format_32_le;
1081 			map->format.parse_val = regmap_parse_32_le;
1082 			map->format.parse_inplace = regmap_parse_32_le_inplace;
1083 			break;
1084 		case REGMAP_ENDIAN_NATIVE:
1085 			map->format.format_val = regmap_format_32_native;
1086 			map->format.parse_val = regmap_parse_32_native;
1087 			break;
1088 		default:
1089 			goto err_hwlock;
1090 		}
1091 		break;
1092 #ifdef CONFIG_64BIT
1093 	case 64:
1094 		switch (val_endian) {
1095 		case REGMAP_ENDIAN_BIG:
1096 			map->format.format_val = regmap_format_64_be;
1097 			map->format.parse_val = regmap_parse_64_be;
1098 			map->format.parse_inplace = regmap_parse_64_be_inplace;
1099 			break;
1100 		case REGMAP_ENDIAN_LITTLE:
1101 			map->format.format_val = regmap_format_64_le;
1102 			map->format.parse_val = regmap_parse_64_le;
1103 			map->format.parse_inplace = regmap_parse_64_le_inplace;
1104 			break;
1105 		case REGMAP_ENDIAN_NATIVE:
1106 			map->format.format_val = regmap_format_64_native;
1107 			map->format.parse_val = regmap_parse_64_native;
1108 			break;
1109 		default:
1110 			goto err_hwlock;
1111 		}
1112 		break;
1113 #endif
1114 	}
1115 
1116 	if (map->format.format_write) {
1117 		if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1118 		    (val_endian != REGMAP_ENDIAN_BIG))
1119 			goto err_hwlock;
1120 		map->use_single_write = true;
1121 	}
1122 
1123 	if (!map->format.format_write &&
1124 	    !(map->format.format_reg && map->format.format_val))
1125 		goto err_hwlock;
1126 
1127 	map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
1128 	if (map->work_buf == NULL) {
1129 		ret = -ENOMEM;
1130 		goto err_hwlock;
1131 	}
1132 
1133 	if (map->format.format_write) {
1134 		map->defer_caching = false;
1135 		map->reg_write = _regmap_bus_formatted_write;
1136 	} else if (map->format.format_val) {
1137 		map->defer_caching = true;
1138 		map->reg_write = _regmap_bus_raw_write;
1139 	}
1140 
1141 skip_format_initialization:
1142 
1143 	map->range_tree = RB_ROOT;
1144 	for (i = 0; i < config->num_ranges; i++) {
1145 		const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1146 		struct regmap_range_node *new;
1147 
1148 		/* Sanity check */
1149 		if (range_cfg->range_max < range_cfg->range_min) {
1150 			dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
1151 				range_cfg->range_max, range_cfg->range_min);
1152 			goto err_range;
1153 		}
1154 
1155 		if (range_cfg->range_max > map->max_register) {
1156 			dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
1157 				range_cfg->range_max, map->max_register);
1158 			goto err_range;
1159 		}
1160 
1161 		if (range_cfg->selector_reg > map->max_register) {
1162 			dev_err(map->dev,
1163 				"Invalid range %d: selector out of map\n", i);
1164 			goto err_range;
1165 		}
1166 
1167 		if (range_cfg->window_len == 0) {
1168 			dev_err(map->dev, "Invalid range %d: window_len 0\n",
1169 				i);
1170 			goto err_range;
1171 		}
1172 
1173 		/* Make sure, that this register range has no selector
1174 		   or data window within its boundary */
1175 		for (j = 0; j < config->num_ranges; j++) {
1176 			unsigned int sel_reg = config->ranges[j].selector_reg;
1177 			unsigned int win_min = config->ranges[j].window_start;
1178 			unsigned int win_max = win_min +
1179 					       config->ranges[j].window_len - 1;
1180 
1181 			/* Allow data window inside its own virtual range */
1182 			if (j == i)
1183 				continue;
1184 
1185 			if (range_cfg->range_min <= sel_reg &&
1186 			    sel_reg <= range_cfg->range_max) {
1187 				dev_err(map->dev,
1188 					"Range %d: selector for %d in window\n",
1189 					i, j);
1190 				goto err_range;
1191 			}
1192 
1193 			if (!(win_max < range_cfg->range_min ||
1194 			      win_min > range_cfg->range_max)) {
1195 				dev_err(map->dev,
1196 					"Range %d: window for %d in window\n",
1197 					i, j);
1198 				goto err_range;
1199 			}
1200 		}
1201 
1202 		new = kzalloc(sizeof(*new), GFP_KERNEL);
1203 		if (new == NULL) {
1204 			ret = -ENOMEM;
1205 			goto err_range;
1206 		}
1207 
1208 		new->map = map;
1209 		new->name = range_cfg->name;
1210 		new->range_min = range_cfg->range_min;
1211 		new->range_max = range_cfg->range_max;
1212 		new->selector_reg = range_cfg->selector_reg;
1213 		new->selector_mask = range_cfg->selector_mask;
1214 		new->selector_shift = range_cfg->selector_shift;
1215 		new->window_start = range_cfg->window_start;
1216 		new->window_len = range_cfg->window_len;
1217 
1218 		if (!_regmap_range_add(map, new)) {
1219 			dev_err(map->dev, "Failed to add range %d\n", i);
1220 			kfree(new);
1221 			goto err_range;
1222 		}
1223 
1224 		if (map->selector_work_buf == NULL) {
1225 			map->selector_work_buf =
1226 				kzalloc(map->format.buf_size, GFP_KERNEL);
1227 			if (map->selector_work_buf == NULL) {
1228 				ret = -ENOMEM;
1229 				goto err_range;
1230 			}
1231 		}
1232 	}
1233 
1234 	ret = regcache_init(map, config);
1235 	if (ret != 0)
1236 		goto err_range;
1237 
1238 	if (dev) {
1239 		ret = regmap_attach_dev(dev, map, config);
1240 		if (ret != 0)
1241 			goto err_regcache;
1242 	} else {
1243 		regmap_debugfs_init(map);
1244 	}
1245 
1246 	return map;
1247 
1248 err_regcache:
1249 	regcache_exit(map);
1250 err_range:
1251 	regmap_range_exit(map);
1252 	kfree(map->work_buf);
1253 err_hwlock:
1254 	if (map->hwlock)
1255 		hwspin_lock_free(map->hwlock);
1256 err_name:
1257 	kfree_const(map->name);
1258 err_map:
1259 	kfree(map);
1260 err:
1261 	return ERR_PTR(ret);
1262 }
1263 EXPORT_SYMBOL_GPL(__regmap_init);
1264 
1265 static void devm_regmap_release(struct device *dev, void *res)
1266 {
1267 	regmap_exit(*(struct regmap **)res);
1268 }
1269 
1270 struct regmap *__devm_regmap_init(struct device *dev,
1271 				  const struct regmap_bus *bus,
1272 				  void *bus_context,
1273 				  const struct regmap_config *config,
1274 				  struct lock_class_key *lock_key,
1275 				  const char *lock_name)
1276 {
1277 	struct regmap **ptr, *regmap;
1278 
1279 	ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1280 	if (!ptr)
1281 		return ERR_PTR(-ENOMEM);
1282 
1283 	regmap = __regmap_init(dev, bus, bus_context, config,
1284 			       lock_key, lock_name);
1285 	if (!IS_ERR(regmap)) {
1286 		*ptr = regmap;
1287 		devres_add(dev, ptr);
1288 	} else {
1289 		devres_free(ptr);
1290 	}
1291 
1292 	return regmap;
1293 }
1294 EXPORT_SYMBOL_GPL(__devm_regmap_init);
1295 
1296 static void regmap_field_init(struct regmap_field *rm_field,
1297 	struct regmap *regmap, struct reg_field reg_field)
1298 {
1299 	rm_field->regmap = regmap;
1300 	rm_field->reg = reg_field.reg;
1301 	rm_field->shift = reg_field.lsb;
1302 	rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1303 
1304 	WARN_ONCE(rm_field->mask == 0, "invalid empty mask defined\n");
1305 
1306 	rm_field->id_size = reg_field.id_size;
1307 	rm_field->id_offset = reg_field.id_offset;
1308 }
1309 
1310 /**
1311  * devm_regmap_field_alloc() - Allocate and initialise a register field.
1312  *
1313  * @dev: Device that will be interacted with
1314  * @regmap: regmap bank in which this register field is located.
1315  * @reg_field: Register field with in the bank.
1316  *
1317  * The return value will be an ERR_PTR() on error or a valid pointer
1318  * to a struct regmap_field. The regmap_field will be automatically freed
1319  * by the device management code.
1320  */
1321 struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1322 		struct regmap *regmap, struct reg_field reg_field)
1323 {
1324 	struct regmap_field *rm_field = devm_kzalloc(dev,
1325 					sizeof(*rm_field), GFP_KERNEL);
1326 	if (!rm_field)
1327 		return ERR_PTR(-ENOMEM);
1328 
1329 	regmap_field_init(rm_field, regmap, reg_field);
1330 
1331 	return rm_field;
1332 
1333 }
1334 EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1335 
1336 
1337 /**
1338  * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field.
1339  *
1340  * @regmap: regmap bank in which this register field is located.
1341  * @rm_field: regmap register fields within the bank.
1342  * @reg_field: Register fields within the bank.
1343  * @num_fields: Number of register fields.
1344  *
1345  * The return value will be an -ENOMEM on error or zero for success.
1346  * Newly allocated regmap_fields should be freed by calling
1347  * regmap_field_bulk_free()
1348  */
1349 int regmap_field_bulk_alloc(struct regmap *regmap,
1350 			    struct regmap_field **rm_field,
1351 			    const struct reg_field *reg_field,
1352 			    int num_fields)
1353 {
1354 	struct regmap_field *rf;
1355 	int i;
1356 
1357 	rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL);
1358 	if (!rf)
1359 		return -ENOMEM;
1360 
1361 	for (i = 0; i < num_fields; i++) {
1362 		regmap_field_init(&rf[i], regmap, reg_field[i]);
1363 		rm_field[i] = &rf[i];
1364 	}
1365 
1366 	return 0;
1367 }
1368 EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc);
1369 
1370 /**
1371  * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register
1372  * fields.
1373  *
1374  * @dev: Device that will be interacted with
1375  * @regmap: regmap bank in which this register field is located.
1376  * @rm_field: regmap register fields within the bank.
1377  * @reg_field: Register fields within the bank.
1378  * @num_fields: Number of register fields.
1379  *
1380  * The return value will be an -ENOMEM on error or zero for success.
1381  * Newly allocated regmap_fields will be automatically freed by the
1382  * device management code.
1383  */
1384 int devm_regmap_field_bulk_alloc(struct device *dev,
1385 				 struct regmap *regmap,
1386 				 struct regmap_field **rm_field,
1387 				 const struct reg_field *reg_field,
1388 				 int num_fields)
1389 {
1390 	struct regmap_field *rf;
1391 	int i;
1392 
1393 	rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL);
1394 	if (!rf)
1395 		return -ENOMEM;
1396 
1397 	for (i = 0; i < num_fields; i++) {
1398 		regmap_field_init(&rf[i], regmap, reg_field[i]);
1399 		rm_field[i] = &rf[i];
1400 	}
1401 
1402 	return 0;
1403 }
1404 EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc);
1405 
1406 /**
1407  * regmap_field_bulk_free() - Free register field allocated using
1408  *                       regmap_field_bulk_alloc.
1409  *
1410  * @field: regmap fields which should be freed.
1411  */
1412 void regmap_field_bulk_free(struct regmap_field *field)
1413 {
1414 	kfree(field);
1415 }
1416 EXPORT_SYMBOL_GPL(regmap_field_bulk_free);
1417 
1418 /**
1419  * devm_regmap_field_bulk_free() - Free a bulk register field allocated using
1420  *                            devm_regmap_field_bulk_alloc.
1421  *
1422  * @dev: Device that will be interacted with
1423  * @field: regmap field which should be freed.
1424  *
1425  * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually
1426  * drivers need not call this function, as the memory allocated via devm
1427  * will be freed as per device-driver life-cycle.
1428  */
1429 void devm_regmap_field_bulk_free(struct device *dev,
1430 				 struct regmap_field *field)
1431 {
1432 	devm_kfree(dev, field);
1433 }
1434 EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free);
1435 
1436 /**
1437  * devm_regmap_field_free() - Free a register field allocated using
1438  *                            devm_regmap_field_alloc.
1439  *
1440  * @dev: Device that will be interacted with
1441  * @field: regmap field which should be freed.
1442  *
1443  * Free register field allocated using devm_regmap_field_alloc(). Usually
1444  * drivers need not call this function, as the memory allocated via devm
1445  * will be freed as per device-driver life-cyle.
1446  */
1447 void devm_regmap_field_free(struct device *dev,
1448 	struct regmap_field *field)
1449 {
1450 	devm_kfree(dev, field);
1451 }
1452 EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1453 
1454 /**
1455  * regmap_field_alloc() - Allocate and initialise a register field.
1456  *
1457  * @regmap: regmap bank in which this register field is located.
1458  * @reg_field: Register field with in the bank.
1459  *
1460  * The return value will be an ERR_PTR() on error or a valid pointer
1461  * to a struct regmap_field. The regmap_field should be freed by the
1462  * user once its finished working with it using regmap_field_free().
1463  */
1464 struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1465 		struct reg_field reg_field)
1466 {
1467 	struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1468 
1469 	if (!rm_field)
1470 		return ERR_PTR(-ENOMEM);
1471 
1472 	regmap_field_init(rm_field, regmap, reg_field);
1473 
1474 	return rm_field;
1475 }
1476 EXPORT_SYMBOL_GPL(regmap_field_alloc);
1477 
1478 /**
1479  * regmap_field_free() - Free register field allocated using
1480  *                       regmap_field_alloc.
1481  *
1482  * @field: regmap field which should be freed.
1483  */
1484 void regmap_field_free(struct regmap_field *field)
1485 {
1486 	kfree(field);
1487 }
1488 EXPORT_SYMBOL_GPL(regmap_field_free);
1489 
1490 /**
1491  * regmap_reinit_cache() - Reinitialise the current register cache
1492  *
1493  * @map: Register map to operate on.
1494  * @config: New configuration.  Only the cache data will be used.
1495  *
1496  * Discard any existing register cache for the map and initialize a
1497  * new cache.  This can be used to restore the cache to defaults or to
1498  * update the cache configuration to reflect runtime discovery of the
1499  * hardware.
1500  *
1501  * No explicit locking is done here, the user needs to ensure that
1502  * this function will not race with other calls to regmap.
1503  */
1504 int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1505 {
1506 	int ret;
1507 
1508 	regcache_exit(map);
1509 	regmap_debugfs_exit(map);
1510 
1511 	map->max_register = config->max_register;
1512 	map->writeable_reg = config->writeable_reg;
1513 	map->readable_reg = config->readable_reg;
1514 	map->volatile_reg = config->volatile_reg;
1515 	map->precious_reg = config->precious_reg;
1516 	map->writeable_noinc_reg = config->writeable_noinc_reg;
1517 	map->readable_noinc_reg = config->readable_noinc_reg;
1518 	map->cache_type = config->cache_type;
1519 
1520 	ret = regmap_set_name(map, config);
1521 	if (ret)
1522 		return ret;
1523 
1524 	regmap_debugfs_init(map);
1525 
1526 	map->cache_bypass = false;
1527 	map->cache_only = false;
1528 
1529 	return regcache_init(map, config);
1530 }
1531 EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1532 
1533 /**
1534  * regmap_exit() - Free a previously allocated register map
1535  *
1536  * @map: Register map to operate on.
1537  */
1538 void regmap_exit(struct regmap *map)
1539 {
1540 	struct regmap_async *async;
1541 
1542 	regcache_exit(map);
1543 	regmap_debugfs_exit(map);
1544 	regmap_range_exit(map);
1545 	if (map->bus && map->bus->free_context)
1546 		map->bus->free_context(map->bus_context);
1547 	kfree(map->work_buf);
1548 	while (!list_empty(&map->async_free)) {
1549 		async = list_first_entry_or_null(&map->async_free,
1550 						 struct regmap_async,
1551 						 list);
1552 		list_del(&async->list);
1553 		kfree(async->work_buf);
1554 		kfree(async);
1555 	}
1556 	if (map->hwlock)
1557 		hwspin_lock_free(map->hwlock);
1558 	if (map->lock == regmap_lock_mutex)
1559 		mutex_destroy(&map->mutex);
1560 	kfree_const(map->name);
1561 	kfree(map->patch);
1562 	if (map->bus && map->bus->free_on_exit)
1563 		kfree(map->bus);
1564 	kfree(map);
1565 }
1566 EXPORT_SYMBOL_GPL(regmap_exit);
1567 
1568 static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1569 {
1570 	struct regmap **r = res;
1571 	if (!r || !*r) {
1572 		WARN_ON(!r || !*r);
1573 		return 0;
1574 	}
1575 
1576 	/* If the user didn't specify a name match any */
1577 	if (data)
1578 		return !strcmp((*r)->name, data);
1579 	else
1580 		return 1;
1581 }
1582 
1583 /**
1584  * dev_get_regmap() - Obtain the regmap (if any) for a device
1585  *
1586  * @dev: Device to retrieve the map for
1587  * @name: Optional name for the register map, usually NULL.
1588  *
1589  * Returns the regmap for the device if one is present, or NULL.  If
1590  * name is specified then it must match the name specified when
1591  * registering the device, if it is NULL then the first regmap found
1592  * will be used.  Devices with multiple register maps are very rare,
1593  * generic code should normally not need to specify a name.
1594  */
1595 struct regmap *dev_get_regmap(struct device *dev, const char *name)
1596 {
1597 	struct regmap **r = devres_find(dev, dev_get_regmap_release,
1598 					dev_get_regmap_match, (void *)name);
1599 
1600 	if (!r)
1601 		return NULL;
1602 	return *r;
1603 }
1604 EXPORT_SYMBOL_GPL(dev_get_regmap);
1605 
1606 /**
1607  * regmap_get_device() - Obtain the device from a regmap
1608  *
1609  * @map: Register map to operate on.
1610  *
1611  * Returns the underlying device that the regmap has been created for.
1612  */
1613 struct device *regmap_get_device(struct regmap *map)
1614 {
1615 	return map->dev;
1616 }
1617 EXPORT_SYMBOL_GPL(regmap_get_device);
1618 
1619 static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1620 			       struct regmap_range_node *range,
1621 			       unsigned int val_num)
1622 {
1623 	void *orig_work_buf;
1624 	unsigned int win_offset;
1625 	unsigned int win_page;
1626 	bool page_chg;
1627 	int ret;
1628 
1629 	win_offset = (*reg - range->range_min) % range->window_len;
1630 	win_page = (*reg - range->range_min) / range->window_len;
1631 
1632 	if (val_num > 1) {
1633 		/* Bulk write shouldn't cross range boundary */
1634 		if (*reg + val_num - 1 > range->range_max)
1635 			return -EINVAL;
1636 
1637 		/* ... or single page boundary */
1638 		if (val_num > range->window_len - win_offset)
1639 			return -EINVAL;
1640 	}
1641 
1642 	/* It is possible to have selector register inside data window.
1643 	   In that case, selector register is located on every page and
1644 	   it needs no page switching, when accessed alone. */
1645 	if (val_num > 1 ||
1646 	    range->window_start + win_offset != range->selector_reg) {
1647 		/* Use separate work_buf during page switching */
1648 		orig_work_buf = map->work_buf;
1649 		map->work_buf = map->selector_work_buf;
1650 
1651 		ret = _regmap_update_bits(map, range->selector_reg,
1652 					  range->selector_mask,
1653 					  win_page << range->selector_shift,
1654 					  &page_chg, false);
1655 
1656 		map->work_buf = orig_work_buf;
1657 
1658 		if (ret != 0)
1659 			return ret;
1660 	}
1661 
1662 	*reg = range->window_start + win_offset;
1663 
1664 	return 0;
1665 }
1666 
1667 static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1668 					  unsigned long mask)
1669 {
1670 	u8 *buf;
1671 	int i;
1672 
1673 	if (!mask || !map->work_buf)
1674 		return;
1675 
1676 	buf = map->work_buf;
1677 
1678 	for (i = 0; i < max_bytes; i++)
1679 		buf[i] |= (mask >> (8 * i)) & 0xff;
1680 }
1681 
1682 static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1683 				  const void *val, size_t val_len, bool noinc)
1684 {
1685 	struct regmap_range_node *range;
1686 	unsigned long flags;
1687 	void *work_val = map->work_buf + map->format.reg_bytes +
1688 		map->format.pad_bytes;
1689 	void *buf;
1690 	int ret = -ENOTSUPP;
1691 	size_t len;
1692 	int i;
1693 
1694 	/* Check for unwritable or noinc registers in range
1695 	 * before we start
1696 	 */
1697 	if (!regmap_writeable_noinc(map, reg)) {
1698 		for (i = 0; i < val_len / map->format.val_bytes; i++) {
1699 			unsigned int element =
1700 				reg + regmap_get_offset(map, i);
1701 			if (!regmap_writeable(map, element) ||
1702 				regmap_writeable_noinc(map, element))
1703 				return -EINVAL;
1704 		}
1705 	}
1706 
1707 	if (!map->cache_bypass && map->format.parse_val) {
1708 		unsigned int ival;
1709 		int val_bytes = map->format.val_bytes;
1710 		for (i = 0; i < val_len / val_bytes; i++) {
1711 			ival = map->format.parse_val(val + (i * val_bytes));
1712 			ret = regcache_write(map,
1713 					     reg + regmap_get_offset(map, i),
1714 					     ival);
1715 			if (ret) {
1716 				dev_err(map->dev,
1717 					"Error in caching of register: %x ret: %d\n",
1718 					reg + regmap_get_offset(map, i), ret);
1719 				return ret;
1720 			}
1721 		}
1722 		if (map->cache_only) {
1723 			map->cache_dirty = true;
1724 			return 0;
1725 		}
1726 	}
1727 
1728 	range = _regmap_range_lookup(map, reg);
1729 	if (range) {
1730 		int val_num = val_len / map->format.val_bytes;
1731 		int win_offset = (reg - range->range_min) % range->window_len;
1732 		int win_residue = range->window_len - win_offset;
1733 
1734 		/* If the write goes beyond the end of the window split it */
1735 		while (val_num > win_residue) {
1736 			dev_dbg(map->dev, "Writing window %d/%zu\n",
1737 				win_residue, val_len / map->format.val_bytes);
1738 			ret = _regmap_raw_write_impl(map, reg, val,
1739 						     win_residue *
1740 						     map->format.val_bytes, noinc);
1741 			if (ret != 0)
1742 				return ret;
1743 
1744 			reg += win_residue;
1745 			val_num -= win_residue;
1746 			val += win_residue * map->format.val_bytes;
1747 			val_len -= win_residue * map->format.val_bytes;
1748 
1749 			win_offset = (reg - range->range_min) %
1750 				range->window_len;
1751 			win_residue = range->window_len - win_offset;
1752 		}
1753 
1754 		ret = _regmap_select_page(map, &reg, range, noinc ? 1 : val_num);
1755 		if (ret != 0)
1756 			return ret;
1757 	}
1758 
1759 	reg += map->reg_base;
1760 	reg >>= map->format.reg_downshift;
1761 	map->format.format_reg(map->work_buf, reg, map->reg_shift);
1762 	regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1763 				      map->write_flag_mask);
1764 
1765 	/*
1766 	 * Essentially all I/O mechanisms will be faster with a single
1767 	 * buffer to write.  Since register syncs often generate raw
1768 	 * writes of single registers optimise that case.
1769 	 */
1770 	if (val != work_val && val_len == map->format.val_bytes) {
1771 		memcpy(work_val, val, map->format.val_bytes);
1772 		val = work_val;
1773 	}
1774 
1775 	if (map->async && map->bus && map->bus->async_write) {
1776 		struct regmap_async *async;
1777 
1778 		trace_regmap_async_write_start(map, reg, val_len);
1779 
1780 		spin_lock_irqsave(&map->async_lock, flags);
1781 		async = list_first_entry_or_null(&map->async_free,
1782 						 struct regmap_async,
1783 						 list);
1784 		if (async)
1785 			list_del(&async->list);
1786 		spin_unlock_irqrestore(&map->async_lock, flags);
1787 
1788 		if (!async) {
1789 			async = map->bus->async_alloc();
1790 			if (!async)
1791 				return -ENOMEM;
1792 
1793 			async->work_buf = kzalloc(map->format.buf_size,
1794 						  GFP_KERNEL | GFP_DMA);
1795 			if (!async->work_buf) {
1796 				kfree(async);
1797 				return -ENOMEM;
1798 			}
1799 		}
1800 
1801 		async->map = map;
1802 
1803 		/* If the caller supplied the value we can use it safely. */
1804 		memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1805 		       map->format.reg_bytes + map->format.val_bytes);
1806 
1807 		spin_lock_irqsave(&map->async_lock, flags);
1808 		list_add_tail(&async->list, &map->async_list);
1809 		spin_unlock_irqrestore(&map->async_lock, flags);
1810 
1811 		if (val != work_val)
1812 			ret = map->bus->async_write(map->bus_context,
1813 						    async->work_buf,
1814 						    map->format.reg_bytes +
1815 						    map->format.pad_bytes,
1816 						    val, val_len, async);
1817 		else
1818 			ret = map->bus->async_write(map->bus_context,
1819 						    async->work_buf,
1820 						    map->format.reg_bytes +
1821 						    map->format.pad_bytes +
1822 						    val_len, NULL, 0, async);
1823 
1824 		if (ret != 0) {
1825 			dev_err(map->dev, "Failed to schedule write: %d\n",
1826 				ret);
1827 
1828 			spin_lock_irqsave(&map->async_lock, flags);
1829 			list_move(&async->list, &map->async_free);
1830 			spin_unlock_irqrestore(&map->async_lock, flags);
1831 		}
1832 
1833 		return ret;
1834 	}
1835 
1836 	trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1837 
1838 	/* If we're doing a single register write we can probably just
1839 	 * send the work_buf directly, otherwise try to do a gather
1840 	 * write.
1841 	 */
1842 	if (val == work_val)
1843 		ret = map->write(map->bus_context, map->work_buf,
1844 				 map->format.reg_bytes +
1845 				 map->format.pad_bytes +
1846 				 val_len);
1847 	else if (map->bus && map->bus->gather_write)
1848 		ret = map->bus->gather_write(map->bus_context, map->work_buf,
1849 					     map->format.reg_bytes +
1850 					     map->format.pad_bytes,
1851 					     val, val_len);
1852 	else
1853 		ret = -ENOTSUPP;
1854 
1855 	/* If that didn't work fall back on linearising by hand. */
1856 	if (ret == -ENOTSUPP) {
1857 		len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1858 		buf = kzalloc(len, GFP_KERNEL);
1859 		if (!buf)
1860 			return -ENOMEM;
1861 
1862 		memcpy(buf, map->work_buf, map->format.reg_bytes);
1863 		memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1864 		       val, val_len);
1865 		ret = map->write(map->bus_context, buf, len);
1866 
1867 		kfree(buf);
1868 	} else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1869 		/* regcache_drop_region() takes lock that we already have,
1870 		 * thus call map->cache_ops->drop() directly
1871 		 */
1872 		if (map->cache_ops && map->cache_ops->drop)
1873 			map->cache_ops->drop(map, reg, reg + 1);
1874 	}
1875 
1876 	trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1877 
1878 	return ret;
1879 }
1880 
1881 /**
1882  * regmap_can_raw_write - Test if regmap_raw_write() is supported
1883  *
1884  * @map: Map to check.
1885  */
1886 bool regmap_can_raw_write(struct regmap *map)
1887 {
1888 	return map->write && map->format.format_val && map->format.format_reg;
1889 }
1890 EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1891 
1892 /**
1893  * regmap_get_raw_read_max - Get the maximum size we can read
1894  *
1895  * @map: Map to check.
1896  */
1897 size_t regmap_get_raw_read_max(struct regmap *map)
1898 {
1899 	return map->max_raw_read;
1900 }
1901 EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1902 
1903 /**
1904  * regmap_get_raw_write_max - Get the maximum size we can read
1905  *
1906  * @map: Map to check.
1907  */
1908 size_t regmap_get_raw_write_max(struct regmap *map)
1909 {
1910 	return map->max_raw_write;
1911 }
1912 EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1913 
1914 static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1915 				       unsigned int val)
1916 {
1917 	int ret;
1918 	struct regmap_range_node *range;
1919 	struct regmap *map = context;
1920 
1921 	WARN_ON(!map->format.format_write);
1922 
1923 	range = _regmap_range_lookup(map, reg);
1924 	if (range) {
1925 		ret = _regmap_select_page(map, &reg, range, 1);
1926 		if (ret != 0)
1927 			return ret;
1928 	}
1929 
1930 	reg += map->reg_base;
1931 	reg >>= map->format.reg_downshift;
1932 	map->format.format_write(map, reg, val);
1933 
1934 	trace_regmap_hw_write_start(map, reg, 1);
1935 
1936 	ret = map->write(map->bus_context, map->work_buf, map->format.buf_size);
1937 
1938 	trace_regmap_hw_write_done(map, reg, 1);
1939 
1940 	return ret;
1941 }
1942 
1943 static int _regmap_bus_reg_write(void *context, unsigned int reg,
1944 				 unsigned int val)
1945 {
1946 	struct regmap *map = context;
1947 
1948 	return map->bus->reg_write(map->bus_context, reg, val);
1949 }
1950 
1951 static int _regmap_bus_raw_write(void *context, unsigned int reg,
1952 				 unsigned int val)
1953 {
1954 	struct regmap *map = context;
1955 
1956 	WARN_ON(!map->format.format_val);
1957 
1958 	map->format.format_val(map->work_buf + map->format.reg_bytes
1959 			       + map->format.pad_bytes, val, 0);
1960 	return _regmap_raw_write_impl(map, reg,
1961 				      map->work_buf +
1962 				      map->format.reg_bytes +
1963 				      map->format.pad_bytes,
1964 				      map->format.val_bytes,
1965 				      false);
1966 }
1967 
1968 static inline void *_regmap_map_get_context(struct regmap *map)
1969 {
1970 	return (map->bus || (!map->bus && map->read)) ? map : map->bus_context;
1971 }
1972 
1973 int _regmap_write(struct regmap *map, unsigned int reg,
1974 		  unsigned int val)
1975 {
1976 	int ret;
1977 	void *context = _regmap_map_get_context(map);
1978 
1979 	if (!regmap_writeable(map, reg))
1980 		return -EIO;
1981 
1982 	if (!map->cache_bypass && !map->defer_caching) {
1983 		ret = regcache_write(map, reg, val);
1984 		if (ret != 0)
1985 			return ret;
1986 		if (map->cache_only) {
1987 			map->cache_dirty = true;
1988 			return 0;
1989 		}
1990 	}
1991 
1992 	ret = map->reg_write(context, reg, val);
1993 	if (ret == 0) {
1994 		if (regmap_should_log(map))
1995 			dev_info(map->dev, "%x <= %x\n", reg, val);
1996 
1997 		trace_regmap_reg_write(map, reg, val);
1998 	}
1999 
2000 	return ret;
2001 }
2002 
2003 /**
2004  * regmap_write() - Write a value to a single register
2005  *
2006  * @map: Register map to write to
2007  * @reg: Register to write to
2008  * @val: Value to be written
2009  *
2010  * A value of zero will be returned on success, a negative errno will
2011  * be returned in error cases.
2012  */
2013 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
2014 {
2015 	int ret;
2016 
2017 	if (!IS_ALIGNED(reg, map->reg_stride))
2018 		return -EINVAL;
2019 
2020 	map->lock(map->lock_arg);
2021 
2022 	ret = _regmap_write(map, reg, val);
2023 
2024 	map->unlock(map->lock_arg);
2025 
2026 	return ret;
2027 }
2028 EXPORT_SYMBOL_GPL(regmap_write);
2029 
2030 /**
2031  * regmap_write_async() - Write a value to a single register asynchronously
2032  *
2033  * @map: Register map to write to
2034  * @reg: Register to write to
2035  * @val: Value to be written
2036  *
2037  * A value of zero will be returned on success, a negative errno will
2038  * be returned in error cases.
2039  */
2040 int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
2041 {
2042 	int ret;
2043 
2044 	if (!IS_ALIGNED(reg, map->reg_stride))
2045 		return -EINVAL;
2046 
2047 	map->lock(map->lock_arg);
2048 
2049 	map->async = true;
2050 
2051 	ret = _regmap_write(map, reg, val);
2052 
2053 	map->async = false;
2054 
2055 	map->unlock(map->lock_arg);
2056 
2057 	return ret;
2058 }
2059 EXPORT_SYMBOL_GPL(regmap_write_async);
2060 
2061 int _regmap_raw_write(struct regmap *map, unsigned int reg,
2062 		      const void *val, size_t val_len, bool noinc)
2063 {
2064 	size_t val_bytes = map->format.val_bytes;
2065 	size_t val_count = val_len / val_bytes;
2066 	size_t chunk_count, chunk_bytes;
2067 	size_t chunk_regs = val_count;
2068 	int ret, i;
2069 
2070 	if (!val_count)
2071 		return -EINVAL;
2072 
2073 	if (map->use_single_write)
2074 		chunk_regs = 1;
2075 	else if (map->max_raw_write && val_len > map->max_raw_write)
2076 		chunk_regs = map->max_raw_write / val_bytes;
2077 
2078 	chunk_count = val_count / chunk_regs;
2079 	chunk_bytes = chunk_regs * val_bytes;
2080 
2081 	/* Write as many bytes as possible with chunk_size */
2082 	for (i = 0; i < chunk_count; i++) {
2083 		ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc);
2084 		if (ret)
2085 			return ret;
2086 
2087 		reg += regmap_get_offset(map, chunk_regs);
2088 		val += chunk_bytes;
2089 		val_len -= chunk_bytes;
2090 	}
2091 
2092 	/* Write remaining bytes */
2093 	if (val_len)
2094 		ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
2095 
2096 	return ret;
2097 }
2098 
2099 /**
2100  * regmap_raw_write() - Write raw values to one or more registers
2101  *
2102  * @map: Register map to write to
2103  * @reg: Initial register to write to
2104  * @val: Block of data to be written, laid out for direct transmission to the
2105  *       device
2106  * @val_len: Length of data pointed to by val.
2107  *
2108  * This function is intended to be used for things like firmware
2109  * download where a large block of data needs to be transferred to the
2110  * device.  No formatting will be done on the data provided.
2111  *
2112  * A value of zero will be returned on success, a negative errno will
2113  * be returned in error cases.
2114  */
2115 int regmap_raw_write(struct regmap *map, unsigned int reg,
2116 		     const void *val, size_t val_len)
2117 {
2118 	int ret;
2119 
2120 	if (!regmap_can_raw_write(map))
2121 		return -EINVAL;
2122 	if (val_len % map->format.val_bytes)
2123 		return -EINVAL;
2124 
2125 	map->lock(map->lock_arg);
2126 
2127 	ret = _regmap_raw_write(map, reg, val, val_len, false);
2128 
2129 	map->unlock(map->lock_arg);
2130 
2131 	return ret;
2132 }
2133 EXPORT_SYMBOL_GPL(regmap_raw_write);
2134 
2135 /**
2136  * regmap_noinc_write(): Write data from a register without incrementing the
2137  *			register number
2138  *
2139  * @map: Register map to write to
2140  * @reg: Register to write to
2141  * @val: Pointer to data buffer
2142  * @val_len: Length of output buffer in bytes.
2143  *
2144  * The regmap API usually assumes that bulk bus write operations will write a
2145  * range of registers. Some devices have certain registers for which a write
2146  * operation can write to an internal FIFO.
2147  *
2148  * The target register must be volatile but registers after it can be
2149  * completely unrelated cacheable registers.
2150  *
2151  * This will attempt multiple writes as required to write val_len bytes.
2152  *
2153  * A value of zero will be returned on success, a negative errno will be
2154  * returned in error cases.
2155  */
2156 int regmap_noinc_write(struct regmap *map, unsigned int reg,
2157 		      const void *val, size_t val_len)
2158 {
2159 	size_t write_len;
2160 	int ret;
2161 
2162 	if (!map->write)
2163 		return -ENOTSUPP;
2164 
2165 	if (val_len % map->format.val_bytes)
2166 		return -EINVAL;
2167 	if (!IS_ALIGNED(reg, map->reg_stride))
2168 		return -EINVAL;
2169 	if (val_len == 0)
2170 		return -EINVAL;
2171 
2172 	map->lock(map->lock_arg);
2173 
2174 	if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
2175 		ret = -EINVAL;
2176 		goto out_unlock;
2177 	}
2178 
2179 	while (val_len) {
2180 		if (map->max_raw_write && map->max_raw_write < val_len)
2181 			write_len = map->max_raw_write;
2182 		else
2183 			write_len = val_len;
2184 		ret = _regmap_raw_write(map, reg, val, write_len, true);
2185 		if (ret)
2186 			goto out_unlock;
2187 		val = ((u8 *)val) + write_len;
2188 		val_len -= write_len;
2189 	}
2190 
2191 out_unlock:
2192 	map->unlock(map->lock_arg);
2193 	return ret;
2194 }
2195 EXPORT_SYMBOL_GPL(regmap_noinc_write);
2196 
2197 /**
2198  * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2199  *                                   register field.
2200  *
2201  * @field: Register field to write to
2202  * @mask: Bitmask to change
2203  * @val: Value to be written
2204  * @change: Boolean indicating if a write was done
2205  * @async: Boolean indicating asynchronously
2206  * @force: Boolean indicating use force update
2207  *
2208  * Perform a read/modify/write cycle on the register field with change,
2209  * async, force option.
2210  *
2211  * A value of zero will be returned on success, a negative errno will
2212  * be returned in error cases.
2213  */
2214 int regmap_field_update_bits_base(struct regmap_field *field,
2215 				  unsigned int mask, unsigned int val,
2216 				  bool *change, bool async, bool force)
2217 {
2218 	mask = (mask << field->shift) & field->mask;
2219 
2220 	return regmap_update_bits_base(field->regmap, field->reg,
2221 				       mask, val << field->shift,
2222 				       change, async, force);
2223 }
2224 EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
2225 
2226 /**
2227  * regmap_field_test_bits() - Check if all specified bits are set in a
2228  *                            register field.
2229  *
2230  * @field: Register field to operate on
2231  * @bits: Bits to test
2232  *
2233  * Returns -1 if the underlying regmap_field_read() fails, 0 if at least one of the
2234  * tested bits is not set and 1 if all tested bits are set.
2235  */
2236 int regmap_field_test_bits(struct regmap_field *field, unsigned int bits)
2237 {
2238 	unsigned int val, ret;
2239 
2240 	ret = regmap_field_read(field, &val);
2241 	if (ret)
2242 		return ret;
2243 
2244 	return (val & bits) == bits;
2245 }
2246 EXPORT_SYMBOL_GPL(regmap_field_test_bits);
2247 
2248 /**
2249  * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2250  *                                    register field with port ID
2251  *
2252  * @field: Register field to write to
2253  * @id: port ID
2254  * @mask: Bitmask to change
2255  * @val: Value to be written
2256  * @change: Boolean indicating if a write was done
2257  * @async: Boolean indicating asynchronously
2258  * @force: Boolean indicating use force update
2259  *
2260  * A value of zero will be returned on success, a negative errno will
2261  * be returned in error cases.
2262  */
2263 int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
2264 				   unsigned int mask, unsigned int val,
2265 				   bool *change, bool async, bool force)
2266 {
2267 	if (id >= field->id_size)
2268 		return -EINVAL;
2269 
2270 	mask = (mask << field->shift) & field->mask;
2271 
2272 	return regmap_update_bits_base(field->regmap,
2273 				       field->reg + (field->id_offset * id),
2274 				       mask, val << field->shift,
2275 				       change, async, force);
2276 }
2277 EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
2278 
2279 /**
2280  * regmap_bulk_write() - Write multiple registers to the device
2281  *
2282  * @map: Register map to write to
2283  * @reg: First register to be write from
2284  * @val: Block of data to be written, in native register size for device
2285  * @val_count: Number of registers to write
2286  *
2287  * This function is intended to be used for writing a large block of
2288  * data to the device either in single transfer or multiple transfer.
2289  *
2290  * A value of zero will be returned on success, a negative errno will
2291  * be returned in error cases.
2292  */
2293 int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2294 		     size_t val_count)
2295 {
2296 	int ret = 0, i;
2297 	size_t val_bytes = map->format.val_bytes;
2298 
2299 	if (!IS_ALIGNED(reg, map->reg_stride))
2300 		return -EINVAL;
2301 
2302 	/*
2303 	 * Some devices don't support bulk write, for them we have a series of
2304 	 * single write operations.
2305 	 */
2306 	if (!map->write || !map->format.parse_inplace) {
2307 		map->lock(map->lock_arg);
2308 		for (i = 0; i < val_count; i++) {
2309 			unsigned int ival;
2310 
2311 			switch (val_bytes) {
2312 			case 1:
2313 				ival = *(u8 *)(val + (i * val_bytes));
2314 				break;
2315 			case 2:
2316 				ival = *(u16 *)(val + (i * val_bytes));
2317 				break;
2318 			case 4:
2319 				ival = *(u32 *)(val + (i * val_bytes));
2320 				break;
2321 #ifdef CONFIG_64BIT
2322 			case 8:
2323 				ival = *(u64 *)(val + (i * val_bytes));
2324 				break;
2325 #endif
2326 			default:
2327 				ret = -EINVAL;
2328 				goto out;
2329 			}
2330 
2331 			ret = _regmap_write(map,
2332 					    reg + regmap_get_offset(map, i),
2333 					    ival);
2334 			if (ret != 0)
2335 				goto out;
2336 		}
2337 out:
2338 		map->unlock(map->lock_arg);
2339 	} else {
2340 		void *wval;
2341 
2342 		wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
2343 		if (!wval)
2344 			return -ENOMEM;
2345 
2346 		for (i = 0; i < val_count * val_bytes; i += val_bytes)
2347 			map->format.parse_inplace(wval + i);
2348 
2349 		ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2350 
2351 		kfree(wval);
2352 	}
2353 	return ret;
2354 }
2355 EXPORT_SYMBOL_GPL(regmap_bulk_write);
2356 
2357 /*
2358  * _regmap_raw_multi_reg_write()
2359  *
2360  * the (register,newvalue) pairs in regs have not been formatted, but
2361  * they are all in the same page and have been changed to being page
2362  * relative. The page register has been written if that was necessary.
2363  */
2364 static int _regmap_raw_multi_reg_write(struct regmap *map,
2365 				       const struct reg_sequence *regs,
2366 				       size_t num_regs)
2367 {
2368 	int ret;
2369 	void *buf;
2370 	int i;
2371 	u8 *u8;
2372 	size_t val_bytes = map->format.val_bytes;
2373 	size_t reg_bytes = map->format.reg_bytes;
2374 	size_t pad_bytes = map->format.pad_bytes;
2375 	size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2376 	size_t len = pair_size * num_regs;
2377 
2378 	if (!len)
2379 		return -EINVAL;
2380 
2381 	buf = kzalloc(len, GFP_KERNEL);
2382 	if (!buf)
2383 		return -ENOMEM;
2384 
2385 	/* We have to linearise by hand. */
2386 
2387 	u8 = buf;
2388 
2389 	for (i = 0; i < num_regs; i++) {
2390 		unsigned int reg = regs[i].reg;
2391 		unsigned int val = regs[i].def;
2392 		trace_regmap_hw_write_start(map, reg, 1);
2393 		reg += map->reg_base;
2394 		reg >>= map->format.reg_downshift;
2395 		map->format.format_reg(u8, reg, map->reg_shift);
2396 		u8 += reg_bytes + pad_bytes;
2397 		map->format.format_val(u8, val, 0);
2398 		u8 += val_bytes;
2399 	}
2400 	u8 = buf;
2401 	*u8 |= map->write_flag_mask;
2402 
2403 	ret = map->write(map->bus_context, buf, len);
2404 
2405 	kfree(buf);
2406 
2407 	for (i = 0; i < num_regs; i++) {
2408 		int reg = regs[i].reg;
2409 		trace_regmap_hw_write_done(map, reg, 1);
2410 	}
2411 	return ret;
2412 }
2413 
2414 static unsigned int _regmap_register_page(struct regmap *map,
2415 					  unsigned int reg,
2416 					  struct regmap_range_node *range)
2417 {
2418 	unsigned int win_page = (reg - range->range_min) / range->window_len;
2419 
2420 	return win_page;
2421 }
2422 
2423 static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2424 					       struct reg_sequence *regs,
2425 					       size_t num_regs)
2426 {
2427 	int ret;
2428 	int i, n;
2429 	struct reg_sequence *base;
2430 	unsigned int this_page = 0;
2431 	unsigned int page_change = 0;
2432 	/*
2433 	 * the set of registers are not neccessarily in order, but
2434 	 * since the order of write must be preserved this algorithm
2435 	 * chops the set each time the page changes. This also applies
2436 	 * if there is a delay required at any point in the sequence.
2437 	 */
2438 	base = regs;
2439 	for (i = 0, n = 0; i < num_regs; i++, n++) {
2440 		unsigned int reg = regs[i].reg;
2441 		struct regmap_range_node *range;
2442 
2443 		range = _regmap_range_lookup(map, reg);
2444 		if (range) {
2445 			unsigned int win_page = _regmap_register_page(map, reg,
2446 								      range);
2447 
2448 			if (i == 0)
2449 				this_page = win_page;
2450 			if (win_page != this_page) {
2451 				this_page = win_page;
2452 				page_change = 1;
2453 			}
2454 		}
2455 
2456 		/* If we have both a page change and a delay make sure to
2457 		 * write the regs and apply the delay before we change the
2458 		 * page.
2459 		 */
2460 
2461 		if (page_change || regs[i].delay_us) {
2462 
2463 				/* For situations where the first write requires
2464 				 * a delay we need to make sure we don't call
2465 				 * raw_multi_reg_write with n=0
2466 				 * This can't occur with page breaks as we
2467 				 * never write on the first iteration
2468 				 */
2469 				if (regs[i].delay_us && i == 0)
2470 					n = 1;
2471 
2472 				ret = _regmap_raw_multi_reg_write(map, base, n);
2473 				if (ret != 0)
2474 					return ret;
2475 
2476 				if (regs[i].delay_us) {
2477 					if (map->can_sleep)
2478 						fsleep(regs[i].delay_us);
2479 					else
2480 						udelay(regs[i].delay_us);
2481 				}
2482 
2483 				base += n;
2484 				n = 0;
2485 
2486 				if (page_change) {
2487 					ret = _regmap_select_page(map,
2488 								  &base[n].reg,
2489 								  range, 1);
2490 					if (ret != 0)
2491 						return ret;
2492 
2493 					page_change = 0;
2494 				}
2495 
2496 		}
2497 
2498 	}
2499 	if (n > 0)
2500 		return _regmap_raw_multi_reg_write(map, base, n);
2501 	return 0;
2502 }
2503 
2504 static int _regmap_multi_reg_write(struct regmap *map,
2505 				   const struct reg_sequence *regs,
2506 				   size_t num_regs)
2507 {
2508 	int i;
2509 	int ret;
2510 
2511 	if (!map->can_multi_write) {
2512 		for (i = 0; i < num_regs; i++) {
2513 			ret = _regmap_write(map, regs[i].reg, regs[i].def);
2514 			if (ret != 0)
2515 				return ret;
2516 
2517 			if (regs[i].delay_us) {
2518 				if (map->can_sleep)
2519 					fsleep(regs[i].delay_us);
2520 				else
2521 					udelay(regs[i].delay_us);
2522 			}
2523 		}
2524 		return 0;
2525 	}
2526 
2527 	if (!map->format.parse_inplace)
2528 		return -EINVAL;
2529 
2530 	if (map->writeable_reg)
2531 		for (i = 0; i < num_regs; i++) {
2532 			int reg = regs[i].reg;
2533 			if (!map->writeable_reg(map->dev, reg))
2534 				return -EINVAL;
2535 			if (!IS_ALIGNED(reg, map->reg_stride))
2536 				return -EINVAL;
2537 		}
2538 
2539 	if (!map->cache_bypass) {
2540 		for (i = 0; i < num_regs; i++) {
2541 			unsigned int val = regs[i].def;
2542 			unsigned int reg = regs[i].reg;
2543 			ret = regcache_write(map, reg, val);
2544 			if (ret) {
2545 				dev_err(map->dev,
2546 				"Error in caching of register: %x ret: %d\n",
2547 								reg, ret);
2548 				return ret;
2549 			}
2550 		}
2551 		if (map->cache_only) {
2552 			map->cache_dirty = true;
2553 			return 0;
2554 		}
2555 	}
2556 
2557 	WARN_ON(!map->bus);
2558 
2559 	for (i = 0; i < num_regs; i++) {
2560 		unsigned int reg = regs[i].reg;
2561 		struct regmap_range_node *range;
2562 
2563 		/* Coalesce all the writes between a page break or a delay
2564 		 * in a sequence
2565 		 */
2566 		range = _regmap_range_lookup(map, reg);
2567 		if (range || regs[i].delay_us) {
2568 			size_t len = sizeof(struct reg_sequence)*num_regs;
2569 			struct reg_sequence *base = kmemdup(regs, len,
2570 							   GFP_KERNEL);
2571 			if (!base)
2572 				return -ENOMEM;
2573 			ret = _regmap_range_multi_paged_reg_write(map, base,
2574 								  num_regs);
2575 			kfree(base);
2576 
2577 			return ret;
2578 		}
2579 	}
2580 	return _regmap_raw_multi_reg_write(map, regs, num_regs);
2581 }
2582 
2583 /**
2584  * regmap_multi_reg_write() - Write multiple registers to the device
2585  *
2586  * @map: Register map to write to
2587  * @regs: Array of structures containing register,value to be written
2588  * @num_regs: Number of registers to write
2589  *
2590  * Write multiple registers to the device where the set of register, value
2591  * pairs are supplied in any order, possibly not all in a single range.
2592  *
2593  * The 'normal' block write mode will send ultimately send data on the
2594  * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2595  * addressed. However, this alternative block multi write mode will send
2596  * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2597  * must of course support the mode.
2598  *
2599  * A value of zero will be returned on success, a negative errno will be
2600  * returned in error cases.
2601  */
2602 int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2603 			   int num_regs)
2604 {
2605 	int ret;
2606 
2607 	map->lock(map->lock_arg);
2608 
2609 	ret = _regmap_multi_reg_write(map, regs, num_regs);
2610 
2611 	map->unlock(map->lock_arg);
2612 
2613 	return ret;
2614 }
2615 EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2616 
2617 /**
2618  * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2619  *                                     device but not the cache
2620  *
2621  * @map: Register map to write to
2622  * @regs: Array of structures containing register,value to be written
2623  * @num_regs: Number of registers to write
2624  *
2625  * Write multiple registers to the device but not the cache where the set
2626  * of register are supplied in any order.
2627  *
2628  * This function is intended to be used for writing a large block of data
2629  * atomically to the device in single transfer for those I2C client devices
2630  * that implement this alternative block write mode.
2631  *
2632  * A value of zero will be returned on success, a negative errno will
2633  * be returned in error cases.
2634  */
2635 int regmap_multi_reg_write_bypassed(struct regmap *map,
2636 				    const struct reg_sequence *regs,
2637 				    int num_regs)
2638 {
2639 	int ret;
2640 	bool bypass;
2641 
2642 	map->lock(map->lock_arg);
2643 
2644 	bypass = map->cache_bypass;
2645 	map->cache_bypass = true;
2646 
2647 	ret = _regmap_multi_reg_write(map, regs, num_regs);
2648 
2649 	map->cache_bypass = bypass;
2650 
2651 	map->unlock(map->lock_arg);
2652 
2653 	return ret;
2654 }
2655 EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2656 
2657 /**
2658  * regmap_raw_write_async() - Write raw values to one or more registers
2659  *                            asynchronously
2660  *
2661  * @map: Register map to write to
2662  * @reg: Initial register to write to
2663  * @val: Block of data to be written, laid out for direct transmission to the
2664  *       device.  Must be valid until regmap_async_complete() is called.
2665  * @val_len: Length of data pointed to by val.
2666  *
2667  * This function is intended to be used for things like firmware
2668  * download where a large block of data needs to be transferred to the
2669  * device.  No formatting will be done on the data provided.
2670  *
2671  * If supported by the underlying bus the write will be scheduled
2672  * asynchronously, helping maximise I/O speed on higher speed buses
2673  * like SPI.  regmap_async_complete() can be called to ensure that all
2674  * asynchrnous writes have been completed.
2675  *
2676  * A value of zero will be returned on success, a negative errno will
2677  * be returned in error cases.
2678  */
2679 int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2680 			   const void *val, size_t val_len)
2681 {
2682 	int ret;
2683 
2684 	if (val_len % map->format.val_bytes)
2685 		return -EINVAL;
2686 	if (!IS_ALIGNED(reg, map->reg_stride))
2687 		return -EINVAL;
2688 
2689 	map->lock(map->lock_arg);
2690 
2691 	map->async = true;
2692 
2693 	ret = _regmap_raw_write(map, reg, val, val_len, false);
2694 
2695 	map->async = false;
2696 
2697 	map->unlock(map->lock_arg);
2698 
2699 	return ret;
2700 }
2701 EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2702 
2703 static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2704 			    unsigned int val_len, bool noinc)
2705 {
2706 	struct regmap_range_node *range;
2707 	int ret;
2708 
2709 	if (!map->read)
2710 		return -EINVAL;
2711 
2712 	range = _regmap_range_lookup(map, reg);
2713 	if (range) {
2714 		ret = _regmap_select_page(map, &reg, range,
2715 					  noinc ? 1 : val_len / map->format.val_bytes);
2716 		if (ret != 0)
2717 			return ret;
2718 	}
2719 
2720 	reg += map->reg_base;
2721 	reg >>= map->format.reg_downshift;
2722 	map->format.format_reg(map->work_buf, reg, map->reg_shift);
2723 	regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2724 				      map->read_flag_mask);
2725 	trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2726 
2727 	ret = map->read(map->bus_context, map->work_buf,
2728 			map->format.reg_bytes + map->format.pad_bytes,
2729 			val, val_len);
2730 
2731 	trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2732 
2733 	return ret;
2734 }
2735 
2736 static int _regmap_bus_reg_read(void *context, unsigned int reg,
2737 				unsigned int *val)
2738 {
2739 	struct regmap *map = context;
2740 
2741 	return map->bus->reg_read(map->bus_context, reg, val);
2742 }
2743 
2744 static int _regmap_bus_read(void *context, unsigned int reg,
2745 			    unsigned int *val)
2746 {
2747 	int ret;
2748 	struct regmap *map = context;
2749 	void *work_val = map->work_buf + map->format.reg_bytes +
2750 		map->format.pad_bytes;
2751 
2752 	if (!map->format.parse_val)
2753 		return -EINVAL;
2754 
2755 	ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false);
2756 	if (ret == 0)
2757 		*val = map->format.parse_val(work_val);
2758 
2759 	return ret;
2760 }
2761 
2762 static int _regmap_read(struct regmap *map, unsigned int reg,
2763 			unsigned int *val)
2764 {
2765 	int ret;
2766 	void *context = _regmap_map_get_context(map);
2767 
2768 	if (!map->cache_bypass) {
2769 		ret = regcache_read(map, reg, val);
2770 		if (ret == 0)
2771 			return 0;
2772 	}
2773 
2774 	if (map->cache_only)
2775 		return -EBUSY;
2776 
2777 	if (!regmap_readable(map, reg))
2778 		return -EIO;
2779 
2780 	ret = map->reg_read(context, reg, val);
2781 	if (ret == 0) {
2782 		if (regmap_should_log(map))
2783 			dev_info(map->dev, "%x => %x\n", reg, *val);
2784 
2785 		trace_regmap_reg_read(map, reg, *val);
2786 
2787 		if (!map->cache_bypass)
2788 			regcache_write(map, reg, *val);
2789 	}
2790 
2791 	return ret;
2792 }
2793 
2794 /**
2795  * regmap_read() - Read a value from a single register
2796  *
2797  * @map: Register map to read from
2798  * @reg: Register to be read from
2799  * @val: Pointer to store read value
2800  *
2801  * A value of zero will be returned on success, a negative errno will
2802  * be returned in error cases.
2803  */
2804 int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2805 {
2806 	int ret;
2807 
2808 	if (!IS_ALIGNED(reg, map->reg_stride))
2809 		return -EINVAL;
2810 
2811 	map->lock(map->lock_arg);
2812 
2813 	ret = _regmap_read(map, reg, val);
2814 
2815 	map->unlock(map->lock_arg);
2816 
2817 	return ret;
2818 }
2819 EXPORT_SYMBOL_GPL(regmap_read);
2820 
2821 /**
2822  * regmap_raw_read() - Read raw data from the device
2823  *
2824  * @map: Register map to read from
2825  * @reg: First register to be read from
2826  * @val: Pointer to store read value
2827  * @val_len: Size of data to read
2828  *
2829  * A value of zero will be returned on success, a negative errno will
2830  * be returned in error cases.
2831  */
2832 int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2833 		    size_t val_len)
2834 {
2835 	size_t val_bytes = map->format.val_bytes;
2836 	size_t val_count = val_len / val_bytes;
2837 	unsigned int v;
2838 	int ret, i;
2839 
2840 	if (val_len % map->format.val_bytes)
2841 		return -EINVAL;
2842 	if (!IS_ALIGNED(reg, map->reg_stride))
2843 		return -EINVAL;
2844 	if (val_count == 0)
2845 		return -EINVAL;
2846 
2847 	map->lock(map->lock_arg);
2848 
2849 	if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2850 	    map->cache_type == REGCACHE_NONE) {
2851 		size_t chunk_count, chunk_bytes;
2852 		size_t chunk_regs = val_count;
2853 
2854 		if (!map->read) {
2855 			ret = -ENOTSUPP;
2856 			goto out;
2857 		}
2858 
2859 		if (map->use_single_read)
2860 			chunk_regs = 1;
2861 		else if (map->max_raw_read && val_len > map->max_raw_read)
2862 			chunk_regs = map->max_raw_read / val_bytes;
2863 
2864 		chunk_count = val_count / chunk_regs;
2865 		chunk_bytes = chunk_regs * val_bytes;
2866 
2867 		/* Read bytes that fit into whole chunks */
2868 		for (i = 0; i < chunk_count; i++) {
2869 			ret = _regmap_raw_read(map, reg, val, chunk_bytes, false);
2870 			if (ret != 0)
2871 				goto out;
2872 
2873 			reg += regmap_get_offset(map, chunk_regs);
2874 			val += chunk_bytes;
2875 			val_len -= chunk_bytes;
2876 		}
2877 
2878 		/* Read remaining bytes */
2879 		if (val_len) {
2880 			ret = _regmap_raw_read(map, reg, val, val_len, false);
2881 			if (ret != 0)
2882 				goto out;
2883 		}
2884 	} else {
2885 		/* Otherwise go word by word for the cache; should be low
2886 		 * cost as we expect to hit the cache.
2887 		 */
2888 		for (i = 0; i < val_count; i++) {
2889 			ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2890 					   &v);
2891 			if (ret != 0)
2892 				goto out;
2893 
2894 			map->format.format_val(val + (i * val_bytes), v, 0);
2895 		}
2896 	}
2897 
2898  out:
2899 	map->unlock(map->lock_arg);
2900 
2901 	return ret;
2902 }
2903 EXPORT_SYMBOL_GPL(regmap_raw_read);
2904 
2905 /**
2906  * regmap_noinc_read(): Read data from a register without incrementing the
2907  *			register number
2908  *
2909  * @map: Register map to read from
2910  * @reg: Register to read from
2911  * @val: Pointer to data buffer
2912  * @val_len: Length of output buffer in bytes.
2913  *
2914  * The regmap API usually assumes that bulk read operations will read a
2915  * range of registers. Some devices have certain registers for which a read
2916  * operation read will read from an internal FIFO.
2917  *
2918  * The target register must be volatile but registers after it can be
2919  * completely unrelated cacheable registers.
2920  *
2921  * This will attempt multiple reads as required to read val_len bytes.
2922  *
2923  * A value of zero will be returned on success, a negative errno will be
2924  * returned in error cases.
2925  */
2926 int regmap_noinc_read(struct regmap *map, unsigned int reg,
2927 		      void *val, size_t val_len)
2928 {
2929 	size_t read_len;
2930 	int ret;
2931 
2932 	if (!map->read)
2933 		return -ENOTSUPP;
2934 
2935 	if (val_len % map->format.val_bytes)
2936 		return -EINVAL;
2937 	if (!IS_ALIGNED(reg, map->reg_stride))
2938 		return -EINVAL;
2939 	if (val_len == 0)
2940 		return -EINVAL;
2941 
2942 	map->lock(map->lock_arg);
2943 
2944 	if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
2945 		ret = -EINVAL;
2946 		goto out_unlock;
2947 	}
2948 
2949 	while (val_len) {
2950 		if (map->max_raw_read && map->max_raw_read < val_len)
2951 			read_len = map->max_raw_read;
2952 		else
2953 			read_len = val_len;
2954 		ret = _regmap_raw_read(map, reg, val, read_len, true);
2955 		if (ret)
2956 			goto out_unlock;
2957 		val = ((u8 *)val) + read_len;
2958 		val_len -= read_len;
2959 	}
2960 
2961 out_unlock:
2962 	map->unlock(map->lock_arg);
2963 	return ret;
2964 }
2965 EXPORT_SYMBOL_GPL(regmap_noinc_read);
2966 
2967 /**
2968  * regmap_field_read(): Read a value to a single register field
2969  *
2970  * @field: Register field to read from
2971  * @val: Pointer to store read value
2972  *
2973  * A value of zero will be returned on success, a negative errno will
2974  * be returned in error cases.
2975  */
2976 int regmap_field_read(struct regmap_field *field, unsigned int *val)
2977 {
2978 	int ret;
2979 	unsigned int reg_val;
2980 	ret = regmap_read(field->regmap, field->reg, &reg_val);
2981 	if (ret != 0)
2982 		return ret;
2983 
2984 	reg_val &= field->mask;
2985 	reg_val >>= field->shift;
2986 	*val = reg_val;
2987 
2988 	return ret;
2989 }
2990 EXPORT_SYMBOL_GPL(regmap_field_read);
2991 
2992 /**
2993  * regmap_fields_read() - Read a value to a single register field with port ID
2994  *
2995  * @field: Register field to read from
2996  * @id: port ID
2997  * @val: Pointer to store read value
2998  *
2999  * A value of zero will be returned on success, a negative errno will
3000  * be returned in error cases.
3001  */
3002 int regmap_fields_read(struct regmap_field *field, unsigned int id,
3003 		       unsigned int *val)
3004 {
3005 	int ret;
3006 	unsigned int reg_val;
3007 
3008 	if (id >= field->id_size)
3009 		return -EINVAL;
3010 
3011 	ret = regmap_read(field->regmap,
3012 			  field->reg + (field->id_offset * id),
3013 			  &reg_val);
3014 	if (ret != 0)
3015 		return ret;
3016 
3017 	reg_val &= field->mask;
3018 	reg_val >>= field->shift;
3019 	*val = reg_val;
3020 
3021 	return ret;
3022 }
3023 EXPORT_SYMBOL_GPL(regmap_fields_read);
3024 
3025 /**
3026  * regmap_bulk_read() - Read multiple registers from the device
3027  *
3028  * @map: Register map to read from
3029  * @reg: First register to be read from
3030  * @val: Pointer to store read value, in native register size for device
3031  * @val_count: Number of registers to read
3032  *
3033  * A value of zero will be returned on success, a negative errno will
3034  * be returned in error cases.
3035  */
3036 int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
3037 		     size_t val_count)
3038 {
3039 	int ret, i;
3040 	size_t val_bytes = map->format.val_bytes;
3041 	bool vol = regmap_volatile_range(map, reg, val_count);
3042 
3043 	if (!IS_ALIGNED(reg, map->reg_stride))
3044 		return -EINVAL;
3045 	if (val_count == 0)
3046 		return -EINVAL;
3047 
3048 	if (map->read && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
3049 		ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
3050 		if (ret != 0)
3051 			return ret;
3052 
3053 		for (i = 0; i < val_count * val_bytes; i += val_bytes)
3054 			map->format.parse_inplace(val + i);
3055 	} else {
3056 #ifdef CONFIG_64BIT
3057 		u64 *u64 = val;
3058 #endif
3059 		u32 *u32 = val;
3060 		u16 *u16 = val;
3061 		u8 *u8 = val;
3062 
3063 		map->lock(map->lock_arg);
3064 
3065 		for (i = 0; i < val_count; i++) {
3066 			unsigned int ival;
3067 
3068 			ret = _regmap_read(map, reg + regmap_get_offset(map, i),
3069 					   &ival);
3070 			if (ret != 0)
3071 				goto out;
3072 
3073 			switch (map->format.val_bytes) {
3074 #ifdef CONFIG_64BIT
3075 			case 8:
3076 				u64[i] = ival;
3077 				break;
3078 #endif
3079 			case 4:
3080 				u32[i] = ival;
3081 				break;
3082 			case 2:
3083 				u16[i] = ival;
3084 				break;
3085 			case 1:
3086 				u8[i] = ival;
3087 				break;
3088 			default:
3089 				ret = -EINVAL;
3090 				goto out;
3091 			}
3092 		}
3093 
3094 out:
3095 		map->unlock(map->lock_arg);
3096 	}
3097 
3098 	return ret;
3099 }
3100 EXPORT_SYMBOL_GPL(regmap_bulk_read);
3101 
3102 static int _regmap_update_bits(struct regmap *map, unsigned int reg,
3103 			       unsigned int mask, unsigned int val,
3104 			       bool *change, bool force_write)
3105 {
3106 	int ret;
3107 	unsigned int tmp, orig;
3108 
3109 	if (change)
3110 		*change = false;
3111 
3112 	if (regmap_volatile(map, reg) && map->reg_update_bits) {
3113 		ret = map->reg_update_bits(map->bus_context, reg, mask, val);
3114 		if (ret == 0 && change)
3115 			*change = true;
3116 	} else {
3117 		ret = _regmap_read(map, reg, &orig);
3118 		if (ret != 0)
3119 			return ret;
3120 
3121 		tmp = orig & ~mask;
3122 		tmp |= val & mask;
3123 
3124 		if (force_write || (tmp != orig)) {
3125 			ret = _regmap_write(map, reg, tmp);
3126 			if (ret == 0 && change)
3127 				*change = true;
3128 		}
3129 	}
3130 
3131 	return ret;
3132 }
3133 
3134 /**
3135  * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
3136  *
3137  * @map: Register map to update
3138  * @reg: Register to update
3139  * @mask: Bitmask to change
3140  * @val: New value for bitmask
3141  * @change: Boolean indicating if a write was done
3142  * @async: Boolean indicating asynchronously
3143  * @force: Boolean indicating use force update
3144  *
3145  * Perform a read/modify/write cycle on a register map with change, async, force
3146  * options.
3147  *
3148  * If async is true:
3149  *
3150  * With most buses the read must be done synchronously so this is most useful
3151  * for devices with a cache which do not need to interact with the hardware to
3152  * determine the current register value.
3153  *
3154  * Returns zero for success, a negative number on error.
3155  */
3156 int regmap_update_bits_base(struct regmap *map, unsigned int reg,
3157 			    unsigned int mask, unsigned int val,
3158 			    bool *change, bool async, bool force)
3159 {
3160 	int ret;
3161 
3162 	map->lock(map->lock_arg);
3163 
3164 	map->async = async;
3165 
3166 	ret = _regmap_update_bits(map, reg, mask, val, change, force);
3167 
3168 	map->async = false;
3169 
3170 	map->unlock(map->lock_arg);
3171 
3172 	return ret;
3173 }
3174 EXPORT_SYMBOL_GPL(regmap_update_bits_base);
3175 
3176 /**
3177  * regmap_test_bits() - Check if all specified bits are set in a register.
3178  *
3179  * @map: Register map to operate on
3180  * @reg: Register to read from
3181  * @bits: Bits to test
3182  *
3183  * Returns 0 if at least one of the tested bits is not set, 1 if all tested
3184  * bits are set and a negative error number if the underlying regmap_read()
3185  * fails.
3186  */
3187 int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
3188 {
3189 	unsigned int val, ret;
3190 
3191 	ret = regmap_read(map, reg, &val);
3192 	if (ret)
3193 		return ret;
3194 
3195 	return (val & bits) == bits;
3196 }
3197 EXPORT_SYMBOL_GPL(regmap_test_bits);
3198 
3199 void regmap_async_complete_cb(struct regmap_async *async, int ret)
3200 {
3201 	struct regmap *map = async->map;
3202 	bool wake;
3203 
3204 	trace_regmap_async_io_complete(map);
3205 
3206 	spin_lock(&map->async_lock);
3207 	list_move(&async->list, &map->async_free);
3208 	wake = list_empty(&map->async_list);
3209 
3210 	if (ret != 0)
3211 		map->async_ret = ret;
3212 
3213 	spin_unlock(&map->async_lock);
3214 
3215 	if (wake)
3216 		wake_up(&map->async_waitq);
3217 }
3218 EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
3219 
3220 static int regmap_async_is_done(struct regmap *map)
3221 {
3222 	unsigned long flags;
3223 	int ret;
3224 
3225 	spin_lock_irqsave(&map->async_lock, flags);
3226 	ret = list_empty(&map->async_list);
3227 	spin_unlock_irqrestore(&map->async_lock, flags);
3228 
3229 	return ret;
3230 }
3231 
3232 /**
3233  * regmap_async_complete - Ensure all asynchronous I/O has completed.
3234  *
3235  * @map: Map to operate on.
3236  *
3237  * Blocks until any pending asynchronous I/O has completed.  Returns
3238  * an error code for any failed I/O operations.
3239  */
3240 int regmap_async_complete(struct regmap *map)
3241 {
3242 	unsigned long flags;
3243 	int ret;
3244 
3245 	/* Nothing to do with no async support */
3246 	if (!map->bus || !map->bus->async_write)
3247 		return 0;
3248 
3249 	trace_regmap_async_complete_start(map);
3250 
3251 	wait_event(map->async_waitq, regmap_async_is_done(map));
3252 
3253 	spin_lock_irqsave(&map->async_lock, flags);
3254 	ret = map->async_ret;
3255 	map->async_ret = 0;
3256 	spin_unlock_irqrestore(&map->async_lock, flags);
3257 
3258 	trace_regmap_async_complete_done(map);
3259 
3260 	return ret;
3261 }
3262 EXPORT_SYMBOL_GPL(regmap_async_complete);
3263 
3264 /**
3265  * regmap_register_patch - Register and apply register updates to be applied
3266  *                         on device initialistion
3267  *
3268  * @map: Register map to apply updates to.
3269  * @regs: Values to update.
3270  * @num_regs: Number of entries in regs.
3271  *
3272  * Register a set of register updates to be applied to the device
3273  * whenever the device registers are synchronised with the cache and
3274  * apply them immediately.  Typically this is used to apply
3275  * corrections to be applied to the device defaults on startup, such
3276  * as the updates some vendors provide to undocumented registers.
3277  *
3278  * The caller must ensure that this function cannot be called
3279  * concurrently with either itself or regcache_sync().
3280  */
3281 int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
3282 			  int num_regs)
3283 {
3284 	struct reg_sequence *p;
3285 	int ret;
3286 	bool bypass;
3287 
3288 	if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3289 	    num_regs))
3290 		return 0;
3291 
3292 	p = krealloc(map->patch,
3293 		     sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
3294 		     GFP_KERNEL);
3295 	if (p) {
3296 		memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
3297 		map->patch = p;
3298 		map->patch_regs += num_regs;
3299 	} else {
3300 		return -ENOMEM;
3301 	}
3302 
3303 	map->lock(map->lock_arg);
3304 
3305 	bypass = map->cache_bypass;
3306 
3307 	map->cache_bypass = true;
3308 	map->async = true;
3309 
3310 	ret = _regmap_multi_reg_write(map, regs, num_regs);
3311 
3312 	map->async = false;
3313 	map->cache_bypass = bypass;
3314 
3315 	map->unlock(map->lock_arg);
3316 
3317 	regmap_async_complete(map);
3318 
3319 	return ret;
3320 }
3321 EXPORT_SYMBOL_GPL(regmap_register_patch);
3322 
3323 /**
3324  * regmap_get_val_bytes() - Report the size of a register value
3325  *
3326  * @map: Register map to operate on.
3327  *
3328  * Report the size of a register value, mainly intended to for use by
3329  * generic infrastructure built on top of regmap.
3330  */
3331 int regmap_get_val_bytes(struct regmap *map)
3332 {
3333 	if (map->format.format_write)
3334 		return -EINVAL;
3335 
3336 	return map->format.val_bytes;
3337 }
3338 EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3339 
3340 /**
3341  * regmap_get_max_register() - Report the max register value
3342  *
3343  * @map: Register map to operate on.
3344  *
3345  * Report the max register value, mainly intended to for use by
3346  * generic infrastructure built on top of regmap.
3347  */
3348 int regmap_get_max_register(struct regmap *map)
3349 {
3350 	return map->max_register ? map->max_register : -EINVAL;
3351 }
3352 EXPORT_SYMBOL_GPL(regmap_get_max_register);
3353 
3354 /**
3355  * regmap_get_reg_stride() - Report the register address stride
3356  *
3357  * @map: Register map to operate on.
3358  *
3359  * Report the register address stride, mainly intended to for use by
3360  * generic infrastructure built on top of regmap.
3361  */
3362 int regmap_get_reg_stride(struct regmap *map)
3363 {
3364 	return map->reg_stride;
3365 }
3366 EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3367 
3368 int regmap_parse_val(struct regmap *map, const void *buf,
3369 			unsigned int *val)
3370 {
3371 	if (!map->format.parse_val)
3372 		return -EINVAL;
3373 
3374 	*val = map->format.parse_val(buf);
3375 
3376 	return 0;
3377 }
3378 EXPORT_SYMBOL_GPL(regmap_parse_val);
3379 
3380 static int __init regmap_initcall(void)
3381 {
3382 	regmap_debugfs_initcall();
3383 
3384 	return 0;
3385 }
3386 postcore_initcall(regmap_initcall);
3387