1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * cacheinfo support - processor cache information via sysfs 4 * 5 * Based on arch/x86/kernel/cpu/intel_cacheinfo.c 6 * Author: Sudeep Holla <sudeep.holla@arm.com> 7 */ 8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 9 10 #include <linux/acpi.h> 11 #include <linux/bitops.h> 12 #include <linux/cacheinfo.h> 13 #include <linux/compiler.h> 14 #include <linux/cpu.h> 15 #include <linux/device.h> 16 #include <linux/init.h> 17 #include <linux/of.h> 18 #include <linux/sched.h> 19 #include <linux/slab.h> 20 #include <linux/smp.h> 21 #include <linux/sysfs.h> 22 23 /* pointer to per cpu cacheinfo */ 24 static DEFINE_PER_CPU(struct cpu_cacheinfo, ci_cpu_cacheinfo); 25 #define ci_cacheinfo(cpu) (&per_cpu(ci_cpu_cacheinfo, cpu)) 26 #define cache_leaves(cpu) (ci_cacheinfo(cpu)->num_leaves) 27 #define per_cpu_cacheinfo(cpu) (ci_cacheinfo(cpu)->info_list) 28 #define per_cpu_cacheinfo_idx(cpu, idx) \ 29 (per_cpu_cacheinfo(cpu) + (idx)) 30 31 /* Set if no cache information is found in DT/ACPI. */ 32 static bool use_arch_info; 33 34 struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu) 35 { 36 return ci_cacheinfo(cpu); 37 } 38 39 static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf, 40 struct cacheinfo *sib_leaf) 41 { 42 /* 43 * For non DT/ACPI systems, assume unique level 1 caches, 44 * system-wide shared caches for all other levels. 45 */ 46 if (!(IS_ENABLED(CONFIG_OF) || IS_ENABLED(CONFIG_ACPI)) || 47 use_arch_info) 48 return (this_leaf->level != 1) && (sib_leaf->level != 1); 49 50 if ((sib_leaf->attributes & CACHE_ID) && 51 (this_leaf->attributes & CACHE_ID)) 52 return sib_leaf->id == this_leaf->id; 53 54 return sib_leaf->fw_token == this_leaf->fw_token; 55 } 56 57 bool last_level_cache_is_valid(unsigned int cpu) 58 { 59 struct cacheinfo *llc; 60 61 if (!cache_leaves(cpu)) 62 return false; 63 64 llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1); 65 66 return (llc->attributes & CACHE_ID) || !!llc->fw_token; 67 68 } 69 70 bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y) 71 { 72 struct cacheinfo *llc_x, *llc_y; 73 74 if (!last_level_cache_is_valid(cpu_x) || 75 !last_level_cache_is_valid(cpu_y)) 76 return false; 77 78 llc_x = per_cpu_cacheinfo_idx(cpu_x, cache_leaves(cpu_x) - 1); 79 llc_y = per_cpu_cacheinfo_idx(cpu_y, cache_leaves(cpu_y) - 1); 80 81 return cache_leaves_are_shared(llc_x, llc_y); 82 } 83 84 #ifdef CONFIG_OF 85 86 static bool of_check_cache_nodes(struct device_node *np); 87 88 /* OF properties to query for a given cache type */ 89 struct cache_type_info { 90 const char *size_prop; 91 const char *line_size_props[2]; 92 const char *nr_sets_prop; 93 }; 94 95 static const struct cache_type_info cache_type_info[] = { 96 { 97 .size_prop = "cache-size", 98 .line_size_props = { "cache-line-size", 99 "cache-block-size", }, 100 .nr_sets_prop = "cache-sets", 101 }, { 102 .size_prop = "i-cache-size", 103 .line_size_props = { "i-cache-line-size", 104 "i-cache-block-size", }, 105 .nr_sets_prop = "i-cache-sets", 106 }, { 107 .size_prop = "d-cache-size", 108 .line_size_props = { "d-cache-line-size", 109 "d-cache-block-size", }, 110 .nr_sets_prop = "d-cache-sets", 111 }, 112 }; 113 114 static inline int get_cacheinfo_idx(enum cache_type type) 115 { 116 if (type == CACHE_TYPE_UNIFIED) 117 return 0; 118 return type; 119 } 120 121 static void cache_size(struct cacheinfo *this_leaf, struct device_node *np) 122 { 123 const char *propname; 124 int ct_idx; 125 126 ct_idx = get_cacheinfo_idx(this_leaf->type); 127 propname = cache_type_info[ct_idx].size_prop; 128 129 of_property_read_u32(np, propname, &this_leaf->size); 130 } 131 132 /* not cache_line_size() because that's a macro in include/linux/cache.h */ 133 static void cache_get_line_size(struct cacheinfo *this_leaf, 134 struct device_node *np) 135 { 136 int i, lim, ct_idx; 137 138 ct_idx = get_cacheinfo_idx(this_leaf->type); 139 lim = ARRAY_SIZE(cache_type_info[ct_idx].line_size_props); 140 141 for (i = 0; i < lim; i++) { 142 int ret; 143 u32 line_size; 144 const char *propname; 145 146 propname = cache_type_info[ct_idx].line_size_props[i]; 147 ret = of_property_read_u32(np, propname, &line_size); 148 if (!ret) { 149 this_leaf->coherency_line_size = line_size; 150 break; 151 } 152 } 153 } 154 155 static void cache_nr_sets(struct cacheinfo *this_leaf, struct device_node *np) 156 { 157 const char *propname; 158 int ct_idx; 159 160 ct_idx = get_cacheinfo_idx(this_leaf->type); 161 propname = cache_type_info[ct_idx].nr_sets_prop; 162 163 of_property_read_u32(np, propname, &this_leaf->number_of_sets); 164 } 165 166 static void cache_associativity(struct cacheinfo *this_leaf) 167 { 168 unsigned int line_size = this_leaf->coherency_line_size; 169 unsigned int nr_sets = this_leaf->number_of_sets; 170 unsigned int size = this_leaf->size; 171 172 /* 173 * If the cache is fully associative, there is no need to 174 * check the other properties. 175 */ 176 if (!(nr_sets == 1) && (nr_sets > 0 && size > 0 && line_size > 0)) 177 this_leaf->ways_of_associativity = (size / nr_sets) / line_size; 178 } 179 180 static bool cache_node_is_unified(struct cacheinfo *this_leaf, 181 struct device_node *np) 182 { 183 return of_property_read_bool(np, "cache-unified"); 184 } 185 186 static void cache_of_set_props(struct cacheinfo *this_leaf, 187 struct device_node *np) 188 { 189 /* 190 * init_cache_level must setup the cache level correctly 191 * overriding the architecturally specified levels, so 192 * if type is NONE at this stage, it should be unified 193 */ 194 if (this_leaf->type == CACHE_TYPE_NOCACHE && 195 cache_node_is_unified(this_leaf, np)) 196 this_leaf->type = CACHE_TYPE_UNIFIED; 197 cache_size(this_leaf, np); 198 cache_get_line_size(this_leaf, np); 199 cache_nr_sets(this_leaf, np); 200 cache_associativity(this_leaf); 201 } 202 203 static int cache_setup_of_node(unsigned int cpu) 204 { 205 struct device_node *np, *prev; 206 struct cacheinfo *this_leaf; 207 unsigned int index = 0; 208 209 np = of_cpu_device_node_get(cpu); 210 if (!np) { 211 pr_err("Failed to find cpu%d device node\n", cpu); 212 return -ENOENT; 213 } 214 215 if (!of_check_cache_nodes(np)) { 216 of_node_put(np); 217 return -ENOENT; 218 } 219 220 prev = np; 221 222 while (index < cache_leaves(cpu)) { 223 this_leaf = per_cpu_cacheinfo_idx(cpu, index); 224 if (this_leaf->level != 1) { 225 np = of_find_next_cache_node(np); 226 of_node_put(prev); 227 prev = np; 228 if (!np) 229 break; 230 } 231 cache_of_set_props(this_leaf, np); 232 this_leaf->fw_token = np; 233 index++; 234 } 235 236 of_node_put(np); 237 238 if (index != cache_leaves(cpu)) /* not all OF nodes populated */ 239 return -ENOENT; 240 241 return 0; 242 } 243 244 static bool of_check_cache_nodes(struct device_node *np) 245 { 246 struct device_node *next; 247 248 if (of_property_present(np, "cache-size") || 249 of_property_present(np, "i-cache-size") || 250 of_property_present(np, "d-cache-size") || 251 of_property_present(np, "cache-unified")) 252 return true; 253 254 next = of_find_next_cache_node(np); 255 if (next) { 256 of_node_put(next); 257 return true; 258 } 259 260 return false; 261 } 262 263 static int of_count_cache_leaves(struct device_node *np) 264 { 265 unsigned int leaves = 0; 266 267 if (of_property_read_bool(np, "cache-size")) 268 ++leaves; 269 if (of_property_read_bool(np, "i-cache-size")) 270 ++leaves; 271 if (of_property_read_bool(np, "d-cache-size")) 272 ++leaves; 273 274 if (!leaves) { 275 /* The '[i-|d-|]cache-size' property is required, but 276 * if absent, fallback on the 'cache-unified' property. 277 */ 278 if (of_property_read_bool(np, "cache-unified")) 279 return 1; 280 else 281 return 2; 282 } 283 284 return leaves; 285 } 286 287 int init_of_cache_level(unsigned int cpu) 288 { 289 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); 290 struct device_node *np = of_cpu_device_node_get(cpu); 291 struct device_node *prev = NULL; 292 unsigned int levels = 0, leaves, level; 293 294 if (!of_check_cache_nodes(np)) { 295 of_node_put(np); 296 return -ENOENT; 297 } 298 299 leaves = of_count_cache_leaves(np); 300 if (leaves > 0) 301 levels = 1; 302 303 prev = np; 304 while ((np = of_find_next_cache_node(np))) { 305 of_node_put(prev); 306 prev = np; 307 if (!of_device_is_compatible(np, "cache")) 308 goto err_out; 309 if (of_property_read_u32(np, "cache-level", &level)) 310 goto err_out; 311 if (level <= levels) 312 goto err_out; 313 314 leaves += of_count_cache_leaves(np); 315 levels = level; 316 } 317 318 of_node_put(np); 319 this_cpu_ci->num_levels = levels; 320 this_cpu_ci->num_leaves = leaves; 321 322 return 0; 323 324 err_out: 325 of_node_put(np); 326 return -EINVAL; 327 } 328 329 #else 330 static inline int cache_setup_of_node(unsigned int cpu) { return 0; } 331 int init_of_cache_level(unsigned int cpu) { return 0; } 332 #endif 333 334 int __weak cache_setup_acpi(unsigned int cpu) 335 { 336 return -ENOTSUPP; 337 } 338 339 unsigned int coherency_max_size; 340 341 static int cache_setup_properties(unsigned int cpu) 342 { 343 int ret = 0; 344 345 if (of_have_populated_dt()) 346 ret = cache_setup_of_node(cpu); 347 else if (!acpi_disabled) 348 ret = cache_setup_acpi(cpu); 349 350 // Assume there is no cache information available in DT/ACPI from now. 351 if (ret && use_arch_cache_info()) 352 use_arch_info = true; 353 354 return ret; 355 } 356 357 static int cache_shared_cpu_map_setup(unsigned int cpu) 358 { 359 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); 360 struct cacheinfo *this_leaf, *sib_leaf; 361 unsigned int index, sib_index; 362 int ret = 0; 363 364 if (this_cpu_ci->cpu_map_populated) 365 return 0; 366 367 /* 368 * skip setting up cache properties if LLC is valid, just need 369 * to update the shared cpu_map if the cache attributes were 370 * populated early before all the cpus are brought online 371 */ 372 if (!last_level_cache_is_valid(cpu) && !use_arch_info) { 373 ret = cache_setup_properties(cpu); 374 if (ret) 375 return ret; 376 } 377 378 for (index = 0; index < cache_leaves(cpu); index++) { 379 unsigned int i; 380 381 this_leaf = per_cpu_cacheinfo_idx(cpu, index); 382 383 cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map); 384 for_each_online_cpu(i) { 385 struct cpu_cacheinfo *sib_cpu_ci = get_cpu_cacheinfo(i); 386 387 if (i == cpu || !sib_cpu_ci->info_list) 388 continue;/* skip if itself or no cacheinfo */ 389 for (sib_index = 0; sib_index < cache_leaves(i); sib_index++) { 390 sib_leaf = per_cpu_cacheinfo_idx(i, sib_index); 391 if (cache_leaves_are_shared(this_leaf, sib_leaf)) { 392 cpumask_set_cpu(cpu, &sib_leaf->shared_cpu_map); 393 cpumask_set_cpu(i, &this_leaf->shared_cpu_map); 394 break; 395 } 396 } 397 } 398 /* record the maximum cache line size */ 399 if (this_leaf->coherency_line_size > coherency_max_size) 400 coherency_max_size = this_leaf->coherency_line_size; 401 } 402 403 return 0; 404 } 405 406 static void cache_shared_cpu_map_remove(unsigned int cpu) 407 { 408 struct cacheinfo *this_leaf, *sib_leaf; 409 unsigned int sibling, index, sib_index; 410 411 for (index = 0; index < cache_leaves(cpu); index++) { 412 this_leaf = per_cpu_cacheinfo_idx(cpu, index); 413 for_each_cpu(sibling, &this_leaf->shared_cpu_map) { 414 struct cpu_cacheinfo *sib_cpu_ci = 415 get_cpu_cacheinfo(sibling); 416 417 if (sibling == cpu || !sib_cpu_ci->info_list) 418 continue;/* skip if itself or no cacheinfo */ 419 420 for (sib_index = 0; sib_index < cache_leaves(sibling); sib_index++) { 421 sib_leaf = per_cpu_cacheinfo_idx(sibling, sib_index); 422 if (cache_leaves_are_shared(this_leaf, sib_leaf)) { 423 cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map); 424 cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map); 425 break; 426 } 427 } 428 } 429 } 430 } 431 432 static void free_cache_attributes(unsigned int cpu) 433 { 434 if (!per_cpu_cacheinfo(cpu)) 435 return; 436 437 cache_shared_cpu_map_remove(cpu); 438 } 439 440 int __weak early_cache_level(unsigned int cpu) 441 { 442 return -ENOENT; 443 } 444 445 int __weak init_cache_level(unsigned int cpu) 446 { 447 return -ENOENT; 448 } 449 450 int __weak populate_cache_leaves(unsigned int cpu) 451 { 452 return -ENOENT; 453 } 454 455 static inline 456 int allocate_cache_info(int cpu) 457 { 458 per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu), 459 sizeof(struct cacheinfo), GFP_ATOMIC); 460 if (!per_cpu_cacheinfo(cpu)) { 461 cache_leaves(cpu) = 0; 462 return -ENOMEM; 463 } 464 465 return 0; 466 } 467 468 int fetch_cache_info(unsigned int cpu) 469 { 470 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu); 471 unsigned int levels = 0, split_levels = 0; 472 int ret; 473 474 if (acpi_disabled) { 475 ret = init_of_cache_level(cpu); 476 } else { 477 ret = acpi_get_cache_info(cpu, &levels, &split_levels); 478 if (!ret) { 479 this_cpu_ci->num_levels = levels; 480 /* 481 * This assumes that: 482 * - there cannot be any split caches (data/instruction) 483 * above a unified cache 484 * - data/instruction caches come by pair 485 */ 486 this_cpu_ci->num_leaves = levels + split_levels; 487 } 488 } 489 490 if (ret || !cache_leaves(cpu)) { 491 ret = early_cache_level(cpu); 492 if (ret) 493 return ret; 494 495 if (!cache_leaves(cpu)) 496 return -ENOENT; 497 498 this_cpu_ci->early_ci_levels = true; 499 } 500 501 return allocate_cache_info(cpu); 502 } 503 504 static inline int init_level_allocate_ci(unsigned int cpu) 505 { 506 unsigned int early_leaves = cache_leaves(cpu); 507 508 /* Since early initialization/allocation of the cacheinfo is allowed 509 * via fetch_cache_info() and this also gets called as CPU hotplug 510 * callbacks via cacheinfo_cpu_online, the init/alloc can be skipped 511 * as it will happen only once (the cacheinfo memory is never freed). 512 * Just populate the cacheinfo. However, if the cacheinfo has been 513 * allocated early through the arch-specific early_cache_level() call, 514 * there is a chance the info is wrong (this can happen on arm64). In 515 * that case, call init_cache_level() anyway to give the arch-specific 516 * code a chance to make things right. 517 */ 518 if (per_cpu_cacheinfo(cpu) && !ci_cacheinfo(cpu)->early_ci_levels) 519 return 0; 520 521 if (init_cache_level(cpu) || !cache_leaves(cpu)) 522 return -ENOENT; 523 524 /* 525 * Now that we have properly initialized the cache level info, make 526 * sure we don't try to do that again the next time we are called 527 * (e.g. as CPU hotplug callbacks). 528 */ 529 ci_cacheinfo(cpu)->early_ci_levels = false; 530 531 if (cache_leaves(cpu) <= early_leaves) 532 return 0; 533 534 kfree(per_cpu_cacheinfo(cpu)); 535 return allocate_cache_info(cpu); 536 } 537 538 int detect_cache_attributes(unsigned int cpu) 539 { 540 int ret; 541 542 ret = init_level_allocate_ci(cpu); 543 if (ret) 544 return ret; 545 546 /* 547 * If LLC is valid the cache leaves were already populated so just go to 548 * update the cpu map. 549 */ 550 if (!last_level_cache_is_valid(cpu)) { 551 /* 552 * populate_cache_leaves() may completely setup the cache leaves and 553 * shared_cpu_map or it may leave it partially setup. 554 */ 555 ret = populate_cache_leaves(cpu); 556 if (ret) 557 goto free_ci; 558 } 559 560 /* 561 * For systems using DT for cache hierarchy, fw_token 562 * and shared_cpu_map will be set up here only if they are 563 * not populated already 564 */ 565 ret = cache_shared_cpu_map_setup(cpu); 566 if (ret) { 567 pr_warn("Unable to detect cache hierarchy for CPU %d\n", cpu); 568 goto free_ci; 569 } 570 571 return 0; 572 573 free_ci: 574 free_cache_attributes(cpu); 575 return ret; 576 } 577 578 /* pointer to cpuX/cache device */ 579 static DEFINE_PER_CPU(struct device *, ci_cache_dev); 580 #define per_cpu_cache_dev(cpu) (per_cpu(ci_cache_dev, cpu)) 581 582 static cpumask_t cache_dev_map; 583 584 /* pointer to array of devices for cpuX/cache/indexY */ 585 static DEFINE_PER_CPU(struct device **, ci_index_dev); 586 #define per_cpu_index_dev(cpu) (per_cpu(ci_index_dev, cpu)) 587 #define per_cache_index_dev(cpu, idx) ((per_cpu_index_dev(cpu))[idx]) 588 589 #define show_one(file_name, object) \ 590 static ssize_t file_name##_show(struct device *dev, \ 591 struct device_attribute *attr, char *buf) \ 592 { \ 593 struct cacheinfo *this_leaf = dev_get_drvdata(dev); \ 594 return sysfs_emit(buf, "%u\n", this_leaf->object); \ 595 } 596 597 show_one(id, id); 598 show_one(level, level); 599 show_one(coherency_line_size, coherency_line_size); 600 show_one(number_of_sets, number_of_sets); 601 show_one(physical_line_partition, physical_line_partition); 602 show_one(ways_of_associativity, ways_of_associativity); 603 604 static ssize_t size_show(struct device *dev, 605 struct device_attribute *attr, char *buf) 606 { 607 struct cacheinfo *this_leaf = dev_get_drvdata(dev); 608 609 return sysfs_emit(buf, "%uK\n", this_leaf->size >> 10); 610 } 611 612 static ssize_t shared_cpu_map_show(struct device *dev, 613 struct device_attribute *attr, char *buf) 614 { 615 struct cacheinfo *this_leaf = dev_get_drvdata(dev); 616 const struct cpumask *mask = &this_leaf->shared_cpu_map; 617 618 return sysfs_emit(buf, "%*pb\n", nr_cpu_ids, mask); 619 } 620 621 static ssize_t shared_cpu_list_show(struct device *dev, 622 struct device_attribute *attr, char *buf) 623 { 624 struct cacheinfo *this_leaf = dev_get_drvdata(dev); 625 const struct cpumask *mask = &this_leaf->shared_cpu_map; 626 627 return sysfs_emit(buf, "%*pbl\n", nr_cpu_ids, mask); 628 } 629 630 static ssize_t type_show(struct device *dev, 631 struct device_attribute *attr, char *buf) 632 { 633 struct cacheinfo *this_leaf = dev_get_drvdata(dev); 634 const char *output; 635 636 switch (this_leaf->type) { 637 case CACHE_TYPE_DATA: 638 output = "Data"; 639 break; 640 case CACHE_TYPE_INST: 641 output = "Instruction"; 642 break; 643 case CACHE_TYPE_UNIFIED: 644 output = "Unified"; 645 break; 646 default: 647 return -EINVAL; 648 } 649 650 return sysfs_emit(buf, "%s\n", output); 651 } 652 653 static ssize_t allocation_policy_show(struct device *dev, 654 struct device_attribute *attr, char *buf) 655 { 656 struct cacheinfo *this_leaf = dev_get_drvdata(dev); 657 unsigned int ci_attr = this_leaf->attributes; 658 const char *output; 659 660 if ((ci_attr & CACHE_READ_ALLOCATE) && (ci_attr & CACHE_WRITE_ALLOCATE)) 661 output = "ReadWriteAllocate"; 662 else if (ci_attr & CACHE_READ_ALLOCATE) 663 output = "ReadAllocate"; 664 else if (ci_attr & CACHE_WRITE_ALLOCATE) 665 output = "WriteAllocate"; 666 else 667 return 0; 668 669 return sysfs_emit(buf, "%s\n", output); 670 } 671 672 static ssize_t write_policy_show(struct device *dev, 673 struct device_attribute *attr, char *buf) 674 { 675 struct cacheinfo *this_leaf = dev_get_drvdata(dev); 676 unsigned int ci_attr = this_leaf->attributes; 677 int n = 0; 678 679 if (ci_attr & CACHE_WRITE_THROUGH) 680 n = sysfs_emit(buf, "WriteThrough\n"); 681 else if (ci_attr & CACHE_WRITE_BACK) 682 n = sysfs_emit(buf, "WriteBack\n"); 683 return n; 684 } 685 686 static DEVICE_ATTR_RO(id); 687 static DEVICE_ATTR_RO(level); 688 static DEVICE_ATTR_RO(type); 689 static DEVICE_ATTR_RO(coherency_line_size); 690 static DEVICE_ATTR_RO(ways_of_associativity); 691 static DEVICE_ATTR_RO(number_of_sets); 692 static DEVICE_ATTR_RO(size); 693 static DEVICE_ATTR_RO(allocation_policy); 694 static DEVICE_ATTR_RO(write_policy); 695 static DEVICE_ATTR_RO(shared_cpu_map); 696 static DEVICE_ATTR_RO(shared_cpu_list); 697 static DEVICE_ATTR_RO(physical_line_partition); 698 699 static struct attribute *cache_default_attrs[] = { 700 &dev_attr_id.attr, 701 &dev_attr_type.attr, 702 &dev_attr_level.attr, 703 &dev_attr_shared_cpu_map.attr, 704 &dev_attr_shared_cpu_list.attr, 705 &dev_attr_coherency_line_size.attr, 706 &dev_attr_ways_of_associativity.attr, 707 &dev_attr_number_of_sets.attr, 708 &dev_attr_size.attr, 709 &dev_attr_allocation_policy.attr, 710 &dev_attr_write_policy.attr, 711 &dev_attr_physical_line_partition.attr, 712 NULL 713 }; 714 715 static umode_t 716 cache_default_attrs_is_visible(struct kobject *kobj, 717 struct attribute *attr, int unused) 718 { 719 struct device *dev = kobj_to_dev(kobj); 720 struct cacheinfo *this_leaf = dev_get_drvdata(dev); 721 const struct cpumask *mask = &this_leaf->shared_cpu_map; 722 umode_t mode = attr->mode; 723 724 if ((attr == &dev_attr_id.attr) && (this_leaf->attributes & CACHE_ID)) 725 return mode; 726 if ((attr == &dev_attr_type.attr) && this_leaf->type) 727 return mode; 728 if ((attr == &dev_attr_level.attr) && this_leaf->level) 729 return mode; 730 if ((attr == &dev_attr_shared_cpu_map.attr) && !cpumask_empty(mask)) 731 return mode; 732 if ((attr == &dev_attr_shared_cpu_list.attr) && !cpumask_empty(mask)) 733 return mode; 734 if ((attr == &dev_attr_coherency_line_size.attr) && 735 this_leaf->coherency_line_size) 736 return mode; 737 if ((attr == &dev_attr_ways_of_associativity.attr) && 738 this_leaf->size) /* allow 0 = full associativity */ 739 return mode; 740 if ((attr == &dev_attr_number_of_sets.attr) && 741 this_leaf->number_of_sets) 742 return mode; 743 if ((attr == &dev_attr_size.attr) && this_leaf->size) 744 return mode; 745 if ((attr == &dev_attr_write_policy.attr) && 746 (this_leaf->attributes & CACHE_WRITE_POLICY_MASK)) 747 return mode; 748 if ((attr == &dev_attr_allocation_policy.attr) && 749 (this_leaf->attributes & CACHE_ALLOCATE_POLICY_MASK)) 750 return mode; 751 if ((attr == &dev_attr_physical_line_partition.attr) && 752 this_leaf->physical_line_partition) 753 return mode; 754 755 return 0; 756 } 757 758 static const struct attribute_group cache_default_group = { 759 .attrs = cache_default_attrs, 760 .is_visible = cache_default_attrs_is_visible, 761 }; 762 763 static const struct attribute_group *cache_default_groups[] = { 764 &cache_default_group, 765 NULL, 766 }; 767 768 static const struct attribute_group *cache_private_groups[] = { 769 &cache_default_group, 770 NULL, /* Place holder for private group */ 771 NULL, 772 }; 773 774 const struct attribute_group * 775 __weak cache_get_priv_group(struct cacheinfo *this_leaf) 776 { 777 return NULL; 778 } 779 780 static const struct attribute_group ** 781 cache_get_attribute_groups(struct cacheinfo *this_leaf) 782 { 783 const struct attribute_group *priv_group = 784 cache_get_priv_group(this_leaf); 785 786 if (!priv_group) 787 return cache_default_groups; 788 789 if (!cache_private_groups[1]) 790 cache_private_groups[1] = priv_group; 791 792 return cache_private_groups; 793 } 794 795 /* Add/Remove cache interface for CPU device */ 796 static void cpu_cache_sysfs_exit(unsigned int cpu) 797 { 798 int i; 799 struct device *ci_dev; 800 801 if (per_cpu_index_dev(cpu)) { 802 for (i = 0; i < cache_leaves(cpu); i++) { 803 ci_dev = per_cache_index_dev(cpu, i); 804 if (!ci_dev) 805 continue; 806 device_unregister(ci_dev); 807 } 808 kfree(per_cpu_index_dev(cpu)); 809 per_cpu_index_dev(cpu) = NULL; 810 } 811 device_unregister(per_cpu_cache_dev(cpu)); 812 per_cpu_cache_dev(cpu) = NULL; 813 } 814 815 static int cpu_cache_sysfs_init(unsigned int cpu) 816 { 817 struct device *dev = get_cpu_device(cpu); 818 819 if (per_cpu_cacheinfo(cpu) == NULL) 820 return -ENOENT; 821 822 per_cpu_cache_dev(cpu) = cpu_device_create(dev, NULL, NULL, "cache"); 823 if (IS_ERR(per_cpu_cache_dev(cpu))) 824 return PTR_ERR(per_cpu_cache_dev(cpu)); 825 826 /* Allocate all required memory */ 827 per_cpu_index_dev(cpu) = kcalloc(cache_leaves(cpu), 828 sizeof(struct device *), GFP_KERNEL); 829 if (unlikely(per_cpu_index_dev(cpu) == NULL)) 830 goto err_out; 831 832 return 0; 833 834 err_out: 835 cpu_cache_sysfs_exit(cpu); 836 return -ENOMEM; 837 } 838 839 static int cache_add_dev(unsigned int cpu) 840 { 841 unsigned int i; 842 int rc; 843 struct device *ci_dev, *parent; 844 struct cacheinfo *this_leaf; 845 const struct attribute_group **cache_groups; 846 847 rc = cpu_cache_sysfs_init(cpu); 848 if (unlikely(rc < 0)) 849 return rc; 850 851 parent = per_cpu_cache_dev(cpu); 852 for (i = 0; i < cache_leaves(cpu); i++) { 853 this_leaf = per_cpu_cacheinfo_idx(cpu, i); 854 if (this_leaf->disable_sysfs) 855 continue; 856 if (this_leaf->type == CACHE_TYPE_NOCACHE) 857 break; 858 cache_groups = cache_get_attribute_groups(this_leaf); 859 ci_dev = cpu_device_create(parent, this_leaf, cache_groups, 860 "index%1u", i); 861 if (IS_ERR(ci_dev)) { 862 rc = PTR_ERR(ci_dev); 863 goto err; 864 } 865 per_cache_index_dev(cpu, i) = ci_dev; 866 } 867 cpumask_set_cpu(cpu, &cache_dev_map); 868 869 return 0; 870 err: 871 cpu_cache_sysfs_exit(cpu); 872 return rc; 873 } 874 875 static int cacheinfo_cpu_online(unsigned int cpu) 876 { 877 int rc = detect_cache_attributes(cpu); 878 879 if (rc) 880 return rc; 881 rc = cache_add_dev(cpu); 882 if (rc) 883 free_cache_attributes(cpu); 884 return rc; 885 } 886 887 static int cacheinfo_cpu_pre_down(unsigned int cpu) 888 { 889 if (cpumask_test_and_clear_cpu(cpu, &cache_dev_map)) 890 cpu_cache_sysfs_exit(cpu); 891 892 free_cache_attributes(cpu); 893 return 0; 894 } 895 896 static int __init cacheinfo_sysfs_init(void) 897 { 898 return cpuhp_setup_state(CPUHP_AP_BASE_CACHEINFO_ONLINE, 899 "base/cacheinfo:online", 900 cacheinfo_cpu_online, cacheinfo_cpu_pre_down); 901 } 902 device_initcall(cacheinfo_sysfs_init); 903