1 /****************************************************************************** 2 * 3 * nicstar.c 4 * 5 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards. 6 * 7 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME. 8 * It was taken from the frle-0.22 device driver. 9 * As the file doesn't have a copyright notice, in the file 10 * nicstarmac.copyright I put the copyright notice from the 11 * frle-0.22 device driver. 12 * Some code is based on the nicstar driver by M. Welsh. 13 * 14 * Author: Rui Prior (rprior@inescn.pt) 15 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999 16 * 17 * 18 * (C) INESC 1999 19 * 20 * 21 ******************************************************************************/ 22 23 24 /**** IMPORTANT INFORMATION *************************************************** 25 * 26 * There are currently three types of spinlocks: 27 * 28 * 1 - Per card interrupt spinlock (to protect structures and such) 29 * 2 - Per SCQ scq spinlock 30 * 3 - Per card resource spinlock (to access registers, etc.) 31 * 32 * These must NEVER be grabbed in reverse order. 33 * 34 ******************************************************************************/ 35 36 /* Header files ***************************************************************/ 37 38 #include <linux/module.h> 39 #include <linux/config.h> 40 #include <linux/kernel.h> 41 #include <linux/skbuff.h> 42 #include <linux/atmdev.h> 43 #include <linux/atm.h> 44 #include <linux/pci.h> 45 #include <linux/types.h> 46 #include <linux/string.h> 47 #include <linux/delay.h> 48 #include <linux/init.h> 49 #include <linux/sched.h> 50 #include <linux/timer.h> 51 #include <linux/interrupt.h> 52 #include <linux/bitops.h> 53 #include <asm/io.h> 54 #include <asm/uaccess.h> 55 #include <asm/atomic.h> 56 #include "nicstar.h" 57 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI 58 #include "suni.h" 59 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */ 60 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105 61 #include "idt77105.h" 62 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */ 63 64 #if BITS_PER_LONG != 32 65 # error FIXME: this driver requires a 32-bit platform 66 #endif 67 68 /* Additional code ************************************************************/ 69 70 #include "nicstarmac.c" 71 72 73 /* Configurable parameters ****************************************************/ 74 75 #undef PHY_LOOPBACK 76 #undef TX_DEBUG 77 #undef RX_DEBUG 78 #undef GENERAL_DEBUG 79 #undef EXTRA_DEBUG 80 81 #undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know 82 you're going to use only raw ATM */ 83 84 85 /* Do not touch these *********************************************************/ 86 87 #ifdef TX_DEBUG 88 #define TXPRINTK(args...) printk(args) 89 #else 90 #define TXPRINTK(args...) 91 #endif /* TX_DEBUG */ 92 93 #ifdef RX_DEBUG 94 #define RXPRINTK(args...) printk(args) 95 #else 96 #define RXPRINTK(args...) 97 #endif /* RX_DEBUG */ 98 99 #ifdef GENERAL_DEBUG 100 #define PRINTK(args...) printk(args) 101 #else 102 #define PRINTK(args...) 103 #endif /* GENERAL_DEBUG */ 104 105 #ifdef EXTRA_DEBUG 106 #define XPRINTK(args...) printk(args) 107 #else 108 #define XPRINTK(args...) 109 #endif /* EXTRA_DEBUG */ 110 111 112 /* Macros *********************************************************************/ 113 114 #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ) 115 116 #define NS_DELAY mdelay(1) 117 118 #define ALIGN_BUS_ADDR(addr, alignment) \ 119 ((((u32) (addr)) + (((u32) (alignment)) - 1)) & ~(((u32) (alignment)) - 1)) 120 #define ALIGN_ADDRESS(addr, alignment) \ 121 bus_to_virt(ALIGN_BUS_ADDR(virt_to_bus(addr), alignment)) 122 123 #undef CEIL 124 125 #ifndef ATM_SKB 126 #define ATM_SKB(s) (&(s)->atm) 127 #endif 128 129 /* Spinlock debugging stuff */ 130 #ifdef NS_DEBUG_SPINLOCKS /* See nicstar.h */ 131 #define ns_grab_int_lock(card,flags) \ 132 do { \ 133 unsigned long nsdsf, nsdsf2; \ 134 local_irq_save(flags); \ 135 save_flags(nsdsf); cli();\ 136 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \ 137 (flags)&(1<<9)?"en":"dis"); \ 138 if (spin_is_locked(&(card)->int_lock) && \ 139 (card)->cpu_int == smp_processor_id()) { \ 140 printk("nicstar.c: line %d (cpu %d) int_lock already locked at line %d (cpu %d)\n", \ 141 __LINE__, smp_processor_id(), (card)->has_int_lock, \ 142 (card)->cpu_int); \ 143 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \ 144 } \ 145 if (spin_is_locked(&(card)->res_lock) && \ 146 (card)->cpu_res == smp_processor_id()) { \ 147 printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying int)\n", \ 148 __LINE__, smp_processor_id(), (card)->has_res_lock, \ 149 (card)->cpu_res); \ 150 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \ 151 } \ 152 spin_lock_irq(&(card)->int_lock); \ 153 (card)->has_int_lock = __LINE__; \ 154 (card)->cpu_int = smp_processor_id(); \ 155 restore_flags(nsdsf); } while (0) 156 #define ns_grab_res_lock(card,flags) \ 157 do { \ 158 unsigned long nsdsf, nsdsf2; \ 159 local_irq_save(flags); \ 160 save_flags(nsdsf); cli();\ 161 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \ 162 (flags)&(1<<9)?"en":"dis"); \ 163 if (spin_is_locked(&(card)->res_lock) && \ 164 (card)->cpu_res == smp_processor_id()) { \ 165 printk("nicstar.c: line %d (cpu %d) res_lock already locked at line %d (cpu %d)\n", \ 166 __LINE__, smp_processor_id(), (card)->has_res_lock, \ 167 (card)->cpu_res); \ 168 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \ 169 } \ 170 spin_lock_irq(&(card)->res_lock); \ 171 (card)->has_res_lock = __LINE__; \ 172 (card)->cpu_res = smp_processor_id(); \ 173 restore_flags(nsdsf); } while (0) 174 #define ns_grab_scq_lock(card,scq,flags) \ 175 do { \ 176 unsigned long nsdsf, nsdsf2; \ 177 local_irq_save(flags); \ 178 save_flags(nsdsf); cli();\ 179 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \ 180 (flags)&(1<<9)?"en":"dis"); \ 181 if (spin_is_locked(&(scq)->lock) && \ 182 (scq)->cpu_lock == smp_processor_id()) { \ 183 printk("nicstar.c: line %d (cpu %d) this scq_lock already locked at line %d (cpu %d)\n", \ 184 __LINE__, smp_processor_id(), (scq)->has_lock, \ 185 (scq)->cpu_lock); \ 186 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \ 187 } \ 188 if (spin_is_locked(&(card)->res_lock) && \ 189 (card)->cpu_res == smp_processor_id()) { \ 190 printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying scq)\n", \ 191 __LINE__, smp_processor_id(), (card)->has_res_lock, \ 192 (card)->cpu_res); \ 193 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \ 194 } \ 195 spin_lock_irq(&(scq)->lock); \ 196 (scq)->has_lock = __LINE__; \ 197 (scq)->cpu_lock = smp_processor_id(); \ 198 restore_flags(nsdsf); } while (0) 199 #else /* !NS_DEBUG_SPINLOCKS */ 200 #define ns_grab_int_lock(card,flags) \ 201 spin_lock_irqsave(&(card)->int_lock,(flags)) 202 #define ns_grab_res_lock(card,flags) \ 203 spin_lock_irqsave(&(card)->res_lock,(flags)) 204 #define ns_grab_scq_lock(card,scq,flags) \ 205 spin_lock_irqsave(&(scq)->lock,flags) 206 #endif /* NS_DEBUG_SPINLOCKS */ 207 208 209 /* Function declarations ******************************************************/ 210 211 static u32 ns_read_sram(ns_dev *card, u32 sram_address); 212 static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count); 213 static int __devinit ns_init_card(int i, struct pci_dev *pcidev); 214 static void __devinit ns_init_card_error(ns_dev *card, int error); 215 static scq_info *get_scq(int size, u32 scd); 216 static void free_scq(scq_info *scq, struct atm_vcc *vcc); 217 static void push_rxbufs(ns_dev *, struct sk_buff *); 218 static irqreturn_t ns_irq_handler(int irq, void *dev_id, struct pt_regs *regs); 219 static int ns_open(struct atm_vcc *vcc); 220 static void ns_close(struct atm_vcc *vcc); 221 static void fill_tst(ns_dev *card, int n, vc_map *vc); 222 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb); 223 static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd, 224 struct sk_buff *skb); 225 static void process_tsq(ns_dev *card); 226 static void drain_scq(ns_dev *card, scq_info *scq, int pos); 227 static void process_rsq(ns_dev *card); 228 static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe); 229 #ifdef NS_USE_DESTRUCTORS 230 static void ns_sb_destructor(struct sk_buff *sb); 231 static void ns_lb_destructor(struct sk_buff *lb); 232 static void ns_hb_destructor(struct sk_buff *hb); 233 #endif /* NS_USE_DESTRUCTORS */ 234 static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb); 235 static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count); 236 static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb); 237 static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb); 238 static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb); 239 static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page); 240 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg); 241 static void which_list(ns_dev *card, struct sk_buff *skb); 242 static void ns_poll(unsigned long arg); 243 static int ns_parse_mac(char *mac, unsigned char *esi); 244 static short ns_h2i(char c); 245 static void ns_phy_put(struct atm_dev *dev, unsigned char value, 246 unsigned long addr); 247 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr); 248 249 250 251 /* Global variables ***********************************************************/ 252 253 static struct ns_dev *cards[NS_MAX_CARDS]; 254 static unsigned num_cards; 255 static struct atmdev_ops atm_ops = 256 { 257 .open = ns_open, 258 .close = ns_close, 259 .ioctl = ns_ioctl, 260 .send = ns_send, 261 .phy_put = ns_phy_put, 262 .phy_get = ns_phy_get, 263 .proc_read = ns_proc_read, 264 .owner = THIS_MODULE, 265 }; 266 static struct timer_list ns_timer; 267 static char *mac[NS_MAX_CARDS]; 268 module_param_array(mac, charp, NULL, 0); 269 MODULE_LICENSE("GPL"); 270 271 272 /* Functions*******************************************************************/ 273 274 static int __devinit nicstar_init_one(struct pci_dev *pcidev, 275 const struct pci_device_id *ent) 276 { 277 static int index = -1; 278 unsigned int error; 279 280 index++; 281 cards[index] = NULL; 282 283 error = ns_init_card(index, pcidev); 284 if (error) { 285 cards[index--] = NULL; /* don't increment index */ 286 goto err_out; 287 } 288 289 return 0; 290 err_out: 291 return -ENODEV; 292 } 293 294 295 296 static void __devexit nicstar_remove_one(struct pci_dev *pcidev) 297 { 298 int i, j; 299 ns_dev *card = pci_get_drvdata(pcidev); 300 struct sk_buff *hb; 301 struct sk_buff *iovb; 302 struct sk_buff *lb; 303 struct sk_buff *sb; 304 305 i = card->index; 306 307 if (cards[i] == NULL) 308 return; 309 310 if (card->atmdev->phy && card->atmdev->phy->stop) 311 card->atmdev->phy->stop(card->atmdev); 312 313 /* Stop everything */ 314 writel(0x00000000, card->membase + CFG); 315 316 /* De-register device */ 317 atm_dev_deregister(card->atmdev); 318 319 /* Disable PCI device */ 320 pci_disable_device(pcidev); 321 322 /* Free up resources */ 323 j = 0; 324 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count); 325 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL) 326 { 327 dev_kfree_skb_any(hb); 328 j++; 329 } 330 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j); 331 j = 0; 332 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i, card->iovpool.count); 333 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL) 334 { 335 dev_kfree_skb_any(iovb); 336 j++; 337 } 338 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j); 339 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL) 340 dev_kfree_skb_any(lb); 341 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL) 342 dev_kfree_skb_any(sb); 343 free_scq(card->scq0, NULL); 344 for (j = 0; j < NS_FRSCD_NUM; j++) 345 { 346 if (card->scd2vc[j] != NULL) 347 free_scq(card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc); 348 } 349 kfree(card->rsq.org); 350 kfree(card->tsq.org); 351 free_irq(card->pcidev->irq, card); 352 iounmap(card->membase); 353 kfree(card); 354 } 355 356 357 358 static struct pci_device_id nicstar_pci_tbl[] __devinitdata = 359 { 360 {PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201, 361 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 362 {0,} /* terminate list */ 363 }; 364 MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl); 365 366 367 368 static struct pci_driver nicstar_driver = { 369 .name = "nicstar", 370 .id_table = nicstar_pci_tbl, 371 .probe = nicstar_init_one, 372 .remove = __devexit_p(nicstar_remove_one), 373 }; 374 375 376 377 static int __init nicstar_init(void) 378 { 379 unsigned error = 0; /* Initialized to remove compile warning */ 380 381 XPRINTK("nicstar: nicstar_init() called.\n"); 382 383 error = pci_register_driver(&nicstar_driver); 384 385 TXPRINTK("nicstar: TX debug enabled.\n"); 386 RXPRINTK("nicstar: RX debug enabled.\n"); 387 PRINTK("nicstar: General debug enabled.\n"); 388 #ifdef PHY_LOOPBACK 389 printk("nicstar: using PHY loopback.\n"); 390 #endif /* PHY_LOOPBACK */ 391 XPRINTK("nicstar: nicstar_init() returned.\n"); 392 393 if (!error) { 394 init_timer(&ns_timer); 395 ns_timer.expires = jiffies + NS_POLL_PERIOD; 396 ns_timer.data = 0UL; 397 ns_timer.function = ns_poll; 398 add_timer(&ns_timer); 399 } 400 401 return error; 402 } 403 404 405 406 static void __exit nicstar_cleanup(void) 407 { 408 XPRINTK("nicstar: nicstar_cleanup() called.\n"); 409 410 del_timer(&ns_timer); 411 412 pci_unregister_driver(&nicstar_driver); 413 414 XPRINTK("nicstar: nicstar_cleanup() returned.\n"); 415 } 416 417 418 419 static u32 ns_read_sram(ns_dev *card, u32 sram_address) 420 { 421 unsigned long flags; 422 u32 data; 423 sram_address <<= 2; 424 sram_address &= 0x0007FFFC; /* address must be dword aligned */ 425 sram_address |= 0x50000000; /* SRAM read command */ 426 ns_grab_res_lock(card, flags); 427 while (CMD_BUSY(card)); 428 writel(sram_address, card->membase + CMD); 429 while (CMD_BUSY(card)); 430 data = readl(card->membase + DR0); 431 spin_unlock_irqrestore(&card->res_lock, flags); 432 return data; 433 } 434 435 436 437 static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count) 438 { 439 unsigned long flags; 440 int i, c; 441 count--; /* count range now is 0..3 instead of 1..4 */ 442 c = count; 443 c <<= 2; /* to use increments of 4 */ 444 ns_grab_res_lock(card, flags); 445 while (CMD_BUSY(card)); 446 for (i = 0; i <= c; i += 4) 447 writel(*(value++), card->membase + i); 448 /* Note: DR# registers are the first 4 dwords in nicstar's memspace, 449 so card->membase + DR0 == card->membase */ 450 sram_address <<= 2; 451 sram_address &= 0x0007FFFC; 452 sram_address |= (0x40000000 | count); 453 writel(sram_address, card->membase + CMD); 454 spin_unlock_irqrestore(&card->res_lock, flags); 455 } 456 457 458 static int __devinit ns_init_card(int i, struct pci_dev *pcidev) 459 { 460 int j; 461 struct ns_dev *card = NULL; 462 unsigned char pci_latency; 463 unsigned error; 464 u32 data; 465 u32 u32d[4]; 466 u32 ns_cfg_rctsize; 467 int bcount; 468 unsigned long membase; 469 470 error = 0; 471 472 if (pci_enable_device(pcidev)) 473 { 474 printk("nicstar%d: can't enable PCI device\n", i); 475 error = 2; 476 ns_init_card_error(card, error); 477 return error; 478 } 479 480 if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL) 481 { 482 printk("nicstar%d: can't allocate memory for device structure.\n", i); 483 error = 2; 484 ns_init_card_error(card, error); 485 return error; 486 } 487 cards[i] = card; 488 spin_lock_init(&card->int_lock); 489 spin_lock_init(&card->res_lock); 490 491 pci_set_drvdata(pcidev, card); 492 493 card->index = i; 494 card->atmdev = NULL; 495 card->pcidev = pcidev; 496 membase = pci_resource_start(pcidev, 1); 497 card->membase = ioremap(membase, NS_IOREMAP_SIZE); 498 if (card->membase == 0) 499 { 500 printk("nicstar%d: can't ioremap() membase.\n",i); 501 error = 3; 502 ns_init_card_error(card, error); 503 return error; 504 } 505 PRINTK("nicstar%d: membase at 0x%x.\n", i, card->membase); 506 507 pci_set_master(pcidev); 508 509 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0) 510 { 511 printk("nicstar%d: can't read PCI latency timer.\n", i); 512 error = 6; 513 ns_init_card_error(card, error); 514 return error; 515 } 516 #ifdef NS_PCI_LATENCY 517 if (pci_latency < NS_PCI_LATENCY) 518 { 519 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i, NS_PCI_LATENCY); 520 for (j = 1; j < 4; j++) 521 { 522 if (pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0) 523 break; 524 } 525 if (j == 4) 526 { 527 printk("nicstar%d: can't set PCI latency timer to %d.\n", i, NS_PCI_LATENCY); 528 error = 7; 529 ns_init_card_error(card, error); 530 return error; 531 } 532 } 533 #endif /* NS_PCI_LATENCY */ 534 535 /* Clear timer overflow */ 536 data = readl(card->membase + STAT); 537 if (data & NS_STAT_TMROF) 538 writel(NS_STAT_TMROF, card->membase + STAT); 539 540 /* Software reset */ 541 writel(NS_CFG_SWRST, card->membase + CFG); 542 NS_DELAY; 543 writel(0x00000000, card->membase + CFG); 544 545 /* PHY reset */ 546 writel(0x00000008, card->membase + GP); 547 NS_DELAY; 548 writel(0x00000001, card->membase + GP); 549 NS_DELAY; 550 while (CMD_BUSY(card)); 551 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */ 552 NS_DELAY; 553 554 /* Detect PHY type */ 555 while (CMD_BUSY(card)); 556 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD); 557 while (CMD_BUSY(card)); 558 data = readl(card->membase + DR0); 559 switch(data) { 560 case 0x00000009: 561 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i); 562 card->max_pcr = ATM_25_PCR; 563 while(CMD_BUSY(card)); 564 writel(0x00000008, card->membase + DR0); 565 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD); 566 /* Clear an eventual pending interrupt */ 567 writel(NS_STAT_SFBQF, card->membase + STAT); 568 #ifdef PHY_LOOPBACK 569 while(CMD_BUSY(card)); 570 writel(0x00000022, card->membase + DR0); 571 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD); 572 #endif /* PHY_LOOPBACK */ 573 break; 574 case 0x00000030: 575 case 0x00000031: 576 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i); 577 card->max_pcr = ATM_OC3_PCR; 578 #ifdef PHY_LOOPBACK 579 while(CMD_BUSY(card)); 580 writel(0x00000002, card->membase + DR0); 581 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD); 582 #endif /* PHY_LOOPBACK */ 583 break; 584 default: 585 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data); 586 error = 8; 587 ns_init_card_error(card, error); 588 return error; 589 } 590 writel(0x00000000, card->membase + GP); 591 592 /* Determine SRAM size */ 593 data = 0x76543210; 594 ns_write_sram(card, 0x1C003, &data, 1); 595 data = 0x89ABCDEF; 596 ns_write_sram(card, 0x14003, &data, 1); 597 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF && 598 ns_read_sram(card, 0x1C003) == 0x76543210) 599 card->sram_size = 128; 600 else 601 card->sram_size = 32; 602 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size); 603 604 card->rct_size = NS_MAX_RCTSIZE; 605 606 #if (NS_MAX_RCTSIZE == 4096) 607 if (card->sram_size == 128) 608 printk("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n", i); 609 #elif (NS_MAX_RCTSIZE == 16384) 610 if (card->sram_size == 32) 611 { 612 printk("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n", i); 613 card->rct_size = 4096; 614 } 615 #else 616 #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c 617 #endif 618 619 card->vpibits = NS_VPIBITS; 620 if (card->rct_size == 4096) 621 card->vcibits = 12 - NS_VPIBITS; 622 else /* card->rct_size == 16384 */ 623 card->vcibits = 14 - NS_VPIBITS; 624 625 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */ 626 if (mac[i] == NULL) 627 nicstar_init_eprom(card->membase); 628 629 if (request_irq(pcidev->irq, &ns_irq_handler, SA_INTERRUPT | SA_SHIRQ, "nicstar", card) != 0) 630 { 631 printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq); 632 error = 9; 633 ns_init_card_error(card, error); 634 return error; 635 } 636 637 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */ 638 writel(0x00000000, card->membase + VPM); 639 640 /* Initialize TSQ */ 641 card->tsq.org = kmalloc(NS_TSQSIZE + NS_TSQ_ALIGNMENT, GFP_KERNEL); 642 if (card->tsq.org == NULL) 643 { 644 printk("nicstar%d: can't allocate TSQ.\n", i); 645 error = 10; 646 ns_init_card_error(card, error); 647 return error; 648 } 649 card->tsq.base = (ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT); 650 card->tsq.next = card->tsq.base; 651 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1); 652 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++) 653 ns_tsi_init(card->tsq.base + j); 654 writel(0x00000000, card->membase + TSQH); 655 writel((u32) virt_to_bus(card->tsq.base), card->membase + TSQB); 656 PRINTK("nicstar%d: TSQ base at 0x%x 0x%x 0x%x.\n", i, (u32) card->tsq.base, 657 (u32) virt_to_bus(card->tsq.base), readl(card->membase + TSQB)); 658 659 /* Initialize RSQ */ 660 card->rsq.org = kmalloc(NS_RSQSIZE + NS_RSQ_ALIGNMENT, GFP_KERNEL); 661 if (card->rsq.org == NULL) 662 { 663 printk("nicstar%d: can't allocate RSQ.\n", i); 664 error = 11; 665 ns_init_card_error(card, error); 666 return error; 667 } 668 card->rsq.base = (ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT); 669 card->rsq.next = card->rsq.base; 670 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1); 671 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++) 672 ns_rsqe_init(card->rsq.base + j); 673 writel(0x00000000, card->membase + RSQH); 674 writel((u32) virt_to_bus(card->rsq.base), card->membase + RSQB); 675 PRINTK("nicstar%d: RSQ base at 0x%x.\n", i, (u32) card->rsq.base); 676 677 /* Initialize SCQ0, the only VBR SCQ used */ 678 card->scq1 = NULL; 679 card->scq2 = NULL; 680 card->scq0 = get_scq(VBR_SCQSIZE, NS_VRSCD0); 681 if (card->scq0 == NULL) 682 { 683 printk("nicstar%d: can't get SCQ0.\n", i); 684 error = 12; 685 ns_init_card_error(card, error); 686 return error; 687 } 688 u32d[0] = (u32) virt_to_bus(card->scq0->base); 689 u32d[1] = (u32) 0x00000000; 690 u32d[2] = (u32) 0xffffffff; 691 u32d[3] = (u32) 0x00000000; 692 ns_write_sram(card, NS_VRSCD0, u32d, 4); 693 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */ 694 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */ 695 card->scq0->scd = NS_VRSCD0; 696 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i, (u32) card->scq0->base); 697 698 /* Initialize TSTs */ 699 card->tst_addr = NS_TST0; 700 card->tst_free_entries = NS_TST_NUM_ENTRIES; 701 data = NS_TST_OPCODE_VARIABLE; 702 for (j = 0; j < NS_TST_NUM_ENTRIES; j++) 703 ns_write_sram(card, NS_TST0 + j, &data, 1); 704 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0); 705 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1); 706 for (j = 0; j < NS_TST_NUM_ENTRIES; j++) 707 ns_write_sram(card, NS_TST1 + j, &data, 1); 708 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1); 709 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1); 710 for (j = 0; j < NS_TST_NUM_ENTRIES; j++) 711 card->tste2vc[j] = NULL; 712 writel(NS_TST0 << 2, card->membase + TSTB); 713 714 715 /* Initialize RCT. AAL type is set on opening the VC. */ 716 #ifdef RCQ_SUPPORT 717 u32d[0] = NS_RCTE_RAWCELLINTEN; 718 #else 719 u32d[0] = 0x00000000; 720 #endif /* RCQ_SUPPORT */ 721 u32d[1] = 0x00000000; 722 u32d[2] = 0x00000000; 723 u32d[3] = 0xFFFFFFFF; 724 for (j = 0; j < card->rct_size; j++) 725 ns_write_sram(card, j * 4, u32d, 4); 726 727 memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map)); 728 729 for (j = 0; j < NS_FRSCD_NUM; j++) 730 card->scd2vc[j] = NULL; 731 732 /* Initialize buffer levels */ 733 card->sbnr.min = MIN_SB; 734 card->sbnr.init = NUM_SB; 735 card->sbnr.max = MAX_SB; 736 card->lbnr.min = MIN_LB; 737 card->lbnr.init = NUM_LB; 738 card->lbnr.max = MAX_LB; 739 card->iovnr.min = MIN_IOVB; 740 card->iovnr.init = NUM_IOVB; 741 card->iovnr.max = MAX_IOVB; 742 card->hbnr.min = MIN_HB; 743 card->hbnr.init = NUM_HB; 744 card->hbnr.max = MAX_HB; 745 746 card->sm_handle = 0x00000000; 747 card->sm_addr = 0x00000000; 748 card->lg_handle = 0x00000000; 749 card->lg_addr = 0x00000000; 750 751 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */ 752 753 /* Pre-allocate some huge buffers */ 754 skb_queue_head_init(&card->hbpool.queue); 755 card->hbpool.count = 0; 756 for (j = 0; j < NUM_HB; j++) 757 { 758 struct sk_buff *hb; 759 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL); 760 if (hb == NULL) 761 { 762 printk("nicstar%d: can't allocate %dth of %d huge buffers.\n", 763 i, j, NUM_HB); 764 error = 13; 765 ns_init_card_error(card, error); 766 return error; 767 } 768 NS_SKB_CB(hb)->buf_type = BUF_NONE; 769 skb_queue_tail(&card->hbpool.queue, hb); 770 card->hbpool.count++; 771 } 772 773 774 /* Allocate large buffers */ 775 skb_queue_head_init(&card->lbpool.queue); 776 card->lbpool.count = 0; /* Not used */ 777 for (j = 0; j < NUM_LB; j++) 778 { 779 struct sk_buff *lb; 780 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL); 781 if (lb == NULL) 782 { 783 printk("nicstar%d: can't allocate %dth of %d large buffers.\n", 784 i, j, NUM_LB); 785 error = 14; 786 ns_init_card_error(card, error); 787 return error; 788 } 789 NS_SKB_CB(lb)->buf_type = BUF_LG; 790 skb_queue_tail(&card->lbpool.queue, lb); 791 skb_reserve(lb, NS_SMBUFSIZE); 792 push_rxbufs(card, lb); 793 /* Due to the implementation of push_rxbufs() this is 1, not 0 */ 794 if (j == 1) 795 { 796 card->rcbuf = lb; 797 card->rawch = (u32) virt_to_bus(lb->data); 798 } 799 } 800 /* Test for strange behaviour which leads to crashes */ 801 if ((bcount = ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min) 802 { 803 printk("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n", 804 i, j, bcount); 805 error = 14; 806 ns_init_card_error(card, error); 807 return error; 808 } 809 810 811 /* Allocate small buffers */ 812 skb_queue_head_init(&card->sbpool.queue); 813 card->sbpool.count = 0; /* Not used */ 814 for (j = 0; j < NUM_SB; j++) 815 { 816 struct sk_buff *sb; 817 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL); 818 if (sb == NULL) 819 { 820 printk("nicstar%d: can't allocate %dth of %d small buffers.\n", 821 i, j, NUM_SB); 822 error = 15; 823 ns_init_card_error(card, error); 824 return error; 825 } 826 NS_SKB_CB(sb)->buf_type = BUF_SM; 827 skb_queue_tail(&card->sbpool.queue, sb); 828 skb_reserve(sb, NS_AAL0_HEADER); 829 push_rxbufs(card, sb); 830 } 831 /* Test for strange behaviour which leads to crashes */ 832 if ((bcount = ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min) 833 { 834 printk("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n", 835 i, j, bcount); 836 error = 15; 837 ns_init_card_error(card, error); 838 return error; 839 } 840 841 842 /* Allocate iovec buffers */ 843 skb_queue_head_init(&card->iovpool.queue); 844 card->iovpool.count = 0; 845 for (j = 0; j < NUM_IOVB; j++) 846 { 847 struct sk_buff *iovb; 848 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL); 849 if (iovb == NULL) 850 { 851 printk("nicstar%d: can't allocate %dth of %d iovec buffers.\n", 852 i, j, NUM_IOVB); 853 error = 16; 854 ns_init_card_error(card, error); 855 return error; 856 } 857 NS_SKB_CB(iovb)->buf_type = BUF_NONE; 858 skb_queue_tail(&card->iovpool.queue, iovb); 859 card->iovpool.count++; 860 } 861 862 card->intcnt = 0; 863 864 /* Configure NICStAR */ 865 if (card->rct_size == 4096) 866 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES; 867 else /* (card->rct_size == 16384) */ 868 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES; 869 870 card->efbie = 1; 871 872 /* Register device */ 873 card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL); 874 if (card->atmdev == NULL) 875 { 876 printk("nicstar%d: can't register device.\n", i); 877 error = 17; 878 ns_init_card_error(card, error); 879 return error; 880 } 881 882 if (ns_parse_mac(mac[i], card->atmdev->esi)) { 883 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET, 884 card->atmdev->esi, 6); 885 if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) == 0) { 886 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT, 887 card->atmdev->esi, 6); 888 } 889 } 890 891 printk("nicstar%d: MAC address %02X:%02X:%02X:%02X:%02X:%02X\n", i, 892 card->atmdev->esi[0], card->atmdev->esi[1], card->atmdev->esi[2], 893 card->atmdev->esi[3], card->atmdev->esi[4], card->atmdev->esi[5]); 894 895 card->atmdev->dev_data = card; 896 card->atmdev->ci_range.vpi_bits = card->vpibits; 897 card->atmdev->ci_range.vci_bits = card->vcibits; 898 card->atmdev->link_rate = card->max_pcr; 899 card->atmdev->phy = NULL; 900 901 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI 902 if (card->max_pcr == ATM_OC3_PCR) 903 suni_init(card->atmdev); 904 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */ 905 906 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105 907 if (card->max_pcr == ATM_25_PCR) 908 idt77105_init(card->atmdev); 909 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */ 910 911 if (card->atmdev->phy && card->atmdev->phy->start) 912 card->atmdev->phy->start(card->atmdev); 913 914 writel(NS_CFG_RXPATH | 915 NS_CFG_SMBUFSIZE | 916 NS_CFG_LGBUFSIZE | 917 NS_CFG_EFBIE | 918 NS_CFG_RSQSIZE | 919 NS_CFG_VPIBITS | 920 ns_cfg_rctsize | 921 NS_CFG_RXINT_NODELAY | 922 NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */ 923 NS_CFG_RSQAFIE | 924 NS_CFG_TXEN | 925 NS_CFG_TXIE | 926 NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */ 927 NS_CFG_PHYIE, 928 card->membase + CFG); 929 930 num_cards++; 931 932 return error; 933 } 934 935 936 937 static void __devinit ns_init_card_error(ns_dev *card, int error) 938 { 939 if (error >= 17) 940 { 941 writel(0x00000000, card->membase + CFG); 942 } 943 if (error >= 16) 944 { 945 struct sk_buff *iovb; 946 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL) 947 dev_kfree_skb_any(iovb); 948 } 949 if (error >= 15) 950 { 951 struct sk_buff *sb; 952 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL) 953 dev_kfree_skb_any(sb); 954 free_scq(card->scq0, NULL); 955 } 956 if (error >= 14) 957 { 958 struct sk_buff *lb; 959 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL) 960 dev_kfree_skb_any(lb); 961 } 962 if (error >= 13) 963 { 964 struct sk_buff *hb; 965 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL) 966 dev_kfree_skb_any(hb); 967 } 968 if (error >= 12) 969 { 970 kfree(card->rsq.org); 971 } 972 if (error >= 11) 973 { 974 kfree(card->tsq.org); 975 } 976 if (error >= 10) 977 { 978 free_irq(card->pcidev->irq, card); 979 } 980 if (error >= 4) 981 { 982 iounmap(card->membase); 983 } 984 if (error >= 3) 985 { 986 pci_disable_device(card->pcidev); 987 kfree(card); 988 } 989 } 990 991 992 993 static scq_info *get_scq(int size, u32 scd) 994 { 995 scq_info *scq; 996 int i; 997 998 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE) 999 return NULL; 1000 1001 scq = (scq_info *) kmalloc(sizeof(scq_info), GFP_KERNEL); 1002 if (scq == NULL) 1003 return NULL; 1004 scq->org = kmalloc(2 * size, GFP_KERNEL); 1005 if (scq->org == NULL) 1006 { 1007 kfree(scq); 1008 return NULL; 1009 } 1010 scq->skb = (struct sk_buff **) kmalloc(sizeof(struct sk_buff *) * 1011 (size / NS_SCQE_SIZE), GFP_KERNEL); 1012 if (scq->skb == NULL) 1013 { 1014 kfree(scq->org); 1015 kfree(scq); 1016 return NULL; 1017 } 1018 scq->num_entries = size / NS_SCQE_SIZE; 1019 scq->base = (ns_scqe *) ALIGN_ADDRESS(scq->org, size); 1020 scq->next = scq->base; 1021 scq->last = scq->base + (scq->num_entries - 1); 1022 scq->tail = scq->last; 1023 scq->scd = scd; 1024 scq->num_entries = size / NS_SCQE_SIZE; 1025 scq->tbd_count = 0; 1026 init_waitqueue_head(&scq->scqfull_waitq); 1027 scq->full = 0; 1028 spin_lock_init(&scq->lock); 1029 1030 for (i = 0; i < scq->num_entries; i++) 1031 scq->skb[i] = NULL; 1032 1033 return scq; 1034 } 1035 1036 1037 1038 /* For variable rate SCQ vcc must be NULL */ 1039 static void free_scq(scq_info *scq, struct atm_vcc *vcc) 1040 { 1041 int i; 1042 1043 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES) 1044 for (i = 0; i < scq->num_entries; i++) 1045 { 1046 if (scq->skb[i] != NULL) 1047 { 1048 vcc = ATM_SKB(scq->skb[i])->vcc; 1049 if (vcc->pop != NULL) 1050 vcc->pop(vcc, scq->skb[i]); 1051 else 1052 dev_kfree_skb_any(scq->skb[i]); 1053 } 1054 } 1055 else /* vcc must be != NULL */ 1056 { 1057 if (vcc == NULL) 1058 { 1059 printk("nicstar: free_scq() called with vcc == NULL for fixed rate scq."); 1060 for (i = 0; i < scq->num_entries; i++) 1061 dev_kfree_skb_any(scq->skb[i]); 1062 } 1063 else 1064 for (i = 0; i < scq->num_entries; i++) 1065 { 1066 if (scq->skb[i] != NULL) 1067 { 1068 if (vcc->pop != NULL) 1069 vcc->pop(vcc, scq->skb[i]); 1070 else 1071 dev_kfree_skb_any(scq->skb[i]); 1072 } 1073 } 1074 } 1075 kfree(scq->skb); 1076 kfree(scq->org); 1077 kfree(scq); 1078 } 1079 1080 1081 1082 /* The handles passed must be pointers to the sk_buff containing the small 1083 or large buffer(s) cast to u32. */ 1084 static void push_rxbufs(ns_dev *card, struct sk_buff *skb) 1085 { 1086 struct ns_skb_cb *cb = NS_SKB_CB(skb); 1087 u32 handle1, addr1; 1088 u32 handle2, addr2; 1089 u32 stat; 1090 unsigned long flags; 1091 1092 /* *BARF* */ 1093 handle2 = addr2 = 0; 1094 handle1 = (u32)skb; 1095 addr1 = (u32)virt_to_bus(skb->data); 1096 1097 #ifdef GENERAL_DEBUG 1098 if (!addr1) 1099 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n", card->index); 1100 #endif /* GENERAL_DEBUG */ 1101 1102 stat = readl(card->membase + STAT); 1103 card->sbfqc = ns_stat_sfbqc_get(stat); 1104 card->lbfqc = ns_stat_lfbqc_get(stat); 1105 if (cb->buf_type == BUF_SM) 1106 { 1107 if (!addr2) 1108 { 1109 if (card->sm_addr) 1110 { 1111 addr2 = card->sm_addr; 1112 handle2 = card->sm_handle; 1113 card->sm_addr = 0x00000000; 1114 card->sm_handle = 0x00000000; 1115 } 1116 else /* (!sm_addr) */ 1117 { 1118 card->sm_addr = addr1; 1119 card->sm_handle = handle1; 1120 } 1121 } 1122 } 1123 else /* buf_type == BUF_LG */ 1124 { 1125 if (!addr2) 1126 { 1127 if (card->lg_addr) 1128 { 1129 addr2 = card->lg_addr; 1130 handle2 = card->lg_handle; 1131 card->lg_addr = 0x00000000; 1132 card->lg_handle = 0x00000000; 1133 } 1134 else /* (!lg_addr) */ 1135 { 1136 card->lg_addr = addr1; 1137 card->lg_handle = handle1; 1138 } 1139 } 1140 } 1141 1142 if (addr2) 1143 { 1144 if (cb->buf_type == BUF_SM) 1145 { 1146 if (card->sbfqc >= card->sbnr.max) 1147 { 1148 skb_unlink((struct sk_buff *) handle1, &card->sbpool.queue); 1149 dev_kfree_skb_any((struct sk_buff *) handle1); 1150 skb_unlink((struct sk_buff *) handle2, &card->sbpool.queue); 1151 dev_kfree_skb_any((struct sk_buff *) handle2); 1152 return; 1153 } 1154 else 1155 card->sbfqc += 2; 1156 } 1157 else /* (buf_type == BUF_LG) */ 1158 { 1159 if (card->lbfqc >= card->lbnr.max) 1160 { 1161 skb_unlink((struct sk_buff *) handle1, &card->lbpool.queue); 1162 dev_kfree_skb_any((struct sk_buff *) handle1); 1163 skb_unlink((struct sk_buff *) handle2, &card->lbpool.queue); 1164 dev_kfree_skb_any((struct sk_buff *) handle2); 1165 return; 1166 } 1167 else 1168 card->lbfqc += 2; 1169 } 1170 1171 ns_grab_res_lock(card, flags); 1172 1173 while (CMD_BUSY(card)); 1174 writel(addr2, card->membase + DR3); 1175 writel(handle2, card->membase + DR2); 1176 writel(addr1, card->membase + DR1); 1177 writel(handle1, card->membase + DR0); 1178 writel(NS_CMD_WRITE_FREEBUFQ | cb->buf_type, card->membase + CMD); 1179 1180 spin_unlock_irqrestore(&card->res_lock, flags); 1181 1182 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n", card->index, 1183 (cb->buf_type == BUF_SM ? "small" : "large"), addr1, addr2); 1184 } 1185 1186 if (!card->efbie && card->sbfqc >= card->sbnr.min && 1187 card->lbfqc >= card->lbnr.min) 1188 { 1189 card->efbie = 1; 1190 writel((readl(card->membase + CFG) | NS_CFG_EFBIE), card->membase + CFG); 1191 } 1192 1193 return; 1194 } 1195 1196 1197 1198 static irqreturn_t ns_irq_handler(int irq, void *dev_id, struct pt_regs *regs) 1199 { 1200 u32 stat_r; 1201 ns_dev *card; 1202 struct atm_dev *dev; 1203 unsigned long flags; 1204 1205 card = (ns_dev *) dev_id; 1206 dev = card->atmdev; 1207 card->intcnt++; 1208 1209 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index); 1210 1211 ns_grab_int_lock(card, flags); 1212 1213 stat_r = readl(card->membase + STAT); 1214 1215 /* Transmit Status Indicator has been written to T. S. Queue */ 1216 if (stat_r & NS_STAT_TSIF) 1217 { 1218 TXPRINTK("nicstar%d: TSI interrupt\n", card->index); 1219 process_tsq(card); 1220 writel(NS_STAT_TSIF, card->membase + STAT); 1221 } 1222 1223 /* Incomplete CS-PDU has been transmitted */ 1224 if (stat_r & NS_STAT_TXICP) 1225 { 1226 writel(NS_STAT_TXICP, card->membase + STAT); 1227 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n", 1228 card->index); 1229 } 1230 1231 /* Transmit Status Queue 7/8 full */ 1232 if (stat_r & NS_STAT_TSQF) 1233 { 1234 writel(NS_STAT_TSQF, card->membase + STAT); 1235 PRINTK("nicstar%d: TSQ full.\n", card->index); 1236 process_tsq(card); 1237 } 1238 1239 /* Timer overflow */ 1240 if (stat_r & NS_STAT_TMROF) 1241 { 1242 writel(NS_STAT_TMROF, card->membase + STAT); 1243 PRINTK("nicstar%d: Timer overflow.\n", card->index); 1244 } 1245 1246 /* PHY device interrupt signal active */ 1247 if (stat_r & NS_STAT_PHYI) 1248 { 1249 writel(NS_STAT_PHYI, card->membase + STAT); 1250 PRINTK("nicstar%d: PHY interrupt.\n", card->index); 1251 if (dev->phy && dev->phy->interrupt) { 1252 dev->phy->interrupt(dev); 1253 } 1254 } 1255 1256 /* Small Buffer Queue is full */ 1257 if (stat_r & NS_STAT_SFBQF) 1258 { 1259 writel(NS_STAT_SFBQF, card->membase + STAT); 1260 printk("nicstar%d: Small free buffer queue is full.\n", card->index); 1261 } 1262 1263 /* Large Buffer Queue is full */ 1264 if (stat_r & NS_STAT_LFBQF) 1265 { 1266 writel(NS_STAT_LFBQF, card->membase + STAT); 1267 printk("nicstar%d: Large free buffer queue is full.\n", card->index); 1268 } 1269 1270 /* Receive Status Queue is full */ 1271 if (stat_r & NS_STAT_RSQF) 1272 { 1273 writel(NS_STAT_RSQF, card->membase + STAT); 1274 printk("nicstar%d: RSQ full.\n", card->index); 1275 process_rsq(card); 1276 } 1277 1278 /* Complete CS-PDU received */ 1279 if (stat_r & NS_STAT_EOPDU) 1280 { 1281 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index); 1282 process_rsq(card); 1283 writel(NS_STAT_EOPDU, card->membase + STAT); 1284 } 1285 1286 /* Raw cell received */ 1287 if (stat_r & NS_STAT_RAWCF) 1288 { 1289 writel(NS_STAT_RAWCF, card->membase + STAT); 1290 #ifndef RCQ_SUPPORT 1291 printk("nicstar%d: Raw cell received and no support yet...\n", 1292 card->index); 1293 #endif /* RCQ_SUPPORT */ 1294 /* NOTE: the following procedure may keep a raw cell pending until the 1295 next interrupt. As this preliminary support is only meant to 1296 avoid buffer leakage, this is not an issue. */ 1297 while (readl(card->membase + RAWCT) != card->rawch) 1298 { 1299 ns_rcqe *rawcell; 1300 1301 rawcell = (ns_rcqe *) bus_to_virt(card->rawch); 1302 if (ns_rcqe_islast(rawcell)) 1303 { 1304 struct sk_buff *oldbuf; 1305 1306 oldbuf = card->rcbuf; 1307 card->rcbuf = (struct sk_buff *) ns_rcqe_nextbufhandle(rawcell); 1308 card->rawch = (u32) virt_to_bus(card->rcbuf->data); 1309 recycle_rx_buf(card, oldbuf); 1310 } 1311 else 1312 card->rawch += NS_RCQE_SIZE; 1313 } 1314 } 1315 1316 /* Small buffer queue is empty */ 1317 if (stat_r & NS_STAT_SFBQE) 1318 { 1319 int i; 1320 struct sk_buff *sb; 1321 1322 writel(NS_STAT_SFBQE, card->membase + STAT); 1323 printk("nicstar%d: Small free buffer queue empty.\n", 1324 card->index); 1325 for (i = 0; i < card->sbnr.min; i++) 1326 { 1327 sb = dev_alloc_skb(NS_SMSKBSIZE); 1328 if (sb == NULL) 1329 { 1330 writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG); 1331 card->efbie = 0; 1332 break; 1333 } 1334 NS_SKB_CB(sb)->buf_type = BUF_SM; 1335 skb_queue_tail(&card->sbpool.queue, sb); 1336 skb_reserve(sb, NS_AAL0_HEADER); 1337 push_rxbufs(card, sb); 1338 } 1339 card->sbfqc = i; 1340 process_rsq(card); 1341 } 1342 1343 /* Large buffer queue empty */ 1344 if (stat_r & NS_STAT_LFBQE) 1345 { 1346 int i; 1347 struct sk_buff *lb; 1348 1349 writel(NS_STAT_LFBQE, card->membase + STAT); 1350 printk("nicstar%d: Large free buffer queue empty.\n", 1351 card->index); 1352 for (i = 0; i < card->lbnr.min; i++) 1353 { 1354 lb = dev_alloc_skb(NS_LGSKBSIZE); 1355 if (lb == NULL) 1356 { 1357 writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG); 1358 card->efbie = 0; 1359 break; 1360 } 1361 NS_SKB_CB(lb)->buf_type = BUF_LG; 1362 skb_queue_tail(&card->lbpool.queue, lb); 1363 skb_reserve(lb, NS_SMBUFSIZE); 1364 push_rxbufs(card, lb); 1365 } 1366 card->lbfqc = i; 1367 process_rsq(card); 1368 } 1369 1370 /* Receive Status Queue is 7/8 full */ 1371 if (stat_r & NS_STAT_RSQAF) 1372 { 1373 writel(NS_STAT_RSQAF, card->membase + STAT); 1374 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index); 1375 process_rsq(card); 1376 } 1377 1378 spin_unlock_irqrestore(&card->int_lock, flags); 1379 PRINTK("nicstar%d: end of interrupt service\n", card->index); 1380 return IRQ_HANDLED; 1381 } 1382 1383 1384 1385 static int ns_open(struct atm_vcc *vcc) 1386 { 1387 ns_dev *card; 1388 vc_map *vc; 1389 unsigned long tmpl, modl; 1390 int tcr, tcra; /* target cell rate, and absolute value */ 1391 int n = 0; /* Number of entries in the TST. Initialized to remove 1392 the compiler warning. */ 1393 u32 u32d[4]; 1394 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler 1395 warning. How I wish compilers were clever enough to 1396 tell which variables can truly be used 1397 uninitialized... */ 1398 int inuse; /* tx or rx vc already in use by another vcc */ 1399 short vpi = vcc->vpi; 1400 int vci = vcc->vci; 1401 1402 card = (ns_dev *) vcc->dev->dev_data; 1403 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int) vpi, vci); 1404 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) 1405 { 1406 PRINTK("nicstar%d: unsupported AAL.\n", card->index); 1407 return -EINVAL; 1408 } 1409 1410 vc = &(card->vcmap[vpi << card->vcibits | vci]); 1411 vcc->dev_data = vc; 1412 1413 inuse = 0; 1414 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx) 1415 inuse = 1; 1416 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx) 1417 inuse += 2; 1418 if (inuse) 1419 { 1420 printk("nicstar%d: %s vci already in use.\n", card->index, 1421 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx"); 1422 return -EINVAL; 1423 } 1424 1425 set_bit(ATM_VF_ADDR,&vcc->flags); 1426 1427 /* NOTE: You are not allowed to modify an open connection's QOS. To change 1428 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes 1429 needed to do that. */ 1430 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags)) 1431 { 1432 scq_info *scq; 1433 1434 set_bit(ATM_VF_PARTIAL,&vcc->flags); 1435 if (vcc->qos.txtp.traffic_class == ATM_CBR) 1436 { 1437 /* Check requested cell rate and availability of SCD */ 1438 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0 && 1439 vcc->qos.txtp.min_pcr == 0) 1440 { 1441 PRINTK("nicstar%d: trying to open a CBR vc with cell rate = 0 \n", 1442 card->index); 1443 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1444 clear_bit(ATM_VF_ADDR,&vcc->flags); 1445 return -EINVAL; 1446 } 1447 1448 tcr = atm_pcr_goal(&(vcc->qos.txtp)); 1449 tcra = tcr >= 0 ? tcr : -tcr; 1450 1451 PRINTK("nicstar%d: target cell rate = %d.\n", card->index, 1452 vcc->qos.txtp.max_pcr); 1453 1454 tmpl = (unsigned long)tcra * (unsigned long)NS_TST_NUM_ENTRIES; 1455 modl = tmpl % card->max_pcr; 1456 1457 n = (int)(tmpl / card->max_pcr); 1458 if (tcr > 0) 1459 { 1460 if (modl > 0) n++; 1461 } 1462 else if (tcr == 0) 1463 { 1464 if ((n = (card->tst_free_entries - NS_TST_RESERVED)) <= 0) 1465 { 1466 PRINTK("nicstar%d: no CBR bandwidth free.\n", card->index); 1467 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1468 clear_bit(ATM_VF_ADDR,&vcc->flags); 1469 return -EINVAL; 1470 } 1471 } 1472 1473 if (n == 0) 1474 { 1475 printk("nicstar%d: selected bandwidth < granularity.\n", card->index); 1476 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1477 clear_bit(ATM_VF_ADDR,&vcc->flags); 1478 return -EINVAL; 1479 } 1480 1481 if (n > (card->tst_free_entries - NS_TST_RESERVED)) 1482 { 1483 PRINTK("nicstar%d: not enough free CBR bandwidth.\n", card->index); 1484 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1485 clear_bit(ATM_VF_ADDR,&vcc->flags); 1486 return -EINVAL; 1487 } 1488 else 1489 card->tst_free_entries -= n; 1490 1491 XPRINTK("nicstar%d: writing %d tst entries.\n", card->index, n); 1492 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++) 1493 { 1494 if (card->scd2vc[frscdi] == NULL) 1495 { 1496 card->scd2vc[frscdi] = vc; 1497 break; 1498 } 1499 } 1500 if (frscdi == NS_FRSCD_NUM) 1501 { 1502 PRINTK("nicstar%d: no SCD available for CBR channel.\n", card->index); 1503 card->tst_free_entries += n; 1504 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1505 clear_bit(ATM_VF_ADDR,&vcc->flags); 1506 return -EBUSY; 1507 } 1508 1509 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE; 1510 1511 scq = get_scq(CBR_SCQSIZE, vc->cbr_scd); 1512 if (scq == NULL) 1513 { 1514 PRINTK("nicstar%d: can't get fixed rate SCQ.\n", card->index); 1515 card->scd2vc[frscdi] = NULL; 1516 card->tst_free_entries += n; 1517 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1518 clear_bit(ATM_VF_ADDR,&vcc->flags); 1519 return -ENOMEM; 1520 } 1521 vc->scq = scq; 1522 u32d[0] = (u32) virt_to_bus(scq->base); 1523 u32d[1] = (u32) 0x00000000; 1524 u32d[2] = (u32) 0xffffffff; 1525 u32d[3] = (u32) 0x00000000; 1526 ns_write_sram(card, vc->cbr_scd, u32d, 4); 1527 1528 fill_tst(card, n, vc); 1529 } 1530 else if (vcc->qos.txtp.traffic_class == ATM_UBR) 1531 { 1532 vc->cbr_scd = 0x00000000; 1533 vc->scq = card->scq0; 1534 } 1535 1536 if (vcc->qos.txtp.traffic_class != ATM_NONE) 1537 { 1538 vc->tx = 1; 1539 vc->tx_vcc = vcc; 1540 vc->tbd_count = 0; 1541 } 1542 if (vcc->qos.rxtp.traffic_class != ATM_NONE) 1543 { 1544 u32 status; 1545 1546 vc->rx = 1; 1547 vc->rx_vcc = vcc; 1548 vc->rx_iov = NULL; 1549 1550 /* Open the connection in hardware */ 1551 if (vcc->qos.aal == ATM_AAL5) 1552 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN; 1553 else /* vcc->qos.aal == ATM_AAL0 */ 1554 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN; 1555 #ifdef RCQ_SUPPORT 1556 status |= NS_RCTE_RAWCELLINTEN; 1557 #endif /* RCQ_SUPPORT */ 1558 ns_write_sram(card, NS_RCT + (vpi << card->vcibits | vci) * 1559 NS_RCT_ENTRY_SIZE, &status, 1); 1560 } 1561 1562 } 1563 1564 set_bit(ATM_VF_READY,&vcc->flags); 1565 return 0; 1566 } 1567 1568 1569 1570 static void ns_close(struct atm_vcc *vcc) 1571 { 1572 vc_map *vc; 1573 ns_dev *card; 1574 u32 data; 1575 int i; 1576 1577 vc = vcc->dev_data; 1578 card = vcc->dev->dev_data; 1579 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index, 1580 (int) vcc->vpi, vcc->vci); 1581 1582 clear_bit(ATM_VF_READY,&vcc->flags); 1583 1584 if (vcc->qos.rxtp.traffic_class != ATM_NONE) 1585 { 1586 u32 addr; 1587 unsigned long flags; 1588 1589 addr = NS_RCT + (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE; 1590 ns_grab_res_lock(card, flags); 1591 while(CMD_BUSY(card)); 1592 writel(NS_CMD_CLOSE_CONNECTION | addr << 2, card->membase + CMD); 1593 spin_unlock_irqrestore(&card->res_lock, flags); 1594 1595 vc->rx = 0; 1596 if (vc->rx_iov != NULL) 1597 { 1598 struct sk_buff *iovb; 1599 u32 stat; 1600 1601 stat = readl(card->membase + STAT); 1602 card->sbfqc = ns_stat_sfbqc_get(stat); 1603 card->lbfqc = ns_stat_lfbqc_get(stat); 1604 1605 PRINTK("nicstar%d: closing a VC with pending rx buffers.\n", 1606 card->index); 1607 iovb = vc->rx_iov; 1608 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, 1609 NS_SKB(iovb)->iovcnt); 1610 NS_SKB(iovb)->iovcnt = 0; 1611 NS_SKB(iovb)->vcc = NULL; 1612 ns_grab_int_lock(card, flags); 1613 recycle_iov_buf(card, iovb); 1614 spin_unlock_irqrestore(&card->int_lock, flags); 1615 vc->rx_iov = NULL; 1616 } 1617 } 1618 1619 if (vcc->qos.txtp.traffic_class != ATM_NONE) 1620 { 1621 vc->tx = 0; 1622 } 1623 1624 if (vcc->qos.txtp.traffic_class == ATM_CBR) 1625 { 1626 unsigned long flags; 1627 ns_scqe *scqep; 1628 scq_info *scq; 1629 1630 scq = vc->scq; 1631 1632 for (;;) 1633 { 1634 ns_grab_scq_lock(card, scq, flags); 1635 scqep = scq->next; 1636 if (scqep == scq->base) 1637 scqep = scq->last; 1638 else 1639 scqep--; 1640 if (scqep == scq->tail) 1641 { 1642 spin_unlock_irqrestore(&scq->lock, flags); 1643 break; 1644 } 1645 /* If the last entry is not a TSR, place one in the SCQ in order to 1646 be able to completely drain it and then close. */ 1647 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next) 1648 { 1649 ns_scqe tsr; 1650 u32 scdi, scqi; 1651 u32 data; 1652 int index; 1653 1654 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE); 1655 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE; 1656 scqi = scq->next - scq->base; 1657 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi); 1658 tsr.word_3 = 0x00000000; 1659 tsr.word_4 = 0x00000000; 1660 *scq->next = tsr; 1661 index = (int) scqi; 1662 scq->skb[index] = NULL; 1663 if (scq->next == scq->last) 1664 scq->next = scq->base; 1665 else 1666 scq->next++; 1667 data = (u32) virt_to_bus(scq->next); 1668 ns_write_sram(card, scq->scd, &data, 1); 1669 } 1670 spin_unlock_irqrestore(&scq->lock, flags); 1671 schedule(); 1672 } 1673 1674 /* Free all TST entries */ 1675 data = NS_TST_OPCODE_VARIABLE; 1676 for (i = 0; i < NS_TST_NUM_ENTRIES; i++) 1677 { 1678 if (card->tste2vc[i] == vc) 1679 { 1680 ns_write_sram(card, card->tst_addr + i, &data, 1); 1681 card->tste2vc[i] = NULL; 1682 card->tst_free_entries++; 1683 } 1684 } 1685 1686 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL; 1687 free_scq(vc->scq, vcc); 1688 } 1689 1690 /* remove all references to vcc before deleting it */ 1691 if (vcc->qos.txtp.traffic_class != ATM_NONE) 1692 { 1693 unsigned long flags; 1694 scq_info *scq = card->scq0; 1695 1696 ns_grab_scq_lock(card, scq, flags); 1697 1698 for(i = 0; i < scq->num_entries; i++) { 1699 if(scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) { 1700 ATM_SKB(scq->skb[i])->vcc = NULL; 1701 atm_return(vcc, scq->skb[i]->truesize); 1702 PRINTK("nicstar: deleted pending vcc mapping\n"); 1703 } 1704 } 1705 1706 spin_unlock_irqrestore(&scq->lock, flags); 1707 } 1708 1709 vcc->dev_data = NULL; 1710 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1711 clear_bit(ATM_VF_ADDR,&vcc->flags); 1712 1713 #ifdef RX_DEBUG 1714 { 1715 u32 stat, cfg; 1716 stat = readl(card->membase + STAT); 1717 cfg = readl(card->membase + CFG); 1718 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg); 1719 printk("TSQ: base = 0x%08X next = 0x%08X last = 0x%08X TSQT = 0x%08X \n", 1720 (u32) card->tsq.base, (u32) card->tsq.next,(u32) card->tsq.last, 1721 readl(card->membase + TSQT)); 1722 printk("RSQ: base = 0x%08X next = 0x%08X last = 0x%08X RSQT = 0x%08X \n", 1723 (u32) card->rsq.base, (u32) card->rsq.next,(u32) card->rsq.last, 1724 readl(card->membase + RSQT)); 1725 printk("Empty free buffer queue interrupt %s \n", 1726 card->efbie ? "enabled" : "disabled"); 1727 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n", 1728 ns_stat_sfbqc_get(stat), card->sbpool.count, 1729 ns_stat_lfbqc_get(stat), card->lbpool.count); 1730 printk("hbpool.count = %d iovpool.count = %d \n", 1731 card->hbpool.count, card->iovpool.count); 1732 } 1733 #endif /* RX_DEBUG */ 1734 } 1735 1736 1737 1738 static void fill_tst(ns_dev *card, int n, vc_map *vc) 1739 { 1740 u32 new_tst; 1741 unsigned long cl; 1742 int e, r; 1743 u32 data; 1744 1745 /* It would be very complicated to keep the two TSTs synchronized while 1746 assuring that writes are only made to the inactive TST. So, for now I 1747 will use only one TST. If problems occur, I will change this again */ 1748 1749 new_tst = card->tst_addr; 1750 1751 /* Fill procedure */ 1752 1753 for (e = 0; e < NS_TST_NUM_ENTRIES; e++) 1754 { 1755 if (card->tste2vc[e] == NULL) 1756 break; 1757 } 1758 if (e == NS_TST_NUM_ENTRIES) { 1759 printk("nicstar%d: No free TST entries found. \n", card->index); 1760 return; 1761 } 1762 1763 r = n; 1764 cl = NS_TST_NUM_ENTRIES; 1765 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd); 1766 1767 while (r > 0) 1768 { 1769 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL) 1770 { 1771 card->tste2vc[e] = vc; 1772 ns_write_sram(card, new_tst + e, &data, 1); 1773 cl -= NS_TST_NUM_ENTRIES; 1774 r--; 1775 } 1776 1777 if (++e == NS_TST_NUM_ENTRIES) { 1778 e = 0; 1779 } 1780 cl += n; 1781 } 1782 1783 /* End of fill procedure */ 1784 1785 data = ns_tste_make(NS_TST_OPCODE_END, new_tst); 1786 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1); 1787 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1); 1788 card->tst_addr = new_tst; 1789 } 1790 1791 1792 1793 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb) 1794 { 1795 ns_dev *card; 1796 vc_map *vc; 1797 scq_info *scq; 1798 unsigned long buflen; 1799 ns_scqe scqe; 1800 u32 flags; /* TBD flags, not CPU flags */ 1801 1802 card = vcc->dev->dev_data; 1803 TXPRINTK("nicstar%d: ns_send() called.\n", card->index); 1804 if ((vc = (vc_map *) vcc->dev_data) == NULL) 1805 { 1806 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n", card->index); 1807 atomic_inc(&vcc->stats->tx_err); 1808 dev_kfree_skb_any(skb); 1809 return -EINVAL; 1810 } 1811 1812 if (!vc->tx) 1813 { 1814 printk("nicstar%d: Trying to transmit on a non-tx VC.\n", card->index); 1815 atomic_inc(&vcc->stats->tx_err); 1816 dev_kfree_skb_any(skb); 1817 return -EINVAL; 1818 } 1819 1820 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) 1821 { 1822 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n", card->index); 1823 atomic_inc(&vcc->stats->tx_err); 1824 dev_kfree_skb_any(skb); 1825 return -EINVAL; 1826 } 1827 1828 if (skb_shinfo(skb)->nr_frags != 0) 1829 { 1830 printk("nicstar%d: No scatter-gather yet.\n", card->index); 1831 atomic_inc(&vcc->stats->tx_err); 1832 dev_kfree_skb_any(skb); 1833 return -EINVAL; 1834 } 1835 1836 ATM_SKB(skb)->vcc = vcc; 1837 1838 if (vcc->qos.aal == ATM_AAL5) 1839 { 1840 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */ 1841 flags = NS_TBD_AAL5; 1842 scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data)); 1843 scqe.word_3 = cpu_to_le32((u32) skb->len); 1844 scqe.word_4 = ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0, 1845 ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? 1 : 0); 1846 flags |= NS_TBD_EOPDU; 1847 } 1848 else /* (vcc->qos.aal == ATM_AAL0) */ 1849 { 1850 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */ 1851 flags = NS_TBD_AAL0; 1852 scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER); 1853 scqe.word_3 = cpu_to_le32(0x00000000); 1854 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */ 1855 flags |= NS_TBD_EOPDU; 1856 scqe.word_4 = cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK); 1857 /* Force the VPI/VCI to be the same as in VCC struct */ 1858 scqe.word_4 |= cpu_to_le32((((u32) vcc->vpi) << NS_TBD_VPI_SHIFT | 1859 ((u32) vcc->vci) << NS_TBD_VCI_SHIFT) & 1860 NS_TBD_VC_MASK); 1861 } 1862 1863 if (vcc->qos.txtp.traffic_class == ATM_CBR) 1864 { 1865 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen); 1866 scq = ((vc_map *) vcc->dev_data)->scq; 1867 } 1868 else 1869 { 1870 scqe.word_1 = ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen); 1871 scq = card->scq0; 1872 } 1873 1874 if (push_scqe(card, vc, scq, &scqe, skb) != 0) 1875 { 1876 atomic_inc(&vcc->stats->tx_err); 1877 dev_kfree_skb_any(skb); 1878 return -EIO; 1879 } 1880 atomic_inc(&vcc->stats->tx); 1881 1882 return 0; 1883 } 1884 1885 1886 1887 static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd, 1888 struct sk_buff *skb) 1889 { 1890 unsigned long flags; 1891 ns_scqe tsr; 1892 u32 scdi, scqi; 1893 int scq_is_vbr; 1894 u32 data; 1895 int index; 1896 1897 ns_grab_scq_lock(card, scq, flags); 1898 while (scq->tail == scq->next) 1899 { 1900 if (in_interrupt()) { 1901 spin_unlock_irqrestore(&scq->lock, flags); 1902 printk("nicstar%d: Error pushing TBD.\n", card->index); 1903 return 1; 1904 } 1905 1906 scq->full = 1; 1907 spin_unlock_irqrestore(&scq->lock, flags); 1908 interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT); 1909 ns_grab_scq_lock(card, scq, flags); 1910 1911 if (scq->full) { 1912 spin_unlock_irqrestore(&scq->lock, flags); 1913 printk("nicstar%d: Timeout pushing TBD.\n", card->index); 1914 return 1; 1915 } 1916 } 1917 *scq->next = *tbd; 1918 index = (int) (scq->next - scq->base); 1919 scq->skb[index] = skb; 1920 XPRINTK("nicstar%d: sending skb at 0x%x (pos %d).\n", 1921 card->index, (u32) skb, index); 1922 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n", 1923 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2), 1924 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4), 1925 (u32) scq->next); 1926 if (scq->next == scq->last) 1927 scq->next = scq->base; 1928 else 1929 scq->next++; 1930 1931 vc->tbd_count++; 1932 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES) 1933 { 1934 scq->tbd_count++; 1935 scq_is_vbr = 1; 1936 } 1937 else 1938 scq_is_vbr = 0; 1939 1940 if (vc->tbd_count >= MAX_TBD_PER_VC || scq->tbd_count >= MAX_TBD_PER_SCQ) 1941 { 1942 int has_run = 0; 1943 1944 while (scq->tail == scq->next) 1945 { 1946 if (in_interrupt()) { 1947 data = (u32) virt_to_bus(scq->next); 1948 ns_write_sram(card, scq->scd, &data, 1); 1949 spin_unlock_irqrestore(&scq->lock, flags); 1950 printk("nicstar%d: Error pushing TSR.\n", card->index); 1951 return 0; 1952 } 1953 1954 scq->full = 1; 1955 if (has_run++) break; 1956 spin_unlock_irqrestore(&scq->lock, flags); 1957 interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT); 1958 ns_grab_scq_lock(card, scq, flags); 1959 } 1960 1961 if (!scq->full) 1962 { 1963 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE); 1964 if (scq_is_vbr) 1965 scdi = NS_TSR_SCDISVBR; 1966 else 1967 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE; 1968 scqi = scq->next - scq->base; 1969 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi); 1970 tsr.word_3 = 0x00000000; 1971 tsr.word_4 = 0x00000000; 1972 1973 *scq->next = tsr; 1974 index = (int) scqi; 1975 scq->skb[index] = NULL; 1976 XPRINTK("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n", 1977 card->index, le32_to_cpu(tsr.word_1), le32_to_cpu(tsr.word_2), 1978 le32_to_cpu(tsr.word_3), le32_to_cpu(tsr.word_4), 1979 (u32) scq->next); 1980 if (scq->next == scq->last) 1981 scq->next = scq->base; 1982 else 1983 scq->next++; 1984 vc->tbd_count = 0; 1985 scq->tbd_count = 0; 1986 } 1987 else 1988 PRINTK("nicstar%d: Timeout pushing TSR.\n", card->index); 1989 } 1990 data = (u32) virt_to_bus(scq->next); 1991 ns_write_sram(card, scq->scd, &data, 1); 1992 1993 spin_unlock_irqrestore(&scq->lock, flags); 1994 1995 return 0; 1996 } 1997 1998 1999 2000 static void process_tsq(ns_dev *card) 2001 { 2002 u32 scdi; 2003 scq_info *scq; 2004 ns_tsi *previous = NULL, *one_ahead, *two_ahead; 2005 int serviced_entries; /* flag indicating at least on entry was serviced */ 2006 2007 serviced_entries = 0; 2008 2009 if (card->tsq.next == card->tsq.last) 2010 one_ahead = card->tsq.base; 2011 else 2012 one_ahead = card->tsq.next + 1; 2013 2014 if (one_ahead == card->tsq.last) 2015 two_ahead = card->tsq.base; 2016 else 2017 two_ahead = one_ahead + 1; 2018 2019 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) || 2020 !ns_tsi_isempty(two_ahead)) 2021 /* At most two empty, as stated in the 77201 errata */ 2022 { 2023 serviced_entries = 1; 2024 2025 /* Skip the one or two possible empty entries */ 2026 while (ns_tsi_isempty(card->tsq.next)) { 2027 if (card->tsq.next == card->tsq.last) 2028 card->tsq.next = card->tsq.base; 2029 else 2030 card->tsq.next++; 2031 } 2032 2033 if (!ns_tsi_tmrof(card->tsq.next)) 2034 { 2035 scdi = ns_tsi_getscdindex(card->tsq.next); 2036 if (scdi == NS_TSI_SCDISVBR) 2037 scq = card->scq0; 2038 else 2039 { 2040 if (card->scd2vc[scdi] == NULL) 2041 { 2042 printk("nicstar%d: could not find VC from SCD index.\n", 2043 card->index); 2044 ns_tsi_init(card->tsq.next); 2045 return; 2046 } 2047 scq = card->scd2vc[scdi]->scq; 2048 } 2049 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next)); 2050 scq->full = 0; 2051 wake_up_interruptible(&(scq->scqfull_waitq)); 2052 } 2053 2054 ns_tsi_init(card->tsq.next); 2055 previous = card->tsq.next; 2056 if (card->tsq.next == card->tsq.last) 2057 card->tsq.next = card->tsq.base; 2058 else 2059 card->tsq.next++; 2060 2061 if (card->tsq.next == card->tsq.last) 2062 one_ahead = card->tsq.base; 2063 else 2064 one_ahead = card->tsq.next + 1; 2065 2066 if (one_ahead == card->tsq.last) 2067 two_ahead = card->tsq.base; 2068 else 2069 two_ahead = one_ahead + 1; 2070 } 2071 2072 if (serviced_entries) { 2073 writel((((u32) previous) - ((u32) card->tsq.base)), 2074 card->membase + TSQH); 2075 } 2076 } 2077 2078 2079 2080 static void drain_scq(ns_dev *card, scq_info *scq, int pos) 2081 { 2082 struct atm_vcc *vcc; 2083 struct sk_buff *skb; 2084 int i; 2085 unsigned long flags; 2086 2087 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%x, pos %d.\n", 2088 card->index, (u32) scq, pos); 2089 if (pos >= scq->num_entries) 2090 { 2091 printk("nicstar%d: Bad index on drain_scq().\n", card->index); 2092 return; 2093 } 2094 2095 ns_grab_scq_lock(card, scq, flags); 2096 i = (int) (scq->tail - scq->base); 2097 if (++i == scq->num_entries) 2098 i = 0; 2099 while (i != pos) 2100 { 2101 skb = scq->skb[i]; 2102 XPRINTK("nicstar%d: freeing skb at 0x%x (index %d).\n", 2103 card->index, (u32) skb, i); 2104 if (skb != NULL) 2105 { 2106 vcc = ATM_SKB(skb)->vcc; 2107 if (vcc && vcc->pop != NULL) { 2108 vcc->pop(vcc, skb); 2109 } else { 2110 dev_kfree_skb_irq(skb); 2111 } 2112 scq->skb[i] = NULL; 2113 } 2114 if (++i == scq->num_entries) 2115 i = 0; 2116 } 2117 scq->tail = scq->base + pos; 2118 spin_unlock_irqrestore(&scq->lock, flags); 2119 } 2120 2121 2122 2123 static void process_rsq(ns_dev *card) 2124 { 2125 ns_rsqe *previous; 2126 2127 if (!ns_rsqe_valid(card->rsq.next)) 2128 return; 2129 do { 2130 dequeue_rx(card, card->rsq.next); 2131 ns_rsqe_init(card->rsq.next); 2132 previous = card->rsq.next; 2133 if (card->rsq.next == card->rsq.last) 2134 card->rsq.next = card->rsq.base; 2135 else 2136 card->rsq.next++; 2137 } while (ns_rsqe_valid(card->rsq.next)); 2138 writel((((u32) previous) - ((u32) card->rsq.base)), 2139 card->membase + RSQH); 2140 } 2141 2142 2143 2144 static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe) 2145 { 2146 u32 vpi, vci; 2147 vc_map *vc; 2148 struct sk_buff *iovb; 2149 struct iovec *iov; 2150 struct atm_vcc *vcc; 2151 struct sk_buff *skb; 2152 unsigned short aal5_len; 2153 int len; 2154 u32 stat; 2155 2156 stat = readl(card->membase + STAT); 2157 card->sbfqc = ns_stat_sfbqc_get(stat); 2158 card->lbfqc = ns_stat_lfbqc_get(stat); 2159 2160 skb = (struct sk_buff *) le32_to_cpu(rsqe->buffer_handle); 2161 vpi = ns_rsqe_vpi(rsqe); 2162 vci = ns_rsqe_vci(rsqe); 2163 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits) 2164 { 2165 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n", 2166 card->index, vpi, vci); 2167 recycle_rx_buf(card, skb); 2168 return; 2169 } 2170 2171 vc = &(card->vcmap[vpi << card->vcibits | vci]); 2172 if (!vc->rx) 2173 { 2174 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n", 2175 card->index, vpi, vci); 2176 recycle_rx_buf(card, skb); 2177 return; 2178 } 2179 2180 vcc = vc->rx_vcc; 2181 2182 if (vcc->qos.aal == ATM_AAL0) 2183 { 2184 struct sk_buff *sb; 2185 unsigned char *cell; 2186 int i; 2187 2188 cell = skb->data; 2189 for (i = ns_rsqe_cellcount(rsqe); i; i--) 2190 { 2191 if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL) 2192 { 2193 printk("nicstar%d: Can't allocate buffers for aal0.\n", 2194 card->index); 2195 atomic_add(i,&vcc->stats->rx_drop); 2196 break; 2197 } 2198 if (!atm_charge(vcc, sb->truesize)) 2199 { 2200 RXPRINTK("nicstar%d: atm_charge() dropped aal0 packets.\n", 2201 card->index); 2202 atomic_add(i-1,&vcc->stats->rx_drop); /* already increased by 1 */ 2203 dev_kfree_skb_any(sb); 2204 break; 2205 } 2206 /* Rebuild the header */ 2207 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 | 2208 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000); 2209 if (i == 1 && ns_rsqe_eopdu(rsqe)) 2210 *((u32 *) sb->data) |= 0x00000002; 2211 skb_put(sb, NS_AAL0_HEADER); 2212 memcpy(sb->tail, cell, ATM_CELL_PAYLOAD); 2213 skb_put(sb, ATM_CELL_PAYLOAD); 2214 ATM_SKB(sb)->vcc = vcc; 2215 __net_timestamp(sb); 2216 vcc->push(vcc, sb); 2217 atomic_inc(&vcc->stats->rx); 2218 cell += ATM_CELL_PAYLOAD; 2219 } 2220 2221 recycle_rx_buf(card, skb); 2222 return; 2223 } 2224 2225 /* To reach this point, the AAL layer can only be AAL5 */ 2226 2227 if ((iovb = vc->rx_iov) == NULL) 2228 { 2229 iovb = skb_dequeue(&(card->iovpool.queue)); 2230 if (iovb == NULL) /* No buffers in the queue */ 2231 { 2232 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC); 2233 if (iovb == NULL) 2234 { 2235 printk("nicstar%d: Out of iovec buffers.\n", card->index); 2236 atomic_inc(&vcc->stats->rx_drop); 2237 recycle_rx_buf(card, skb); 2238 return; 2239 } 2240 NS_SKB_CB(iovb)->buf_type = BUF_NONE; 2241 } 2242 else 2243 if (--card->iovpool.count < card->iovnr.min) 2244 { 2245 struct sk_buff *new_iovb; 2246 if ((new_iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL) 2247 { 2248 NS_SKB_CB(iovb)->buf_type = BUF_NONE; 2249 skb_queue_tail(&card->iovpool.queue, new_iovb); 2250 card->iovpool.count++; 2251 } 2252 } 2253 vc->rx_iov = iovb; 2254 NS_SKB(iovb)->iovcnt = 0; 2255 iovb->len = 0; 2256 iovb->tail = iovb->data = iovb->head; 2257 NS_SKB(iovb)->vcc = vcc; 2258 /* IMPORTANT: a pointer to the sk_buff containing the small or large 2259 buffer is stored as iovec base, NOT a pointer to the 2260 small or large buffer itself. */ 2261 } 2262 else if (NS_SKB(iovb)->iovcnt >= NS_MAX_IOVECS) 2263 { 2264 printk("nicstar%d: received too big AAL5 SDU.\n", card->index); 2265 atomic_inc(&vcc->stats->rx_err); 2266 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, NS_MAX_IOVECS); 2267 NS_SKB(iovb)->iovcnt = 0; 2268 iovb->len = 0; 2269 iovb->tail = iovb->data = iovb->head; 2270 NS_SKB(iovb)->vcc = vcc; 2271 } 2272 iov = &((struct iovec *) iovb->data)[NS_SKB(iovb)->iovcnt++]; 2273 iov->iov_base = (void *) skb; 2274 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48; 2275 iovb->len += iov->iov_len; 2276 2277 if (NS_SKB(iovb)->iovcnt == 1) 2278 { 2279 if (NS_SKB_CB(skb)->buf_type != BUF_SM) 2280 { 2281 printk("nicstar%d: Expected a small buffer, and this is not one.\n", 2282 card->index); 2283 which_list(card, skb); 2284 atomic_inc(&vcc->stats->rx_err); 2285 recycle_rx_buf(card, skb); 2286 vc->rx_iov = NULL; 2287 recycle_iov_buf(card, iovb); 2288 return; 2289 } 2290 } 2291 else /* NS_SKB(iovb)->iovcnt >= 2 */ 2292 { 2293 if (NS_SKB_CB(skb)->buf_type != BUF_LG) 2294 { 2295 printk("nicstar%d: Expected a large buffer, and this is not one.\n", 2296 card->index); 2297 which_list(card, skb); 2298 atomic_inc(&vcc->stats->rx_err); 2299 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, 2300 NS_SKB(iovb)->iovcnt); 2301 vc->rx_iov = NULL; 2302 recycle_iov_buf(card, iovb); 2303 return; 2304 } 2305 } 2306 2307 if (ns_rsqe_eopdu(rsqe)) 2308 { 2309 /* This works correctly regardless of the endianness of the host */ 2310 unsigned char *L1L2 = (unsigned char *)((u32)skb->data + 2311 iov->iov_len - 6); 2312 aal5_len = L1L2[0] << 8 | L1L2[1]; 2313 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len; 2314 if (ns_rsqe_crcerr(rsqe) || 2315 len + 8 > iovb->len || len + (47 + 8) < iovb->len) 2316 { 2317 printk("nicstar%d: AAL5 CRC error", card->index); 2318 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len) 2319 printk(" - PDU size mismatch.\n"); 2320 else 2321 printk(".\n"); 2322 atomic_inc(&vcc->stats->rx_err); 2323 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, 2324 NS_SKB(iovb)->iovcnt); 2325 vc->rx_iov = NULL; 2326 recycle_iov_buf(card, iovb); 2327 return; 2328 } 2329 2330 /* By this point we (hopefully) have a complete SDU without errors. */ 2331 2332 if (NS_SKB(iovb)->iovcnt == 1) /* Just a small buffer */ 2333 { 2334 /* skb points to a small buffer */ 2335 if (!atm_charge(vcc, skb->truesize)) 2336 { 2337 push_rxbufs(card, skb); 2338 atomic_inc(&vcc->stats->rx_drop); 2339 } 2340 else 2341 { 2342 skb_put(skb, len); 2343 dequeue_sm_buf(card, skb); 2344 #ifdef NS_USE_DESTRUCTORS 2345 skb->destructor = ns_sb_destructor; 2346 #endif /* NS_USE_DESTRUCTORS */ 2347 ATM_SKB(skb)->vcc = vcc; 2348 __net_timestamp(skb); 2349 vcc->push(vcc, skb); 2350 atomic_inc(&vcc->stats->rx); 2351 } 2352 } 2353 else if (NS_SKB(iovb)->iovcnt == 2) /* One small plus one large buffer */ 2354 { 2355 struct sk_buff *sb; 2356 2357 sb = (struct sk_buff *) (iov - 1)->iov_base; 2358 /* skb points to a large buffer */ 2359 2360 if (len <= NS_SMBUFSIZE) 2361 { 2362 if (!atm_charge(vcc, sb->truesize)) 2363 { 2364 push_rxbufs(card, sb); 2365 atomic_inc(&vcc->stats->rx_drop); 2366 } 2367 else 2368 { 2369 skb_put(sb, len); 2370 dequeue_sm_buf(card, sb); 2371 #ifdef NS_USE_DESTRUCTORS 2372 sb->destructor = ns_sb_destructor; 2373 #endif /* NS_USE_DESTRUCTORS */ 2374 ATM_SKB(sb)->vcc = vcc; 2375 __net_timestamp(sb); 2376 vcc->push(vcc, sb); 2377 atomic_inc(&vcc->stats->rx); 2378 } 2379 2380 push_rxbufs(card, skb); 2381 2382 } 2383 else /* len > NS_SMBUFSIZE, the usual case */ 2384 { 2385 if (!atm_charge(vcc, skb->truesize)) 2386 { 2387 push_rxbufs(card, skb); 2388 atomic_inc(&vcc->stats->rx_drop); 2389 } 2390 else 2391 { 2392 dequeue_lg_buf(card, skb); 2393 #ifdef NS_USE_DESTRUCTORS 2394 skb->destructor = ns_lb_destructor; 2395 #endif /* NS_USE_DESTRUCTORS */ 2396 skb_push(skb, NS_SMBUFSIZE); 2397 memcpy(skb->data, sb->data, NS_SMBUFSIZE); 2398 skb_put(skb, len - NS_SMBUFSIZE); 2399 ATM_SKB(skb)->vcc = vcc; 2400 __net_timestamp(skb); 2401 vcc->push(vcc, skb); 2402 atomic_inc(&vcc->stats->rx); 2403 } 2404 2405 push_rxbufs(card, sb); 2406 2407 } 2408 2409 } 2410 else /* Must push a huge buffer */ 2411 { 2412 struct sk_buff *hb, *sb, *lb; 2413 int remaining, tocopy; 2414 int j; 2415 2416 hb = skb_dequeue(&(card->hbpool.queue)); 2417 if (hb == NULL) /* No buffers in the queue */ 2418 { 2419 2420 hb = dev_alloc_skb(NS_HBUFSIZE); 2421 if (hb == NULL) 2422 { 2423 printk("nicstar%d: Out of huge buffers.\n", card->index); 2424 atomic_inc(&vcc->stats->rx_drop); 2425 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, 2426 NS_SKB(iovb)->iovcnt); 2427 vc->rx_iov = NULL; 2428 recycle_iov_buf(card, iovb); 2429 return; 2430 } 2431 else if (card->hbpool.count < card->hbnr.min) 2432 { 2433 struct sk_buff *new_hb; 2434 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL) 2435 { 2436 skb_queue_tail(&card->hbpool.queue, new_hb); 2437 card->hbpool.count++; 2438 } 2439 } 2440 NS_SKB_CB(hb)->buf_type = BUF_NONE; 2441 } 2442 else 2443 if (--card->hbpool.count < card->hbnr.min) 2444 { 2445 struct sk_buff *new_hb; 2446 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL) 2447 { 2448 NS_SKB_CB(new_hb)->buf_type = BUF_NONE; 2449 skb_queue_tail(&card->hbpool.queue, new_hb); 2450 card->hbpool.count++; 2451 } 2452 if (card->hbpool.count < card->hbnr.min) 2453 { 2454 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL) 2455 { 2456 NS_SKB_CB(new_hb)->buf_type = BUF_NONE; 2457 skb_queue_tail(&card->hbpool.queue, new_hb); 2458 card->hbpool.count++; 2459 } 2460 } 2461 } 2462 2463 iov = (struct iovec *) iovb->data; 2464 2465 if (!atm_charge(vcc, hb->truesize)) 2466 { 2467 recycle_iovec_rx_bufs(card, iov, NS_SKB(iovb)->iovcnt); 2468 if (card->hbpool.count < card->hbnr.max) 2469 { 2470 skb_queue_tail(&card->hbpool.queue, hb); 2471 card->hbpool.count++; 2472 } 2473 else 2474 dev_kfree_skb_any(hb); 2475 atomic_inc(&vcc->stats->rx_drop); 2476 } 2477 else 2478 { 2479 /* Copy the small buffer to the huge buffer */ 2480 sb = (struct sk_buff *) iov->iov_base; 2481 memcpy(hb->data, sb->data, iov->iov_len); 2482 skb_put(hb, iov->iov_len); 2483 remaining = len - iov->iov_len; 2484 iov++; 2485 /* Free the small buffer */ 2486 push_rxbufs(card, sb); 2487 2488 /* Copy all large buffers to the huge buffer and free them */ 2489 for (j = 1; j < NS_SKB(iovb)->iovcnt; j++) 2490 { 2491 lb = (struct sk_buff *) iov->iov_base; 2492 tocopy = min_t(int, remaining, iov->iov_len); 2493 memcpy(hb->tail, lb->data, tocopy); 2494 skb_put(hb, tocopy); 2495 iov++; 2496 remaining -= tocopy; 2497 push_rxbufs(card, lb); 2498 } 2499 #ifdef EXTRA_DEBUG 2500 if (remaining != 0 || hb->len != len) 2501 printk("nicstar%d: Huge buffer len mismatch.\n", card->index); 2502 #endif /* EXTRA_DEBUG */ 2503 ATM_SKB(hb)->vcc = vcc; 2504 #ifdef NS_USE_DESTRUCTORS 2505 hb->destructor = ns_hb_destructor; 2506 #endif /* NS_USE_DESTRUCTORS */ 2507 __net_timestamp(hb); 2508 vcc->push(vcc, hb); 2509 atomic_inc(&vcc->stats->rx); 2510 } 2511 } 2512 2513 vc->rx_iov = NULL; 2514 recycle_iov_buf(card, iovb); 2515 } 2516 2517 } 2518 2519 2520 2521 #ifdef NS_USE_DESTRUCTORS 2522 2523 static void ns_sb_destructor(struct sk_buff *sb) 2524 { 2525 ns_dev *card; 2526 u32 stat; 2527 2528 card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data; 2529 stat = readl(card->membase + STAT); 2530 card->sbfqc = ns_stat_sfbqc_get(stat); 2531 card->lbfqc = ns_stat_lfbqc_get(stat); 2532 2533 do 2534 { 2535 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL); 2536 if (sb == NULL) 2537 break; 2538 NS_SKB_CB(sb)->buf_type = BUF_SM; 2539 skb_queue_tail(&card->sbpool.queue, sb); 2540 skb_reserve(sb, NS_AAL0_HEADER); 2541 push_rxbufs(card, sb); 2542 } while (card->sbfqc < card->sbnr.min); 2543 } 2544 2545 2546 2547 static void ns_lb_destructor(struct sk_buff *lb) 2548 { 2549 ns_dev *card; 2550 u32 stat; 2551 2552 card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data; 2553 stat = readl(card->membase + STAT); 2554 card->sbfqc = ns_stat_sfbqc_get(stat); 2555 card->lbfqc = ns_stat_lfbqc_get(stat); 2556 2557 do 2558 { 2559 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL); 2560 if (lb == NULL) 2561 break; 2562 NS_SKB_CB(lb)->buf_type = BUF_LG; 2563 skb_queue_tail(&card->lbpool.queue, lb); 2564 skb_reserve(lb, NS_SMBUFSIZE); 2565 push_rxbufs(card, lb); 2566 } while (card->lbfqc < card->lbnr.min); 2567 } 2568 2569 2570 2571 static void ns_hb_destructor(struct sk_buff *hb) 2572 { 2573 ns_dev *card; 2574 2575 card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data; 2576 2577 while (card->hbpool.count < card->hbnr.init) 2578 { 2579 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL); 2580 if (hb == NULL) 2581 break; 2582 NS_SKB_CB(hb)->buf_type = BUF_NONE; 2583 skb_queue_tail(&card->hbpool.queue, hb); 2584 card->hbpool.count++; 2585 } 2586 } 2587 2588 #endif /* NS_USE_DESTRUCTORS */ 2589 2590 2591 static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb) 2592 { 2593 struct ns_skb_cb *cb = NS_SKB_CB(skb); 2594 2595 if (unlikely(cb->buf_type == BUF_NONE)) { 2596 printk("nicstar%d: What kind of rx buffer is this?\n", card->index); 2597 dev_kfree_skb_any(skb); 2598 } else 2599 push_rxbufs(card, skb); 2600 } 2601 2602 2603 static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count) 2604 { 2605 while (count-- > 0) 2606 recycle_rx_buf(card, (struct sk_buff *) (iov++)->iov_base); 2607 } 2608 2609 2610 static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb) 2611 { 2612 if (card->iovpool.count < card->iovnr.max) 2613 { 2614 skb_queue_tail(&card->iovpool.queue, iovb); 2615 card->iovpool.count++; 2616 } 2617 else 2618 dev_kfree_skb_any(iovb); 2619 } 2620 2621 2622 2623 static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb) 2624 { 2625 skb_unlink(sb, &card->sbpool.queue); 2626 #ifdef NS_USE_DESTRUCTORS 2627 if (card->sbfqc < card->sbnr.min) 2628 #else 2629 if (card->sbfqc < card->sbnr.init) 2630 { 2631 struct sk_buff *new_sb; 2632 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) 2633 { 2634 NS_SKB_CB(new_sb)->buf_type = BUF_SM; 2635 skb_queue_tail(&card->sbpool.queue, new_sb); 2636 skb_reserve(new_sb, NS_AAL0_HEADER); 2637 push_rxbufs(card, new_sb); 2638 } 2639 } 2640 if (card->sbfqc < card->sbnr.init) 2641 #endif /* NS_USE_DESTRUCTORS */ 2642 { 2643 struct sk_buff *new_sb; 2644 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) 2645 { 2646 NS_SKB_CB(new_sb)->buf_type = BUF_SM; 2647 skb_queue_tail(&card->sbpool.queue, new_sb); 2648 skb_reserve(new_sb, NS_AAL0_HEADER); 2649 push_rxbufs(card, new_sb); 2650 } 2651 } 2652 } 2653 2654 2655 2656 static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb) 2657 { 2658 skb_unlink(lb, &card->lbpool.queue); 2659 #ifdef NS_USE_DESTRUCTORS 2660 if (card->lbfqc < card->lbnr.min) 2661 #else 2662 if (card->lbfqc < card->lbnr.init) 2663 { 2664 struct sk_buff *new_lb; 2665 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) 2666 { 2667 NS_SKB_CB(new_lb)->buf_type = BUF_LG; 2668 skb_queue_tail(&card->lbpool.queue, new_lb); 2669 skb_reserve(new_lb, NS_SMBUFSIZE); 2670 push_rxbufs(card, new_lb); 2671 } 2672 } 2673 if (card->lbfqc < card->lbnr.init) 2674 #endif /* NS_USE_DESTRUCTORS */ 2675 { 2676 struct sk_buff *new_lb; 2677 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) 2678 { 2679 NS_SKB_CB(new_lb)->buf_type = BUF_LG; 2680 skb_queue_tail(&card->lbpool.queue, new_lb); 2681 skb_reserve(new_lb, NS_SMBUFSIZE); 2682 push_rxbufs(card, new_lb); 2683 } 2684 } 2685 } 2686 2687 2688 2689 static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page) 2690 { 2691 u32 stat; 2692 ns_dev *card; 2693 int left; 2694 2695 left = (int) *pos; 2696 card = (ns_dev *) dev->dev_data; 2697 stat = readl(card->membase + STAT); 2698 if (!left--) 2699 return sprintf(page, "Pool count min init max \n"); 2700 if (!left--) 2701 return sprintf(page, "Small %5d %5d %5d %5d \n", 2702 ns_stat_sfbqc_get(stat), card->sbnr.min, card->sbnr.init, 2703 card->sbnr.max); 2704 if (!left--) 2705 return sprintf(page, "Large %5d %5d %5d %5d \n", 2706 ns_stat_lfbqc_get(stat), card->lbnr.min, card->lbnr.init, 2707 card->lbnr.max); 2708 if (!left--) 2709 return sprintf(page, "Huge %5d %5d %5d %5d \n", card->hbpool.count, 2710 card->hbnr.min, card->hbnr.init, card->hbnr.max); 2711 if (!left--) 2712 return sprintf(page, "Iovec %5d %5d %5d %5d \n", card->iovpool.count, 2713 card->iovnr.min, card->iovnr.init, card->iovnr.max); 2714 if (!left--) 2715 { 2716 int retval; 2717 retval = sprintf(page, "Interrupt counter: %u \n", card->intcnt); 2718 card->intcnt = 0; 2719 return retval; 2720 } 2721 #if 0 2722 /* Dump 25.6 Mbps PHY registers */ 2723 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it 2724 here just in case it's needed for debugging. */ 2725 if (card->max_pcr == ATM_25_PCR && !left--) 2726 { 2727 u32 phy_regs[4]; 2728 u32 i; 2729 2730 for (i = 0; i < 4; i++) 2731 { 2732 while (CMD_BUSY(card)); 2733 writel(NS_CMD_READ_UTILITY | 0x00000200 | i, card->membase + CMD); 2734 while (CMD_BUSY(card)); 2735 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF; 2736 } 2737 2738 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n", 2739 phy_regs[0], phy_regs[1], phy_regs[2], phy_regs[3]); 2740 } 2741 #endif /* 0 - Dump 25.6 Mbps PHY registers */ 2742 #if 0 2743 /* Dump TST */ 2744 if (left-- < NS_TST_NUM_ENTRIES) 2745 { 2746 if (card->tste2vc[left + 1] == NULL) 2747 return sprintf(page, "%5d - VBR/UBR \n", left + 1); 2748 else 2749 return sprintf(page, "%5d - %d %d \n", left + 1, 2750 card->tste2vc[left + 1]->tx_vcc->vpi, 2751 card->tste2vc[left + 1]->tx_vcc->vci); 2752 } 2753 #endif /* 0 */ 2754 return 0; 2755 } 2756 2757 2758 2759 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg) 2760 { 2761 ns_dev *card; 2762 pool_levels pl; 2763 int btype; 2764 unsigned long flags; 2765 2766 card = dev->dev_data; 2767 switch (cmd) 2768 { 2769 case NS_GETPSTAT: 2770 if (get_user(pl.buftype, &((pool_levels __user *) arg)->buftype)) 2771 return -EFAULT; 2772 switch (pl.buftype) 2773 { 2774 case NS_BUFTYPE_SMALL: 2775 pl.count = ns_stat_sfbqc_get(readl(card->membase + STAT)); 2776 pl.level.min = card->sbnr.min; 2777 pl.level.init = card->sbnr.init; 2778 pl.level.max = card->sbnr.max; 2779 break; 2780 2781 case NS_BUFTYPE_LARGE: 2782 pl.count = ns_stat_lfbqc_get(readl(card->membase + STAT)); 2783 pl.level.min = card->lbnr.min; 2784 pl.level.init = card->lbnr.init; 2785 pl.level.max = card->lbnr.max; 2786 break; 2787 2788 case NS_BUFTYPE_HUGE: 2789 pl.count = card->hbpool.count; 2790 pl.level.min = card->hbnr.min; 2791 pl.level.init = card->hbnr.init; 2792 pl.level.max = card->hbnr.max; 2793 break; 2794 2795 case NS_BUFTYPE_IOVEC: 2796 pl.count = card->iovpool.count; 2797 pl.level.min = card->iovnr.min; 2798 pl.level.init = card->iovnr.init; 2799 pl.level.max = card->iovnr.max; 2800 break; 2801 2802 default: 2803 return -ENOIOCTLCMD; 2804 2805 } 2806 if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl))) 2807 return (sizeof(pl)); 2808 else 2809 return -EFAULT; 2810 2811 case NS_SETBUFLEV: 2812 if (!capable(CAP_NET_ADMIN)) 2813 return -EPERM; 2814 if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl))) 2815 return -EFAULT; 2816 if (pl.level.min >= pl.level.init || pl.level.init >= pl.level.max) 2817 return -EINVAL; 2818 if (pl.level.min == 0) 2819 return -EINVAL; 2820 switch (pl.buftype) 2821 { 2822 case NS_BUFTYPE_SMALL: 2823 if (pl.level.max > TOP_SB) 2824 return -EINVAL; 2825 card->sbnr.min = pl.level.min; 2826 card->sbnr.init = pl.level.init; 2827 card->sbnr.max = pl.level.max; 2828 break; 2829 2830 case NS_BUFTYPE_LARGE: 2831 if (pl.level.max > TOP_LB) 2832 return -EINVAL; 2833 card->lbnr.min = pl.level.min; 2834 card->lbnr.init = pl.level.init; 2835 card->lbnr.max = pl.level.max; 2836 break; 2837 2838 case NS_BUFTYPE_HUGE: 2839 if (pl.level.max > TOP_HB) 2840 return -EINVAL; 2841 card->hbnr.min = pl.level.min; 2842 card->hbnr.init = pl.level.init; 2843 card->hbnr.max = pl.level.max; 2844 break; 2845 2846 case NS_BUFTYPE_IOVEC: 2847 if (pl.level.max > TOP_IOVB) 2848 return -EINVAL; 2849 card->iovnr.min = pl.level.min; 2850 card->iovnr.init = pl.level.init; 2851 card->iovnr.max = pl.level.max; 2852 break; 2853 2854 default: 2855 return -EINVAL; 2856 2857 } 2858 return 0; 2859 2860 case NS_ADJBUFLEV: 2861 if (!capable(CAP_NET_ADMIN)) 2862 return -EPERM; 2863 btype = (int) arg; /* an int is the same size as a pointer */ 2864 switch (btype) 2865 { 2866 case NS_BUFTYPE_SMALL: 2867 while (card->sbfqc < card->sbnr.init) 2868 { 2869 struct sk_buff *sb; 2870 2871 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL); 2872 if (sb == NULL) 2873 return -ENOMEM; 2874 NS_SKB_CB(sb)->buf_type = BUF_SM; 2875 skb_queue_tail(&card->sbpool.queue, sb); 2876 skb_reserve(sb, NS_AAL0_HEADER); 2877 push_rxbufs(card, sb); 2878 } 2879 break; 2880 2881 case NS_BUFTYPE_LARGE: 2882 while (card->lbfqc < card->lbnr.init) 2883 { 2884 struct sk_buff *lb; 2885 2886 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL); 2887 if (lb == NULL) 2888 return -ENOMEM; 2889 NS_SKB_CB(lb)->buf_type = BUF_LG; 2890 skb_queue_tail(&card->lbpool.queue, lb); 2891 skb_reserve(lb, NS_SMBUFSIZE); 2892 push_rxbufs(card, lb); 2893 } 2894 break; 2895 2896 case NS_BUFTYPE_HUGE: 2897 while (card->hbpool.count > card->hbnr.init) 2898 { 2899 struct sk_buff *hb; 2900 2901 ns_grab_int_lock(card, flags); 2902 hb = skb_dequeue(&card->hbpool.queue); 2903 card->hbpool.count--; 2904 spin_unlock_irqrestore(&card->int_lock, flags); 2905 if (hb == NULL) 2906 printk("nicstar%d: huge buffer count inconsistent.\n", 2907 card->index); 2908 else 2909 dev_kfree_skb_any(hb); 2910 2911 } 2912 while (card->hbpool.count < card->hbnr.init) 2913 { 2914 struct sk_buff *hb; 2915 2916 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL); 2917 if (hb == NULL) 2918 return -ENOMEM; 2919 NS_SKB_CB(hb)->buf_type = BUF_NONE; 2920 ns_grab_int_lock(card, flags); 2921 skb_queue_tail(&card->hbpool.queue, hb); 2922 card->hbpool.count++; 2923 spin_unlock_irqrestore(&card->int_lock, flags); 2924 } 2925 break; 2926 2927 case NS_BUFTYPE_IOVEC: 2928 while (card->iovpool.count > card->iovnr.init) 2929 { 2930 struct sk_buff *iovb; 2931 2932 ns_grab_int_lock(card, flags); 2933 iovb = skb_dequeue(&card->iovpool.queue); 2934 card->iovpool.count--; 2935 spin_unlock_irqrestore(&card->int_lock, flags); 2936 if (iovb == NULL) 2937 printk("nicstar%d: iovec buffer count inconsistent.\n", 2938 card->index); 2939 else 2940 dev_kfree_skb_any(iovb); 2941 2942 } 2943 while (card->iovpool.count < card->iovnr.init) 2944 { 2945 struct sk_buff *iovb; 2946 2947 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL); 2948 if (iovb == NULL) 2949 return -ENOMEM; 2950 NS_SKB_CB(iovb)->buf_type = BUF_NONE; 2951 ns_grab_int_lock(card, flags); 2952 skb_queue_tail(&card->iovpool.queue, iovb); 2953 card->iovpool.count++; 2954 spin_unlock_irqrestore(&card->int_lock, flags); 2955 } 2956 break; 2957 2958 default: 2959 return -EINVAL; 2960 2961 } 2962 return 0; 2963 2964 default: 2965 if (dev->phy && dev->phy->ioctl) { 2966 return dev->phy->ioctl(dev, cmd, arg); 2967 } 2968 else { 2969 printk("nicstar%d: %s == NULL \n", card->index, 2970 dev->phy ? "dev->phy->ioctl" : "dev->phy"); 2971 return -ENOIOCTLCMD; 2972 } 2973 } 2974 } 2975 2976 2977 static void which_list(ns_dev *card, struct sk_buff *skb) 2978 { 2979 printk("skb buf_type: 0x%08x\n", NS_SKB_CB(skb)->buf_type); 2980 } 2981 2982 2983 static void ns_poll(unsigned long arg) 2984 { 2985 int i; 2986 ns_dev *card; 2987 unsigned long flags; 2988 u32 stat_r, stat_w; 2989 2990 PRINTK("nicstar: Entering ns_poll().\n"); 2991 for (i = 0; i < num_cards; i++) 2992 { 2993 card = cards[i]; 2994 if (spin_is_locked(&card->int_lock)) { 2995 /* Probably it isn't worth spinning */ 2996 continue; 2997 } 2998 ns_grab_int_lock(card, flags); 2999 3000 stat_w = 0; 3001 stat_r = readl(card->membase + STAT); 3002 if (stat_r & NS_STAT_TSIF) 3003 stat_w |= NS_STAT_TSIF; 3004 if (stat_r & NS_STAT_EOPDU) 3005 stat_w |= NS_STAT_EOPDU; 3006 3007 process_tsq(card); 3008 process_rsq(card); 3009 3010 writel(stat_w, card->membase + STAT); 3011 spin_unlock_irqrestore(&card->int_lock, flags); 3012 } 3013 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD); 3014 PRINTK("nicstar: Leaving ns_poll().\n"); 3015 } 3016 3017 3018 3019 static int ns_parse_mac(char *mac, unsigned char *esi) 3020 { 3021 int i, j; 3022 short byte1, byte0; 3023 3024 if (mac == NULL || esi == NULL) 3025 return -1; 3026 j = 0; 3027 for (i = 0; i < 6; i++) 3028 { 3029 if ((byte1 = ns_h2i(mac[j++])) < 0) 3030 return -1; 3031 if ((byte0 = ns_h2i(mac[j++])) < 0) 3032 return -1; 3033 esi[i] = (unsigned char) (byte1 * 16 + byte0); 3034 if (i < 5) 3035 { 3036 if (mac[j++] != ':') 3037 return -1; 3038 } 3039 } 3040 return 0; 3041 } 3042 3043 3044 3045 static short ns_h2i(char c) 3046 { 3047 if (c >= '0' && c <= '9') 3048 return (short) (c - '0'); 3049 if (c >= 'A' && c <= 'F') 3050 return (short) (c - 'A' + 10); 3051 if (c >= 'a' && c <= 'f') 3052 return (short) (c - 'a' + 10); 3053 return -1; 3054 } 3055 3056 3057 3058 static void ns_phy_put(struct atm_dev *dev, unsigned char value, 3059 unsigned long addr) 3060 { 3061 ns_dev *card; 3062 unsigned long flags; 3063 3064 card = dev->dev_data; 3065 ns_grab_res_lock(card, flags); 3066 while(CMD_BUSY(card)); 3067 writel((unsigned long) value, card->membase + DR0); 3068 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF), 3069 card->membase + CMD); 3070 spin_unlock_irqrestore(&card->res_lock, flags); 3071 } 3072 3073 3074 3075 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr) 3076 { 3077 ns_dev *card; 3078 unsigned long flags; 3079 unsigned long data; 3080 3081 card = dev->dev_data; 3082 ns_grab_res_lock(card, flags); 3083 while(CMD_BUSY(card)); 3084 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF), 3085 card->membase + CMD); 3086 while(CMD_BUSY(card)); 3087 data = readl(card->membase + DR0) & 0x000000FF; 3088 spin_unlock_irqrestore(&card->res_lock, flags); 3089 return (unsigned char) data; 3090 } 3091 3092 3093 3094 module_init(nicstar_init); 3095 module_exit(nicstar_cleanup); 3096