1 /* 2 A FORE Systems 200E-series driver for ATM on Linux. 3 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003. 4 5 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de). 6 7 This driver simultaneously supports PCA-200E and SBA-200E adapters 8 on i386, alpha (untested), powerpc, sparc and sparc64 architectures. 9 10 This program is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 2 of the License, or 13 (at your option) any later version. 14 15 This program is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software 22 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 */ 24 25 26 #include <linux/kernel.h> 27 #include <linux/slab.h> 28 #include <linux/init.h> 29 #include <linux/capability.h> 30 #include <linux/interrupt.h> 31 #include <linux/bitops.h> 32 #include <linux/pci.h> 33 #include <linux/module.h> 34 #include <linux/atmdev.h> 35 #include <linux/sonet.h> 36 #include <linux/atm_suni.h> 37 #include <linux/dma-mapping.h> 38 #include <linux/delay.h> 39 #include <linux/firmware.h> 40 #include <asm/io.h> 41 #include <asm/string.h> 42 #include <asm/page.h> 43 #include <asm/irq.h> 44 #include <asm/dma.h> 45 #include <asm/byteorder.h> 46 #include <asm/uaccess.h> 47 #include <asm/atomic.h> 48 49 #ifdef CONFIG_SBUS 50 #include <asm/idprom.h> 51 #include <asm/sbus.h> 52 #include <asm/openprom.h> 53 #include <asm/oplib.h> 54 #include <asm/pgtable.h> 55 #endif 56 57 #if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */ 58 #define FORE200E_USE_TASKLET 59 #endif 60 61 #if 0 /* enable the debugging code of the buffer supply queues */ 62 #define FORE200E_BSQ_DEBUG 63 #endif 64 65 #if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */ 66 #define FORE200E_52BYTE_AAL0_SDU 67 #endif 68 69 #include "fore200e.h" 70 #include "suni.h" 71 72 #define FORE200E_VERSION "0.3e" 73 74 #define FORE200E "fore200e: " 75 76 #if 0 /* override .config */ 77 #define CONFIG_ATM_FORE200E_DEBUG 1 78 #endif 79 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0) 80 #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \ 81 printk(FORE200E format, ##args); } while (0) 82 #else 83 #define DPRINTK(level, format, args...) do {} while (0) 84 #endif 85 86 87 #define FORE200E_ALIGN(addr, alignment) \ 88 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr)) 89 90 #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type)) 91 92 #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ]) 93 94 #define FORE200E_NEXT_ENTRY(index, modulo) (index = ++(index) % (modulo)) 95 96 #if 1 97 #define ASSERT(expr) if (!(expr)) { \ 98 printk(FORE200E "assertion failed! %s[%d]: %s\n", \ 99 __func__, __LINE__, #expr); \ 100 panic(FORE200E "%s", __func__); \ 101 } 102 #else 103 #define ASSERT(expr) do {} while (0) 104 #endif 105 106 107 static const struct atmdev_ops fore200e_ops; 108 static const struct fore200e_bus fore200e_bus[]; 109 110 static LIST_HEAD(fore200e_boards); 111 112 113 MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen"); 114 MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION); 115 MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E"); 116 117 118 static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = { 119 { BUFFER_S1_NBR, BUFFER_L1_NBR }, 120 { BUFFER_S2_NBR, BUFFER_L2_NBR } 121 }; 122 123 static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = { 124 { BUFFER_S1_SIZE, BUFFER_L1_SIZE }, 125 { BUFFER_S2_SIZE, BUFFER_L2_SIZE } 126 }; 127 128 129 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0) 130 static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" }; 131 #endif 132 133 134 #if 0 /* currently unused */ 135 static int 136 fore200e_fore2atm_aal(enum fore200e_aal aal) 137 { 138 switch(aal) { 139 case FORE200E_AAL0: return ATM_AAL0; 140 case FORE200E_AAL34: return ATM_AAL34; 141 case FORE200E_AAL5: return ATM_AAL5; 142 } 143 144 return -EINVAL; 145 } 146 #endif 147 148 149 static enum fore200e_aal 150 fore200e_atm2fore_aal(int aal) 151 { 152 switch(aal) { 153 case ATM_AAL0: return FORE200E_AAL0; 154 case ATM_AAL34: return FORE200E_AAL34; 155 case ATM_AAL1: 156 case ATM_AAL2: 157 case ATM_AAL5: return FORE200E_AAL5; 158 } 159 160 return -EINVAL; 161 } 162 163 164 static char* 165 fore200e_irq_itoa(int irq) 166 { 167 static char str[8]; 168 sprintf(str, "%d", irq); 169 return str; 170 } 171 172 173 /* allocate and align a chunk of memory intended to hold the data behing exchanged 174 between the driver and the adapter (using streaming DVMA) */ 175 176 static int 177 fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction) 178 { 179 unsigned long offset = 0; 180 181 if (alignment <= sizeof(int)) 182 alignment = 0; 183 184 chunk->alloc_size = size + alignment; 185 chunk->align_size = size; 186 chunk->direction = direction; 187 188 chunk->alloc_addr = kzalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA); 189 if (chunk->alloc_addr == NULL) 190 return -ENOMEM; 191 192 if (alignment > 0) 193 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment); 194 195 chunk->align_addr = chunk->alloc_addr + offset; 196 197 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction); 198 199 return 0; 200 } 201 202 203 /* free a chunk of memory */ 204 205 static void 206 fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk) 207 { 208 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction); 209 210 kfree(chunk->alloc_addr); 211 } 212 213 214 static void 215 fore200e_spin(int msecs) 216 { 217 unsigned long timeout = jiffies + msecs_to_jiffies(msecs); 218 while (time_before(jiffies, timeout)); 219 } 220 221 222 static int 223 fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs) 224 { 225 unsigned long timeout = jiffies + msecs_to_jiffies(msecs); 226 int ok; 227 228 mb(); 229 do { 230 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR)) 231 break; 232 233 } while (time_before(jiffies, timeout)); 234 235 #if 1 236 if (!ok) { 237 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n", 238 *addr, val); 239 } 240 #endif 241 242 return ok; 243 } 244 245 246 static int 247 fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs) 248 { 249 unsigned long timeout = jiffies + msecs_to_jiffies(msecs); 250 int ok; 251 252 do { 253 if ((ok = (fore200e->bus->read(addr) == val))) 254 break; 255 256 } while (time_before(jiffies, timeout)); 257 258 #if 1 259 if (!ok) { 260 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n", 261 fore200e->bus->read(addr), val); 262 } 263 #endif 264 265 return ok; 266 } 267 268 269 static void 270 fore200e_free_rx_buf(struct fore200e* fore200e) 271 { 272 int scheme, magn, nbr; 273 struct buffer* buffer; 274 275 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 276 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 277 278 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) { 279 280 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) { 281 282 struct chunk* data = &buffer[ nbr ].data; 283 284 if (data->alloc_addr != NULL) 285 fore200e_chunk_free(fore200e, data); 286 } 287 } 288 } 289 } 290 } 291 292 293 static void 294 fore200e_uninit_bs_queue(struct fore200e* fore200e) 295 { 296 int scheme, magn; 297 298 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 299 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 300 301 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status; 302 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block; 303 304 if (status->alloc_addr) 305 fore200e->bus->dma_chunk_free(fore200e, status); 306 307 if (rbd_block->alloc_addr) 308 fore200e->bus->dma_chunk_free(fore200e, rbd_block); 309 } 310 } 311 } 312 313 314 static int 315 fore200e_reset(struct fore200e* fore200e, int diag) 316 { 317 int ok; 318 319 fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET; 320 321 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat); 322 323 fore200e->bus->reset(fore200e); 324 325 if (diag) { 326 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000); 327 if (ok == 0) { 328 329 printk(FORE200E "device %s self-test failed\n", fore200e->name); 330 return -ENODEV; 331 } 332 333 printk(FORE200E "device %s self-test passed\n", fore200e->name); 334 335 fore200e->state = FORE200E_STATE_RESET; 336 } 337 338 return 0; 339 } 340 341 342 static void 343 fore200e_shutdown(struct fore200e* fore200e) 344 { 345 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n", 346 fore200e->name, fore200e->phys_base, 347 fore200e_irq_itoa(fore200e->irq)); 348 349 if (fore200e->state > FORE200E_STATE_RESET) { 350 /* first, reset the board to prevent further interrupts or data transfers */ 351 fore200e_reset(fore200e, 0); 352 } 353 354 /* then, release all allocated resources */ 355 switch(fore200e->state) { 356 357 case FORE200E_STATE_COMPLETE: 358 kfree(fore200e->stats); 359 360 case FORE200E_STATE_IRQ: 361 free_irq(fore200e->irq, fore200e->atm_dev); 362 363 case FORE200E_STATE_ALLOC_BUF: 364 fore200e_free_rx_buf(fore200e); 365 366 case FORE200E_STATE_INIT_BSQ: 367 fore200e_uninit_bs_queue(fore200e); 368 369 case FORE200E_STATE_INIT_RXQ: 370 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status); 371 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd); 372 373 case FORE200E_STATE_INIT_TXQ: 374 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status); 375 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd); 376 377 case FORE200E_STATE_INIT_CMDQ: 378 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status); 379 380 case FORE200E_STATE_INITIALIZE: 381 /* nothing to do for that state */ 382 383 case FORE200E_STATE_START_FW: 384 /* nothing to do for that state */ 385 386 case FORE200E_STATE_RESET: 387 /* nothing to do for that state */ 388 389 case FORE200E_STATE_MAP: 390 fore200e->bus->unmap(fore200e); 391 392 case FORE200E_STATE_CONFIGURE: 393 /* nothing to do for that state */ 394 395 case FORE200E_STATE_REGISTER: 396 /* XXX shouldn't we *start* by deregistering the device? */ 397 atm_dev_deregister(fore200e->atm_dev); 398 399 case FORE200E_STATE_BLANK: 400 /* nothing to do for that state */ 401 break; 402 } 403 } 404 405 406 #ifdef CONFIG_PCI 407 408 static u32 fore200e_pca_read(volatile u32 __iomem *addr) 409 { 410 /* on big-endian hosts, the board is configured to convert 411 the endianess of slave RAM accesses */ 412 return le32_to_cpu(readl(addr)); 413 } 414 415 416 static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr) 417 { 418 /* on big-endian hosts, the board is configured to convert 419 the endianess of slave RAM accesses */ 420 writel(cpu_to_le32(val), addr); 421 } 422 423 424 static u32 425 fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction) 426 { 427 u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction); 428 429 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n", 430 virt_addr, size, direction, dma_addr); 431 432 return dma_addr; 433 } 434 435 436 static void 437 fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction) 438 { 439 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n", 440 dma_addr, size, direction); 441 442 pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction); 443 } 444 445 446 static void 447 fore200e_pca_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction) 448 { 449 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction); 450 451 pci_dma_sync_single_for_cpu((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction); 452 } 453 454 static void 455 fore200e_pca_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction) 456 { 457 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction); 458 459 pci_dma_sync_single_for_device((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction); 460 } 461 462 463 /* allocate a DMA consistent chunk of memory intended to act as a communication mechanism 464 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */ 465 466 static int 467 fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, 468 int size, int nbr, int alignment) 469 { 470 /* returned chunks are page-aligned */ 471 chunk->alloc_size = size * nbr; 472 chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev, 473 chunk->alloc_size, 474 &chunk->dma_addr); 475 476 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0)) 477 return -ENOMEM; 478 479 chunk->align_addr = chunk->alloc_addr; 480 481 return 0; 482 } 483 484 485 /* free a DMA consistent chunk of memory */ 486 487 static void 488 fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk) 489 { 490 pci_free_consistent((struct pci_dev*)fore200e->bus_dev, 491 chunk->alloc_size, 492 chunk->alloc_addr, 493 chunk->dma_addr); 494 } 495 496 497 static int 498 fore200e_pca_irq_check(struct fore200e* fore200e) 499 { 500 /* this is a 1 bit register */ 501 int irq_posted = readl(fore200e->regs.pca.psr); 502 503 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2) 504 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) { 505 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number); 506 } 507 #endif 508 509 return irq_posted; 510 } 511 512 513 static void 514 fore200e_pca_irq_ack(struct fore200e* fore200e) 515 { 516 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr); 517 } 518 519 520 static void 521 fore200e_pca_reset(struct fore200e* fore200e) 522 { 523 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr); 524 fore200e_spin(10); 525 writel(0, fore200e->regs.pca.hcr); 526 } 527 528 529 static int __devinit 530 fore200e_pca_map(struct fore200e* fore200e) 531 { 532 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name); 533 534 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH); 535 536 if (fore200e->virt_base == NULL) { 537 printk(FORE200E "can't map device %s\n", fore200e->name); 538 return -EFAULT; 539 } 540 541 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base); 542 543 /* gain access to the PCA specific registers */ 544 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET; 545 fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET; 546 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET; 547 548 fore200e->state = FORE200E_STATE_MAP; 549 return 0; 550 } 551 552 553 static void 554 fore200e_pca_unmap(struct fore200e* fore200e) 555 { 556 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name); 557 558 if (fore200e->virt_base != NULL) 559 iounmap(fore200e->virt_base); 560 } 561 562 563 static int __devinit 564 fore200e_pca_configure(struct fore200e* fore200e) 565 { 566 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev; 567 u8 master_ctrl, latency; 568 569 DPRINTK(2, "device %s being configured\n", fore200e->name); 570 571 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) { 572 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n"); 573 return -EIO; 574 } 575 576 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl); 577 578 master_ctrl = master_ctrl 579 #if defined(__BIG_ENDIAN) 580 /* request the PCA board to convert the endianess of slave RAM accesses */ 581 | PCA200E_CTRL_CONVERT_ENDIAN 582 #endif 583 #if 0 584 | PCA200E_CTRL_DIS_CACHE_RD 585 | PCA200E_CTRL_DIS_WRT_INVAL 586 | PCA200E_CTRL_ENA_CONT_REQ_MODE 587 | PCA200E_CTRL_2_CACHE_WRT_INVAL 588 #endif 589 | PCA200E_CTRL_LARGE_PCI_BURSTS; 590 591 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl); 592 593 /* raise latency from 32 (default) to 192, as this seems to prevent NIC 594 lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition. 595 this may impact the performances of other PCI devices on the same bus, though */ 596 latency = 192; 597 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency); 598 599 fore200e->state = FORE200E_STATE_CONFIGURE; 600 return 0; 601 } 602 603 604 static int __init 605 fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom) 606 { 607 struct host_cmdq* cmdq = &fore200e->host_cmdq; 608 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 609 struct prom_opcode opcode; 610 int ok; 611 u32 prom_dma; 612 613 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 614 615 opcode.opcode = OPCODE_GET_PROM; 616 opcode.pad = 0; 617 618 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), DMA_FROM_DEVICE); 619 620 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr); 621 622 *entry->status = STATUS_PENDING; 623 624 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode); 625 626 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 627 628 *entry->status = STATUS_FREE; 629 630 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE); 631 632 if (ok == 0) { 633 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name); 634 return -EIO; 635 } 636 637 #if defined(__BIG_ENDIAN) 638 639 #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) )) 640 641 /* MAC address is stored as little-endian */ 642 swap_here(&prom->mac_addr[0]); 643 swap_here(&prom->mac_addr[4]); 644 #endif 645 646 return 0; 647 } 648 649 650 static int 651 fore200e_pca_proc_read(struct fore200e* fore200e, char *page) 652 { 653 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev; 654 655 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n", 656 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn)); 657 } 658 659 #endif /* CONFIG_PCI */ 660 661 662 #ifdef CONFIG_SBUS 663 664 static u32 665 fore200e_sba_read(volatile u32 __iomem *addr) 666 { 667 return sbus_readl(addr); 668 } 669 670 671 static void 672 fore200e_sba_write(u32 val, volatile u32 __iomem *addr) 673 { 674 sbus_writel(val, addr); 675 } 676 677 678 static u32 679 fore200e_sba_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction) 680 { 681 u32 dma_addr = sbus_map_single((struct sbus_dev*)fore200e->bus_dev, virt_addr, size, direction); 682 683 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n", 684 virt_addr, size, direction, dma_addr); 685 686 return dma_addr; 687 } 688 689 690 static void 691 fore200e_sba_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction) 692 { 693 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n", 694 dma_addr, size, direction); 695 696 sbus_unmap_single((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction); 697 } 698 699 700 static void 701 fore200e_sba_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction) 702 { 703 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction); 704 705 sbus_dma_sync_single_for_cpu((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction); 706 } 707 708 static void 709 fore200e_sba_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction) 710 { 711 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction); 712 713 sbus_dma_sync_single_for_device((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction); 714 } 715 716 717 /* allocate a DVMA consistent chunk of memory intended to act as a communication mechanism 718 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */ 719 720 static int 721 fore200e_sba_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, 722 int size, int nbr, int alignment) 723 { 724 chunk->alloc_size = chunk->align_size = size * nbr; 725 726 /* returned chunks are page-aligned */ 727 chunk->alloc_addr = sbus_alloc_consistent((struct sbus_dev*)fore200e->bus_dev, 728 chunk->alloc_size, 729 &chunk->dma_addr); 730 731 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0)) 732 return -ENOMEM; 733 734 chunk->align_addr = chunk->alloc_addr; 735 736 return 0; 737 } 738 739 740 /* free a DVMA consistent chunk of memory */ 741 742 static void 743 fore200e_sba_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk) 744 { 745 sbus_free_consistent((struct sbus_dev*)fore200e->bus_dev, 746 chunk->alloc_size, 747 chunk->alloc_addr, 748 chunk->dma_addr); 749 } 750 751 752 static void 753 fore200e_sba_irq_enable(struct fore200e* fore200e) 754 { 755 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; 756 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr); 757 } 758 759 760 static int 761 fore200e_sba_irq_check(struct fore200e* fore200e) 762 { 763 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ; 764 } 765 766 767 static void 768 fore200e_sba_irq_ack(struct fore200e* fore200e) 769 { 770 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; 771 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr); 772 } 773 774 775 static void 776 fore200e_sba_reset(struct fore200e* fore200e) 777 { 778 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr); 779 fore200e_spin(10); 780 fore200e->bus->write(0, fore200e->regs.sba.hcr); 781 } 782 783 784 static int __init 785 fore200e_sba_map(struct fore200e* fore200e) 786 { 787 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev; 788 unsigned int bursts; 789 790 /* gain access to the SBA specific registers */ 791 fore200e->regs.sba.hcr = sbus_ioremap(&sbus_dev->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR"); 792 fore200e->regs.sba.bsr = sbus_ioremap(&sbus_dev->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR"); 793 fore200e->regs.sba.isr = sbus_ioremap(&sbus_dev->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR"); 794 fore200e->virt_base = sbus_ioremap(&sbus_dev->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM"); 795 796 if (fore200e->virt_base == NULL) { 797 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name); 798 return -EFAULT; 799 } 800 801 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base); 802 803 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */ 804 805 /* get the supported DVMA burst sizes */ 806 bursts = prom_getintdefault(sbus_dev->bus->prom_node, "burst-sizes", 0x00); 807 808 if (sbus_can_dma_64bit(sbus_dev)) 809 sbus_set_sbus64(sbus_dev, bursts); 810 811 fore200e->state = FORE200E_STATE_MAP; 812 return 0; 813 } 814 815 816 static void 817 fore200e_sba_unmap(struct fore200e* fore200e) 818 { 819 sbus_iounmap(fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH); 820 sbus_iounmap(fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH); 821 sbus_iounmap(fore200e->regs.sba.isr, SBA200E_ISR_LENGTH); 822 sbus_iounmap(fore200e->virt_base, SBA200E_RAM_LENGTH); 823 } 824 825 826 static int __init 827 fore200e_sba_configure(struct fore200e* fore200e) 828 { 829 fore200e->state = FORE200E_STATE_CONFIGURE; 830 return 0; 831 } 832 833 834 static struct fore200e* __init 835 fore200e_sba_detect(const struct fore200e_bus* bus, int index) 836 { 837 struct fore200e* fore200e; 838 struct sbus_bus* sbus_bus; 839 struct sbus_dev* sbus_dev = NULL; 840 841 unsigned int count = 0; 842 843 for_each_sbus (sbus_bus) { 844 for_each_sbusdev (sbus_dev, sbus_bus) { 845 if (strcmp(sbus_dev->prom_name, SBA200E_PROM_NAME) == 0) { 846 if (count >= index) 847 goto found; 848 count++; 849 } 850 } 851 } 852 return NULL; 853 854 found: 855 if (sbus_dev->num_registers != 4) { 856 printk(FORE200E "this %s device has %d instead of 4 registers\n", 857 bus->model_name, sbus_dev->num_registers); 858 return NULL; 859 } 860 861 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL); 862 if (fore200e == NULL) 863 return NULL; 864 865 fore200e->bus = bus; 866 fore200e->bus_dev = sbus_dev; 867 fore200e->irq = sbus_dev->irqs[ 0 ]; 868 869 fore200e->phys_base = (unsigned long)sbus_dev; 870 871 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1); 872 873 return fore200e; 874 } 875 876 877 static int __init 878 fore200e_sba_prom_read(struct fore200e* fore200e, struct prom_data* prom) 879 { 880 struct sbus_dev* sbus_dev = (struct sbus_dev*) fore200e->bus_dev; 881 int len; 882 883 len = prom_getproperty(sbus_dev->prom_node, "macaddrlo2", &prom->mac_addr[ 4 ], 4); 884 if (len < 0) 885 return -EBUSY; 886 887 len = prom_getproperty(sbus_dev->prom_node, "macaddrhi4", &prom->mac_addr[ 2 ], 4); 888 if (len < 0) 889 return -EBUSY; 890 891 prom_getproperty(sbus_dev->prom_node, "serialnumber", 892 (char*)&prom->serial_number, sizeof(prom->serial_number)); 893 894 prom_getproperty(sbus_dev->prom_node, "promversion", 895 (char*)&prom->hw_revision, sizeof(prom->hw_revision)); 896 897 return 0; 898 } 899 900 901 static int 902 fore200e_sba_proc_read(struct fore200e* fore200e, char *page) 903 { 904 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev; 905 906 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n", sbus_dev->slot, sbus_dev->prom_name); 907 } 908 #endif /* CONFIG_SBUS */ 909 910 911 static void 912 fore200e_tx_irq(struct fore200e* fore200e) 913 { 914 struct host_txq* txq = &fore200e->host_txq; 915 struct host_txq_entry* entry; 916 struct atm_vcc* vcc; 917 struct fore200e_vc_map* vc_map; 918 919 if (fore200e->host_txq.txing == 0) 920 return; 921 922 for (;;) { 923 924 entry = &txq->host_entry[ txq->tail ]; 925 926 if ((*entry->status & STATUS_COMPLETE) == 0) { 927 break; 928 } 929 930 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n", 931 entry, txq->tail, entry->vc_map, entry->skb); 932 933 /* free copy of misaligned data */ 934 kfree(entry->data); 935 936 /* remove DMA mapping */ 937 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length, 938 DMA_TO_DEVICE); 939 940 vc_map = entry->vc_map; 941 942 /* vcc closed since the time the entry was submitted for tx? */ 943 if ((vc_map->vcc == NULL) || 944 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) { 945 946 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n", 947 fore200e->atm_dev->number); 948 949 dev_kfree_skb_any(entry->skb); 950 } 951 else { 952 ASSERT(vc_map->vcc); 953 954 /* vcc closed then immediately re-opened? */ 955 if (vc_map->incarn != entry->incarn) { 956 957 /* when a vcc is closed, some PDUs may be still pending in the tx queue. 958 if the same vcc is immediately re-opened, those pending PDUs must 959 not be popped after the completion of their emission, as they refer 960 to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc 961 would be decremented by the size of the (unrelated) skb, possibly 962 leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc. 963 we thus bind the tx entry to the current incarnation of the vcc 964 when the entry is submitted for tx. When the tx later completes, 965 if the incarnation number of the tx entry does not match the one 966 of the vcc, then this implies that the vcc has been closed then re-opened. 967 we thus just drop the skb here. */ 968 969 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n", 970 fore200e->atm_dev->number); 971 972 dev_kfree_skb_any(entry->skb); 973 } 974 else { 975 vcc = vc_map->vcc; 976 ASSERT(vcc); 977 978 /* notify tx completion */ 979 if (vcc->pop) { 980 vcc->pop(vcc, entry->skb); 981 } 982 else { 983 dev_kfree_skb_any(entry->skb); 984 } 985 #if 1 986 /* race fixed by the above incarnation mechanism, but... */ 987 if (atomic_read(&sk_atm(vcc)->sk_wmem_alloc) < 0) { 988 atomic_set(&sk_atm(vcc)->sk_wmem_alloc, 0); 989 } 990 #endif 991 /* check error condition */ 992 if (*entry->status & STATUS_ERROR) 993 atomic_inc(&vcc->stats->tx_err); 994 else 995 atomic_inc(&vcc->stats->tx); 996 } 997 } 998 999 *entry->status = STATUS_FREE; 1000 1001 fore200e->host_txq.txing--; 1002 1003 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX); 1004 } 1005 } 1006 1007 1008 #ifdef FORE200E_BSQ_DEBUG 1009 int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn) 1010 { 1011 struct buffer* buffer; 1012 int count = 0; 1013 1014 buffer = bsq->freebuf; 1015 while (buffer) { 1016 1017 if (buffer->supplied) { 1018 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n", 1019 where, scheme, magn, buffer->index); 1020 } 1021 1022 if (buffer->magn != magn) { 1023 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n", 1024 where, scheme, magn, buffer->index, buffer->magn); 1025 } 1026 1027 if (buffer->scheme != scheme) { 1028 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n", 1029 where, scheme, magn, buffer->index, buffer->scheme); 1030 } 1031 1032 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) { 1033 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n", 1034 where, scheme, magn, buffer->index); 1035 } 1036 1037 count++; 1038 buffer = buffer->next; 1039 } 1040 1041 if (count != bsq->freebuf_count) { 1042 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n", 1043 where, scheme, magn, count, bsq->freebuf_count); 1044 } 1045 return 0; 1046 } 1047 #endif 1048 1049 1050 static void 1051 fore200e_supply(struct fore200e* fore200e) 1052 { 1053 int scheme, magn, i; 1054 1055 struct host_bsq* bsq; 1056 struct host_bsq_entry* entry; 1057 struct buffer* buffer; 1058 1059 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 1060 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 1061 1062 bsq = &fore200e->host_bsq[ scheme ][ magn ]; 1063 1064 #ifdef FORE200E_BSQ_DEBUG 1065 bsq_audit(1, bsq, scheme, magn); 1066 #endif 1067 while (bsq->freebuf_count >= RBD_BLK_SIZE) { 1068 1069 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n", 1070 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count); 1071 1072 entry = &bsq->host_entry[ bsq->head ]; 1073 1074 for (i = 0; i < RBD_BLK_SIZE; i++) { 1075 1076 /* take the first buffer in the free buffer list */ 1077 buffer = bsq->freebuf; 1078 if (!buffer) { 1079 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n", 1080 scheme, magn, bsq->freebuf_count); 1081 return; 1082 } 1083 bsq->freebuf = buffer->next; 1084 1085 #ifdef FORE200E_BSQ_DEBUG 1086 if (buffer->supplied) 1087 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n", 1088 scheme, magn, buffer->index); 1089 buffer->supplied = 1; 1090 #endif 1091 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr; 1092 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer); 1093 } 1094 1095 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS); 1096 1097 /* decrease accordingly the number of free rx buffers */ 1098 bsq->freebuf_count -= RBD_BLK_SIZE; 1099 1100 *entry->status = STATUS_PENDING; 1101 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr); 1102 } 1103 } 1104 } 1105 } 1106 1107 1108 static int 1109 fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd) 1110 { 1111 struct sk_buff* skb; 1112 struct buffer* buffer; 1113 struct fore200e_vcc* fore200e_vcc; 1114 int i, pdu_len = 0; 1115 #ifdef FORE200E_52BYTE_AAL0_SDU 1116 u32 cell_header = 0; 1117 #endif 1118 1119 ASSERT(vcc); 1120 1121 fore200e_vcc = FORE200E_VCC(vcc); 1122 ASSERT(fore200e_vcc); 1123 1124 #ifdef FORE200E_52BYTE_AAL0_SDU 1125 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) { 1126 1127 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) | 1128 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) | 1129 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) | 1130 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) | 1131 rpd->atm_header.clp; 1132 pdu_len = 4; 1133 } 1134 #endif 1135 1136 /* compute total PDU length */ 1137 for (i = 0; i < rpd->nseg; i++) 1138 pdu_len += rpd->rsd[ i ].length; 1139 1140 skb = alloc_skb(pdu_len, GFP_ATOMIC); 1141 if (skb == NULL) { 1142 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len); 1143 1144 atomic_inc(&vcc->stats->rx_drop); 1145 return -ENOMEM; 1146 } 1147 1148 __net_timestamp(skb); 1149 1150 #ifdef FORE200E_52BYTE_AAL0_SDU 1151 if (cell_header) { 1152 *((u32*)skb_put(skb, 4)) = cell_header; 1153 } 1154 #endif 1155 1156 /* reassemble segments */ 1157 for (i = 0; i < rpd->nseg; i++) { 1158 1159 /* rebuild rx buffer address from rsd handle */ 1160 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle); 1161 1162 /* Make device DMA transfer visible to CPU. */ 1163 fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE); 1164 1165 memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length); 1166 1167 /* Now let the device get at it again. */ 1168 fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE); 1169 } 1170 1171 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize); 1172 1173 if (pdu_len < fore200e_vcc->rx_min_pdu) 1174 fore200e_vcc->rx_min_pdu = pdu_len; 1175 if (pdu_len > fore200e_vcc->rx_max_pdu) 1176 fore200e_vcc->rx_max_pdu = pdu_len; 1177 fore200e_vcc->rx_pdu++; 1178 1179 /* push PDU */ 1180 if (atm_charge(vcc, skb->truesize) == 0) { 1181 1182 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n", 1183 vcc->itf, vcc->vpi, vcc->vci); 1184 1185 dev_kfree_skb_any(skb); 1186 1187 atomic_inc(&vcc->stats->rx_drop); 1188 return -ENOMEM; 1189 } 1190 1191 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0); 1192 1193 vcc->push(vcc, skb); 1194 atomic_inc(&vcc->stats->rx); 1195 1196 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0); 1197 1198 return 0; 1199 } 1200 1201 1202 static void 1203 fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd) 1204 { 1205 struct host_bsq* bsq; 1206 struct buffer* buffer; 1207 int i; 1208 1209 for (i = 0; i < rpd->nseg; i++) { 1210 1211 /* rebuild rx buffer address from rsd handle */ 1212 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle); 1213 1214 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ]; 1215 1216 #ifdef FORE200E_BSQ_DEBUG 1217 bsq_audit(2, bsq, buffer->scheme, buffer->magn); 1218 1219 if (buffer->supplied == 0) 1220 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n", 1221 buffer->scheme, buffer->magn, buffer->index); 1222 buffer->supplied = 0; 1223 #endif 1224 1225 /* re-insert the buffer into the free buffer list */ 1226 buffer->next = bsq->freebuf; 1227 bsq->freebuf = buffer; 1228 1229 /* then increment the number of free rx buffers */ 1230 bsq->freebuf_count++; 1231 } 1232 } 1233 1234 1235 static void 1236 fore200e_rx_irq(struct fore200e* fore200e) 1237 { 1238 struct host_rxq* rxq = &fore200e->host_rxq; 1239 struct host_rxq_entry* entry; 1240 struct atm_vcc* vcc; 1241 struct fore200e_vc_map* vc_map; 1242 1243 for (;;) { 1244 1245 entry = &rxq->host_entry[ rxq->head ]; 1246 1247 /* no more received PDUs */ 1248 if ((*entry->status & STATUS_COMPLETE) == 0) 1249 break; 1250 1251 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci); 1252 1253 if ((vc_map->vcc == NULL) || 1254 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) { 1255 1256 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n", 1257 fore200e->atm_dev->number, 1258 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci); 1259 } 1260 else { 1261 vcc = vc_map->vcc; 1262 ASSERT(vcc); 1263 1264 if ((*entry->status & STATUS_ERROR) == 0) { 1265 1266 fore200e_push_rpd(fore200e, vcc, entry->rpd); 1267 } 1268 else { 1269 DPRINTK(2, "damaged PDU on %d.%d.%d\n", 1270 fore200e->atm_dev->number, 1271 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci); 1272 atomic_inc(&vcc->stats->rx_err); 1273 } 1274 } 1275 1276 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX); 1277 1278 fore200e_collect_rpd(fore200e, entry->rpd); 1279 1280 /* rewrite the rpd address to ack the received PDU */ 1281 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr); 1282 *entry->status = STATUS_FREE; 1283 1284 fore200e_supply(fore200e); 1285 } 1286 } 1287 1288 1289 #ifndef FORE200E_USE_TASKLET 1290 static void 1291 fore200e_irq(struct fore200e* fore200e) 1292 { 1293 unsigned long flags; 1294 1295 spin_lock_irqsave(&fore200e->q_lock, flags); 1296 fore200e_rx_irq(fore200e); 1297 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1298 1299 spin_lock_irqsave(&fore200e->q_lock, flags); 1300 fore200e_tx_irq(fore200e); 1301 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1302 } 1303 #endif 1304 1305 1306 static irqreturn_t 1307 fore200e_interrupt(int irq, void* dev) 1308 { 1309 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev); 1310 1311 if (fore200e->bus->irq_check(fore200e) == 0) { 1312 1313 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number); 1314 return IRQ_NONE; 1315 } 1316 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number); 1317 1318 #ifdef FORE200E_USE_TASKLET 1319 tasklet_schedule(&fore200e->tx_tasklet); 1320 tasklet_schedule(&fore200e->rx_tasklet); 1321 #else 1322 fore200e_irq(fore200e); 1323 #endif 1324 1325 fore200e->bus->irq_ack(fore200e); 1326 return IRQ_HANDLED; 1327 } 1328 1329 1330 #ifdef FORE200E_USE_TASKLET 1331 static void 1332 fore200e_tx_tasklet(unsigned long data) 1333 { 1334 struct fore200e* fore200e = (struct fore200e*) data; 1335 unsigned long flags; 1336 1337 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number); 1338 1339 spin_lock_irqsave(&fore200e->q_lock, flags); 1340 fore200e_tx_irq(fore200e); 1341 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1342 } 1343 1344 1345 static void 1346 fore200e_rx_tasklet(unsigned long data) 1347 { 1348 struct fore200e* fore200e = (struct fore200e*) data; 1349 unsigned long flags; 1350 1351 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number); 1352 1353 spin_lock_irqsave(&fore200e->q_lock, flags); 1354 fore200e_rx_irq((struct fore200e*) data); 1355 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1356 } 1357 #endif 1358 1359 1360 static int 1361 fore200e_select_scheme(struct atm_vcc* vcc) 1362 { 1363 /* fairly balance the VCs over (identical) buffer schemes */ 1364 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO; 1365 1366 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n", 1367 vcc->itf, vcc->vpi, vcc->vci, scheme); 1368 1369 return scheme; 1370 } 1371 1372 1373 static int 1374 fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu) 1375 { 1376 struct host_cmdq* cmdq = &fore200e->host_cmdq; 1377 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 1378 struct activate_opcode activ_opcode; 1379 struct deactivate_opcode deactiv_opcode; 1380 struct vpvc vpvc; 1381 int ok; 1382 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal); 1383 1384 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 1385 1386 if (activate) { 1387 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc); 1388 1389 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN; 1390 activ_opcode.aal = aal; 1391 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme; 1392 activ_opcode.pad = 0; 1393 } 1394 else { 1395 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN; 1396 deactiv_opcode.pad = 0; 1397 } 1398 1399 vpvc.vci = vcc->vci; 1400 vpvc.vpi = vcc->vpi; 1401 1402 *entry->status = STATUS_PENDING; 1403 1404 if (activate) { 1405 1406 #ifdef FORE200E_52BYTE_AAL0_SDU 1407 mtu = 48; 1408 #endif 1409 /* the MTU is not used by the cp, except in the case of AAL0 */ 1410 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu); 1411 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc); 1412 fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode); 1413 } 1414 else { 1415 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc); 1416 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode); 1417 } 1418 1419 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 1420 1421 *entry->status = STATUS_FREE; 1422 1423 if (ok == 0) { 1424 printk(FORE200E "unable to %s VC %d.%d.%d\n", 1425 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci); 1426 return -EIO; 1427 } 1428 1429 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci, 1430 activate ? "open" : "clos"); 1431 1432 return 0; 1433 } 1434 1435 1436 #define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */ 1437 1438 static void 1439 fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate) 1440 { 1441 if (qos->txtp.max_pcr < ATM_OC3_PCR) { 1442 1443 /* compute the data cells to idle cells ratio from the tx PCR */ 1444 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR; 1445 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells; 1446 } 1447 else { 1448 /* disable rate control */ 1449 rate->data_cells = rate->idle_cells = 0; 1450 } 1451 } 1452 1453 1454 static int 1455 fore200e_open(struct atm_vcc *vcc) 1456 { 1457 struct fore200e* fore200e = FORE200E_DEV(vcc->dev); 1458 struct fore200e_vcc* fore200e_vcc; 1459 struct fore200e_vc_map* vc_map; 1460 unsigned long flags; 1461 int vci = vcc->vci; 1462 short vpi = vcc->vpi; 1463 1464 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS)); 1465 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS)); 1466 1467 spin_lock_irqsave(&fore200e->q_lock, flags); 1468 1469 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci); 1470 if (vc_map->vcc) { 1471 1472 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1473 1474 printk(FORE200E "VC %d.%d.%d already in use\n", 1475 fore200e->atm_dev->number, vpi, vci); 1476 1477 return -EINVAL; 1478 } 1479 1480 vc_map->vcc = vcc; 1481 1482 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1483 1484 fore200e_vcc = kzalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC); 1485 if (fore200e_vcc == NULL) { 1486 vc_map->vcc = NULL; 1487 return -ENOMEM; 1488 } 1489 1490 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; " 1491 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n", 1492 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal), 1493 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ], 1494 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu, 1495 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ], 1496 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu); 1497 1498 /* pseudo-CBR bandwidth requested? */ 1499 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) { 1500 1501 mutex_lock(&fore200e->rate_mtx); 1502 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) { 1503 mutex_unlock(&fore200e->rate_mtx); 1504 1505 kfree(fore200e_vcc); 1506 vc_map->vcc = NULL; 1507 return -EAGAIN; 1508 } 1509 1510 /* reserve bandwidth */ 1511 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr; 1512 mutex_unlock(&fore200e->rate_mtx); 1513 } 1514 1515 vcc->itf = vcc->dev->number; 1516 1517 set_bit(ATM_VF_PARTIAL,&vcc->flags); 1518 set_bit(ATM_VF_ADDR, &vcc->flags); 1519 1520 vcc->dev_data = fore200e_vcc; 1521 1522 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) { 1523 1524 vc_map->vcc = NULL; 1525 1526 clear_bit(ATM_VF_ADDR, &vcc->flags); 1527 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1528 1529 vcc->dev_data = NULL; 1530 1531 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr; 1532 1533 kfree(fore200e_vcc); 1534 return -EINVAL; 1535 } 1536 1537 /* compute rate control parameters */ 1538 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) { 1539 1540 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate); 1541 set_bit(ATM_VF_HASQOS, &vcc->flags); 1542 1543 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n", 1544 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal), 1545 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr, 1546 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells); 1547 } 1548 1549 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1; 1550 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0; 1551 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0; 1552 1553 /* new incarnation of the vcc */ 1554 vc_map->incarn = ++fore200e->incarn_count; 1555 1556 /* VC unusable before this flag is set */ 1557 set_bit(ATM_VF_READY, &vcc->flags); 1558 1559 return 0; 1560 } 1561 1562 1563 static void 1564 fore200e_close(struct atm_vcc* vcc) 1565 { 1566 struct fore200e* fore200e = FORE200E_DEV(vcc->dev); 1567 struct fore200e_vcc* fore200e_vcc; 1568 struct fore200e_vc_map* vc_map; 1569 unsigned long flags; 1570 1571 ASSERT(vcc); 1572 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS)); 1573 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS)); 1574 1575 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal)); 1576 1577 clear_bit(ATM_VF_READY, &vcc->flags); 1578 1579 fore200e_activate_vcin(fore200e, 0, vcc, 0); 1580 1581 spin_lock_irqsave(&fore200e->q_lock, flags); 1582 1583 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci); 1584 1585 /* the vc is no longer considered as "in use" by fore200e_open() */ 1586 vc_map->vcc = NULL; 1587 1588 vcc->itf = vcc->vci = vcc->vpi = 0; 1589 1590 fore200e_vcc = FORE200E_VCC(vcc); 1591 vcc->dev_data = NULL; 1592 1593 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1594 1595 /* release reserved bandwidth, if any */ 1596 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) { 1597 1598 mutex_lock(&fore200e->rate_mtx); 1599 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr; 1600 mutex_unlock(&fore200e->rate_mtx); 1601 1602 clear_bit(ATM_VF_HASQOS, &vcc->flags); 1603 } 1604 1605 clear_bit(ATM_VF_ADDR, &vcc->flags); 1606 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1607 1608 ASSERT(fore200e_vcc); 1609 kfree(fore200e_vcc); 1610 } 1611 1612 1613 static int 1614 fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb) 1615 { 1616 struct fore200e* fore200e = FORE200E_DEV(vcc->dev); 1617 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc); 1618 struct fore200e_vc_map* vc_map; 1619 struct host_txq* txq = &fore200e->host_txq; 1620 struct host_txq_entry* entry; 1621 struct tpd* tpd; 1622 struct tpd_haddr tpd_haddr; 1623 int retry = CONFIG_ATM_FORE200E_TX_RETRY; 1624 int tx_copy = 0; 1625 int tx_len = skb->len; 1626 u32* cell_header = NULL; 1627 unsigned char* skb_data; 1628 int skb_len; 1629 unsigned char* data; 1630 unsigned long flags; 1631 1632 ASSERT(vcc); 1633 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0); 1634 ASSERT(fore200e); 1635 ASSERT(fore200e_vcc); 1636 1637 if (!test_bit(ATM_VF_READY, &vcc->flags)) { 1638 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi); 1639 dev_kfree_skb_any(skb); 1640 return -EINVAL; 1641 } 1642 1643 #ifdef FORE200E_52BYTE_AAL0_SDU 1644 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) { 1645 cell_header = (u32*) skb->data; 1646 skb_data = skb->data + 4; /* skip 4-byte cell header */ 1647 skb_len = tx_len = skb->len - 4; 1648 1649 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header); 1650 } 1651 else 1652 #endif 1653 { 1654 skb_data = skb->data; 1655 skb_len = skb->len; 1656 } 1657 1658 if (((unsigned long)skb_data) & 0x3) { 1659 1660 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name); 1661 tx_copy = 1; 1662 tx_len = skb_len; 1663 } 1664 1665 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) { 1666 1667 /* this simply NUKES the PCA board */ 1668 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name); 1669 tx_copy = 1; 1670 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD; 1671 } 1672 1673 if (tx_copy) { 1674 data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA); 1675 if (data == NULL) { 1676 if (vcc->pop) { 1677 vcc->pop(vcc, skb); 1678 } 1679 else { 1680 dev_kfree_skb_any(skb); 1681 } 1682 return -ENOMEM; 1683 } 1684 1685 memcpy(data, skb_data, skb_len); 1686 if (skb_len < tx_len) 1687 memset(data + skb_len, 0x00, tx_len - skb_len); 1688 } 1689 else { 1690 data = skb_data; 1691 } 1692 1693 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci); 1694 ASSERT(vc_map->vcc == vcc); 1695 1696 retry_here: 1697 1698 spin_lock_irqsave(&fore200e->q_lock, flags); 1699 1700 entry = &txq->host_entry[ txq->head ]; 1701 1702 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) { 1703 1704 /* try to free completed tx queue entries */ 1705 fore200e_tx_irq(fore200e); 1706 1707 if (*entry->status != STATUS_FREE) { 1708 1709 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1710 1711 /* retry once again? */ 1712 if (--retry > 0) { 1713 udelay(50); 1714 goto retry_here; 1715 } 1716 1717 atomic_inc(&vcc->stats->tx_err); 1718 1719 fore200e->tx_sat++; 1720 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n", 1721 fore200e->name, fore200e->cp_queues->heartbeat); 1722 if (vcc->pop) { 1723 vcc->pop(vcc, skb); 1724 } 1725 else { 1726 dev_kfree_skb_any(skb); 1727 } 1728 1729 if (tx_copy) 1730 kfree(data); 1731 1732 return -ENOBUFS; 1733 } 1734 } 1735 1736 entry->incarn = vc_map->incarn; 1737 entry->vc_map = vc_map; 1738 entry->skb = skb; 1739 entry->data = tx_copy ? data : NULL; 1740 1741 tpd = entry->tpd; 1742 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, DMA_TO_DEVICE); 1743 tpd->tsd[ 0 ].length = tx_len; 1744 1745 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX); 1746 txq->txing++; 1747 1748 /* The dma_map call above implies a dma_sync so the device can use it, 1749 * thus no explicit dma_sync call is necessary here. 1750 */ 1751 1752 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n", 1753 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal), 1754 tpd->tsd[0].length, skb_len); 1755 1756 if (skb_len < fore200e_vcc->tx_min_pdu) 1757 fore200e_vcc->tx_min_pdu = skb_len; 1758 if (skb_len > fore200e_vcc->tx_max_pdu) 1759 fore200e_vcc->tx_max_pdu = skb_len; 1760 fore200e_vcc->tx_pdu++; 1761 1762 /* set tx rate control information */ 1763 tpd->rate.data_cells = fore200e_vcc->rate.data_cells; 1764 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells; 1765 1766 if (cell_header) { 1767 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP); 1768 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT; 1769 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT; 1770 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT; 1771 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT; 1772 } 1773 else { 1774 /* set the ATM header, common to all cells conveying the PDU */ 1775 tpd->atm_header.clp = 0; 1776 tpd->atm_header.plt = 0; 1777 tpd->atm_header.vci = vcc->vci; 1778 tpd->atm_header.vpi = vcc->vpi; 1779 tpd->atm_header.gfc = 0; 1780 } 1781 1782 tpd->spec.length = tx_len; 1783 tpd->spec.nseg = 1; 1784 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal); 1785 tpd->spec.intr = 1; 1786 1787 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */ 1788 tpd_haddr.pad = 0; 1789 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */ 1790 1791 *entry->status = STATUS_PENDING; 1792 fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr); 1793 1794 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1795 1796 return 0; 1797 } 1798 1799 1800 static int 1801 fore200e_getstats(struct fore200e* fore200e) 1802 { 1803 struct host_cmdq* cmdq = &fore200e->host_cmdq; 1804 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 1805 struct stats_opcode opcode; 1806 int ok; 1807 u32 stats_dma_addr; 1808 1809 if (fore200e->stats == NULL) { 1810 fore200e->stats = kzalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA); 1811 if (fore200e->stats == NULL) 1812 return -ENOMEM; 1813 } 1814 1815 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats, 1816 sizeof(struct stats), DMA_FROM_DEVICE); 1817 1818 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 1819 1820 opcode.opcode = OPCODE_GET_STATS; 1821 opcode.pad = 0; 1822 1823 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr); 1824 1825 *entry->status = STATUS_PENDING; 1826 1827 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode); 1828 1829 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 1830 1831 *entry->status = STATUS_FREE; 1832 1833 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE); 1834 1835 if (ok == 0) { 1836 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name); 1837 return -EIO; 1838 } 1839 1840 return 0; 1841 } 1842 1843 1844 static int 1845 fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen) 1846 { 1847 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */ 1848 1849 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n", 1850 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen); 1851 1852 return -EINVAL; 1853 } 1854 1855 1856 static int 1857 fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen) 1858 { 1859 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */ 1860 1861 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n", 1862 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen); 1863 1864 return -EINVAL; 1865 } 1866 1867 1868 #if 0 /* currently unused */ 1869 static int 1870 fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs) 1871 { 1872 struct host_cmdq* cmdq = &fore200e->host_cmdq; 1873 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 1874 struct oc3_opcode opcode; 1875 int ok; 1876 u32 oc3_regs_dma_addr; 1877 1878 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE); 1879 1880 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 1881 1882 opcode.opcode = OPCODE_GET_OC3; 1883 opcode.reg = 0; 1884 opcode.value = 0; 1885 opcode.mask = 0; 1886 1887 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr); 1888 1889 *entry->status = STATUS_PENDING; 1890 1891 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode); 1892 1893 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 1894 1895 *entry->status = STATUS_FREE; 1896 1897 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE); 1898 1899 if (ok == 0) { 1900 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name); 1901 return -EIO; 1902 } 1903 1904 return 0; 1905 } 1906 #endif 1907 1908 1909 static int 1910 fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask) 1911 { 1912 struct host_cmdq* cmdq = &fore200e->host_cmdq; 1913 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 1914 struct oc3_opcode opcode; 1915 int ok; 1916 1917 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask); 1918 1919 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 1920 1921 opcode.opcode = OPCODE_SET_OC3; 1922 opcode.reg = reg; 1923 opcode.value = value; 1924 opcode.mask = mask; 1925 1926 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr); 1927 1928 *entry->status = STATUS_PENDING; 1929 1930 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode); 1931 1932 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 1933 1934 *entry->status = STATUS_FREE; 1935 1936 if (ok == 0) { 1937 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name); 1938 return -EIO; 1939 } 1940 1941 return 0; 1942 } 1943 1944 1945 static int 1946 fore200e_setloop(struct fore200e* fore200e, int loop_mode) 1947 { 1948 u32 mct_value, mct_mask; 1949 int error; 1950 1951 if (!capable(CAP_NET_ADMIN)) 1952 return -EPERM; 1953 1954 switch (loop_mode) { 1955 1956 case ATM_LM_NONE: 1957 mct_value = 0; 1958 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE; 1959 break; 1960 1961 case ATM_LM_LOC_PHY: 1962 mct_value = mct_mask = SUNI_MCT_DLE; 1963 break; 1964 1965 case ATM_LM_RMT_PHY: 1966 mct_value = mct_mask = SUNI_MCT_LLE; 1967 break; 1968 1969 default: 1970 return -EINVAL; 1971 } 1972 1973 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask); 1974 if (error == 0) 1975 fore200e->loop_mode = loop_mode; 1976 1977 return error; 1978 } 1979 1980 1981 static int 1982 fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg) 1983 { 1984 struct sonet_stats tmp; 1985 1986 if (fore200e_getstats(fore200e) < 0) 1987 return -EIO; 1988 1989 tmp.section_bip = be32_to_cpu(fore200e->stats->oc3.section_bip8_errors); 1990 tmp.line_bip = be32_to_cpu(fore200e->stats->oc3.line_bip24_errors); 1991 tmp.path_bip = be32_to_cpu(fore200e->stats->oc3.path_bip8_errors); 1992 tmp.line_febe = be32_to_cpu(fore200e->stats->oc3.line_febe_errors); 1993 tmp.path_febe = be32_to_cpu(fore200e->stats->oc3.path_febe_errors); 1994 tmp.corr_hcs = be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors); 1995 tmp.uncorr_hcs = be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors); 1996 tmp.tx_cells = be32_to_cpu(fore200e->stats->aal0.cells_transmitted) + 1997 be32_to_cpu(fore200e->stats->aal34.cells_transmitted) + 1998 be32_to_cpu(fore200e->stats->aal5.cells_transmitted); 1999 tmp.rx_cells = be32_to_cpu(fore200e->stats->aal0.cells_received) + 2000 be32_to_cpu(fore200e->stats->aal34.cells_received) + 2001 be32_to_cpu(fore200e->stats->aal5.cells_received); 2002 2003 if (arg) 2004 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0; 2005 2006 return 0; 2007 } 2008 2009 2010 static int 2011 fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg) 2012 { 2013 struct fore200e* fore200e = FORE200E_DEV(dev); 2014 2015 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg); 2016 2017 switch (cmd) { 2018 2019 case SONET_GETSTAT: 2020 return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg); 2021 2022 case SONET_GETDIAG: 2023 return put_user(0, (int __user *)arg) ? -EFAULT : 0; 2024 2025 case ATM_SETLOOP: 2026 return fore200e_setloop(fore200e, (int)(unsigned long)arg); 2027 2028 case ATM_GETLOOP: 2029 return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0; 2030 2031 case ATM_QUERYLOOP: 2032 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0; 2033 } 2034 2035 return -ENOSYS; /* not implemented */ 2036 } 2037 2038 2039 static int 2040 fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags) 2041 { 2042 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc); 2043 struct fore200e* fore200e = FORE200E_DEV(vcc->dev); 2044 2045 if (!test_bit(ATM_VF_READY, &vcc->flags)) { 2046 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi); 2047 return -EINVAL; 2048 } 2049 2050 DPRINTK(2, "change_qos %d.%d.%d, " 2051 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; " 2052 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n" 2053 "available_cell_rate = %u", 2054 vcc->itf, vcc->vpi, vcc->vci, 2055 fore200e_traffic_class[ qos->txtp.traffic_class ], 2056 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu, 2057 fore200e_traffic_class[ qos->rxtp.traffic_class ], 2058 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu, 2059 flags, fore200e->available_cell_rate); 2060 2061 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) { 2062 2063 mutex_lock(&fore200e->rate_mtx); 2064 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) { 2065 mutex_unlock(&fore200e->rate_mtx); 2066 return -EAGAIN; 2067 } 2068 2069 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr; 2070 fore200e->available_cell_rate -= qos->txtp.max_pcr; 2071 2072 mutex_unlock(&fore200e->rate_mtx); 2073 2074 memcpy(&vcc->qos, qos, sizeof(struct atm_qos)); 2075 2076 /* update rate control parameters */ 2077 fore200e_rate_ctrl(qos, &fore200e_vcc->rate); 2078 2079 set_bit(ATM_VF_HASQOS, &vcc->flags); 2080 2081 return 0; 2082 } 2083 2084 return -EINVAL; 2085 } 2086 2087 2088 static int __devinit 2089 fore200e_irq_request(struct fore200e* fore200e) 2090 { 2091 if (request_irq(fore200e->irq, fore200e_interrupt, IRQF_SHARED, fore200e->name, fore200e->atm_dev) < 0) { 2092 2093 printk(FORE200E "unable to reserve IRQ %s for device %s\n", 2094 fore200e_irq_itoa(fore200e->irq), fore200e->name); 2095 return -EBUSY; 2096 } 2097 2098 printk(FORE200E "IRQ %s reserved for device %s\n", 2099 fore200e_irq_itoa(fore200e->irq), fore200e->name); 2100 2101 #ifdef FORE200E_USE_TASKLET 2102 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e); 2103 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e); 2104 #endif 2105 2106 fore200e->state = FORE200E_STATE_IRQ; 2107 return 0; 2108 } 2109 2110 2111 static int __devinit 2112 fore200e_get_esi(struct fore200e* fore200e) 2113 { 2114 struct prom_data* prom = kzalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA); 2115 int ok, i; 2116 2117 if (!prom) 2118 return -ENOMEM; 2119 2120 ok = fore200e->bus->prom_read(fore200e, prom); 2121 if (ok < 0) { 2122 kfree(prom); 2123 return -EBUSY; 2124 } 2125 2126 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %02x:%02x:%02x:%02x:%02x:%02x\n", 2127 fore200e->name, 2128 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */ 2129 prom->serial_number & 0xFFFF, 2130 prom->mac_addr[ 2 ], prom->mac_addr[ 3 ], prom->mac_addr[ 4 ], 2131 prom->mac_addr[ 5 ], prom->mac_addr[ 6 ], prom->mac_addr[ 7 ]); 2132 2133 for (i = 0; i < ESI_LEN; i++) { 2134 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ]; 2135 } 2136 2137 kfree(prom); 2138 2139 return 0; 2140 } 2141 2142 2143 static int __devinit 2144 fore200e_alloc_rx_buf(struct fore200e* fore200e) 2145 { 2146 int scheme, magn, nbr, size, i; 2147 2148 struct host_bsq* bsq; 2149 struct buffer* buffer; 2150 2151 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 2152 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 2153 2154 bsq = &fore200e->host_bsq[ scheme ][ magn ]; 2155 2156 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ]; 2157 size = fore200e_rx_buf_size[ scheme ][ magn ]; 2158 2159 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn); 2160 2161 /* allocate the array of receive buffers */ 2162 buffer = bsq->buffer = kzalloc(nbr * sizeof(struct buffer), GFP_KERNEL); 2163 2164 if (buffer == NULL) 2165 return -ENOMEM; 2166 2167 bsq->freebuf = NULL; 2168 2169 for (i = 0; i < nbr; i++) { 2170 2171 buffer[ i ].scheme = scheme; 2172 buffer[ i ].magn = magn; 2173 #ifdef FORE200E_BSQ_DEBUG 2174 buffer[ i ].index = i; 2175 buffer[ i ].supplied = 0; 2176 #endif 2177 2178 /* allocate the receive buffer body */ 2179 if (fore200e_chunk_alloc(fore200e, 2180 &buffer[ i ].data, size, fore200e->bus->buffer_alignment, 2181 DMA_FROM_DEVICE) < 0) { 2182 2183 while (i > 0) 2184 fore200e_chunk_free(fore200e, &buffer[ --i ].data); 2185 kfree(buffer); 2186 2187 return -ENOMEM; 2188 } 2189 2190 /* insert the buffer into the free buffer list */ 2191 buffer[ i ].next = bsq->freebuf; 2192 bsq->freebuf = &buffer[ i ]; 2193 } 2194 /* all the buffers are free, initially */ 2195 bsq->freebuf_count = nbr; 2196 2197 #ifdef FORE200E_BSQ_DEBUG 2198 bsq_audit(3, bsq, scheme, magn); 2199 #endif 2200 } 2201 } 2202 2203 fore200e->state = FORE200E_STATE_ALLOC_BUF; 2204 return 0; 2205 } 2206 2207 2208 static int __devinit 2209 fore200e_init_bs_queue(struct fore200e* fore200e) 2210 { 2211 int scheme, magn, i; 2212 2213 struct host_bsq* bsq; 2214 struct cp_bsq_entry __iomem * cp_entry; 2215 2216 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 2217 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 2218 2219 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn); 2220 2221 bsq = &fore200e->host_bsq[ scheme ][ magn ]; 2222 2223 /* allocate and align the array of status words */ 2224 if (fore200e->bus->dma_chunk_alloc(fore200e, 2225 &bsq->status, 2226 sizeof(enum status), 2227 QUEUE_SIZE_BS, 2228 fore200e->bus->status_alignment) < 0) { 2229 return -ENOMEM; 2230 } 2231 2232 /* allocate and align the array of receive buffer descriptors */ 2233 if (fore200e->bus->dma_chunk_alloc(fore200e, 2234 &bsq->rbd_block, 2235 sizeof(struct rbd_block), 2236 QUEUE_SIZE_BS, 2237 fore200e->bus->descr_alignment) < 0) { 2238 2239 fore200e->bus->dma_chunk_free(fore200e, &bsq->status); 2240 return -ENOMEM; 2241 } 2242 2243 /* get the base address of the cp resident buffer supply queue entries */ 2244 cp_entry = fore200e->virt_base + 2245 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]); 2246 2247 /* fill the host resident and cp resident buffer supply queue entries */ 2248 for (i = 0; i < QUEUE_SIZE_BS; i++) { 2249 2250 bsq->host_entry[ i ].status = 2251 FORE200E_INDEX(bsq->status.align_addr, enum status, i); 2252 bsq->host_entry[ i ].rbd_block = 2253 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i); 2254 bsq->host_entry[ i ].rbd_block_dma = 2255 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i); 2256 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ]; 2257 2258 *bsq->host_entry[ i ].status = STATUS_FREE; 2259 2260 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i), 2261 &cp_entry[ i ].status_haddr); 2262 } 2263 } 2264 } 2265 2266 fore200e->state = FORE200E_STATE_INIT_BSQ; 2267 return 0; 2268 } 2269 2270 2271 static int __devinit 2272 fore200e_init_rx_queue(struct fore200e* fore200e) 2273 { 2274 struct host_rxq* rxq = &fore200e->host_rxq; 2275 struct cp_rxq_entry __iomem * cp_entry; 2276 int i; 2277 2278 DPRINTK(2, "receive queue is being initialized\n"); 2279 2280 /* allocate and align the array of status words */ 2281 if (fore200e->bus->dma_chunk_alloc(fore200e, 2282 &rxq->status, 2283 sizeof(enum status), 2284 QUEUE_SIZE_RX, 2285 fore200e->bus->status_alignment) < 0) { 2286 return -ENOMEM; 2287 } 2288 2289 /* allocate and align the array of receive PDU descriptors */ 2290 if (fore200e->bus->dma_chunk_alloc(fore200e, 2291 &rxq->rpd, 2292 sizeof(struct rpd), 2293 QUEUE_SIZE_RX, 2294 fore200e->bus->descr_alignment) < 0) { 2295 2296 fore200e->bus->dma_chunk_free(fore200e, &rxq->status); 2297 return -ENOMEM; 2298 } 2299 2300 /* get the base address of the cp resident rx queue entries */ 2301 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq); 2302 2303 /* fill the host resident and cp resident rx entries */ 2304 for (i=0; i < QUEUE_SIZE_RX; i++) { 2305 2306 rxq->host_entry[ i ].status = 2307 FORE200E_INDEX(rxq->status.align_addr, enum status, i); 2308 rxq->host_entry[ i ].rpd = 2309 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i); 2310 rxq->host_entry[ i ].rpd_dma = 2311 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i); 2312 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ]; 2313 2314 *rxq->host_entry[ i ].status = STATUS_FREE; 2315 2316 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i), 2317 &cp_entry[ i ].status_haddr); 2318 2319 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i), 2320 &cp_entry[ i ].rpd_haddr); 2321 } 2322 2323 /* set the head entry of the queue */ 2324 rxq->head = 0; 2325 2326 fore200e->state = FORE200E_STATE_INIT_RXQ; 2327 return 0; 2328 } 2329 2330 2331 static int __devinit 2332 fore200e_init_tx_queue(struct fore200e* fore200e) 2333 { 2334 struct host_txq* txq = &fore200e->host_txq; 2335 struct cp_txq_entry __iomem * cp_entry; 2336 int i; 2337 2338 DPRINTK(2, "transmit queue is being initialized\n"); 2339 2340 /* allocate and align the array of status words */ 2341 if (fore200e->bus->dma_chunk_alloc(fore200e, 2342 &txq->status, 2343 sizeof(enum status), 2344 QUEUE_SIZE_TX, 2345 fore200e->bus->status_alignment) < 0) { 2346 return -ENOMEM; 2347 } 2348 2349 /* allocate and align the array of transmit PDU descriptors */ 2350 if (fore200e->bus->dma_chunk_alloc(fore200e, 2351 &txq->tpd, 2352 sizeof(struct tpd), 2353 QUEUE_SIZE_TX, 2354 fore200e->bus->descr_alignment) < 0) { 2355 2356 fore200e->bus->dma_chunk_free(fore200e, &txq->status); 2357 return -ENOMEM; 2358 } 2359 2360 /* get the base address of the cp resident tx queue entries */ 2361 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq); 2362 2363 /* fill the host resident and cp resident tx entries */ 2364 for (i=0; i < QUEUE_SIZE_TX; i++) { 2365 2366 txq->host_entry[ i ].status = 2367 FORE200E_INDEX(txq->status.align_addr, enum status, i); 2368 txq->host_entry[ i ].tpd = 2369 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i); 2370 txq->host_entry[ i ].tpd_dma = 2371 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i); 2372 txq->host_entry[ i ].cp_entry = &cp_entry[ i ]; 2373 2374 *txq->host_entry[ i ].status = STATUS_FREE; 2375 2376 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i), 2377 &cp_entry[ i ].status_haddr); 2378 2379 /* although there is a one-to-one mapping of tx queue entries and tpds, 2380 we do not write here the DMA (physical) base address of each tpd into 2381 the related cp resident entry, because the cp relies on this write 2382 operation to detect that a new pdu has been submitted for tx */ 2383 } 2384 2385 /* set the head and tail entries of the queue */ 2386 txq->head = 0; 2387 txq->tail = 0; 2388 2389 fore200e->state = FORE200E_STATE_INIT_TXQ; 2390 return 0; 2391 } 2392 2393 2394 static int __devinit 2395 fore200e_init_cmd_queue(struct fore200e* fore200e) 2396 { 2397 struct host_cmdq* cmdq = &fore200e->host_cmdq; 2398 struct cp_cmdq_entry __iomem * cp_entry; 2399 int i; 2400 2401 DPRINTK(2, "command queue is being initialized\n"); 2402 2403 /* allocate and align the array of status words */ 2404 if (fore200e->bus->dma_chunk_alloc(fore200e, 2405 &cmdq->status, 2406 sizeof(enum status), 2407 QUEUE_SIZE_CMD, 2408 fore200e->bus->status_alignment) < 0) { 2409 return -ENOMEM; 2410 } 2411 2412 /* get the base address of the cp resident cmd queue entries */ 2413 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq); 2414 2415 /* fill the host resident and cp resident cmd entries */ 2416 for (i=0; i < QUEUE_SIZE_CMD; i++) { 2417 2418 cmdq->host_entry[ i ].status = 2419 FORE200E_INDEX(cmdq->status.align_addr, enum status, i); 2420 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ]; 2421 2422 *cmdq->host_entry[ i ].status = STATUS_FREE; 2423 2424 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i), 2425 &cp_entry[ i ].status_haddr); 2426 } 2427 2428 /* set the head entry of the queue */ 2429 cmdq->head = 0; 2430 2431 fore200e->state = FORE200E_STATE_INIT_CMDQ; 2432 return 0; 2433 } 2434 2435 2436 static void __devinit 2437 fore200e_param_bs_queue(struct fore200e* fore200e, 2438 enum buffer_scheme scheme, enum buffer_magn magn, 2439 int queue_length, int pool_size, int supply_blksize) 2440 { 2441 struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ]; 2442 2443 fore200e->bus->write(queue_length, &bs_spec->queue_length); 2444 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size); 2445 fore200e->bus->write(pool_size, &bs_spec->pool_size); 2446 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize); 2447 } 2448 2449 2450 static int __devinit 2451 fore200e_initialize(struct fore200e* fore200e) 2452 { 2453 struct cp_queues __iomem * cpq; 2454 int ok, scheme, magn; 2455 2456 DPRINTK(2, "device %s being initialized\n", fore200e->name); 2457 2458 mutex_init(&fore200e->rate_mtx); 2459 spin_lock_init(&fore200e->q_lock); 2460 2461 cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET; 2462 2463 /* enable cp to host interrupts */ 2464 fore200e->bus->write(1, &cpq->imask); 2465 2466 if (fore200e->bus->irq_enable) 2467 fore200e->bus->irq_enable(fore200e); 2468 2469 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect); 2470 2471 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len); 2472 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len); 2473 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len); 2474 2475 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension); 2476 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension); 2477 2478 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) 2479 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) 2480 fore200e_param_bs_queue(fore200e, scheme, magn, 2481 QUEUE_SIZE_BS, 2482 fore200e_rx_buf_nbr[ scheme ][ magn ], 2483 RBD_BLK_SIZE); 2484 2485 /* issue the initialize command */ 2486 fore200e->bus->write(STATUS_PENDING, &cpq->init.status); 2487 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode); 2488 2489 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000); 2490 if (ok == 0) { 2491 printk(FORE200E "device %s initialization failed\n", fore200e->name); 2492 return -ENODEV; 2493 } 2494 2495 printk(FORE200E "device %s initialized\n", fore200e->name); 2496 2497 fore200e->state = FORE200E_STATE_INITIALIZE; 2498 return 0; 2499 } 2500 2501 2502 static void __devinit 2503 fore200e_monitor_putc(struct fore200e* fore200e, char c) 2504 { 2505 struct cp_monitor __iomem * monitor = fore200e->cp_monitor; 2506 2507 #if 0 2508 printk("%c", c); 2509 #endif 2510 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send); 2511 } 2512 2513 2514 static int __devinit 2515 fore200e_monitor_getc(struct fore200e* fore200e) 2516 { 2517 struct cp_monitor __iomem * monitor = fore200e->cp_monitor; 2518 unsigned long timeout = jiffies + msecs_to_jiffies(50); 2519 int c; 2520 2521 while (time_before(jiffies, timeout)) { 2522 2523 c = (int) fore200e->bus->read(&monitor->soft_uart.recv); 2524 2525 if (c & FORE200E_CP_MONITOR_UART_AVAIL) { 2526 2527 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv); 2528 #if 0 2529 printk("%c", c & 0xFF); 2530 #endif 2531 return c & 0xFF; 2532 } 2533 } 2534 2535 return -1; 2536 } 2537 2538 2539 static void __devinit 2540 fore200e_monitor_puts(struct fore200e* fore200e, char* str) 2541 { 2542 while (*str) { 2543 2544 /* the i960 monitor doesn't accept any new character if it has something to say */ 2545 while (fore200e_monitor_getc(fore200e) >= 0); 2546 2547 fore200e_monitor_putc(fore200e, *str++); 2548 } 2549 2550 while (fore200e_monitor_getc(fore200e) >= 0); 2551 } 2552 2553 #ifdef __LITTLE_ENDIAN 2554 #define FW_EXT ".bin" 2555 #else 2556 #define FW_EXT "_ecd.bin2" 2557 #endif 2558 2559 static int __devinit 2560 fore200e_load_and_start_fw(struct fore200e* fore200e) 2561 { 2562 const struct firmware *firmware; 2563 struct device *device; 2564 struct fw_header *fw_header; 2565 const __le32 *fw_data; 2566 u32 fw_size; 2567 u32 __iomem *load_addr; 2568 char buf[48]; 2569 int err = -ENODEV; 2570 2571 if (strcmp(fore200e->bus->model_name, "PCA-200E") == 0) 2572 device = &((struct pci_dev *) fore200e->bus_dev)->dev; 2573 #ifdef CONFIG_SBUS 2574 else if (strcmp(fore200e->bus->model_name, "SBA-200E") == 0) 2575 device = &((struct sbus_dev *) fore200e->bus_dev)->ofdev.dev; 2576 #endif 2577 else 2578 return err; 2579 2580 sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT); 2581 if (request_firmware(&firmware, buf, device) == 1) { 2582 printk(FORE200E "missing %s firmware image\n", fore200e->bus->model_name); 2583 return err; 2584 } 2585 2586 fw_data = (__le32 *) firmware->data; 2587 fw_size = firmware->size / sizeof(u32); 2588 fw_header = (struct fw_header *) firmware->data; 2589 load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset); 2590 2591 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n", 2592 fore200e->name, load_addr, fw_size); 2593 2594 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) { 2595 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name); 2596 goto release; 2597 } 2598 2599 for (; fw_size--; fw_data++, load_addr++) 2600 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr); 2601 2602 DPRINTK(2, "device %s firmware being started\n", fore200e->name); 2603 2604 #if defined(__sparc_v9__) 2605 /* reported to be required by SBA cards on some sparc64 hosts */ 2606 fore200e_spin(100); 2607 #endif 2608 2609 sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset)); 2610 fore200e_monitor_puts(fore200e, buf); 2611 2612 if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) { 2613 printk(FORE200E "device %s firmware didn't start\n", fore200e->name); 2614 goto release; 2615 } 2616 2617 printk(FORE200E "device %s firmware started\n", fore200e->name); 2618 2619 fore200e->state = FORE200E_STATE_START_FW; 2620 err = 0; 2621 2622 release: 2623 release_firmware(firmware); 2624 return err; 2625 } 2626 2627 2628 static int __devinit 2629 fore200e_register(struct fore200e* fore200e) 2630 { 2631 struct atm_dev* atm_dev; 2632 2633 DPRINTK(2, "device %s being registered\n", fore200e->name); 2634 2635 atm_dev = atm_dev_register(fore200e->bus->proc_name, &fore200e_ops, -1, 2636 NULL); 2637 if (atm_dev == NULL) { 2638 printk(FORE200E "unable to register device %s\n", fore200e->name); 2639 return -ENODEV; 2640 } 2641 2642 atm_dev->dev_data = fore200e; 2643 fore200e->atm_dev = atm_dev; 2644 2645 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS; 2646 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS; 2647 2648 fore200e->available_cell_rate = ATM_OC3_PCR; 2649 2650 fore200e->state = FORE200E_STATE_REGISTER; 2651 return 0; 2652 } 2653 2654 2655 static int __devinit 2656 fore200e_init(struct fore200e* fore200e) 2657 { 2658 if (fore200e_register(fore200e) < 0) 2659 return -ENODEV; 2660 2661 if (fore200e->bus->configure(fore200e) < 0) 2662 return -ENODEV; 2663 2664 if (fore200e->bus->map(fore200e) < 0) 2665 return -ENODEV; 2666 2667 if (fore200e_reset(fore200e, 1) < 0) 2668 return -ENODEV; 2669 2670 if (fore200e_load_and_start_fw(fore200e) < 0) 2671 return -ENODEV; 2672 2673 if (fore200e_initialize(fore200e) < 0) 2674 return -ENODEV; 2675 2676 if (fore200e_init_cmd_queue(fore200e) < 0) 2677 return -ENOMEM; 2678 2679 if (fore200e_init_tx_queue(fore200e) < 0) 2680 return -ENOMEM; 2681 2682 if (fore200e_init_rx_queue(fore200e) < 0) 2683 return -ENOMEM; 2684 2685 if (fore200e_init_bs_queue(fore200e) < 0) 2686 return -ENOMEM; 2687 2688 if (fore200e_alloc_rx_buf(fore200e) < 0) 2689 return -ENOMEM; 2690 2691 if (fore200e_get_esi(fore200e) < 0) 2692 return -EIO; 2693 2694 if (fore200e_irq_request(fore200e) < 0) 2695 return -EBUSY; 2696 2697 fore200e_supply(fore200e); 2698 2699 /* all done, board initialization is now complete */ 2700 fore200e->state = FORE200E_STATE_COMPLETE; 2701 return 0; 2702 } 2703 2704 #ifdef CONFIG_PCI 2705 static int __devinit 2706 fore200e_pca_detect(struct pci_dev *pci_dev, const struct pci_device_id *pci_ent) 2707 { 2708 const struct fore200e_bus* bus = (struct fore200e_bus*) pci_ent->driver_data; 2709 struct fore200e* fore200e; 2710 int err = 0; 2711 static int index = 0; 2712 2713 if (pci_enable_device(pci_dev)) { 2714 err = -EINVAL; 2715 goto out; 2716 } 2717 2718 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL); 2719 if (fore200e == NULL) { 2720 err = -ENOMEM; 2721 goto out_disable; 2722 } 2723 2724 fore200e->bus = bus; 2725 fore200e->bus_dev = pci_dev; 2726 fore200e->irq = pci_dev->irq; 2727 fore200e->phys_base = pci_resource_start(pci_dev, 0); 2728 2729 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1); 2730 2731 pci_set_master(pci_dev); 2732 2733 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n", 2734 fore200e->bus->model_name, 2735 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq)); 2736 2737 sprintf(fore200e->name, "%s-%d", bus->model_name, index); 2738 2739 err = fore200e_init(fore200e); 2740 if (err < 0) { 2741 fore200e_shutdown(fore200e); 2742 goto out_free; 2743 } 2744 2745 ++index; 2746 pci_set_drvdata(pci_dev, fore200e); 2747 2748 out: 2749 return err; 2750 2751 out_free: 2752 kfree(fore200e); 2753 out_disable: 2754 pci_disable_device(pci_dev); 2755 goto out; 2756 } 2757 2758 2759 static void __devexit fore200e_pca_remove_one(struct pci_dev *pci_dev) 2760 { 2761 struct fore200e *fore200e; 2762 2763 fore200e = pci_get_drvdata(pci_dev); 2764 2765 fore200e_shutdown(fore200e); 2766 kfree(fore200e); 2767 pci_disable_device(pci_dev); 2768 } 2769 2770 2771 static struct pci_device_id fore200e_pca_tbl[] = { 2772 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID, 2773 0, 0, (unsigned long) &fore200e_bus[0] }, 2774 { 0, } 2775 }; 2776 2777 MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl); 2778 2779 static struct pci_driver fore200e_pca_driver = { 2780 .name = "fore_200e", 2781 .probe = fore200e_pca_detect, 2782 .remove = __devexit_p(fore200e_pca_remove_one), 2783 .id_table = fore200e_pca_tbl, 2784 }; 2785 #endif 2786 2787 2788 static int __init 2789 fore200e_module_init(void) 2790 { 2791 const struct fore200e_bus* bus; 2792 struct fore200e* fore200e; 2793 int index; 2794 2795 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n"); 2796 2797 /* for each configured bus interface */ 2798 for (bus = fore200e_bus; bus->model_name; bus++) { 2799 2800 /* detect all boards present on that bus */ 2801 for (index = 0; bus->detect && (fore200e = bus->detect(bus, index)); index++) { 2802 2803 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n", 2804 fore200e->bus->model_name, 2805 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq)); 2806 2807 sprintf(fore200e->name, "%s-%d", bus->model_name, index); 2808 2809 if (fore200e_init(fore200e) < 0) { 2810 2811 fore200e_shutdown(fore200e); 2812 break; 2813 } 2814 2815 list_add(&fore200e->entry, &fore200e_boards); 2816 } 2817 } 2818 2819 #ifdef CONFIG_PCI 2820 if (!pci_register_driver(&fore200e_pca_driver)) 2821 return 0; 2822 #endif 2823 2824 if (!list_empty(&fore200e_boards)) 2825 return 0; 2826 2827 return -ENODEV; 2828 } 2829 2830 2831 static void __exit 2832 fore200e_module_cleanup(void) 2833 { 2834 struct fore200e *fore200e, *next; 2835 2836 #ifdef CONFIG_PCI 2837 pci_unregister_driver(&fore200e_pca_driver); 2838 #endif 2839 2840 list_for_each_entry_safe(fore200e, next, &fore200e_boards, entry) { 2841 fore200e_shutdown(fore200e); 2842 kfree(fore200e); 2843 } 2844 DPRINTK(1, "module being removed\n"); 2845 } 2846 2847 2848 static int 2849 fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page) 2850 { 2851 struct fore200e* fore200e = FORE200E_DEV(dev); 2852 struct fore200e_vcc* fore200e_vcc; 2853 struct atm_vcc* vcc; 2854 int i, len, left = *pos; 2855 unsigned long flags; 2856 2857 if (!left--) { 2858 2859 if (fore200e_getstats(fore200e) < 0) 2860 return -EIO; 2861 2862 len = sprintf(page,"\n" 2863 " device:\n" 2864 " internal name:\t\t%s\n", fore200e->name); 2865 2866 /* print bus-specific information */ 2867 if (fore200e->bus->proc_read) 2868 len += fore200e->bus->proc_read(fore200e, page + len); 2869 2870 len += sprintf(page + len, 2871 " interrupt line:\t\t%s\n" 2872 " physical base address:\t0x%p\n" 2873 " virtual base address:\t0x%p\n" 2874 " factory address (ESI):\t%02x:%02x:%02x:%02x:%02x:%02x\n" 2875 " board serial number:\t\t%d\n\n", 2876 fore200e_irq_itoa(fore200e->irq), 2877 (void*)fore200e->phys_base, 2878 fore200e->virt_base, 2879 fore200e->esi[0], fore200e->esi[1], fore200e->esi[2], 2880 fore200e->esi[3], fore200e->esi[4], fore200e->esi[5], 2881 fore200e->esi[4] * 256 + fore200e->esi[5]); 2882 2883 return len; 2884 } 2885 2886 if (!left--) 2887 return sprintf(page, 2888 " free small bufs, scheme 1:\t%d\n" 2889 " free large bufs, scheme 1:\t%d\n" 2890 " free small bufs, scheme 2:\t%d\n" 2891 " free large bufs, scheme 2:\t%d\n", 2892 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count, 2893 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count, 2894 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count, 2895 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count); 2896 2897 if (!left--) { 2898 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat); 2899 2900 len = sprintf(page,"\n\n" 2901 " cell processor:\n" 2902 " heartbeat state:\t\t"); 2903 2904 if (hb >> 16 != 0xDEAD) 2905 len += sprintf(page + len, "0x%08x\n", hb); 2906 else 2907 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF); 2908 2909 return len; 2910 } 2911 2912 if (!left--) { 2913 static const char* media_name[] = { 2914 "unshielded twisted pair", 2915 "multimode optical fiber ST", 2916 "multimode optical fiber SC", 2917 "single-mode optical fiber ST", 2918 "single-mode optical fiber SC", 2919 "unknown" 2920 }; 2921 2922 static const char* oc3_mode[] = { 2923 "normal operation", 2924 "diagnostic loopback", 2925 "line loopback", 2926 "unknown" 2927 }; 2928 2929 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release); 2930 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release); 2931 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision); 2932 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type)); 2933 u32 oc3_index; 2934 2935 if ((media_index < 0) || (media_index > 4)) 2936 media_index = 5; 2937 2938 switch (fore200e->loop_mode) { 2939 case ATM_LM_NONE: oc3_index = 0; 2940 break; 2941 case ATM_LM_LOC_PHY: oc3_index = 1; 2942 break; 2943 case ATM_LM_RMT_PHY: oc3_index = 2; 2944 break; 2945 default: oc3_index = 3; 2946 } 2947 2948 return sprintf(page, 2949 " firmware release:\t\t%d.%d.%d\n" 2950 " monitor release:\t\t%d.%d\n" 2951 " media type:\t\t\t%s\n" 2952 " OC-3 revision:\t\t0x%x\n" 2953 " OC-3 mode:\t\t\t%s", 2954 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24, 2955 mon960_release >> 16, mon960_release << 16 >> 16, 2956 media_name[ media_index ], 2957 oc3_revision, 2958 oc3_mode[ oc3_index ]); 2959 } 2960 2961 if (!left--) { 2962 struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor; 2963 2964 return sprintf(page, 2965 "\n\n" 2966 " monitor:\n" 2967 " version number:\t\t%d\n" 2968 " boot status word:\t\t0x%08x\n", 2969 fore200e->bus->read(&cp_monitor->mon_version), 2970 fore200e->bus->read(&cp_monitor->bstat)); 2971 } 2972 2973 if (!left--) 2974 return sprintf(page, 2975 "\n" 2976 " device statistics:\n" 2977 " 4b5b:\n" 2978 " crc_header_errors:\t\t%10u\n" 2979 " framing_errors:\t\t%10u\n", 2980 be32_to_cpu(fore200e->stats->phy.crc_header_errors), 2981 be32_to_cpu(fore200e->stats->phy.framing_errors)); 2982 2983 if (!left--) 2984 return sprintf(page, "\n" 2985 " OC-3:\n" 2986 " section_bip8_errors:\t%10u\n" 2987 " path_bip8_errors:\t\t%10u\n" 2988 " line_bip24_errors:\t\t%10u\n" 2989 " line_febe_errors:\t\t%10u\n" 2990 " path_febe_errors:\t\t%10u\n" 2991 " corr_hcs_errors:\t\t%10u\n" 2992 " ucorr_hcs_errors:\t\t%10u\n", 2993 be32_to_cpu(fore200e->stats->oc3.section_bip8_errors), 2994 be32_to_cpu(fore200e->stats->oc3.path_bip8_errors), 2995 be32_to_cpu(fore200e->stats->oc3.line_bip24_errors), 2996 be32_to_cpu(fore200e->stats->oc3.line_febe_errors), 2997 be32_to_cpu(fore200e->stats->oc3.path_febe_errors), 2998 be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors), 2999 be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors)); 3000 3001 if (!left--) 3002 return sprintf(page,"\n" 3003 " ATM:\t\t\t\t cells\n" 3004 " TX:\t\t\t%10u\n" 3005 " RX:\t\t\t%10u\n" 3006 " vpi out of range:\t\t%10u\n" 3007 " vpi no conn:\t\t%10u\n" 3008 " vci out of range:\t\t%10u\n" 3009 " vci no conn:\t\t%10u\n", 3010 be32_to_cpu(fore200e->stats->atm.cells_transmitted), 3011 be32_to_cpu(fore200e->stats->atm.cells_received), 3012 be32_to_cpu(fore200e->stats->atm.vpi_bad_range), 3013 be32_to_cpu(fore200e->stats->atm.vpi_no_conn), 3014 be32_to_cpu(fore200e->stats->atm.vci_bad_range), 3015 be32_to_cpu(fore200e->stats->atm.vci_no_conn)); 3016 3017 if (!left--) 3018 return sprintf(page,"\n" 3019 " AAL0:\t\t\t cells\n" 3020 " TX:\t\t\t%10u\n" 3021 " RX:\t\t\t%10u\n" 3022 " dropped:\t\t\t%10u\n", 3023 be32_to_cpu(fore200e->stats->aal0.cells_transmitted), 3024 be32_to_cpu(fore200e->stats->aal0.cells_received), 3025 be32_to_cpu(fore200e->stats->aal0.cells_dropped)); 3026 3027 if (!left--) 3028 return sprintf(page,"\n" 3029 " AAL3/4:\n" 3030 " SAR sublayer:\t\t cells\n" 3031 " TX:\t\t\t%10u\n" 3032 " RX:\t\t\t%10u\n" 3033 " dropped:\t\t\t%10u\n" 3034 " CRC errors:\t\t%10u\n" 3035 " protocol errors:\t\t%10u\n\n" 3036 " CS sublayer:\t\t PDUs\n" 3037 " TX:\t\t\t%10u\n" 3038 " RX:\t\t\t%10u\n" 3039 " dropped:\t\t\t%10u\n" 3040 " protocol errors:\t\t%10u\n", 3041 be32_to_cpu(fore200e->stats->aal34.cells_transmitted), 3042 be32_to_cpu(fore200e->stats->aal34.cells_received), 3043 be32_to_cpu(fore200e->stats->aal34.cells_dropped), 3044 be32_to_cpu(fore200e->stats->aal34.cells_crc_errors), 3045 be32_to_cpu(fore200e->stats->aal34.cells_protocol_errors), 3046 be32_to_cpu(fore200e->stats->aal34.cspdus_transmitted), 3047 be32_to_cpu(fore200e->stats->aal34.cspdus_received), 3048 be32_to_cpu(fore200e->stats->aal34.cspdus_dropped), 3049 be32_to_cpu(fore200e->stats->aal34.cspdus_protocol_errors)); 3050 3051 if (!left--) 3052 return sprintf(page,"\n" 3053 " AAL5:\n" 3054 " SAR sublayer:\t\t cells\n" 3055 " TX:\t\t\t%10u\n" 3056 " RX:\t\t\t%10u\n" 3057 " dropped:\t\t\t%10u\n" 3058 " congestions:\t\t%10u\n\n" 3059 " CS sublayer:\t\t PDUs\n" 3060 " TX:\t\t\t%10u\n" 3061 " RX:\t\t\t%10u\n" 3062 " dropped:\t\t\t%10u\n" 3063 " CRC errors:\t\t%10u\n" 3064 " protocol errors:\t\t%10u\n", 3065 be32_to_cpu(fore200e->stats->aal5.cells_transmitted), 3066 be32_to_cpu(fore200e->stats->aal5.cells_received), 3067 be32_to_cpu(fore200e->stats->aal5.cells_dropped), 3068 be32_to_cpu(fore200e->stats->aal5.congestion_experienced), 3069 be32_to_cpu(fore200e->stats->aal5.cspdus_transmitted), 3070 be32_to_cpu(fore200e->stats->aal5.cspdus_received), 3071 be32_to_cpu(fore200e->stats->aal5.cspdus_dropped), 3072 be32_to_cpu(fore200e->stats->aal5.cspdus_crc_errors), 3073 be32_to_cpu(fore200e->stats->aal5.cspdus_protocol_errors)); 3074 3075 if (!left--) 3076 return sprintf(page,"\n" 3077 " AUX:\t\t allocation failures\n" 3078 " small b1:\t\t\t%10u\n" 3079 " large b1:\t\t\t%10u\n" 3080 " small b2:\t\t\t%10u\n" 3081 " large b2:\t\t\t%10u\n" 3082 " RX PDUs:\t\t\t%10u\n" 3083 " TX PDUs:\t\t\t%10lu\n", 3084 be32_to_cpu(fore200e->stats->aux.small_b1_failed), 3085 be32_to_cpu(fore200e->stats->aux.large_b1_failed), 3086 be32_to_cpu(fore200e->stats->aux.small_b2_failed), 3087 be32_to_cpu(fore200e->stats->aux.large_b2_failed), 3088 be32_to_cpu(fore200e->stats->aux.rpd_alloc_failed), 3089 fore200e->tx_sat); 3090 3091 if (!left--) 3092 return sprintf(page,"\n" 3093 " receive carrier:\t\t\t%s\n", 3094 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!"); 3095 3096 if (!left--) { 3097 return sprintf(page,"\n" 3098 " VCCs:\n address VPI VCI AAL " 3099 "TX PDUs TX min/max size RX PDUs RX min/max size\n"); 3100 } 3101 3102 for (i = 0; i < NBR_CONNECT; i++) { 3103 3104 vcc = fore200e->vc_map[i].vcc; 3105 3106 if (vcc == NULL) 3107 continue; 3108 3109 spin_lock_irqsave(&fore200e->q_lock, flags); 3110 3111 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) { 3112 3113 fore200e_vcc = FORE200E_VCC(vcc); 3114 ASSERT(fore200e_vcc); 3115 3116 len = sprintf(page, 3117 " %08x %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n", 3118 (u32)(unsigned long)vcc, 3119 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal), 3120 fore200e_vcc->tx_pdu, 3121 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu, 3122 fore200e_vcc->tx_max_pdu, 3123 fore200e_vcc->rx_pdu, 3124 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu, 3125 fore200e_vcc->rx_max_pdu); 3126 3127 spin_unlock_irqrestore(&fore200e->q_lock, flags); 3128 return len; 3129 } 3130 3131 spin_unlock_irqrestore(&fore200e->q_lock, flags); 3132 } 3133 3134 return 0; 3135 } 3136 3137 module_init(fore200e_module_init); 3138 module_exit(fore200e_module_cleanup); 3139 3140 3141 static const struct atmdev_ops fore200e_ops = 3142 { 3143 .open = fore200e_open, 3144 .close = fore200e_close, 3145 .ioctl = fore200e_ioctl, 3146 .getsockopt = fore200e_getsockopt, 3147 .setsockopt = fore200e_setsockopt, 3148 .send = fore200e_send, 3149 .change_qos = fore200e_change_qos, 3150 .proc_read = fore200e_proc_read, 3151 .owner = THIS_MODULE 3152 }; 3153 3154 3155 static const struct fore200e_bus fore200e_bus[] = { 3156 #ifdef CONFIG_PCI 3157 { "PCA-200E", "pca200e", 32, 4, 32, 3158 fore200e_pca_read, 3159 fore200e_pca_write, 3160 fore200e_pca_dma_map, 3161 fore200e_pca_dma_unmap, 3162 fore200e_pca_dma_sync_for_cpu, 3163 fore200e_pca_dma_sync_for_device, 3164 fore200e_pca_dma_chunk_alloc, 3165 fore200e_pca_dma_chunk_free, 3166 NULL, 3167 fore200e_pca_configure, 3168 fore200e_pca_map, 3169 fore200e_pca_reset, 3170 fore200e_pca_prom_read, 3171 fore200e_pca_unmap, 3172 NULL, 3173 fore200e_pca_irq_check, 3174 fore200e_pca_irq_ack, 3175 fore200e_pca_proc_read, 3176 }, 3177 #endif 3178 #ifdef CONFIG_SBUS 3179 { "SBA-200E", "sba200e", 32, 64, 32, 3180 fore200e_sba_read, 3181 fore200e_sba_write, 3182 fore200e_sba_dma_map, 3183 fore200e_sba_dma_unmap, 3184 fore200e_sba_dma_sync_for_cpu, 3185 fore200e_sba_dma_sync_for_device, 3186 fore200e_sba_dma_chunk_alloc, 3187 fore200e_sba_dma_chunk_free, 3188 fore200e_sba_detect, 3189 fore200e_sba_configure, 3190 fore200e_sba_map, 3191 fore200e_sba_reset, 3192 fore200e_sba_prom_read, 3193 fore200e_sba_unmap, 3194 fore200e_sba_irq_enable, 3195 fore200e_sba_irq_check, 3196 fore200e_sba_irq_ack, 3197 fore200e_sba_proc_read, 3198 }, 3199 #endif 3200 {} 3201 }; 3202 3203 MODULE_LICENSE("GPL"); 3204 #ifdef CONFIG_PCI 3205 #ifdef __LITTLE_ENDIAN__ 3206 MODULE_FIRMWARE("pca200e.bin"); 3207 #else 3208 MODULE_FIRMWARE("pca200e_ecd.bin2"); 3209 #endif 3210 #endif /* CONFIG_PCI */ 3211 #ifdef CONFIG_SBUS 3212 MODULE_FIRMWARE("sba200e_ecd.bin2"); 3213 #endif 3214