1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 A FORE Systems 200E-series driver for ATM on Linux. 4 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003. 5 6 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de). 7 8 This driver simultaneously supports PCA-200E and SBA-200E adapters 9 on i386, alpha (untested), powerpc, sparc and sparc64 architectures. 10 11 */ 12 13 14 #include <linux/kernel.h> 15 #include <linux/slab.h> 16 #include <linux/init.h> 17 #include <linux/capability.h> 18 #include <linux/interrupt.h> 19 #include <linux/bitops.h> 20 #include <linux/pci.h> 21 #include <linux/module.h> 22 #include <linux/atmdev.h> 23 #include <linux/sonet.h> 24 #include <linux/atm_suni.h> 25 #include <linux/dma-mapping.h> 26 #include <linux/delay.h> 27 #include <linux/firmware.h> 28 #include <asm/io.h> 29 #include <asm/string.h> 30 #include <asm/page.h> 31 #include <asm/irq.h> 32 #include <asm/dma.h> 33 #include <asm/byteorder.h> 34 #include <linux/uaccess.h> 35 #include <linux/atomic.h> 36 37 #ifdef CONFIG_SBUS 38 #include <linux/of.h> 39 #include <linux/of_device.h> 40 #include <asm/idprom.h> 41 #include <asm/openprom.h> 42 #include <asm/oplib.h> 43 #include <asm/pgtable.h> 44 #endif 45 46 #if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */ 47 #define FORE200E_USE_TASKLET 48 #endif 49 50 #if 0 /* enable the debugging code of the buffer supply queues */ 51 #define FORE200E_BSQ_DEBUG 52 #endif 53 54 #if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */ 55 #define FORE200E_52BYTE_AAL0_SDU 56 #endif 57 58 #include "fore200e.h" 59 #include "suni.h" 60 61 #define FORE200E_VERSION "0.3e" 62 63 #define FORE200E "fore200e: " 64 65 #if 0 /* override .config */ 66 #define CONFIG_ATM_FORE200E_DEBUG 1 67 #endif 68 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0) 69 #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \ 70 printk(FORE200E format, ##args); } while (0) 71 #else 72 #define DPRINTK(level, format, args...) do {} while (0) 73 #endif 74 75 76 #define FORE200E_ALIGN(addr, alignment) \ 77 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr)) 78 79 #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type)) 80 81 #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ]) 82 83 #define FORE200E_NEXT_ENTRY(index, modulo) (index = ((index) + 1) % (modulo)) 84 85 #if 1 86 #define ASSERT(expr) if (!(expr)) { \ 87 printk(FORE200E "assertion failed! %s[%d]: %s\n", \ 88 __func__, __LINE__, #expr); \ 89 panic(FORE200E "%s", __func__); \ 90 } 91 #else 92 #define ASSERT(expr) do {} while (0) 93 #endif 94 95 96 static const struct atmdev_ops fore200e_ops; 97 98 static LIST_HEAD(fore200e_boards); 99 100 101 MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen"); 102 MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION); 103 MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E"); 104 105 106 static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = { 107 { BUFFER_S1_NBR, BUFFER_L1_NBR }, 108 { BUFFER_S2_NBR, BUFFER_L2_NBR } 109 }; 110 111 static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = { 112 { BUFFER_S1_SIZE, BUFFER_L1_SIZE }, 113 { BUFFER_S2_SIZE, BUFFER_L2_SIZE } 114 }; 115 116 117 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0) 118 static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" }; 119 #endif 120 121 122 #if 0 /* currently unused */ 123 static int 124 fore200e_fore2atm_aal(enum fore200e_aal aal) 125 { 126 switch(aal) { 127 case FORE200E_AAL0: return ATM_AAL0; 128 case FORE200E_AAL34: return ATM_AAL34; 129 case FORE200E_AAL5: return ATM_AAL5; 130 } 131 132 return -EINVAL; 133 } 134 #endif 135 136 137 static enum fore200e_aal 138 fore200e_atm2fore_aal(int aal) 139 { 140 switch(aal) { 141 case ATM_AAL0: return FORE200E_AAL0; 142 case ATM_AAL34: return FORE200E_AAL34; 143 case ATM_AAL1: 144 case ATM_AAL2: 145 case ATM_AAL5: return FORE200E_AAL5; 146 } 147 148 return -EINVAL; 149 } 150 151 152 static char* 153 fore200e_irq_itoa(int irq) 154 { 155 static char str[8]; 156 sprintf(str, "%d", irq); 157 return str; 158 } 159 160 161 /* allocate and align a chunk of memory intended to hold the data behing exchanged 162 between the driver and the adapter (using streaming DVMA) */ 163 164 static int 165 fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction) 166 { 167 unsigned long offset = 0; 168 169 if (alignment <= sizeof(int)) 170 alignment = 0; 171 172 chunk->alloc_size = size + alignment; 173 chunk->direction = direction; 174 175 chunk->alloc_addr = kzalloc(chunk->alloc_size, GFP_KERNEL); 176 if (chunk->alloc_addr == NULL) 177 return -ENOMEM; 178 179 if (alignment > 0) 180 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment); 181 182 chunk->align_addr = chunk->alloc_addr + offset; 183 184 chunk->dma_addr = dma_map_single(fore200e->dev, chunk->align_addr, 185 size, direction); 186 if (dma_mapping_error(fore200e->dev, chunk->dma_addr)) { 187 kfree(chunk->alloc_addr); 188 return -ENOMEM; 189 } 190 return 0; 191 } 192 193 194 /* free a chunk of memory */ 195 196 static void 197 fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk) 198 { 199 dma_unmap_single(fore200e->dev, chunk->dma_addr, chunk->dma_size, 200 chunk->direction); 201 kfree(chunk->alloc_addr); 202 } 203 204 /* 205 * Allocate a DMA consistent chunk of memory intended to act as a communication 206 * mechanism (to hold descriptors, status, queues, etc.) shared by the driver 207 * and the adapter. 208 */ 209 static int 210 fore200e_dma_chunk_alloc(struct fore200e *fore200e, struct chunk *chunk, 211 int size, int nbr, int alignment) 212 { 213 /* returned chunks are page-aligned */ 214 chunk->alloc_size = size * nbr; 215 chunk->alloc_addr = dma_alloc_coherent(fore200e->dev, chunk->alloc_size, 216 &chunk->dma_addr, GFP_KERNEL); 217 if (!chunk->alloc_addr) 218 return -ENOMEM; 219 chunk->align_addr = chunk->alloc_addr; 220 return 0; 221 } 222 223 /* 224 * Free a DMA consistent chunk of memory. 225 */ 226 static void 227 fore200e_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk) 228 { 229 dma_free_coherent(fore200e->dev, chunk->alloc_size, chunk->alloc_addr, 230 chunk->dma_addr); 231 } 232 233 static void 234 fore200e_spin(int msecs) 235 { 236 unsigned long timeout = jiffies + msecs_to_jiffies(msecs); 237 while (time_before(jiffies, timeout)); 238 } 239 240 241 static int 242 fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs) 243 { 244 unsigned long timeout = jiffies + msecs_to_jiffies(msecs); 245 int ok; 246 247 mb(); 248 do { 249 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR)) 250 break; 251 252 } while (time_before(jiffies, timeout)); 253 254 #if 1 255 if (!ok) { 256 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n", 257 *addr, val); 258 } 259 #endif 260 261 return ok; 262 } 263 264 265 static int 266 fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs) 267 { 268 unsigned long timeout = jiffies + msecs_to_jiffies(msecs); 269 int ok; 270 271 do { 272 if ((ok = (fore200e->bus->read(addr) == val))) 273 break; 274 275 } while (time_before(jiffies, timeout)); 276 277 #if 1 278 if (!ok) { 279 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n", 280 fore200e->bus->read(addr), val); 281 } 282 #endif 283 284 return ok; 285 } 286 287 288 static void 289 fore200e_free_rx_buf(struct fore200e* fore200e) 290 { 291 int scheme, magn, nbr; 292 struct buffer* buffer; 293 294 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 295 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 296 297 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) { 298 299 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) { 300 301 struct chunk* data = &buffer[ nbr ].data; 302 303 if (data->alloc_addr != NULL) 304 fore200e_chunk_free(fore200e, data); 305 } 306 } 307 } 308 } 309 } 310 311 312 static void 313 fore200e_uninit_bs_queue(struct fore200e* fore200e) 314 { 315 int scheme, magn; 316 317 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 318 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 319 320 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status; 321 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block; 322 323 if (status->alloc_addr) 324 fore200e_dma_chunk_free(fore200e, status); 325 326 if (rbd_block->alloc_addr) 327 fore200e_dma_chunk_free(fore200e, rbd_block); 328 } 329 } 330 } 331 332 333 static int 334 fore200e_reset(struct fore200e* fore200e, int diag) 335 { 336 int ok; 337 338 fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET; 339 340 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat); 341 342 fore200e->bus->reset(fore200e); 343 344 if (diag) { 345 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000); 346 if (ok == 0) { 347 348 printk(FORE200E "device %s self-test failed\n", fore200e->name); 349 return -ENODEV; 350 } 351 352 printk(FORE200E "device %s self-test passed\n", fore200e->name); 353 354 fore200e->state = FORE200E_STATE_RESET; 355 } 356 357 return 0; 358 } 359 360 361 static void 362 fore200e_shutdown(struct fore200e* fore200e) 363 { 364 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n", 365 fore200e->name, fore200e->phys_base, 366 fore200e_irq_itoa(fore200e->irq)); 367 368 if (fore200e->state > FORE200E_STATE_RESET) { 369 /* first, reset the board to prevent further interrupts or data transfers */ 370 fore200e_reset(fore200e, 0); 371 } 372 373 /* then, release all allocated resources */ 374 switch(fore200e->state) { 375 376 case FORE200E_STATE_COMPLETE: 377 kfree(fore200e->stats); 378 379 /* fall through */ 380 case FORE200E_STATE_IRQ: 381 free_irq(fore200e->irq, fore200e->atm_dev); 382 383 /* fall through */ 384 case FORE200E_STATE_ALLOC_BUF: 385 fore200e_free_rx_buf(fore200e); 386 387 /* fall through */ 388 case FORE200E_STATE_INIT_BSQ: 389 fore200e_uninit_bs_queue(fore200e); 390 391 /* fall through */ 392 case FORE200E_STATE_INIT_RXQ: 393 fore200e_dma_chunk_free(fore200e, &fore200e->host_rxq.status); 394 fore200e_dma_chunk_free(fore200e, &fore200e->host_rxq.rpd); 395 396 /* fall through */ 397 case FORE200E_STATE_INIT_TXQ: 398 fore200e_dma_chunk_free(fore200e, &fore200e->host_txq.status); 399 fore200e_dma_chunk_free(fore200e, &fore200e->host_txq.tpd); 400 401 /* fall through */ 402 case FORE200E_STATE_INIT_CMDQ: 403 fore200e_dma_chunk_free(fore200e, &fore200e->host_cmdq.status); 404 405 /* fall through */ 406 case FORE200E_STATE_INITIALIZE: 407 /* nothing to do for that state */ 408 409 case FORE200E_STATE_START_FW: 410 /* nothing to do for that state */ 411 412 case FORE200E_STATE_RESET: 413 /* nothing to do for that state */ 414 415 case FORE200E_STATE_MAP: 416 fore200e->bus->unmap(fore200e); 417 418 /* fall through */ 419 case FORE200E_STATE_CONFIGURE: 420 /* nothing to do for that state */ 421 422 case FORE200E_STATE_REGISTER: 423 /* XXX shouldn't we *start* by deregistering the device? */ 424 atm_dev_deregister(fore200e->atm_dev); 425 426 case FORE200E_STATE_BLANK: 427 /* nothing to do for that state */ 428 break; 429 } 430 } 431 432 433 #ifdef CONFIG_PCI 434 435 static u32 fore200e_pca_read(volatile u32 __iomem *addr) 436 { 437 /* on big-endian hosts, the board is configured to convert 438 the endianess of slave RAM accesses */ 439 return le32_to_cpu(readl(addr)); 440 } 441 442 443 static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr) 444 { 445 /* on big-endian hosts, the board is configured to convert 446 the endianess of slave RAM accesses */ 447 writel(cpu_to_le32(val), addr); 448 } 449 450 static int 451 fore200e_pca_irq_check(struct fore200e* fore200e) 452 { 453 /* this is a 1 bit register */ 454 int irq_posted = readl(fore200e->regs.pca.psr); 455 456 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2) 457 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) { 458 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number); 459 } 460 #endif 461 462 return irq_posted; 463 } 464 465 466 static void 467 fore200e_pca_irq_ack(struct fore200e* fore200e) 468 { 469 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr); 470 } 471 472 473 static void 474 fore200e_pca_reset(struct fore200e* fore200e) 475 { 476 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr); 477 fore200e_spin(10); 478 writel(0, fore200e->regs.pca.hcr); 479 } 480 481 482 static int fore200e_pca_map(struct fore200e* fore200e) 483 { 484 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name); 485 486 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH); 487 488 if (fore200e->virt_base == NULL) { 489 printk(FORE200E "can't map device %s\n", fore200e->name); 490 return -EFAULT; 491 } 492 493 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base); 494 495 /* gain access to the PCA specific registers */ 496 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET; 497 fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET; 498 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET; 499 500 fore200e->state = FORE200E_STATE_MAP; 501 return 0; 502 } 503 504 505 static void 506 fore200e_pca_unmap(struct fore200e* fore200e) 507 { 508 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name); 509 510 if (fore200e->virt_base != NULL) 511 iounmap(fore200e->virt_base); 512 } 513 514 515 static int fore200e_pca_configure(struct fore200e *fore200e) 516 { 517 struct pci_dev *pci_dev = to_pci_dev(fore200e->dev); 518 u8 master_ctrl, latency; 519 520 DPRINTK(2, "device %s being configured\n", fore200e->name); 521 522 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) { 523 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n"); 524 return -EIO; 525 } 526 527 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl); 528 529 master_ctrl = master_ctrl 530 #if defined(__BIG_ENDIAN) 531 /* request the PCA board to convert the endianess of slave RAM accesses */ 532 | PCA200E_CTRL_CONVERT_ENDIAN 533 #endif 534 #if 0 535 | PCA200E_CTRL_DIS_CACHE_RD 536 | PCA200E_CTRL_DIS_WRT_INVAL 537 | PCA200E_CTRL_ENA_CONT_REQ_MODE 538 | PCA200E_CTRL_2_CACHE_WRT_INVAL 539 #endif 540 | PCA200E_CTRL_LARGE_PCI_BURSTS; 541 542 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl); 543 544 /* raise latency from 32 (default) to 192, as this seems to prevent NIC 545 lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition. 546 this may impact the performances of other PCI devices on the same bus, though */ 547 latency = 192; 548 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency); 549 550 fore200e->state = FORE200E_STATE_CONFIGURE; 551 return 0; 552 } 553 554 555 static int __init 556 fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom) 557 { 558 struct host_cmdq* cmdq = &fore200e->host_cmdq; 559 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 560 struct prom_opcode opcode; 561 int ok; 562 u32 prom_dma; 563 564 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 565 566 opcode.opcode = OPCODE_GET_PROM; 567 opcode.pad = 0; 568 569 prom_dma = dma_map_single(fore200e->dev, prom, sizeof(struct prom_data), 570 DMA_FROM_DEVICE); 571 if (dma_mapping_error(fore200e->dev, prom_dma)) 572 return -ENOMEM; 573 574 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr); 575 576 *entry->status = STATUS_PENDING; 577 578 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode); 579 580 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 581 582 *entry->status = STATUS_FREE; 583 584 dma_unmap_single(fore200e->dev, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE); 585 586 if (ok == 0) { 587 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name); 588 return -EIO; 589 } 590 591 #if defined(__BIG_ENDIAN) 592 593 #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) )) 594 595 /* MAC address is stored as little-endian */ 596 swap_here(&prom->mac_addr[0]); 597 swap_here(&prom->mac_addr[4]); 598 #endif 599 600 return 0; 601 } 602 603 604 static int 605 fore200e_pca_proc_read(struct fore200e* fore200e, char *page) 606 { 607 struct pci_dev *pci_dev = to_pci_dev(fore200e->dev); 608 609 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n", 610 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn)); 611 } 612 613 static const struct fore200e_bus fore200e_pci_ops = { 614 .model_name = "PCA-200E", 615 .proc_name = "pca200e", 616 .descr_alignment = 32, 617 .buffer_alignment = 4, 618 .status_alignment = 32, 619 .read = fore200e_pca_read, 620 .write = fore200e_pca_write, 621 .configure = fore200e_pca_configure, 622 .map = fore200e_pca_map, 623 .reset = fore200e_pca_reset, 624 .prom_read = fore200e_pca_prom_read, 625 .unmap = fore200e_pca_unmap, 626 .irq_check = fore200e_pca_irq_check, 627 .irq_ack = fore200e_pca_irq_ack, 628 .proc_read = fore200e_pca_proc_read, 629 }; 630 #endif /* CONFIG_PCI */ 631 632 #ifdef CONFIG_SBUS 633 634 static u32 fore200e_sba_read(volatile u32 __iomem *addr) 635 { 636 return sbus_readl(addr); 637 } 638 639 static void fore200e_sba_write(u32 val, volatile u32 __iomem *addr) 640 { 641 sbus_writel(val, addr); 642 } 643 644 static void fore200e_sba_irq_enable(struct fore200e *fore200e) 645 { 646 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; 647 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr); 648 } 649 650 static int fore200e_sba_irq_check(struct fore200e *fore200e) 651 { 652 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ; 653 } 654 655 static void fore200e_sba_irq_ack(struct fore200e *fore200e) 656 { 657 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; 658 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr); 659 } 660 661 static void fore200e_sba_reset(struct fore200e *fore200e) 662 { 663 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr); 664 fore200e_spin(10); 665 fore200e->bus->write(0, fore200e->regs.sba.hcr); 666 } 667 668 static int __init fore200e_sba_map(struct fore200e *fore200e) 669 { 670 struct platform_device *op = to_platform_device(fore200e->dev); 671 unsigned int bursts; 672 673 /* gain access to the SBA specific registers */ 674 fore200e->regs.sba.hcr = of_ioremap(&op->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR"); 675 fore200e->regs.sba.bsr = of_ioremap(&op->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR"); 676 fore200e->regs.sba.isr = of_ioremap(&op->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR"); 677 fore200e->virt_base = of_ioremap(&op->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM"); 678 679 if (!fore200e->virt_base) { 680 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name); 681 return -EFAULT; 682 } 683 684 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base); 685 686 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */ 687 688 /* get the supported DVMA burst sizes */ 689 bursts = of_getintprop_default(op->dev.of_node->parent, "burst-sizes", 0x00); 690 691 if (sbus_can_dma_64bit()) 692 sbus_set_sbus64(&op->dev, bursts); 693 694 fore200e->state = FORE200E_STATE_MAP; 695 return 0; 696 } 697 698 static void fore200e_sba_unmap(struct fore200e *fore200e) 699 { 700 struct platform_device *op = to_platform_device(fore200e->dev); 701 702 of_iounmap(&op->resource[0], fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH); 703 of_iounmap(&op->resource[1], fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH); 704 of_iounmap(&op->resource[2], fore200e->regs.sba.isr, SBA200E_ISR_LENGTH); 705 of_iounmap(&op->resource[3], fore200e->virt_base, SBA200E_RAM_LENGTH); 706 } 707 708 static int __init fore200e_sba_configure(struct fore200e *fore200e) 709 { 710 fore200e->state = FORE200E_STATE_CONFIGURE; 711 return 0; 712 } 713 714 static int __init fore200e_sba_prom_read(struct fore200e *fore200e, struct prom_data *prom) 715 { 716 struct platform_device *op = to_platform_device(fore200e->dev); 717 const u8 *prop; 718 int len; 719 720 prop = of_get_property(op->dev.of_node, "madaddrlo2", &len); 721 if (!prop) 722 return -ENODEV; 723 memcpy(&prom->mac_addr[4], prop, 4); 724 725 prop = of_get_property(op->dev.of_node, "madaddrhi4", &len); 726 if (!prop) 727 return -ENODEV; 728 memcpy(&prom->mac_addr[2], prop, 4); 729 730 prom->serial_number = of_getintprop_default(op->dev.of_node, 731 "serialnumber", 0); 732 prom->hw_revision = of_getintprop_default(op->dev.of_node, 733 "promversion", 0); 734 735 return 0; 736 } 737 738 static int fore200e_sba_proc_read(struct fore200e *fore200e, char *page) 739 { 740 struct platform_device *op = to_platform_device(fore200e->dev); 741 const struct linux_prom_registers *regs; 742 743 regs = of_get_property(op->dev.of_node, "reg", NULL); 744 745 return sprintf(page, " SBUS slot/device:\t\t%d/'%pOFn'\n", 746 (regs ? regs->which_io : 0), op->dev.of_node); 747 } 748 749 static const struct fore200e_bus fore200e_sbus_ops = { 750 .model_name = "SBA-200E", 751 .proc_name = "sba200e", 752 .descr_alignment = 32, 753 .buffer_alignment = 64, 754 .status_alignment = 32, 755 .read = fore200e_sba_read, 756 .write = fore200e_sba_write, 757 .configure = fore200e_sba_configure, 758 .map = fore200e_sba_map, 759 .reset = fore200e_sba_reset, 760 .prom_read = fore200e_sba_prom_read, 761 .unmap = fore200e_sba_unmap, 762 .irq_enable = fore200e_sba_irq_enable, 763 .irq_check = fore200e_sba_irq_check, 764 .irq_ack = fore200e_sba_irq_ack, 765 .proc_read = fore200e_sba_proc_read, 766 }; 767 #endif /* CONFIG_SBUS */ 768 769 static void 770 fore200e_tx_irq(struct fore200e* fore200e) 771 { 772 struct host_txq* txq = &fore200e->host_txq; 773 struct host_txq_entry* entry; 774 struct atm_vcc* vcc; 775 struct fore200e_vc_map* vc_map; 776 777 if (fore200e->host_txq.txing == 0) 778 return; 779 780 for (;;) { 781 782 entry = &txq->host_entry[ txq->tail ]; 783 784 if ((*entry->status & STATUS_COMPLETE) == 0) { 785 break; 786 } 787 788 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n", 789 entry, txq->tail, entry->vc_map, entry->skb); 790 791 /* free copy of misaligned data */ 792 kfree(entry->data); 793 794 /* remove DMA mapping */ 795 dma_unmap_single(fore200e->dev, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length, 796 DMA_TO_DEVICE); 797 798 vc_map = entry->vc_map; 799 800 /* vcc closed since the time the entry was submitted for tx? */ 801 if ((vc_map->vcc == NULL) || 802 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) { 803 804 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n", 805 fore200e->atm_dev->number); 806 807 dev_kfree_skb_any(entry->skb); 808 } 809 else { 810 ASSERT(vc_map->vcc); 811 812 /* vcc closed then immediately re-opened? */ 813 if (vc_map->incarn != entry->incarn) { 814 815 /* when a vcc is closed, some PDUs may be still pending in the tx queue. 816 if the same vcc is immediately re-opened, those pending PDUs must 817 not be popped after the completion of their emission, as they refer 818 to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc 819 would be decremented by the size of the (unrelated) skb, possibly 820 leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc. 821 we thus bind the tx entry to the current incarnation of the vcc 822 when the entry is submitted for tx. When the tx later completes, 823 if the incarnation number of the tx entry does not match the one 824 of the vcc, then this implies that the vcc has been closed then re-opened. 825 we thus just drop the skb here. */ 826 827 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n", 828 fore200e->atm_dev->number); 829 830 dev_kfree_skb_any(entry->skb); 831 } 832 else { 833 vcc = vc_map->vcc; 834 ASSERT(vcc); 835 836 /* notify tx completion */ 837 if (vcc->pop) { 838 vcc->pop(vcc, entry->skb); 839 } 840 else { 841 dev_kfree_skb_any(entry->skb); 842 } 843 844 /* check error condition */ 845 if (*entry->status & STATUS_ERROR) 846 atomic_inc(&vcc->stats->tx_err); 847 else 848 atomic_inc(&vcc->stats->tx); 849 } 850 } 851 852 *entry->status = STATUS_FREE; 853 854 fore200e->host_txq.txing--; 855 856 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX); 857 } 858 } 859 860 861 #ifdef FORE200E_BSQ_DEBUG 862 int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn) 863 { 864 struct buffer* buffer; 865 int count = 0; 866 867 buffer = bsq->freebuf; 868 while (buffer) { 869 870 if (buffer->supplied) { 871 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n", 872 where, scheme, magn, buffer->index); 873 } 874 875 if (buffer->magn != magn) { 876 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n", 877 where, scheme, magn, buffer->index, buffer->magn); 878 } 879 880 if (buffer->scheme != scheme) { 881 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n", 882 where, scheme, magn, buffer->index, buffer->scheme); 883 } 884 885 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) { 886 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n", 887 where, scheme, magn, buffer->index); 888 } 889 890 count++; 891 buffer = buffer->next; 892 } 893 894 if (count != bsq->freebuf_count) { 895 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n", 896 where, scheme, magn, count, bsq->freebuf_count); 897 } 898 return 0; 899 } 900 #endif 901 902 903 static void 904 fore200e_supply(struct fore200e* fore200e) 905 { 906 int scheme, magn, i; 907 908 struct host_bsq* bsq; 909 struct host_bsq_entry* entry; 910 struct buffer* buffer; 911 912 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 913 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 914 915 bsq = &fore200e->host_bsq[ scheme ][ magn ]; 916 917 #ifdef FORE200E_BSQ_DEBUG 918 bsq_audit(1, bsq, scheme, magn); 919 #endif 920 while (bsq->freebuf_count >= RBD_BLK_SIZE) { 921 922 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n", 923 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count); 924 925 entry = &bsq->host_entry[ bsq->head ]; 926 927 for (i = 0; i < RBD_BLK_SIZE; i++) { 928 929 /* take the first buffer in the free buffer list */ 930 buffer = bsq->freebuf; 931 if (!buffer) { 932 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n", 933 scheme, magn, bsq->freebuf_count); 934 return; 935 } 936 bsq->freebuf = buffer->next; 937 938 #ifdef FORE200E_BSQ_DEBUG 939 if (buffer->supplied) 940 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n", 941 scheme, magn, buffer->index); 942 buffer->supplied = 1; 943 #endif 944 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr; 945 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer); 946 } 947 948 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS); 949 950 /* decrease accordingly the number of free rx buffers */ 951 bsq->freebuf_count -= RBD_BLK_SIZE; 952 953 *entry->status = STATUS_PENDING; 954 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr); 955 } 956 } 957 } 958 } 959 960 961 static int 962 fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd) 963 { 964 struct sk_buff* skb; 965 struct buffer* buffer; 966 struct fore200e_vcc* fore200e_vcc; 967 int i, pdu_len = 0; 968 #ifdef FORE200E_52BYTE_AAL0_SDU 969 u32 cell_header = 0; 970 #endif 971 972 ASSERT(vcc); 973 974 fore200e_vcc = FORE200E_VCC(vcc); 975 ASSERT(fore200e_vcc); 976 977 #ifdef FORE200E_52BYTE_AAL0_SDU 978 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) { 979 980 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) | 981 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) | 982 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) | 983 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) | 984 rpd->atm_header.clp; 985 pdu_len = 4; 986 } 987 #endif 988 989 /* compute total PDU length */ 990 for (i = 0; i < rpd->nseg; i++) 991 pdu_len += rpd->rsd[ i ].length; 992 993 skb = alloc_skb(pdu_len, GFP_ATOMIC); 994 if (skb == NULL) { 995 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len); 996 997 atomic_inc(&vcc->stats->rx_drop); 998 return -ENOMEM; 999 } 1000 1001 __net_timestamp(skb); 1002 1003 #ifdef FORE200E_52BYTE_AAL0_SDU 1004 if (cell_header) { 1005 *((u32*)skb_put(skb, 4)) = cell_header; 1006 } 1007 #endif 1008 1009 /* reassemble segments */ 1010 for (i = 0; i < rpd->nseg; i++) { 1011 1012 /* rebuild rx buffer address from rsd handle */ 1013 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle); 1014 1015 /* Make device DMA transfer visible to CPU. */ 1016 dma_sync_single_for_cpu(fore200e->dev, buffer->data.dma_addr, 1017 rpd->rsd[i].length, DMA_FROM_DEVICE); 1018 1019 skb_put_data(skb, buffer->data.align_addr, rpd->rsd[i].length); 1020 1021 /* Now let the device get at it again. */ 1022 dma_sync_single_for_device(fore200e->dev, buffer->data.dma_addr, 1023 rpd->rsd[i].length, DMA_FROM_DEVICE); 1024 } 1025 1026 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize); 1027 1028 if (pdu_len < fore200e_vcc->rx_min_pdu) 1029 fore200e_vcc->rx_min_pdu = pdu_len; 1030 if (pdu_len > fore200e_vcc->rx_max_pdu) 1031 fore200e_vcc->rx_max_pdu = pdu_len; 1032 fore200e_vcc->rx_pdu++; 1033 1034 /* push PDU */ 1035 if (atm_charge(vcc, skb->truesize) == 0) { 1036 1037 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n", 1038 vcc->itf, vcc->vpi, vcc->vci); 1039 1040 dev_kfree_skb_any(skb); 1041 1042 atomic_inc(&vcc->stats->rx_drop); 1043 return -ENOMEM; 1044 } 1045 1046 vcc->push(vcc, skb); 1047 atomic_inc(&vcc->stats->rx); 1048 1049 return 0; 1050 } 1051 1052 1053 static void 1054 fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd) 1055 { 1056 struct host_bsq* bsq; 1057 struct buffer* buffer; 1058 int i; 1059 1060 for (i = 0; i < rpd->nseg; i++) { 1061 1062 /* rebuild rx buffer address from rsd handle */ 1063 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle); 1064 1065 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ]; 1066 1067 #ifdef FORE200E_BSQ_DEBUG 1068 bsq_audit(2, bsq, buffer->scheme, buffer->magn); 1069 1070 if (buffer->supplied == 0) 1071 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n", 1072 buffer->scheme, buffer->magn, buffer->index); 1073 buffer->supplied = 0; 1074 #endif 1075 1076 /* re-insert the buffer into the free buffer list */ 1077 buffer->next = bsq->freebuf; 1078 bsq->freebuf = buffer; 1079 1080 /* then increment the number of free rx buffers */ 1081 bsq->freebuf_count++; 1082 } 1083 } 1084 1085 1086 static void 1087 fore200e_rx_irq(struct fore200e* fore200e) 1088 { 1089 struct host_rxq* rxq = &fore200e->host_rxq; 1090 struct host_rxq_entry* entry; 1091 struct atm_vcc* vcc; 1092 struct fore200e_vc_map* vc_map; 1093 1094 for (;;) { 1095 1096 entry = &rxq->host_entry[ rxq->head ]; 1097 1098 /* no more received PDUs */ 1099 if ((*entry->status & STATUS_COMPLETE) == 0) 1100 break; 1101 1102 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci); 1103 1104 if ((vc_map->vcc == NULL) || 1105 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) { 1106 1107 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n", 1108 fore200e->atm_dev->number, 1109 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci); 1110 } 1111 else { 1112 vcc = vc_map->vcc; 1113 ASSERT(vcc); 1114 1115 if ((*entry->status & STATUS_ERROR) == 0) { 1116 1117 fore200e_push_rpd(fore200e, vcc, entry->rpd); 1118 } 1119 else { 1120 DPRINTK(2, "damaged PDU on %d.%d.%d\n", 1121 fore200e->atm_dev->number, 1122 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci); 1123 atomic_inc(&vcc->stats->rx_err); 1124 } 1125 } 1126 1127 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX); 1128 1129 fore200e_collect_rpd(fore200e, entry->rpd); 1130 1131 /* rewrite the rpd address to ack the received PDU */ 1132 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr); 1133 *entry->status = STATUS_FREE; 1134 1135 fore200e_supply(fore200e); 1136 } 1137 } 1138 1139 1140 #ifndef FORE200E_USE_TASKLET 1141 static void 1142 fore200e_irq(struct fore200e* fore200e) 1143 { 1144 unsigned long flags; 1145 1146 spin_lock_irqsave(&fore200e->q_lock, flags); 1147 fore200e_rx_irq(fore200e); 1148 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1149 1150 spin_lock_irqsave(&fore200e->q_lock, flags); 1151 fore200e_tx_irq(fore200e); 1152 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1153 } 1154 #endif 1155 1156 1157 static irqreturn_t 1158 fore200e_interrupt(int irq, void* dev) 1159 { 1160 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev); 1161 1162 if (fore200e->bus->irq_check(fore200e) == 0) { 1163 1164 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number); 1165 return IRQ_NONE; 1166 } 1167 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number); 1168 1169 #ifdef FORE200E_USE_TASKLET 1170 tasklet_schedule(&fore200e->tx_tasklet); 1171 tasklet_schedule(&fore200e->rx_tasklet); 1172 #else 1173 fore200e_irq(fore200e); 1174 #endif 1175 1176 fore200e->bus->irq_ack(fore200e); 1177 return IRQ_HANDLED; 1178 } 1179 1180 1181 #ifdef FORE200E_USE_TASKLET 1182 static void 1183 fore200e_tx_tasklet(unsigned long data) 1184 { 1185 struct fore200e* fore200e = (struct fore200e*) data; 1186 unsigned long flags; 1187 1188 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number); 1189 1190 spin_lock_irqsave(&fore200e->q_lock, flags); 1191 fore200e_tx_irq(fore200e); 1192 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1193 } 1194 1195 1196 static void 1197 fore200e_rx_tasklet(unsigned long data) 1198 { 1199 struct fore200e* fore200e = (struct fore200e*) data; 1200 unsigned long flags; 1201 1202 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number); 1203 1204 spin_lock_irqsave(&fore200e->q_lock, flags); 1205 fore200e_rx_irq((struct fore200e*) data); 1206 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1207 } 1208 #endif 1209 1210 1211 static int 1212 fore200e_select_scheme(struct atm_vcc* vcc) 1213 { 1214 /* fairly balance the VCs over (identical) buffer schemes */ 1215 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO; 1216 1217 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n", 1218 vcc->itf, vcc->vpi, vcc->vci, scheme); 1219 1220 return scheme; 1221 } 1222 1223 1224 static int 1225 fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu) 1226 { 1227 struct host_cmdq* cmdq = &fore200e->host_cmdq; 1228 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 1229 struct activate_opcode activ_opcode; 1230 struct deactivate_opcode deactiv_opcode; 1231 struct vpvc vpvc; 1232 int ok; 1233 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal); 1234 1235 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 1236 1237 if (activate) { 1238 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc); 1239 1240 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN; 1241 activ_opcode.aal = aal; 1242 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme; 1243 activ_opcode.pad = 0; 1244 } 1245 else { 1246 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN; 1247 deactiv_opcode.pad = 0; 1248 } 1249 1250 vpvc.vci = vcc->vci; 1251 vpvc.vpi = vcc->vpi; 1252 1253 *entry->status = STATUS_PENDING; 1254 1255 if (activate) { 1256 1257 #ifdef FORE200E_52BYTE_AAL0_SDU 1258 mtu = 48; 1259 #endif 1260 /* the MTU is not used by the cp, except in the case of AAL0 */ 1261 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu); 1262 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc); 1263 fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode); 1264 } 1265 else { 1266 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc); 1267 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode); 1268 } 1269 1270 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 1271 1272 *entry->status = STATUS_FREE; 1273 1274 if (ok == 0) { 1275 printk(FORE200E "unable to %s VC %d.%d.%d\n", 1276 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci); 1277 return -EIO; 1278 } 1279 1280 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci, 1281 activate ? "open" : "clos"); 1282 1283 return 0; 1284 } 1285 1286 1287 #define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */ 1288 1289 static void 1290 fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate) 1291 { 1292 if (qos->txtp.max_pcr < ATM_OC3_PCR) { 1293 1294 /* compute the data cells to idle cells ratio from the tx PCR */ 1295 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR; 1296 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells; 1297 } 1298 else { 1299 /* disable rate control */ 1300 rate->data_cells = rate->idle_cells = 0; 1301 } 1302 } 1303 1304 1305 static int 1306 fore200e_open(struct atm_vcc *vcc) 1307 { 1308 struct fore200e* fore200e = FORE200E_DEV(vcc->dev); 1309 struct fore200e_vcc* fore200e_vcc; 1310 struct fore200e_vc_map* vc_map; 1311 unsigned long flags; 1312 int vci = vcc->vci; 1313 short vpi = vcc->vpi; 1314 1315 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS)); 1316 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS)); 1317 1318 spin_lock_irqsave(&fore200e->q_lock, flags); 1319 1320 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci); 1321 if (vc_map->vcc) { 1322 1323 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1324 1325 printk(FORE200E "VC %d.%d.%d already in use\n", 1326 fore200e->atm_dev->number, vpi, vci); 1327 1328 return -EINVAL; 1329 } 1330 1331 vc_map->vcc = vcc; 1332 1333 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1334 1335 fore200e_vcc = kzalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC); 1336 if (fore200e_vcc == NULL) { 1337 vc_map->vcc = NULL; 1338 return -ENOMEM; 1339 } 1340 1341 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; " 1342 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n", 1343 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal), 1344 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ], 1345 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu, 1346 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ], 1347 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu); 1348 1349 /* pseudo-CBR bandwidth requested? */ 1350 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) { 1351 1352 mutex_lock(&fore200e->rate_mtx); 1353 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) { 1354 mutex_unlock(&fore200e->rate_mtx); 1355 1356 kfree(fore200e_vcc); 1357 vc_map->vcc = NULL; 1358 return -EAGAIN; 1359 } 1360 1361 /* reserve bandwidth */ 1362 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr; 1363 mutex_unlock(&fore200e->rate_mtx); 1364 } 1365 1366 vcc->itf = vcc->dev->number; 1367 1368 set_bit(ATM_VF_PARTIAL,&vcc->flags); 1369 set_bit(ATM_VF_ADDR, &vcc->flags); 1370 1371 vcc->dev_data = fore200e_vcc; 1372 1373 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) { 1374 1375 vc_map->vcc = NULL; 1376 1377 clear_bit(ATM_VF_ADDR, &vcc->flags); 1378 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1379 1380 vcc->dev_data = NULL; 1381 1382 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr; 1383 1384 kfree(fore200e_vcc); 1385 return -EINVAL; 1386 } 1387 1388 /* compute rate control parameters */ 1389 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) { 1390 1391 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate); 1392 set_bit(ATM_VF_HASQOS, &vcc->flags); 1393 1394 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n", 1395 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal), 1396 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr, 1397 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells); 1398 } 1399 1400 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1; 1401 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0; 1402 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0; 1403 1404 /* new incarnation of the vcc */ 1405 vc_map->incarn = ++fore200e->incarn_count; 1406 1407 /* VC unusable before this flag is set */ 1408 set_bit(ATM_VF_READY, &vcc->flags); 1409 1410 return 0; 1411 } 1412 1413 1414 static void 1415 fore200e_close(struct atm_vcc* vcc) 1416 { 1417 struct fore200e* fore200e = FORE200E_DEV(vcc->dev); 1418 struct fore200e_vcc* fore200e_vcc; 1419 struct fore200e_vc_map* vc_map; 1420 unsigned long flags; 1421 1422 ASSERT(vcc); 1423 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS)); 1424 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS)); 1425 1426 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal)); 1427 1428 clear_bit(ATM_VF_READY, &vcc->flags); 1429 1430 fore200e_activate_vcin(fore200e, 0, vcc, 0); 1431 1432 spin_lock_irqsave(&fore200e->q_lock, flags); 1433 1434 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci); 1435 1436 /* the vc is no longer considered as "in use" by fore200e_open() */ 1437 vc_map->vcc = NULL; 1438 1439 vcc->itf = vcc->vci = vcc->vpi = 0; 1440 1441 fore200e_vcc = FORE200E_VCC(vcc); 1442 vcc->dev_data = NULL; 1443 1444 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1445 1446 /* release reserved bandwidth, if any */ 1447 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) { 1448 1449 mutex_lock(&fore200e->rate_mtx); 1450 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr; 1451 mutex_unlock(&fore200e->rate_mtx); 1452 1453 clear_bit(ATM_VF_HASQOS, &vcc->flags); 1454 } 1455 1456 clear_bit(ATM_VF_ADDR, &vcc->flags); 1457 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1458 1459 ASSERT(fore200e_vcc); 1460 kfree(fore200e_vcc); 1461 } 1462 1463 1464 static int 1465 fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb) 1466 { 1467 struct fore200e* fore200e = FORE200E_DEV(vcc->dev); 1468 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc); 1469 struct fore200e_vc_map* vc_map; 1470 struct host_txq* txq = &fore200e->host_txq; 1471 struct host_txq_entry* entry; 1472 struct tpd* tpd; 1473 struct tpd_haddr tpd_haddr; 1474 int retry = CONFIG_ATM_FORE200E_TX_RETRY; 1475 int tx_copy = 0; 1476 int tx_len = skb->len; 1477 u32* cell_header = NULL; 1478 unsigned char* skb_data; 1479 int skb_len; 1480 unsigned char* data; 1481 unsigned long flags; 1482 1483 ASSERT(vcc); 1484 ASSERT(fore200e); 1485 ASSERT(fore200e_vcc); 1486 1487 if (!test_bit(ATM_VF_READY, &vcc->flags)) { 1488 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi); 1489 dev_kfree_skb_any(skb); 1490 return -EINVAL; 1491 } 1492 1493 #ifdef FORE200E_52BYTE_AAL0_SDU 1494 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) { 1495 cell_header = (u32*) skb->data; 1496 skb_data = skb->data + 4; /* skip 4-byte cell header */ 1497 skb_len = tx_len = skb->len - 4; 1498 1499 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header); 1500 } 1501 else 1502 #endif 1503 { 1504 skb_data = skb->data; 1505 skb_len = skb->len; 1506 } 1507 1508 if (((unsigned long)skb_data) & 0x3) { 1509 1510 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name); 1511 tx_copy = 1; 1512 tx_len = skb_len; 1513 } 1514 1515 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) { 1516 1517 /* this simply NUKES the PCA board */ 1518 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name); 1519 tx_copy = 1; 1520 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD; 1521 } 1522 1523 if (tx_copy) { 1524 data = kmalloc(tx_len, GFP_ATOMIC); 1525 if (data == NULL) { 1526 if (vcc->pop) { 1527 vcc->pop(vcc, skb); 1528 } 1529 else { 1530 dev_kfree_skb_any(skb); 1531 } 1532 return -ENOMEM; 1533 } 1534 1535 memcpy(data, skb_data, skb_len); 1536 if (skb_len < tx_len) 1537 memset(data + skb_len, 0x00, tx_len - skb_len); 1538 } 1539 else { 1540 data = skb_data; 1541 } 1542 1543 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci); 1544 ASSERT(vc_map->vcc == vcc); 1545 1546 retry_here: 1547 1548 spin_lock_irqsave(&fore200e->q_lock, flags); 1549 1550 entry = &txq->host_entry[ txq->head ]; 1551 1552 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) { 1553 1554 /* try to free completed tx queue entries */ 1555 fore200e_tx_irq(fore200e); 1556 1557 if (*entry->status != STATUS_FREE) { 1558 1559 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1560 1561 /* retry once again? */ 1562 if (--retry > 0) { 1563 udelay(50); 1564 goto retry_here; 1565 } 1566 1567 atomic_inc(&vcc->stats->tx_err); 1568 1569 fore200e->tx_sat++; 1570 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n", 1571 fore200e->name, fore200e->cp_queues->heartbeat); 1572 if (vcc->pop) { 1573 vcc->pop(vcc, skb); 1574 } 1575 else { 1576 dev_kfree_skb_any(skb); 1577 } 1578 1579 if (tx_copy) 1580 kfree(data); 1581 1582 return -ENOBUFS; 1583 } 1584 } 1585 1586 entry->incarn = vc_map->incarn; 1587 entry->vc_map = vc_map; 1588 entry->skb = skb; 1589 entry->data = tx_copy ? data : NULL; 1590 1591 tpd = entry->tpd; 1592 tpd->tsd[ 0 ].buffer = dma_map_single(fore200e->dev, data, tx_len, 1593 DMA_TO_DEVICE); 1594 if (dma_mapping_error(fore200e->dev, tpd->tsd[0].buffer)) { 1595 if (tx_copy) 1596 kfree(data); 1597 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1598 return -ENOMEM; 1599 } 1600 tpd->tsd[ 0 ].length = tx_len; 1601 1602 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX); 1603 txq->txing++; 1604 1605 /* The dma_map call above implies a dma_sync so the device can use it, 1606 * thus no explicit dma_sync call is necessary here. 1607 */ 1608 1609 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n", 1610 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal), 1611 tpd->tsd[0].length, skb_len); 1612 1613 if (skb_len < fore200e_vcc->tx_min_pdu) 1614 fore200e_vcc->tx_min_pdu = skb_len; 1615 if (skb_len > fore200e_vcc->tx_max_pdu) 1616 fore200e_vcc->tx_max_pdu = skb_len; 1617 fore200e_vcc->tx_pdu++; 1618 1619 /* set tx rate control information */ 1620 tpd->rate.data_cells = fore200e_vcc->rate.data_cells; 1621 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells; 1622 1623 if (cell_header) { 1624 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP); 1625 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT; 1626 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT; 1627 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT; 1628 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT; 1629 } 1630 else { 1631 /* set the ATM header, common to all cells conveying the PDU */ 1632 tpd->atm_header.clp = 0; 1633 tpd->atm_header.plt = 0; 1634 tpd->atm_header.vci = vcc->vci; 1635 tpd->atm_header.vpi = vcc->vpi; 1636 tpd->atm_header.gfc = 0; 1637 } 1638 1639 tpd->spec.length = tx_len; 1640 tpd->spec.nseg = 1; 1641 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal); 1642 tpd->spec.intr = 1; 1643 1644 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */ 1645 tpd_haddr.pad = 0; 1646 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */ 1647 1648 *entry->status = STATUS_PENDING; 1649 fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr); 1650 1651 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1652 1653 return 0; 1654 } 1655 1656 1657 static int 1658 fore200e_getstats(struct fore200e* fore200e) 1659 { 1660 struct host_cmdq* cmdq = &fore200e->host_cmdq; 1661 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 1662 struct stats_opcode opcode; 1663 int ok; 1664 u32 stats_dma_addr; 1665 1666 if (fore200e->stats == NULL) { 1667 fore200e->stats = kzalloc(sizeof(struct stats), GFP_KERNEL); 1668 if (fore200e->stats == NULL) 1669 return -ENOMEM; 1670 } 1671 1672 stats_dma_addr = dma_map_single(fore200e->dev, fore200e->stats, 1673 sizeof(struct stats), DMA_FROM_DEVICE); 1674 if (dma_mapping_error(fore200e->dev, stats_dma_addr)) 1675 return -ENOMEM; 1676 1677 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 1678 1679 opcode.opcode = OPCODE_GET_STATS; 1680 opcode.pad = 0; 1681 1682 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr); 1683 1684 *entry->status = STATUS_PENDING; 1685 1686 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode); 1687 1688 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 1689 1690 *entry->status = STATUS_FREE; 1691 1692 dma_unmap_single(fore200e->dev, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE); 1693 1694 if (ok == 0) { 1695 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name); 1696 return -EIO; 1697 } 1698 1699 return 0; 1700 } 1701 1702 1703 static int 1704 fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen) 1705 { 1706 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */ 1707 1708 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n", 1709 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen); 1710 1711 return -EINVAL; 1712 } 1713 1714 1715 static int 1716 fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, unsigned int optlen) 1717 { 1718 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */ 1719 1720 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n", 1721 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen); 1722 1723 return -EINVAL; 1724 } 1725 1726 1727 #if 0 /* currently unused */ 1728 static int 1729 fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs) 1730 { 1731 struct host_cmdq* cmdq = &fore200e->host_cmdq; 1732 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 1733 struct oc3_opcode opcode; 1734 int ok; 1735 u32 oc3_regs_dma_addr; 1736 1737 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE); 1738 1739 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 1740 1741 opcode.opcode = OPCODE_GET_OC3; 1742 opcode.reg = 0; 1743 opcode.value = 0; 1744 opcode.mask = 0; 1745 1746 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr); 1747 1748 *entry->status = STATUS_PENDING; 1749 1750 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode); 1751 1752 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 1753 1754 *entry->status = STATUS_FREE; 1755 1756 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE); 1757 1758 if (ok == 0) { 1759 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name); 1760 return -EIO; 1761 } 1762 1763 return 0; 1764 } 1765 #endif 1766 1767 1768 static int 1769 fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask) 1770 { 1771 struct host_cmdq* cmdq = &fore200e->host_cmdq; 1772 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 1773 struct oc3_opcode opcode; 1774 int ok; 1775 1776 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask); 1777 1778 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 1779 1780 opcode.opcode = OPCODE_SET_OC3; 1781 opcode.reg = reg; 1782 opcode.value = value; 1783 opcode.mask = mask; 1784 1785 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr); 1786 1787 *entry->status = STATUS_PENDING; 1788 1789 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode); 1790 1791 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 1792 1793 *entry->status = STATUS_FREE; 1794 1795 if (ok == 0) { 1796 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name); 1797 return -EIO; 1798 } 1799 1800 return 0; 1801 } 1802 1803 1804 static int 1805 fore200e_setloop(struct fore200e* fore200e, int loop_mode) 1806 { 1807 u32 mct_value, mct_mask; 1808 int error; 1809 1810 if (!capable(CAP_NET_ADMIN)) 1811 return -EPERM; 1812 1813 switch (loop_mode) { 1814 1815 case ATM_LM_NONE: 1816 mct_value = 0; 1817 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE; 1818 break; 1819 1820 case ATM_LM_LOC_PHY: 1821 mct_value = mct_mask = SUNI_MCT_DLE; 1822 break; 1823 1824 case ATM_LM_RMT_PHY: 1825 mct_value = mct_mask = SUNI_MCT_LLE; 1826 break; 1827 1828 default: 1829 return -EINVAL; 1830 } 1831 1832 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask); 1833 if (error == 0) 1834 fore200e->loop_mode = loop_mode; 1835 1836 return error; 1837 } 1838 1839 1840 static int 1841 fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg) 1842 { 1843 struct sonet_stats tmp; 1844 1845 if (fore200e_getstats(fore200e) < 0) 1846 return -EIO; 1847 1848 tmp.section_bip = be32_to_cpu(fore200e->stats->oc3.section_bip8_errors); 1849 tmp.line_bip = be32_to_cpu(fore200e->stats->oc3.line_bip24_errors); 1850 tmp.path_bip = be32_to_cpu(fore200e->stats->oc3.path_bip8_errors); 1851 tmp.line_febe = be32_to_cpu(fore200e->stats->oc3.line_febe_errors); 1852 tmp.path_febe = be32_to_cpu(fore200e->stats->oc3.path_febe_errors); 1853 tmp.corr_hcs = be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors); 1854 tmp.uncorr_hcs = be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors); 1855 tmp.tx_cells = be32_to_cpu(fore200e->stats->aal0.cells_transmitted) + 1856 be32_to_cpu(fore200e->stats->aal34.cells_transmitted) + 1857 be32_to_cpu(fore200e->stats->aal5.cells_transmitted); 1858 tmp.rx_cells = be32_to_cpu(fore200e->stats->aal0.cells_received) + 1859 be32_to_cpu(fore200e->stats->aal34.cells_received) + 1860 be32_to_cpu(fore200e->stats->aal5.cells_received); 1861 1862 if (arg) 1863 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0; 1864 1865 return 0; 1866 } 1867 1868 1869 static int 1870 fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg) 1871 { 1872 struct fore200e* fore200e = FORE200E_DEV(dev); 1873 1874 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg); 1875 1876 switch (cmd) { 1877 1878 case SONET_GETSTAT: 1879 return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg); 1880 1881 case SONET_GETDIAG: 1882 return put_user(0, (int __user *)arg) ? -EFAULT : 0; 1883 1884 case ATM_SETLOOP: 1885 return fore200e_setloop(fore200e, (int)(unsigned long)arg); 1886 1887 case ATM_GETLOOP: 1888 return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0; 1889 1890 case ATM_QUERYLOOP: 1891 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0; 1892 } 1893 1894 return -ENOSYS; /* not implemented */ 1895 } 1896 1897 1898 static int 1899 fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags) 1900 { 1901 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc); 1902 struct fore200e* fore200e = FORE200E_DEV(vcc->dev); 1903 1904 if (!test_bit(ATM_VF_READY, &vcc->flags)) { 1905 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi); 1906 return -EINVAL; 1907 } 1908 1909 DPRINTK(2, "change_qos %d.%d.%d, " 1910 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; " 1911 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n" 1912 "available_cell_rate = %u", 1913 vcc->itf, vcc->vpi, vcc->vci, 1914 fore200e_traffic_class[ qos->txtp.traffic_class ], 1915 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu, 1916 fore200e_traffic_class[ qos->rxtp.traffic_class ], 1917 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu, 1918 flags, fore200e->available_cell_rate); 1919 1920 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) { 1921 1922 mutex_lock(&fore200e->rate_mtx); 1923 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) { 1924 mutex_unlock(&fore200e->rate_mtx); 1925 return -EAGAIN; 1926 } 1927 1928 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr; 1929 fore200e->available_cell_rate -= qos->txtp.max_pcr; 1930 1931 mutex_unlock(&fore200e->rate_mtx); 1932 1933 memcpy(&vcc->qos, qos, sizeof(struct atm_qos)); 1934 1935 /* update rate control parameters */ 1936 fore200e_rate_ctrl(qos, &fore200e_vcc->rate); 1937 1938 set_bit(ATM_VF_HASQOS, &vcc->flags); 1939 1940 return 0; 1941 } 1942 1943 return -EINVAL; 1944 } 1945 1946 1947 static int fore200e_irq_request(struct fore200e *fore200e) 1948 { 1949 if (request_irq(fore200e->irq, fore200e_interrupt, IRQF_SHARED, fore200e->name, fore200e->atm_dev) < 0) { 1950 1951 printk(FORE200E "unable to reserve IRQ %s for device %s\n", 1952 fore200e_irq_itoa(fore200e->irq), fore200e->name); 1953 return -EBUSY; 1954 } 1955 1956 printk(FORE200E "IRQ %s reserved for device %s\n", 1957 fore200e_irq_itoa(fore200e->irq), fore200e->name); 1958 1959 #ifdef FORE200E_USE_TASKLET 1960 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e); 1961 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e); 1962 #endif 1963 1964 fore200e->state = FORE200E_STATE_IRQ; 1965 return 0; 1966 } 1967 1968 1969 static int fore200e_get_esi(struct fore200e *fore200e) 1970 { 1971 struct prom_data* prom = kzalloc(sizeof(struct prom_data), GFP_KERNEL); 1972 int ok, i; 1973 1974 if (!prom) 1975 return -ENOMEM; 1976 1977 ok = fore200e->bus->prom_read(fore200e, prom); 1978 if (ok < 0) { 1979 kfree(prom); 1980 return -EBUSY; 1981 } 1982 1983 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %pM\n", 1984 fore200e->name, 1985 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */ 1986 prom->serial_number & 0xFFFF, &prom->mac_addr[2]); 1987 1988 for (i = 0; i < ESI_LEN; i++) { 1989 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ]; 1990 } 1991 1992 kfree(prom); 1993 1994 return 0; 1995 } 1996 1997 1998 static int fore200e_alloc_rx_buf(struct fore200e *fore200e) 1999 { 2000 int scheme, magn, nbr, size, i; 2001 2002 struct host_bsq* bsq; 2003 struct buffer* buffer; 2004 2005 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 2006 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 2007 2008 bsq = &fore200e->host_bsq[ scheme ][ magn ]; 2009 2010 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ]; 2011 size = fore200e_rx_buf_size[ scheme ][ magn ]; 2012 2013 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn); 2014 2015 /* allocate the array of receive buffers */ 2016 buffer = bsq->buffer = kcalloc(nbr, sizeof(struct buffer), 2017 GFP_KERNEL); 2018 2019 if (buffer == NULL) 2020 return -ENOMEM; 2021 2022 bsq->freebuf = NULL; 2023 2024 for (i = 0; i < nbr; i++) { 2025 2026 buffer[ i ].scheme = scheme; 2027 buffer[ i ].magn = magn; 2028 #ifdef FORE200E_BSQ_DEBUG 2029 buffer[ i ].index = i; 2030 buffer[ i ].supplied = 0; 2031 #endif 2032 2033 /* allocate the receive buffer body */ 2034 if (fore200e_chunk_alloc(fore200e, 2035 &buffer[ i ].data, size, fore200e->bus->buffer_alignment, 2036 DMA_FROM_DEVICE) < 0) { 2037 2038 while (i > 0) 2039 fore200e_chunk_free(fore200e, &buffer[ --i ].data); 2040 kfree(buffer); 2041 2042 return -ENOMEM; 2043 } 2044 2045 /* insert the buffer into the free buffer list */ 2046 buffer[ i ].next = bsq->freebuf; 2047 bsq->freebuf = &buffer[ i ]; 2048 } 2049 /* all the buffers are free, initially */ 2050 bsq->freebuf_count = nbr; 2051 2052 #ifdef FORE200E_BSQ_DEBUG 2053 bsq_audit(3, bsq, scheme, magn); 2054 #endif 2055 } 2056 } 2057 2058 fore200e->state = FORE200E_STATE_ALLOC_BUF; 2059 return 0; 2060 } 2061 2062 2063 static int fore200e_init_bs_queue(struct fore200e *fore200e) 2064 { 2065 int scheme, magn, i; 2066 2067 struct host_bsq* bsq; 2068 struct cp_bsq_entry __iomem * cp_entry; 2069 2070 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 2071 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 2072 2073 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn); 2074 2075 bsq = &fore200e->host_bsq[ scheme ][ magn ]; 2076 2077 /* allocate and align the array of status words */ 2078 if (fore200e_dma_chunk_alloc(fore200e, 2079 &bsq->status, 2080 sizeof(enum status), 2081 QUEUE_SIZE_BS, 2082 fore200e->bus->status_alignment) < 0) { 2083 return -ENOMEM; 2084 } 2085 2086 /* allocate and align the array of receive buffer descriptors */ 2087 if (fore200e_dma_chunk_alloc(fore200e, 2088 &bsq->rbd_block, 2089 sizeof(struct rbd_block), 2090 QUEUE_SIZE_BS, 2091 fore200e->bus->descr_alignment) < 0) { 2092 2093 fore200e_dma_chunk_free(fore200e, &bsq->status); 2094 return -ENOMEM; 2095 } 2096 2097 /* get the base address of the cp resident buffer supply queue entries */ 2098 cp_entry = fore200e->virt_base + 2099 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]); 2100 2101 /* fill the host resident and cp resident buffer supply queue entries */ 2102 for (i = 0; i < QUEUE_SIZE_BS; i++) { 2103 2104 bsq->host_entry[ i ].status = 2105 FORE200E_INDEX(bsq->status.align_addr, enum status, i); 2106 bsq->host_entry[ i ].rbd_block = 2107 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i); 2108 bsq->host_entry[ i ].rbd_block_dma = 2109 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i); 2110 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ]; 2111 2112 *bsq->host_entry[ i ].status = STATUS_FREE; 2113 2114 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i), 2115 &cp_entry[ i ].status_haddr); 2116 } 2117 } 2118 } 2119 2120 fore200e->state = FORE200E_STATE_INIT_BSQ; 2121 return 0; 2122 } 2123 2124 2125 static int fore200e_init_rx_queue(struct fore200e *fore200e) 2126 { 2127 struct host_rxq* rxq = &fore200e->host_rxq; 2128 struct cp_rxq_entry __iomem * cp_entry; 2129 int i; 2130 2131 DPRINTK(2, "receive queue is being initialized\n"); 2132 2133 /* allocate and align the array of status words */ 2134 if (fore200e_dma_chunk_alloc(fore200e, 2135 &rxq->status, 2136 sizeof(enum status), 2137 QUEUE_SIZE_RX, 2138 fore200e->bus->status_alignment) < 0) { 2139 return -ENOMEM; 2140 } 2141 2142 /* allocate and align the array of receive PDU descriptors */ 2143 if (fore200e_dma_chunk_alloc(fore200e, 2144 &rxq->rpd, 2145 sizeof(struct rpd), 2146 QUEUE_SIZE_RX, 2147 fore200e->bus->descr_alignment) < 0) { 2148 2149 fore200e_dma_chunk_free(fore200e, &rxq->status); 2150 return -ENOMEM; 2151 } 2152 2153 /* get the base address of the cp resident rx queue entries */ 2154 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq); 2155 2156 /* fill the host resident and cp resident rx entries */ 2157 for (i=0; i < QUEUE_SIZE_RX; i++) { 2158 2159 rxq->host_entry[ i ].status = 2160 FORE200E_INDEX(rxq->status.align_addr, enum status, i); 2161 rxq->host_entry[ i ].rpd = 2162 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i); 2163 rxq->host_entry[ i ].rpd_dma = 2164 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i); 2165 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ]; 2166 2167 *rxq->host_entry[ i ].status = STATUS_FREE; 2168 2169 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i), 2170 &cp_entry[ i ].status_haddr); 2171 2172 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i), 2173 &cp_entry[ i ].rpd_haddr); 2174 } 2175 2176 /* set the head entry of the queue */ 2177 rxq->head = 0; 2178 2179 fore200e->state = FORE200E_STATE_INIT_RXQ; 2180 return 0; 2181 } 2182 2183 2184 static int fore200e_init_tx_queue(struct fore200e *fore200e) 2185 { 2186 struct host_txq* txq = &fore200e->host_txq; 2187 struct cp_txq_entry __iomem * cp_entry; 2188 int i; 2189 2190 DPRINTK(2, "transmit queue is being initialized\n"); 2191 2192 /* allocate and align the array of status words */ 2193 if (fore200e_dma_chunk_alloc(fore200e, 2194 &txq->status, 2195 sizeof(enum status), 2196 QUEUE_SIZE_TX, 2197 fore200e->bus->status_alignment) < 0) { 2198 return -ENOMEM; 2199 } 2200 2201 /* allocate and align the array of transmit PDU descriptors */ 2202 if (fore200e_dma_chunk_alloc(fore200e, 2203 &txq->tpd, 2204 sizeof(struct tpd), 2205 QUEUE_SIZE_TX, 2206 fore200e->bus->descr_alignment) < 0) { 2207 2208 fore200e_dma_chunk_free(fore200e, &txq->status); 2209 return -ENOMEM; 2210 } 2211 2212 /* get the base address of the cp resident tx queue entries */ 2213 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq); 2214 2215 /* fill the host resident and cp resident tx entries */ 2216 for (i=0; i < QUEUE_SIZE_TX; i++) { 2217 2218 txq->host_entry[ i ].status = 2219 FORE200E_INDEX(txq->status.align_addr, enum status, i); 2220 txq->host_entry[ i ].tpd = 2221 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i); 2222 txq->host_entry[ i ].tpd_dma = 2223 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i); 2224 txq->host_entry[ i ].cp_entry = &cp_entry[ i ]; 2225 2226 *txq->host_entry[ i ].status = STATUS_FREE; 2227 2228 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i), 2229 &cp_entry[ i ].status_haddr); 2230 2231 /* although there is a one-to-one mapping of tx queue entries and tpds, 2232 we do not write here the DMA (physical) base address of each tpd into 2233 the related cp resident entry, because the cp relies on this write 2234 operation to detect that a new pdu has been submitted for tx */ 2235 } 2236 2237 /* set the head and tail entries of the queue */ 2238 txq->head = 0; 2239 txq->tail = 0; 2240 2241 fore200e->state = FORE200E_STATE_INIT_TXQ; 2242 return 0; 2243 } 2244 2245 2246 static int fore200e_init_cmd_queue(struct fore200e *fore200e) 2247 { 2248 struct host_cmdq* cmdq = &fore200e->host_cmdq; 2249 struct cp_cmdq_entry __iomem * cp_entry; 2250 int i; 2251 2252 DPRINTK(2, "command queue is being initialized\n"); 2253 2254 /* allocate and align the array of status words */ 2255 if (fore200e_dma_chunk_alloc(fore200e, 2256 &cmdq->status, 2257 sizeof(enum status), 2258 QUEUE_SIZE_CMD, 2259 fore200e->bus->status_alignment) < 0) { 2260 return -ENOMEM; 2261 } 2262 2263 /* get the base address of the cp resident cmd queue entries */ 2264 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq); 2265 2266 /* fill the host resident and cp resident cmd entries */ 2267 for (i=0; i < QUEUE_SIZE_CMD; i++) { 2268 2269 cmdq->host_entry[ i ].status = 2270 FORE200E_INDEX(cmdq->status.align_addr, enum status, i); 2271 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ]; 2272 2273 *cmdq->host_entry[ i ].status = STATUS_FREE; 2274 2275 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i), 2276 &cp_entry[ i ].status_haddr); 2277 } 2278 2279 /* set the head entry of the queue */ 2280 cmdq->head = 0; 2281 2282 fore200e->state = FORE200E_STATE_INIT_CMDQ; 2283 return 0; 2284 } 2285 2286 2287 static void fore200e_param_bs_queue(struct fore200e *fore200e, 2288 enum buffer_scheme scheme, 2289 enum buffer_magn magn, int queue_length, 2290 int pool_size, int supply_blksize) 2291 { 2292 struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ]; 2293 2294 fore200e->bus->write(queue_length, &bs_spec->queue_length); 2295 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size); 2296 fore200e->bus->write(pool_size, &bs_spec->pool_size); 2297 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize); 2298 } 2299 2300 2301 static int fore200e_initialize(struct fore200e *fore200e) 2302 { 2303 struct cp_queues __iomem * cpq; 2304 int ok, scheme, magn; 2305 2306 DPRINTK(2, "device %s being initialized\n", fore200e->name); 2307 2308 mutex_init(&fore200e->rate_mtx); 2309 spin_lock_init(&fore200e->q_lock); 2310 2311 cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET; 2312 2313 /* enable cp to host interrupts */ 2314 fore200e->bus->write(1, &cpq->imask); 2315 2316 if (fore200e->bus->irq_enable) 2317 fore200e->bus->irq_enable(fore200e); 2318 2319 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect); 2320 2321 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len); 2322 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len); 2323 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len); 2324 2325 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension); 2326 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension); 2327 2328 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) 2329 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) 2330 fore200e_param_bs_queue(fore200e, scheme, magn, 2331 QUEUE_SIZE_BS, 2332 fore200e_rx_buf_nbr[ scheme ][ magn ], 2333 RBD_BLK_SIZE); 2334 2335 /* issue the initialize command */ 2336 fore200e->bus->write(STATUS_PENDING, &cpq->init.status); 2337 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode); 2338 2339 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000); 2340 if (ok == 0) { 2341 printk(FORE200E "device %s initialization failed\n", fore200e->name); 2342 return -ENODEV; 2343 } 2344 2345 printk(FORE200E "device %s initialized\n", fore200e->name); 2346 2347 fore200e->state = FORE200E_STATE_INITIALIZE; 2348 return 0; 2349 } 2350 2351 2352 static void fore200e_monitor_putc(struct fore200e *fore200e, char c) 2353 { 2354 struct cp_monitor __iomem * monitor = fore200e->cp_monitor; 2355 2356 #if 0 2357 printk("%c", c); 2358 #endif 2359 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send); 2360 } 2361 2362 2363 static int fore200e_monitor_getc(struct fore200e *fore200e) 2364 { 2365 struct cp_monitor __iomem * monitor = fore200e->cp_monitor; 2366 unsigned long timeout = jiffies + msecs_to_jiffies(50); 2367 int c; 2368 2369 while (time_before(jiffies, timeout)) { 2370 2371 c = (int) fore200e->bus->read(&monitor->soft_uart.recv); 2372 2373 if (c & FORE200E_CP_MONITOR_UART_AVAIL) { 2374 2375 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv); 2376 #if 0 2377 printk("%c", c & 0xFF); 2378 #endif 2379 return c & 0xFF; 2380 } 2381 } 2382 2383 return -1; 2384 } 2385 2386 2387 static void fore200e_monitor_puts(struct fore200e *fore200e, char *str) 2388 { 2389 while (*str) { 2390 2391 /* the i960 monitor doesn't accept any new character if it has something to say */ 2392 while (fore200e_monitor_getc(fore200e) >= 0); 2393 2394 fore200e_monitor_putc(fore200e, *str++); 2395 } 2396 2397 while (fore200e_monitor_getc(fore200e) >= 0); 2398 } 2399 2400 #ifdef __LITTLE_ENDIAN 2401 #define FW_EXT ".bin" 2402 #else 2403 #define FW_EXT "_ecd.bin2" 2404 #endif 2405 2406 static int fore200e_load_and_start_fw(struct fore200e *fore200e) 2407 { 2408 const struct firmware *firmware; 2409 const struct fw_header *fw_header; 2410 const __le32 *fw_data; 2411 u32 fw_size; 2412 u32 __iomem *load_addr; 2413 char buf[48]; 2414 int err; 2415 2416 sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT); 2417 if ((err = request_firmware(&firmware, buf, fore200e->dev)) < 0) { 2418 printk(FORE200E "problem loading firmware image %s\n", fore200e->bus->model_name); 2419 return err; 2420 } 2421 2422 fw_data = (const __le32 *)firmware->data; 2423 fw_size = firmware->size / sizeof(u32); 2424 fw_header = (const struct fw_header *)firmware->data; 2425 load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset); 2426 2427 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n", 2428 fore200e->name, load_addr, fw_size); 2429 2430 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) { 2431 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name); 2432 goto release; 2433 } 2434 2435 for (; fw_size--; fw_data++, load_addr++) 2436 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr); 2437 2438 DPRINTK(2, "device %s firmware being started\n", fore200e->name); 2439 2440 #if defined(__sparc_v9__) 2441 /* reported to be required by SBA cards on some sparc64 hosts */ 2442 fore200e_spin(100); 2443 #endif 2444 2445 sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset)); 2446 fore200e_monitor_puts(fore200e, buf); 2447 2448 if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) { 2449 printk(FORE200E "device %s firmware didn't start\n", fore200e->name); 2450 goto release; 2451 } 2452 2453 printk(FORE200E "device %s firmware started\n", fore200e->name); 2454 2455 fore200e->state = FORE200E_STATE_START_FW; 2456 err = 0; 2457 2458 release: 2459 release_firmware(firmware); 2460 return err; 2461 } 2462 2463 2464 static int fore200e_register(struct fore200e *fore200e, struct device *parent) 2465 { 2466 struct atm_dev* atm_dev; 2467 2468 DPRINTK(2, "device %s being registered\n", fore200e->name); 2469 2470 atm_dev = atm_dev_register(fore200e->bus->proc_name, parent, &fore200e_ops, 2471 -1, NULL); 2472 if (atm_dev == NULL) { 2473 printk(FORE200E "unable to register device %s\n", fore200e->name); 2474 return -ENODEV; 2475 } 2476 2477 atm_dev->dev_data = fore200e; 2478 fore200e->atm_dev = atm_dev; 2479 2480 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS; 2481 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS; 2482 2483 fore200e->available_cell_rate = ATM_OC3_PCR; 2484 2485 fore200e->state = FORE200E_STATE_REGISTER; 2486 return 0; 2487 } 2488 2489 2490 static int fore200e_init(struct fore200e *fore200e, struct device *parent) 2491 { 2492 if (fore200e_register(fore200e, parent) < 0) 2493 return -ENODEV; 2494 2495 if (fore200e->bus->configure(fore200e) < 0) 2496 return -ENODEV; 2497 2498 if (fore200e->bus->map(fore200e) < 0) 2499 return -ENODEV; 2500 2501 if (fore200e_reset(fore200e, 1) < 0) 2502 return -ENODEV; 2503 2504 if (fore200e_load_and_start_fw(fore200e) < 0) 2505 return -ENODEV; 2506 2507 if (fore200e_initialize(fore200e) < 0) 2508 return -ENODEV; 2509 2510 if (fore200e_init_cmd_queue(fore200e) < 0) 2511 return -ENOMEM; 2512 2513 if (fore200e_init_tx_queue(fore200e) < 0) 2514 return -ENOMEM; 2515 2516 if (fore200e_init_rx_queue(fore200e) < 0) 2517 return -ENOMEM; 2518 2519 if (fore200e_init_bs_queue(fore200e) < 0) 2520 return -ENOMEM; 2521 2522 if (fore200e_alloc_rx_buf(fore200e) < 0) 2523 return -ENOMEM; 2524 2525 if (fore200e_get_esi(fore200e) < 0) 2526 return -EIO; 2527 2528 if (fore200e_irq_request(fore200e) < 0) 2529 return -EBUSY; 2530 2531 fore200e_supply(fore200e); 2532 2533 /* all done, board initialization is now complete */ 2534 fore200e->state = FORE200E_STATE_COMPLETE; 2535 return 0; 2536 } 2537 2538 #ifdef CONFIG_SBUS 2539 static const struct of_device_id fore200e_sba_match[]; 2540 static int fore200e_sba_probe(struct platform_device *op) 2541 { 2542 const struct of_device_id *match; 2543 struct fore200e *fore200e; 2544 static int index = 0; 2545 int err; 2546 2547 match = of_match_device(fore200e_sba_match, &op->dev); 2548 if (!match) 2549 return -EINVAL; 2550 2551 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL); 2552 if (!fore200e) 2553 return -ENOMEM; 2554 2555 fore200e->bus = &fore200e_sbus_ops; 2556 fore200e->dev = &op->dev; 2557 fore200e->irq = op->archdata.irqs[0]; 2558 fore200e->phys_base = op->resource[0].start; 2559 2560 sprintf(fore200e->name, "SBA-200E-%d", index); 2561 2562 err = fore200e_init(fore200e, &op->dev); 2563 if (err < 0) { 2564 fore200e_shutdown(fore200e); 2565 kfree(fore200e); 2566 return err; 2567 } 2568 2569 index++; 2570 dev_set_drvdata(&op->dev, fore200e); 2571 2572 return 0; 2573 } 2574 2575 static int fore200e_sba_remove(struct platform_device *op) 2576 { 2577 struct fore200e *fore200e = dev_get_drvdata(&op->dev); 2578 2579 fore200e_shutdown(fore200e); 2580 kfree(fore200e); 2581 2582 return 0; 2583 } 2584 2585 static const struct of_device_id fore200e_sba_match[] = { 2586 { 2587 .name = SBA200E_PROM_NAME, 2588 }, 2589 {}, 2590 }; 2591 MODULE_DEVICE_TABLE(of, fore200e_sba_match); 2592 2593 static struct platform_driver fore200e_sba_driver = { 2594 .driver = { 2595 .name = "fore_200e", 2596 .of_match_table = fore200e_sba_match, 2597 }, 2598 .probe = fore200e_sba_probe, 2599 .remove = fore200e_sba_remove, 2600 }; 2601 #endif 2602 2603 #ifdef CONFIG_PCI 2604 static int fore200e_pca_detect(struct pci_dev *pci_dev, 2605 const struct pci_device_id *pci_ent) 2606 { 2607 struct fore200e* fore200e; 2608 int err = 0; 2609 static int index = 0; 2610 2611 if (pci_enable_device(pci_dev)) { 2612 err = -EINVAL; 2613 goto out; 2614 } 2615 2616 if (dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(32))) { 2617 err = -EINVAL; 2618 goto out; 2619 } 2620 2621 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL); 2622 if (fore200e == NULL) { 2623 err = -ENOMEM; 2624 goto out_disable; 2625 } 2626 2627 fore200e->bus = &fore200e_pci_ops; 2628 fore200e->dev = &pci_dev->dev; 2629 fore200e->irq = pci_dev->irq; 2630 fore200e->phys_base = pci_resource_start(pci_dev, 0); 2631 2632 sprintf(fore200e->name, "PCA-200E-%d", index - 1); 2633 2634 pci_set_master(pci_dev); 2635 2636 printk(FORE200E "device PCA-200E found at 0x%lx, IRQ %s\n", 2637 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq)); 2638 2639 sprintf(fore200e->name, "PCA-200E-%d", index); 2640 2641 err = fore200e_init(fore200e, &pci_dev->dev); 2642 if (err < 0) { 2643 fore200e_shutdown(fore200e); 2644 goto out_free; 2645 } 2646 2647 ++index; 2648 pci_set_drvdata(pci_dev, fore200e); 2649 2650 out: 2651 return err; 2652 2653 out_free: 2654 kfree(fore200e); 2655 out_disable: 2656 pci_disable_device(pci_dev); 2657 goto out; 2658 } 2659 2660 2661 static void fore200e_pca_remove_one(struct pci_dev *pci_dev) 2662 { 2663 struct fore200e *fore200e; 2664 2665 fore200e = pci_get_drvdata(pci_dev); 2666 2667 fore200e_shutdown(fore200e); 2668 kfree(fore200e); 2669 pci_disable_device(pci_dev); 2670 } 2671 2672 2673 static const struct pci_device_id fore200e_pca_tbl[] = { 2674 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID }, 2675 { 0, } 2676 }; 2677 2678 MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl); 2679 2680 static struct pci_driver fore200e_pca_driver = { 2681 .name = "fore_200e", 2682 .probe = fore200e_pca_detect, 2683 .remove = fore200e_pca_remove_one, 2684 .id_table = fore200e_pca_tbl, 2685 }; 2686 #endif 2687 2688 static int __init fore200e_module_init(void) 2689 { 2690 int err = 0; 2691 2692 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n"); 2693 2694 #ifdef CONFIG_SBUS 2695 err = platform_driver_register(&fore200e_sba_driver); 2696 if (err) 2697 return err; 2698 #endif 2699 2700 #ifdef CONFIG_PCI 2701 err = pci_register_driver(&fore200e_pca_driver); 2702 #endif 2703 2704 #ifdef CONFIG_SBUS 2705 if (err) 2706 platform_driver_unregister(&fore200e_sba_driver); 2707 #endif 2708 2709 return err; 2710 } 2711 2712 static void __exit fore200e_module_cleanup(void) 2713 { 2714 #ifdef CONFIG_PCI 2715 pci_unregister_driver(&fore200e_pca_driver); 2716 #endif 2717 #ifdef CONFIG_SBUS 2718 platform_driver_unregister(&fore200e_sba_driver); 2719 #endif 2720 } 2721 2722 static int 2723 fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page) 2724 { 2725 struct fore200e* fore200e = FORE200E_DEV(dev); 2726 struct fore200e_vcc* fore200e_vcc; 2727 struct atm_vcc* vcc; 2728 int i, len, left = *pos; 2729 unsigned long flags; 2730 2731 if (!left--) { 2732 2733 if (fore200e_getstats(fore200e) < 0) 2734 return -EIO; 2735 2736 len = sprintf(page,"\n" 2737 " device:\n" 2738 " internal name:\t\t%s\n", fore200e->name); 2739 2740 /* print bus-specific information */ 2741 if (fore200e->bus->proc_read) 2742 len += fore200e->bus->proc_read(fore200e, page + len); 2743 2744 len += sprintf(page + len, 2745 " interrupt line:\t\t%s\n" 2746 " physical base address:\t0x%p\n" 2747 " virtual base address:\t0x%p\n" 2748 " factory address (ESI):\t%pM\n" 2749 " board serial number:\t\t%d\n\n", 2750 fore200e_irq_itoa(fore200e->irq), 2751 (void*)fore200e->phys_base, 2752 fore200e->virt_base, 2753 fore200e->esi, 2754 fore200e->esi[4] * 256 + fore200e->esi[5]); 2755 2756 return len; 2757 } 2758 2759 if (!left--) 2760 return sprintf(page, 2761 " free small bufs, scheme 1:\t%d\n" 2762 " free large bufs, scheme 1:\t%d\n" 2763 " free small bufs, scheme 2:\t%d\n" 2764 " free large bufs, scheme 2:\t%d\n", 2765 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count, 2766 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count, 2767 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count, 2768 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count); 2769 2770 if (!left--) { 2771 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat); 2772 2773 len = sprintf(page,"\n\n" 2774 " cell processor:\n" 2775 " heartbeat state:\t\t"); 2776 2777 if (hb >> 16 != 0xDEAD) 2778 len += sprintf(page + len, "0x%08x\n", hb); 2779 else 2780 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF); 2781 2782 return len; 2783 } 2784 2785 if (!left--) { 2786 static const char* media_name[] = { 2787 "unshielded twisted pair", 2788 "multimode optical fiber ST", 2789 "multimode optical fiber SC", 2790 "single-mode optical fiber ST", 2791 "single-mode optical fiber SC", 2792 "unknown" 2793 }; 2794 2795 static const char* oc3_mode[] = { 2796 "normal operation", 2797 "diagnostic loopback", 2798 "line loopback", 2799 "unknown" 2800 }; 2801 2802 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release); 2803 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release); 2804 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision); 2805 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type)); 2806 u32 oc3_index; 2807 2808 if (media_index > 4) 2809 media_index = 5; 2810 2811 switch (fore200e->loop_mode) { 2812 case ATM_LM_NONE: oc3_index = 0; 2813 break; 2814 case ATM_LM_LOC_PHY: oc3_index = 1; 2815 break; 2816 case ATM_LM_RMT_PHY: oc3_index = 2; 2817 break; 2818 default: oc3_index = 3; 2819 } 2820 2821 return sprintf(page, 2822 " firmware release:\t\t%d.%d.%d\n" 2823 " monitor release:\t\t%d.%d\n" 2824 " media type:\t\t\t%s\n" 2825 " OC-3 revision:\t\t0x%x\n" 2826 " OC-3 mode:\t\t\t%s", 2827 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24, 2828 mon960_release >> 16, mon960_release << 16 >> 16, 2829 media_name[ media_index ], 2830 oc3_revision, 2831 oc3_mode[ oc3_index ]); 2832 } 2833 2834 if (!left--) { 2835 struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor; 2836 2837 return sprintf(page, 2838 "\n\n" 2839 " monitor:\n" 2840 " version number:\t\t%d\n" 2841 " boot status word:\t\t0x%08x\n", 2842 fore200e->bus->read(&cp_monitor->mon_version), 2843 fore200e->bus->read(&cp_monitor->bstat)); 2844 } 2845 2846 if (!left--) 2847 return sprintf(page, 2848 "\n" 2849 " device statistics:\n" 2850 " 4b5b:\n" 2851 " crc_header_errors:\t\t%10u\n" 2852 " framing_errors:\t\t%10u\n", 2853 be32_to_cpu(fore200e->stats->phy.crc_header_errors), 2854 be32_to_cpu(fore200e->stats->phy.framing_errors)); 2855 2856 if (!left--) 2857 return sprintf(page, "\n" 2858 " OC-3:\n" 2859 " section_bip8_errors:\t%10u\n" 2860 " path_bip8_errors:\t\t%10u\n" 2861 " line_bip24_errors:\t\t%10u\n" 2862 " line_febe_errors:\t\t%10u\n" 2863 " path_febe_errors:\t\t%10u\n" 2864 " corr_hcs_errors:\t\t%10u\n" 2865 " ucorr_hcs_errors:\t\t%10u\n", 2866 be32_to_cpu(fore200e->stats->oc3.section_bip8_errors), 2867 be32_to_cpu(fore200e->stats->oc3.path_bip8_errors), 2868 be32_to_cpu(fore200e->stats->oc3.line_bip24_errors), 2869 be32_to_cpu(fore200e->stats->oc3.line_febe_errors), 2870 be32_to_cpu(fore200e->stats->oc3.path_febe_errors), 2871 be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors), 2872 be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors)); 2873 2874 if (!left--) 2875 return sprintf(page,"\n" 2876 " ATM:\t\t\t\t cells\n" 2877 " TX:\t\t\t%10u\n" 2878 " RX:\t\t\t%10u\n" 2879 " vpi out of range:\t\t%10u\n" 2880 " vpi no conn:\t\t%10u\n" 2881 " vci out of range:\t\t%10u\n" 2882 " vci no conn:\t\t%10u\n", 2883 be32_to_cpu(fore200e->stats->atm.cells_transmitted), 2884 be32_to_cpu(fore200e->stats->atm.cells_received), 2885 be32_to_cpu(fore200e->stats->atm.vpi_bad_range), 2886 be32_to_cpu(fore200e->stats->atm.vpi_no_conn), 2887 be32_to_cpu(fore200e->stats->atm.vci_bad_range), 2888 be32_to_cpu(fore200e->stats->atm.vci_no_conn)); 2889 2890 if (!left--) 2891 return sprintf(page,"\n" 2892 " AAL0:\t\t\t cells\n" 2893 " TX:\t\t\t%10u\n" 2894 " RX:\t\t\t%10u\n" 2895 " dropped:\t\t\t%10u\n", 2896 be32_to_cpu(fore200e->stats->aal0.cells_transmitted), 2897 be32_to_cpu(fore200e->stats->aal0.cells_received), 2898 be32_to_cpu(fore200e->stats->aal0.cells_dropped)); 2899 2900 if (!left--) 2901 return sprintf(page,"\n" 2902 " AAL3/4:\n" 2903 " SAR sublayer:\t\t cells\n" 2904 " TX:\t\t\t%10u\n" 2905 " RX:\t\t\t%10u\n" 2906 " dropped:\t\t\t%10u\n" 2907 " CRC errors:\t\t%10u\n" 2908 " protocol errors:\t\t%10u\n\n" 2909 " CS sublayer:\t\t PDUs\n" 2910 " TX:\t\t\t%10u\n" 2911 " RX:\t\t\t%10u\n" 2912 " dropped:\t\t\t%10u\n" 2913 " protocol errors:\t\t%10u\n", 2914 be32_to_cpu(fore200e->stats->aal34.cells_transmitted), 2915 be32_to_cpu(fore200e->stats->aal34.cells_received), 2916 be32_to_cpu(fore200e->stats->aal34.cells_dropped), 2917 be32_to_cpu(fore200e->stats->aal34.cells_crc_errors), 2918 be32_to_cpu(fore200e->stats->aal34.cells_protocol_errors), 2919 be32_to_cpu(fore200e->stats->aal34.cspdus_transmitted), 2920 be32_to_cpu(fore200e->stats->aal34.cspdus_received), 2921 be32_to_cpu(fore200e->stats->aal34.cspdus_dropped), 2922 be32_to_cpu(fore200e->stats->aal34.cspdus_protocol_errors)); 2923 2924 if (!left--) 2925 return sprintf(page,"\n" 2926 " AAL5:\n" 2927 " SAR sublayer:\t\t cells\n" 2928 " TX:\t\t\t%10u\n" 2929 " RX:\t\t\t%10u\n" 2930 " dropped:\t\t\t%10u\n" 2931 " congestions:\t\t%10u\n\n" 2932 " CS sublayer:\t\t PDUs\n" 2933 " TX:\t\t\t%10u\n" 2934 " RX:\t\t\t%10u\n" 2935 " dropped:\t\t\t%10u\n" 2936 " CRC errors:\t\t%10u\n" 2937 " protocol errors:\t\t%10u\n", 2938 be32_to_cpu(fore200e->stats->aal5.cells_transmitted), 2939 be32_to_cpu(fore200e->stats->aal5.cells_received), 2940 be32_to_cpu(fore200e->stats->aal5.cells_dropped), 2941 be32_to_cpu(fore200e->stats->aal5.congestion_experienced), 2942 be32_to_cpu(fore200e->stats->aal5.cspdus_transmitted), 2943 be32_to_cpu(fore200e->stats->aal5.cspdus_received), 2944 be32_to_cpu(fore200e->stats->aal5.cspdus_dropped), 2945 be32_to_cpu(fore200e->stats->aal5.cspdus_crc_errors), 2946 be32_to_cpu(fore200e->stats->aal5.cspdus_protocol_errors)); 2947 2948 if (!left--) 2949 return sprintf(page,"\n" 2950 " AUX:\t\t allocation failures\n" 2951 " small b1:\t\t\t%10u\n" 2952 " large b1:\t\t\t%10u\n" 2953 " small b2:\t\t\t%10u\n" 2954 " large b2:\t\t\t%10u\n" 2955 " RX PDUs:\t\t\t%10u\n" 2956 " TX PDUs:\t\t\t%10lu\n", 2957 be32_to_cpu(fore200e->stats->aux.small_b1_failed), 2958 be32_to_cpu(fore200e->stats->aux.large_b1_failed), 2959 be32_to_cpu(fore200e->stats->aux.small_b2_failed), 2960 be32_to_cpu(fore200e->stats->aux.large_b2_failed), 2961 be32_to_cpu(fore200e->stats->aux.rpd_alloc_failed), 2962 fore200e->tx_sat); 2963 2964 if (!left--) 2965 return sprintf(page,"\n" 2966 " receive carrier:\t\t\t%s\n", 2967 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!"); 2968 2969 if (!left--) { 2970 return sprintf(page,"\n" 2971 " VCCs:\n address VPI VCI AAL " 2972 "TX PDUs TX min/max size RX PDUs RX min/max size\n"); 2973 } 2974 2975 for (i = 0; i < NBR_CONNECT; i++) { 2976 2977 vcc = fore200e->vc_map[i].vcc; 2978 2979 if (vcc == NULL) 2980 continue; 2981 2982 spin_lock_irqsave(&fore200e->q_lock, flags); 2983 2984 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) { 2985 2986 fore200e_vcc = FORE200E_VCC(vcc); 2987 ASSERT(fore200e_vcc); 2988 2989 len = sprintf(page, 2990 " %pK %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n", 2991 vcc, 2992 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal), 2993 fore200e_vcc->tx_pdu, 2994 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu, 2995 fore200e_vcc->tx_max_pdu, 2996 fore200e_vcc->rx_pdu, 2997 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu, 2998 fore200e_vcc->rx_max_pdu); 2999 3000 spin_unlock_irqrestore(&fore200e->q_lock, flags); 3001 return len; 3002 } 3003 3004 spin_unlock_irqrestore(&fore200e->q_lock, flags); 3005 } 3006 3007 return 0; 3008 } 3009 3010 module_init(fore200e_module_init); 3011 module_exit(fore200e_module_cleanup); 3012 3013 3014 static const struct atmdev_ops fore200e_ops = { 3015 .open = fore200e_open, 3016 .close = fore200e_close, 3017 .ioctl = fore200e_ioctl, 3018 .getsockopt = fore200e_getsockopt, 3019 .setsockopt = fore200e_setsockopt, 3020 .send = fore200e_send, 3021 .change_qos = fore200e_change_qos, 3022 .proc_read = fore200e_proc_read, 3023 .owner = THIS_MODULE 3024 }; 3025 3026 MODULE_LICENSE("GPL"); 3027 #ifdef CONFIG_PCI 3028 #ifdef __LITTLE_ENDIAN__ 3029 MODULE_FIRMWARE("pca200e.bin"); 3030 #else 3031 MODULE_FIRMWARE("pca200e_ecd.bin2"); 3032 #endif 3033 #endif /* CONFIG_PCI */ 3034 #ifdef CONFIG_SBUS 3035 MODULE_FIRMWARE("sba200e_ecd.bin2"); 3036 #endif 3037