1 /* 2 A FORE Systems 200E-series driver for ATM on Linux. 3 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003. 4 5 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de). 6 7 This driver simultaneously supports PCA-200E and SBA-200E adapters 8 on i386, alpha (untested), powerpc, sparc and sparc64 architectures. 9 10 This program is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 2 of the License, or 13 (at your option) any later version. 14 15 This program is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software 22 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 */ 24 25 26 #include <linux/kernel.h> 27 #include <linux/slab.h> 28 #include <linux/init.h> 29 #include <linux/capability.h> 30 #include <linux/interrupt.h> 31 #include <linux/bitops.h> 32 #include <linux/pci.h> 33 #include <linux/module.h> 34 #include <linux/atmdev.h> 35 #include <linux/sonet.h> 36 #include <linux/atm_suni.h> 37 #include <linux/dma-mapping.h> 38 #include <linux/delay.h> 39 #include <linux/firmware.h> 40 #include <asm/io.h> 41 #include <asm/string.h> 42 #include <asm/page.h> 43 #include <asm/irq.h> 44 #include <asm/dma.h> 45 #include <asm/byteorder.h> 46 #include <linux/uaccess.h> 47 #include <linux/atomic.h> 48 49 #ifdef CONFIG_SBUS 50 #include <linux/of.h> 51 #include <linux/of_device.h> 52 #include <asm/idprom.h> 53 #include <asm/openprom.h> 54 #include <asm/oplib.h> 55 #include <asm/pgtable.h> 56 #endif 57 58 #if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */ 59 #define FORE200E_USE_TASKLET 60 #endif 61 62 #if 0 /* enable the debugging code of the buffer supply queues */ 63 #define FORE200E_BSQ_DEBUG 64 #endif 65 66 #if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */ 67 #define FORE200E_52BYTE_AAL0_SDU 68 #endif 69 70 #include "fore200e.h" 71 #include "suni.h" 72 73 #define FORE200E_VERSION "0.3e" 74 75 #define FORE200E "fore200e: " 76 77 #if 0 /* override .config */ 78 #define CONFIG_ATM_FORE200E_DEBUG 1 79 #endif 80 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0) 81 #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \ 82 printk(FORE200E format, ##args); } while (0) 83 #else 84 #define DPRINTK(level, format, args...) do {} while (0) 85 #endif 86 87 88 #define FORE200E_ALIGN(addr, alignment) \ 89 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr)) 90 91 #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type)) 92 93 #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ]) 94 95 #define FORE200E_NEXT_ENTRY(index, modulo) (index = ((index) + 1) % (modulo)) 96 97 #if 1 98 #define ASSERT(expr) if (!(expr)) { \ 99 printk(FORE200E "assertion failed! %s[%d]: %s\n", \ 100 __func__, __LINE__, #expr); \ 101 panic(FORE200E "%s", __func__); \ 102 } 103 #else 104 #define ASSERT(expr) do {} while (0) 105 #endif 106 107 108 static const struct atmdev_ops fore200e_ops; 109 static const struct fore200e_bus fore200e_bus[]; 110 111 static LIST_HEAD(fore200e_boards); 112 113 114 MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen"); 115 MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION); 116 MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E"); 117 118 119 static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = { 120 { BUFFER_S1_NBR, BUFFER_L1_NBR }, 121 { BUFFER_S2_NBR, BUFFER_L2_NBR } 122 }; 123 124 static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = { 125 { BUFFER_S1_SIZE, BUFFER_L1_SIZE }, 126 { BUFFER_S2_SIZE, BUFFER_L2_SIZE } 127 }; 128 129 130 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0) 131 static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" }; 132 #endif 133 134 135 #if 0 /* currently unused */ 136 static int 137 fore200e_fore2atm_aal(enum fore200e_aal aal) 138 { 139 switch(aal) { 140 case FORE200E_AAL0: return ATM_AAL0; 141 case FORE200E_AAL34: return ATM_AAL34; 142 case FORE200E_AAL5: return ATM_AAL5; 143 } 144 145 return -EINVAL; 146 } 147 #endif 148 149 150 static enum fore200e_aal 151 fore200e_atm2fore_aal(int aal) 152 { 153 switch(aal) { 154 case ATM_AAL0: return FORE200E_AAL0; 155 case ATM_AAL34: return FORE200E_AAL34; 156 case ATM_AAL1: 157 case ATM_AAL2: 158 case ATM_AAL5: return FORE200E_AAL5; 159 } 160 161 return -EINVAL; 162 } 163 164 165 static char* 166 fore200e_irq_itoa(int irq) 167 { 168 static char str[8]; 169 sprintf(str, "%d", irq); 170 return str; 171 } 172 173 174 /* allocate and align a chunk of memory intended to hold the data behing exchanged 175 between the driver and the adapter (using streaming DVMA) */ 176 177 static int 178 fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction) 179 { 180 unsigned long offset = 0; 181 182 if (alignment <= sizeof(int)) 183 alignment = 0; 184 185 chunk->alloc_size = size + alignment; 186 chunk->align_size = size; 187 chunk->direction = direction; 188 189 chunk->alloc_addr = kzalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA); 190 if (chunk->alloc_addr == NULL) 191 return -ENOMEM; 192 193 if (alignment > 0) 194 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment); 195 196 chunk->align_addr = chunk->alloc_addr + offset; 197 198 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction); 199 200 return 0; 201 } 202 203 204 /* free a chunk of memory */ 205 206 static void 207 fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk) 208 { 209 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction); 210 211 kfree(chunk->alloc_addr); 212 } 213 214 215 static void 216 fore200e_spin(int msecs) 217 { 218 unsigned long timeout = jiffies + msecs_to_jiffies(msecs); 219 while (time_before(jiffies, timeout)); 220 } 221 222 223 static int 224 fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs) 225 { 226 unsigned long timeout = jiffies + msecs_to_jiffies(msecs); 227 int ok; 228 229 mb(); 230 do { 231 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR)) 232 break; 233 234 } while (time_before(jiffies, timeout)); 235 236 #if 1 237 if (!ok) { 238 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n", 239 *addr, val); 240 } 241 #endif 242 243 return ok; 244 } 245 246 247 static int 248 fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs) 249 { 250 unsigned long timeout = jiffies + msecs_to_jiffies(msecs); 251 int ok; 252 253 do { 254 if ((ok = (fore200e->bus->read(addr) == val))) 255 break; 256 257 } while (time_before(jiffies, timeout)); 258 259 #if 1 260 if (!ok) { 261 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n", 262 fore200e->bus->read(addr), val); 263 } 264 #endif 265 266 return ok; 267 } 268 269 270 static void 271 fore200e_free_rx_buf(struct fore200e* fore200e) 272 { 273 int scheme, magn, nbr; 274 struct buffer* buffer; 275 276 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 277 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 278 279 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) { 280 281 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) { 282 283 struct chunk* data = &buffer[ nbr ].data; 284 285 if (data->alloc_addr != NULL) 286 fore200e_chunk_free(fore200e, data); 287 } 288 } 289 } 290 } 291 } 292 293 294 static void 295 fore200e_uninit_bs_queue(struct fore200e* fore200e) 296 { 297 int scheme, magn; 298 299 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 300 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 301 302 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status; 303 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block; 304 305 if (status->alloc_addr) 306 fore200e->bus->dma_chunk_free(fore200e, status); 307 308 if (rbd_block->alloc_addr) 309 fore200e->bus->dma_chunk_free(fore200e, rbd_block); 310 } 311 } 312 } 313 314 315 static int 316 fore200e_reset(struct fore200e* fore200e, int diag) 317 { 318 int ok; 319 320 fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET; 321 322 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat); 323 324 fore200e->bus->reset(fore200e); 325 326 if (diag) { 327 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000); 328 if (ok == 0) { 329 330 printk(FORE200E "device %s self-test failed\n", fore200e->name); 331 return -ENODEV; 332 } 333 334 printk(FORE200E "device %s self-test passed\n", fore200e->name); 335 336 fore200e->state = FORE200E_STATE_RESET; 337 } 338 339 return 0; 340 } 341 342 343 static void 344 fore200e_shutdown(struct fore200e* fore200e) 345 { 346 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n", 347 fore200e->name, fore200e->phys_base, 348 fore200e_irq_itoa(fore200e->irq)); 349 350 if (fore200e->state > FORE200E_STATE_RESET) { 351 /* first, reset the board to prevent further interrupts or data transfers */ 352 fore200e_reset(fore200e, 0); 353 } 354 355 /* then, release all allocated resources */ 356 switch(fore200e->state) { 357 358 case FORE200E_STATE_COMPLETE: 359 kfree(fore200e->stats); 360 361 case FORE200E_STATE_IRQ: 362 free_irq(fore200e->irq, fore200e->atm_dev); 363 364 case FORE200E_STATE_ALLOC_BUF: 365 fore200e_free_rx_buf(fore200e); 366 367 case FORE200E_STATE_INIT_BSQ: 368 fore200e_uninit_bs_queue(fore200e); 369 370 case FORE200E_STATE_INIT_RXQ: 371 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status); 372 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd); 373 374 case FORE200E_STATE_INIT_TXQ: 375 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status); 376 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd); 377 378 case FORE200E_STATE_INIT_CMDQ: 379 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status); 380 381 case FORE200E_STATE_INITIALIZE: 382 /* nothing to do for that state */ 383 384 case FORE200E_STATE_START_FW: 385 /* nothing to do for that state */ 386 387 case FORE200E_STATE_RESET: 388 /* nothing to do for that state */ 389 390 case FORE200E_STATE_MAP: 391 fore200e->bus->unmap(fore200e); 392 393 case FORE200E_STATE_CONFIGURE: 394 /* nothing to do for that state */ 395 396 case FORE200E_STATE_REGISTER: 397 /* XXX shouldn't we *start* by deregistering the device? */ 398 atm_dev_deregister(fore200e->atm_dev); 399 400 case FORE200E_STATE_BLANK: 401 /* nothing to do for that state */ 402 break; 403 } 404 } 405 406 407 #ifdef CONFIG_PCI 408 409 static u32 fore200e_pca_read(volatile u32 __iomem *addr) 410 { 411 /* on big-endian hosts, the board is configured to convert 412 the endianess of slave RAM accesses */ 413 return le32_to_cpu(readl(addr)); 414 } 415 416 417 static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr) 418 { 419 /* on big-endian hosts, the board is configured to convert 420 the endianess of slave RAM accesses */ 421 writel(cpu_to_le32(val), addr); 422 } 423 424 425 static u32 426 fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction) 427 { 428 u32 dma_addr = dma_map_single(&((struct pci_dev *) fore200e->bus_dev)->dev, virt_addr, size, direction); 429 430 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n", 431 virt_addr, size, direction, dma_addr); 432 433 return dma_addr; 434 } 435 436 437 static void 438 fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction) 439 { 440 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n", 441 dma_addr, size, direction); 442 443 dma_unmap_single(&((struct pci_dev *) fore200e->bus_dev)->dev, dma_addr, size, direction); 444 } 445 446 447 static void 448 fore200e_pca_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction) 449 { 450 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction); 451 452 dma_sync_single_for_cpu(&((struct pci_dev *) fore200e->bus_dev)->dev, dma_addr, size, direction); 453 } 454 455 static void 456 fore200e_pca_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction) 457 { 458 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction); 459 460 dma_sync_single_for_device(&((struct pci_dev *) fore200e->bus_dev)->dev, dma_addr, size, direction); 461 } 462 463 464 /* allocate a DMA consistent chunk of memory intended to act as a communication mechanism 465 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */ 466 467 static int 468 fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, 469 int size, int nbr, int alignment) 470 { 471 /* returned chunks are page-aligned */ 472 chunk->alloc_size = size * nbr; 473 chunk->alloc_addr = dma_alloc_coherent(&((struct pci_dev *) fore200e->bus_dev)->dev, 474 chunk->alloc_size, 475 &chunk->dma_addr, 476 GFP_KERNEL); 477 478 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0)) 479 return -ENOMEM; 480 481 chunk->align_addr = chunk->alloc_addr; 482 483 return 0; 484 } 485 486 487 /* free a DMA consistent chunk of memory */ 488 489 static void 490 fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk) 491 { 492 dma_free_coherent(&((struct pci_dev *) fore200e->bus_dev)->dev, 493 chunk->alloc_size, 494 chunk->alloc_addr, 495 chunk->dma_addr); 496 } 497 498 499 static int 500 fore200e_pca_irq_check(struct fore200e* fore200e) 501 { 502 /* this is a 1 bit register */ 503 int irq_posted = readl(fore200e->regs.pca.psr); 504 505 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2) 506 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) { 507 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number); 508 } 509 #endif 510 511 return irq_posted; 512 } 513 514 515 static void 516 fore200e_pca_irq_ack(struct fore200e* fore200e) 517 { 518 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr); 519 } 520 521 522 static void 523 fore200e_pca_reset(struct fore200e* fore200e) 524 { 525 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr); 526 fore200e_spin(10); 527 writel(0, fore200e->regs.pca.hcr); 528 } 529 530 531 static int fore200e_pca_map(struct fore200e* fore200e) 532 { 533 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name); 534 535 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH); 536 537 if (fore200e->virt_base == NULL) { 538 printk(FORE200E "can't map device %s\n", fore200e->name); 539 return -EFAULT; 540 } 541 542 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base); 543 544 /* gain access to the PCA specific registers */ 545 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET; 546 fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET; 547 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET; 548 549 fore200e->state = FORE200E_STATE_MAP; 550 return 0; 551 } 552 553 554 static void 555 fore200e_pca_unmap(struct fore200e* fore200e) 556 { 557 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name); 558 559 if (fore200e->virt_base != NULL) 560 iounmap(fore200e->virt_base); 561 } 562 563 564 static int fore200e_pca_configure(struct fore200e *fore200e) 565 { 566 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev; 567 u8 master_ctrl, latency; 568 569 DPRINTK(2, "device %s being configured\n", fore200e->name); 570 571 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) { 572 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n"); 573 return -EIO; 574 } 575 576 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl); 577 578 master_ctrl = master_ctrl 579 #if defined(__BIG_ENDIAN) 580 /* request the PCA board to convert the endianess of slave RAM accesses */ 581 | PCA200E_CTRL_CONVERT_ENDIAN 582 #endif 583 #if 0 584 | PCA200E_CTRL_DIS_CACHE_RD 585 | PCA200E_CTRL_DIS_WRT_INVAL 586 | PCA200E_CTRL_ENA_CONT_REQ_MODE 587 | PCA200E_CTRL_2_CACHE_WRT_INVAL 588 #endif 589 | PCA200E_CTRL_LARGE_PCI_BURSTS; 590 591 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl); 592 593 /* raise latency from 32 (default) to 192, as this seems to prevent NIC 594 lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition. 595 this may impact the performances of other PCI devices on the same bus, though */ 596 latency = 192; 597 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency); 598 599 fore200e->state = FORE200E_STATE_CONFIGURE; 600 return 0; 601 } 602 603 604 static int __init 605 fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom) 606 { 607 struct host_cmdq* cmdq = &fore200e->host_cmdq; 608 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 609 struct prom_opcode opcode; 610 int ok; 611 u32 prom_dma; 612 613 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 614 615 opcode.opcode = OPCODE_GET_PROM; 616 opcode.pad = 0; 617 618 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), DMA_FROM_DEVICE); 619 620 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr); 621 622 *entry->status = STATUS_PENDING; 623 624 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode); 625 626 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 627 628 *entry->status = STATUS_FREE; 629 630 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE); 631 632 if (ok == 0) { 633 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name); 634 return -EIO; 635 } 636 637 #if defined(__BIG_ENDIAN) 638 639 #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) )) 640 641 /* MAC address is stored as little-endian */ 642 swap_here(&prom->mac_addr[0]); 643 swap_here(&prom->mac_addr[4]); 644 #endif 645 646 return 0; 647 } 648 649 650 static int 651 fore200e_pca_proc_read(struct fore200e* fore200e, char *page) 652 { 653 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev; 654 655 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n", 656 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn)); 657 } 658 659 #endif /* CONFIG_PCI */ 660 661 662 #ifdef CONFIG_SBUS 663 664 static u32 fore200e_sba_read(volatile u32 __iomem *addr) 665 { 666 return sbus_readl(addr); 667 } 668 669 static void fore200e_sba_write(u32 val, volatile u32 __iomem *addr) 670 { 671 sbus_writel(val, addr); 672 } 673 674 static u32 fore200e_sba_dma_map(struct fore200e *fore200e, void* virt_addr, int size, int direction) 675 { 676 struct platform_device *op = fore200e->bus_dev; 677 u32 dma_addr; 678 679 dma_addr = dma_map_single(&op->dev, virt_addr, size, direction); 680 681 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n", 682 virt_addr, size, direction, dma_addr); 683 684 return dma_addr; 685 } 686 687 static void fore200e_sba_dma_unmap(struct fore200e *fore200e, u32 dma_addr, int size, int direction) 688 { 689 struct platform_device *op = fore200e->bus_dev; 690 691 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n", 692 dma_addr, size, direction); 693 694 dma_unmap_single(&op->dev, dma_addr, size, direction); 695 } 696 697 static void fore200e_sba_dma_sync_for_cpu(struct fore200e *fore200e, u32 dma_addr, int size, int direction) 698 { 699 struct platform_device *op = fore200e->bus_dev; 700 701 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction); 702 703 dma_sync_single_for_cpu(&op->dev, dma_addr, size, direction); 704 } 705 706 static void fore200e_sba_dma_sync_for_device(struct fore200e *fore200e, u32 dma_addr, int size, int direction) 707 { 708 struct platform_device *op = fore200e->bus_dev; 709 710 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction); 711 712 dma_sync_single_for_device(&op->dev, dma_addr, size, direction); 713 } 714 715 /* Allocate a DVMA consistent chunk of memory intended to act as a communication mechanism 716 * (to hold descriptors, status, queues, etc.) shared by the driver and the adapter. 717 */ 718 static int fore200e_sba_dma_chunk_alloc(struct fore200e *fore200e, struct chunk *chunk, 719 int size, int nbr, int alignment) 720 { 721 struct platform_device *op = fore200e->bus_dev; 722 723 chunk->alloc_size = chunk->align_size = size * nbr; 724 725 /* returned chunks are page-aligned */ 726 chunk->alloc_addr = dma_alloc_coherent(&op->dev, chunk->alloc_size, 727 &chunk->dma_addr, GFP_ATOMIC); 728 729 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0)) 730 return -ENOMEM; 731 732 chunk->align_addr = chunk->alloc_addr; 733 734 return 0; 735 } 736 737 /* free a DVMA consistent chunk of memory */ 738 static void fore200e_sba_dma_chunk_free(struct fore200e *fore200e, struct chunk *chunk) 739 { 740 struct platform_device *op = fore200e->bus_dev; 741 742 dma_free_coherent(&op->dev, chunk->alloc_size, 743 chunk->alloc_addr, chunk->dma_addr); 744 } 745 746 static void fore200e_sba_irq_enable(struct fore200e *fore200e) 747 { 748 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; 749 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr); 750 } 751 752 static int fore200e_sba_irq_check(struct fore200e *fore200e) 753 { 754 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ; 755 } 756 757 static void fore200e_sba_irq_ack(struct fore200e *fore200e) 758 { 759 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; 760 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr); 761 } 762 763 static void fore200e_sba_reset(struct fore200e *fore200e) 764 { 765 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr); 766 fore200e_spin(10); 767 fore200e->bus->write(0, fore200e->regs.sba.hcr); 768 } 769 770 static int __init fore200e_sba_map(struct fore200e *fore200e) 771 { 772 struct platform_device *op = fore200e->bus_dev; 773 unsigned int bursts; 774 775 /* gain access to the SBA specific registers */ 776 fore200e->regs.sba.hcr = of_ioremap(&op->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR"); 777 fore200e->regs.sba.bsr = of_ioremap(&op->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR"); 778 fore200e->regs.sba.isr = of_ioremap(&op->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR"); 779 fore200e->virt_base = of_ioremap(&op->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM"); 780 781 if (!fore200e->virt_base) { 782 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name); 783 return -EFAULT; 784 } 785 786 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base); 787 788 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */ 789 790 /* get the supported DVMA burst sizes */ 791 bursts = of_getintprop_default(op->dev.of_node->parent, "burst-sizes", 0x00); 792 793 if (sbus_can_dma_64bit()) 794 sbus_set_sbus64(&op->dev, bursts); 795 796 fore200e->state = FORE200E_STATE_MAP; 797 return 0; 798 } 799 800 static void fore200e_sba_unmap(struct fore200e *fore200e) 801 { 802 struct platform_device *op = fore200e->bus_dev; 803 804 of_iounmap(&op->resource[0], fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH); 805 of_iounmap(&op->resource[1], fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH); 806 of_iounmap(&op->resource[2], fore200e->regs.sba.isr, SBA200E_ISR_LENGTH); 807 of_iounmap(&op->resource[3], fore200e->virt_base, SBA200E_RAM_LENGTH); 808 } 809 810 static int __init fore200e_sba_configure(struct fore200e *fore200e) 811 { 812 fore200e->state = FORE200E_STATE_CONFIGURE; 813 return 0; 814 } 815 816 static int __init fore200e_sba_prom_read(struct fore200e *fore200e, struct prom_data *prom) 817 { 818 struct platform_device *op = fore200e->bus_dev; 819 const u8 *prop; 820 int len; 821 822 prop = of_get_property(op->dev.of_node, "madaddrlo2", &len); 823 if (!prop) 824 return -ENODEV; 825 memcpy(&prom->mac_addr[4], prop, 4); 826 827 prop = of_get_property(op->dev.of_node, "madaddrhi4", &len); 828 if (!prop) 829 return -ENODEV; 830 memcpy(&prom->mac_addr[2], prop, 4); 831 832 prom->serial_number = of_getintprop_default(op->dev.of_node, 833 "serialnumber", 0); 834 prom->hw_revision = of_getintprop_default(op->dev.of_node, 835 "promversion", 0); 836 837 return 0; 838 } 839 840 static int fore200e_sba_proc_read(struct fore200e *fore200e, char *page) 841 { 842 struct platform_device *op = fore200e->bus_dev; 843 const struct linux_prom_registers *regs; 844 845 regs = of_get_property(op->dev.of_node, "reg", NULL); 846 847 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n", 848 (regs ? regs->which_io : 0), op->dev.of_node->name); 849 } 850 #endif /* CONFIG_SBUS */ 851 852 853 static void 854 fore200e_tx_irq(struct fore200e* fore200e) 855 { 856 struct host_txq* txq = &fore200e->host_txq; 857 struct host_txq_entry* entry; 858 struct atm_vcc* vcc; 859 struct fore200e_vc_map* vc_map; 860 861 if (fore200e->host_txq.txing == 0) 862 return; 863 864 for (;;) { 865 866 entry = &txq->host_entry[ txq->tail ]; 867 868 if ((*entry->status & STATUS_COMPLETE) == 0) { 869 break; 870 } 871 872 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n", 873 entry, txq->tail, entry->vc_map, entry->skb); 874 875 /* free copy of misaligned data */ 876 kfree(entry->data); 877 878 /* remove DMA mapping */ 879 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length, 880 DMA_TO_DEVICE); 881 882 vc_map = entry->vc_map; 883 884 /* vcc closed since the time the entry was submitted for tx? */ 885 if ((vc_map->vcc == NULL) || 886 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) { 887 888 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n", 889 fore200e->atm_dev->number); 890 891 dev_kfree_skb_any(entry->skb); 892 } 893 else { 894 ASSERT(vc_map->vcc); 895 896 /* vcc closed then immediately re-opened? */ 897 if (vc_map->incarn != entry->incarn) { 898 899 /* when a vcc is closed, some PDUs may be still pending in the tx queue. 900 if the same vcc is immediately re-opened, those pending PDUs must 901 not be popped after the completion of their emission, as they refer 902 to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc 903 would be decremented by the size of the (unrelated) skb, possibly 904 leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc. 905 we thus bind the tx entry to the current incarnation of the vcc 906 when the entry is submitted for tx. When the tx later completes, 907 if the incarnation number of the tx entry does not match the one 908 of the vcc, then this implies that the vcc has been closed then re-opened. 909 we thus just drop the skb here. */ 910 911 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n", 912 fore200e->atm_dev->number); 913 914 dev_kfree_skb_any(entry->skb); 915 } 916 else { 917 vcc = vc_map->vcc; 918 ASSERT(vcc); 919 920 /* notify tx completion */ 921 if (vcc->pop) { 922 vcc->pop(vcc, entry->skb); 923 } 924 else { 925 dev_kfree_skb_any(entry->skb); 926 } 927 928 /* check error condition */ 929 if (*entry->status & STATUS_ERROR) 930 atomic_inc(&vcc->stats->tx_err); 931 else 932 atomic_inc(&vcc->stats->tx); 933 } 934 } 935 936 *entry->status = STATUS_FREE; 937 938 fore200e->host_txq.txing--; 939 940 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX); 941 } 942 } 943 944 945 #ifdef FORE200E_BSQ_DEBUG 946 int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn) 947 { 948 struct buffer* buffer; 949 int count = 0; 950 951 buffer = bsq->freebuf; 952 while (buffer) { 953 954 if (buffer->supplied) { 955 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n", 956 where, scheme, magn, buffer->index); 957 } 958 959 if (buffer->magn != magn) { 960 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n", 961 where, scheme, magn, buffer->index, buffer->magn); 962 } 963 964 if (buffer->scheme != scheme) { 965 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n", 966 where, scheme, magn, buffer->index, buffer->scheme); 967 } 968 969 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) { 970 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n", 971 where, scheme, magn, buffer->index); 972 } 973 974 count++; 975 buffer = buffer->next; 976 } 977 978 if (count != bsq->freebuf_count) { 979 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n", 980 where, scheme, magn, count, bsq->freebuf_count); 981 } 982 return 0; 983 } 984 #endif 985 986 987 static void 988 fore200e_supply(struct fore200e* fore200e) 989 { 990 int scheme, magn, i; 991 992 struct host_bsq* bsq; 993 struct host_bsq_entry* entry; 994 struct buffer* buffer; 995 996 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 997 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 998 999 bsq = &fore200e->host_bsq[ scheme ][ magn ]; 1000 1001 #ifdef FORE200E_BSQ_DEBUG 1002 bsq_audit(1, bsq, scheme, magn); 1003 #endif 1004 while (bsq->freebuf_count >= RBD_BLK_SIZE) { 1005 1006 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n", 1007 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count); 1008 1009 entry = &bsq->host_entry[ bsq->head ]; 1010 1011 for (i = 0; i < RBD_BLK_SIZE; i++) { 1012 1013 /* take the first buffer in the free buffer list */ 1014 buffer = bsq->freebuf; 1015 if (!buffer) { 1016 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n", 1017 scheme, magn, bsq->freebuf_count); 1018 return; 1019 } 1020 bsq->freebuf = buffer->next; 1021 1022 #ifdef FORE200E_BSQ_DEBUG 1023 if (buffer->supplied) 1024 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n", 1025 scheme, magn, buffer->index); 1026 buffer->supplied = 1; 1027 #endif 1028 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr; 1029 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer); 1030 } 1031 1032 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS); 1033 1034 /* decrease accordingly the number of free rx buffers */ 1035 bsq->freebuf_count -= RBD_BLK_SIZE; 1036 1037 *entry->status = STATUS_PENDING; 1038 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr); 1039 } 1040 } 1041 } 1042 } 1043 1044 1045 static int 1046 fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd) 1047 { 1048 struct sk_buff* skb; 1049 struct buffer* buffer; 1050 struct fore200e_vcc* fore200e_vcc; 1051 int i, pdu_len = 0; 1052 #ifdef FORE200E_52BYTE_AAL0_SDU 1053 u32 cell_header = 0; 1054 #endif 1055 1056 ASSERT(vcc); 1057 1058 fore200e_vcc = FORE200E_VCC(vcc); 1059 ASSERT(fore200e_vcc); 1060 1061 #ifdef FORE200E_52BYTE_AAL0_SDU 1062 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) { 1063 1064 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) | 1065 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) | 1066 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) | 1067 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) | 1068 rpd->atm_header.clp; 1069 pdu_len = 4; 1070 } 1071 #endif 1072 1073 /* compute total PDU length */ 1074 for (i = 0; i < rpd->nseg; i++) 1075 pdu_len += rpd->rsd[ i ].length; 1076 1077 skb = alloc_skb(pdu_len, GFP_ATOMIC); 1078 if (skb == NULL) { 1079 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len); 1080 1081 atomic_inc(&vcc->stats->rx_drop); 1082 return -ENOMEM; 1083 } 1084 1085 __net_timestamp(skb); 1086 1087 #ifdef FORE200E_52BYTE_AAL0_SDU 1088 if (cell_header) { 1089 *((u32*)skb_put(skb, 4)) = cell_header; 1090 } 1091 #endif 1092 1093 /* reassemble segments */ 1094 for (i = 0; i < rpd->nseg; i++) { 1095 1096 /* rebuild rx buffer address from rsd handle */ 1097 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle); 1098 1099 /* Make device DMA transfer visible to CPU. */ 1100 fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE); 1101 1102 skb_put_data(skb, buffer->data.align_addr, rpd->rsd[i].length); 1103 1104 /* Now let the device get at it again. */ 1105 fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE); 1106 } 1107 1108 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize); 1109 1110 if (pdu_len < fore200e_vcc->rx_min_pdu) 1111 fore200e_vcc->rx_min_pdu = pdu_len; 1112 if (pdu_len > fore200e_vcc->rx_max_pdu) 1113 fore200e_vcc->rx_max_pdu = pdu_len; 1114 fore200e_vcc->rx_pdu++; 1115 1116 /* push PDU */ 1117 if (atm_charge(vcc, skb->truesize) == 0) { 1118 1119 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n", 1120 vcc->itf, vcc->vpi, vcc->vci); 1121 1122 dev_kfree_skb_any(skb); 1123 1124 atomic_inc(&vcc->stats->rx_drop); 1125 return -ENOMEM; 1126 } 1127 1128 vcc->push(vcc, skb); 1129 atomic_inc(&vcc->stats->rx); 1130 1131 return 0; 1132 } 1133 1134 1135 static void 1136 fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd) 1137 { 1138 struct host_bsq* bsq; 1139 struct buffer* buffer; 1140 int i; 1141 1142 for (i = 0; i < rpd->nseg; i++) { 1143 1144 /* rebuild rx buffer address from rsd handle */ 1145 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle); 1146 1147 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ]; 1148 1149 #ifdef FORE200E_BSQ_DEBUG 1150 bsq_audit(2, bsq, buffer->scheme, buffer->magn); 1151 1152 if (buffer->supplied == 0) 1153 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n", 1154 buffer->scheme, buffer->magn, buffer->index); 1155 buffer->supplied = 0; 1156 #endif 1157 1158 /* re-insert the buffer into the free buffer list */ 1159 buffer->next = bsq->freebuf; 1160 bsq->freebuf = buffer; 1161 1162 /* then increment the number of free rx buffers */ 1163 bsq->freebuf_count++; 1164 } 1165 } 1166 1167 1168 static void 1169 fore200e_rx_irq(struct fore200e* fore200e) 1170 { 1171 struct host_rxq* rxq = &fore200e->host_rxq; 1172 struct host_rxq_entry* entry; 1173 struct atm_vcc* vcc; 1174 struct fore200e_vc_map* vc_map; 1175 1176 for (;;) { 1177 1178 entry = &rxq->host_entry[ rxq->head ]; 1179 1180 /* no more received PDUs */ 1181 if ((*entry->status & STATUS_COMPLETE) == 0) 1182 break; 1183 1184 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci); 1185 1186 if ((vc_map->vcc == NULL) || 1187 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) { 1188 1189 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n", 1190 fore200e->atm_dev->number, 1191 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci); 1192 } 1193 else { 1194 vcc = vc_map->vcc; 1195 ASSERT(vcc); 1196 1197 if ((*entry->status & STATUS_ERROR) == 0) { 1198 1199 fore200e_push_rpd(fore200e, vcc, entry->rpd); 1200 } 1201 else { 1202 DPRINTK(2, "damaged PDU on %d.%d.%d\n", 1203 fore200e->atm_dev->number, 1204 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci); 1205 atomic_inc(&vcc->stats->rx_err); 1206 } 1207 } 1208 1209 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX); 1210 1211 fore200e_collect_rpd(fore200e, entry->rpd); 1212 1213 /* rewrite the rpd address to ack the received PDU */ 1214 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr); 1215 *entry->status = STATUS_FREE; 1216 1217 fore200e_supply(fore200e); 1218 } 1219 } 1220 1221 1222 #ifndef FORE200E_USE_TASKLET 1223 static void 1224 fore200e_irq(struct fore200e* fore200e) 1225 { 1226 unsigned long flags; 1227 1228 spin_lock_irqsave(&fore200e->q_lock, flags); 1229 fore200e_rx_irq(fore200e); 1230 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1231 1232 spin_lock_irqsave(&fore200e->q_lock, flags); 1233 fore200e_tx_irq(fore200e); 1234 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1235 } 1236 #endif 1237 1238 1239 static irqreturn_t 1240 fore200e_interrupt(int irq, void* dev) 1241 { 1242 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev); 1243 1244 if (fore200e->bus->irq_check(fore200e) == 0) { 1245 1246 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number); 1247 return IRQ_NONE; 1248 } 1249 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number); 1250 1251 #ifdef FORE200E_USE_TASKLET 1252 tasklet_schedule(&fore200e->tx_tasklet); 1253 tasklet_schedule(&fore200e->rx_tasklet); 1254 #else 1255 fore200e_irq(fore200e); 1256 #endif 1257 1258 fore200e->bus->irq_ack(fore200e); 1259 return IRQ_HANDLED; 1260 } 1261 1262 1263 #ifdef FORE200E_USE_TASKLET 1264 static void 1265 fore200e_tx_tasklet(unsigned long data) 1266 { 1267 struct fore200e* fore200e = (struct fore200e*) data; 1268 unsigned long flags; 1269 1270 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number); 1271 1272 spin_lock_irqsave(&fore200e->q_lock, flags); 1273 fore200e_tx_irq(fore200e); 1274 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1275 } 1276 1277 1278 static void 1279 fore200e_rx_tasklet(unsigned long data) 1280 { 1281 struct fore200e* fore200e = (struct fore200e*) data; 1282 unsigned long flags; 1283 1284 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number); 1285 1286 spin_lock_irqsave(&fore200e->q_lock, flags); 1287 fore200e_rx_irq((struct fore200e*) data); 1288 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1289 } 1290 #endif 1291 1292 1293 static int 1294 fore200e_select_scheme(struct atm_vcc* vcc) 1295 { 1296 /* fairly balance the VCs over (identical) buffer schemes */ 1297 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO; 1298 1299 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n", 1300 vcc->itf, vcc->vpi, vcc->vci, scheme); 1301 1302 return scheme; 1303 } 1304 1305 1306 static int 1307 fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu) 1308 { 1309 struct host_cmdq* cmdq = &fore200e->host_cmdq; 1310 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 1311 struct activate_opcode activ_opcode; 1312 struct deactivate_opcode deactiv_opcode; 1313 struct vpvc vpvc; 1314 int ok; 1315 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal); 1316 1317 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 1318 1319 if (activate) { 1320 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc); 1321 1322 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN; 1323 activ_opcode.aal = aal; 1324 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme; 1325 activ_opcode.pad = 0; 1326 } 1327 else { 1328 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN; 1329 deactiv_opcode.pad = 0; 1330 } 1331 1332 vpvc.vci = vcc->vci; 1333 vpvc.vpi = vcc->vpi; 1334 1335 *entry->status = STATUS_PENDING; 1336 1337 if (activate) { 1338 1339 #ifdef FORE200E_52BYTE_AAL0_SDU 1340 mtu = 48; 1341 #endif 1342 /* the MTU is not used by the cp, except in the case of AAL0 */ 1343 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu); 1344 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc); 1345 fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode); 1346 } 1347 else { 1348 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc); 1349 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode); 1350 } 1351 1352 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 1353 1354 *entry->status = STATUS_FREE; 1355 1356 if (ok == 0) { 1357 printk(FORE200E "unable to %s VC %d.%d.%d\n", 1358 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci); 1359 return -EIO; 1360 } 1361 1362 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci, 1363 activate ? "open" : "clos"); 1364 1365 return 0; 1366 } 1367 1368 1369 #define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */ 1370 1371 static void 1372 fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate) 1373 { 1374 if (qos->txtp.max_pcr < ATM_OC3_PCR) { 1375 1376 /* compute the data cells to idle cells ratio from the tx PCR */ 1377 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR; 1378 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells; 1379 } 1380 else { 1381 /* disable rate control */ 1382 rate->data_cells = rate->idle_cells = 0; 1383 } 1384 } 1385 1386 1387 static int 1388 fore200e_open(struct atm_vcc *vcc) 1389 { 1390 struct fore200e* fore200e = FORE200E_DEV(vcc->dev); 1391 struct fore200e_vcc* fore200e_vcc; 1392 struct fore200e_vc_map* vc_map; 1393 unsigned long flags; 1394 int vci = vcc->vci; 1395 short vpi = vcc->vpi; 1396 1397 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS)); 1398 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS)); 1399 1400 spin_lock_irqsave(&fore200e->q_lock, flags); 1401 1402 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci); 1403 if (vc_map->vcc) { 1404 1405 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1406 1407 printk(FORE200E "VC %d.%d.%d already in use\n", 1408 fore200e->atm_dev->number, vpi, vci); 1409 1410 return -EINVAL; 1411 } 1412 1413 vc_map->vcc = vcc; 1414 1415 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1416 1417 fore200e_vcc = kzalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC); 1418 if (fore200e_vcc == NULL) { 1419 vc_map->vcc = NULL; 1420 return -ENOMEM; 1421 } 1422 1423 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; " 1424 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n", 1425 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal), 1426 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ], 1427 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu, 1428 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ], 1429 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu); 1430 1431 /* pseudo-CBR bandwidth requested? */ 1432 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) { 1433 1434 mutex_lock(&fore200e->rate_mtx); 1435 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) { 1436 mutex_unlock(&fore200e->rate_mtx); 1437 1438 kfree(fore200e_vcc); 1439 vc_map->vcc = NULL; 1440 return -EAGAIN; 1441 } 1442 1443 /* reserve bandwidth */ 1444 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr; 1445 mutex_unlock(&fore200e->rate_mtx); 1446 } 1447 1448 vcc->itf = vcc->dev->number; 1449 1450 set_bit(ATM_VF_PARTIAL,&vcc->flags); 1451 set_bit(ATM_VF_ADDR, &vcc->flags); 1452 1453 vcc->dev_data = fore200e_vcc; 1454 1455 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) { 1456 1457 vc_map->vcc = NULL; 1458 1459 clear_bit(ATM_VF_ADDR, &vcc->flags); 1460 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1461 1462 vcc->dev_data = NULL; 1463 1464 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr; 1465 1466 kfree(fore200e_vcc); 1467 return -EINVAL; 1468 } 1469 1470 /* compute rate control parameters */ 1471 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) { 1472 1473 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate); 1474 set_bit(ATM_VF_HASQOS, &vcc->flags); 1475 1476 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n", 1477 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal), 1478 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr, 1479 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells); 1480 } 1481 1482 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1; 1483 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0; 1484 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0; 1485 1486 /* new incarnation of the vcc */ 1487 vc_map->incarn = ++fore200e->incarn_count; 1488 1489 /* VC unusable before this flag is set */ 1490 set_bit(ATM_VF_READY, &vcc->flags); 1491 1492 return 0; 1493 } 1494 1495 1496 static void 1497 fore200e_close(struct atm_vcc* vcc) 1498 { 1499 struct fore200e* fore200e = FORE200E_DEV(vcc->dev); 1500 struct fore200e_vcc* fore200e_vcc; 1501 struct fore200e_vc_map* vc_map; 1502 unsigned long flags; 1503 1504 ASSERT(vcc); 1505 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS)); 1506 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS)); 1507 1508 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal)); 1509 1510 clear_bit(ATM_VF_READY, &vcc->flags); 1511 1512 fore200e_activate_vcin(fore200e, 0, vcc, 0); 1513 1514 spin_lock_irqsave(&fore200e->q_lock, flags); 1515 1516 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci); 1517 1518 /* the vc is no longer considered as "in use" by fore200e_open() */ 1519 vc_map->vcc = NULL; 1520 1521 vcc->itf = vcc->vci = vcc->vpi = 0; 1522 1523 fore200e_vcc = FORE200E_VCC(vcc); 1524 vcc->dev_data = NULL; 1525 1526 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1527 1528 /* release reserved bandwidth, if any */ 1529 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) { 1530 1531 mutex_lock(&fore200e->rate_mtx); 1532 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr; 1533 mutex_unlock(&fore200e->rate_mtx); 1534 1535 clear_bit(ATM_VF_HASQOS, &vcc->flags); 1536 } 1537 1538 clear_bit(ATM_VF_ADDR, &vcc->flags); 1539 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1540 1541 ASSERT(fore200e_vcc); 1542 kfree(fore200e_vcc); 1543 } 1544 1545 1546 static int 1547 fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb) 1548 { 1549 struct fore200e* fore200e = FORE200E_DEV(vcc->dev); 1550 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc); 1551 struct fore200e_vc_map* vc_map; 1552 struct host_txq* txq = &fore200e->host_txq; 1553 struct host_txq_entry* entry; 1554 struct tpd* tpd; 1555 struct tpd_haddr tpd_haddr; 1556 int retry = CONFIG_ATM_FORE200E_TX_RETRY; 1557 int tx_copy = 0; 1558 int tx_len = skb->len; 1559 u32* cell_header = NULL; 1560 unsigned char* skb_data; 1561 int skb_len; 1562 unsigned char* data; 1563 unsigned long flags; 1564 1565 ASSERT(vcc); 1566 ASSERT(fore200e); 1567 ASSERT(fore200e_vcc); 1568 1569 if (!test_bit(ATM_VF_READY, &vcc->flags)) { 1570 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi); 1571 dev_kfree_skb_any(skb); 1572 return -EINVAL; 1573 } 1574 1575 #ifdef FORE200E_52BYTE_AAL0_SDU 1576 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) { 1577 cell_header = (u32*) skb->data; 1578 skb_data = skb->data + 4; /* skip 4-byte cell header */ 1579 skb_len = tx_len = skb->len - 4; 1580 1581 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header); 1582 } 1583 else 1584 #endif 1585 { 1586 skb_data = skb->data; 1587 skb_len = skb->len; 1588 } 1589 1590 if (((unsigned long)skb_data) & 0x3) { 1591 1592 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name); 1593 tx_copy = 1; 1594 tx_len = skb_len; 1595 } 1596 1597 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) { 1598 1599 /* this simply NUKES the PCA board */ 1600 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name); 1601 tx_copy = 1; 1602 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD; 1603 } 1604 1605 if (tx_copy) { 1606 data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA); 1607 if (data == NULL) { 1608 if (vcc->pop) { 1609 vcc->pop(vcc, skb); 1610 } 1611 else { 1612 dev_kfree_skb_any(skb); 1613 } 1614 return -ENOMEM; 1615 } 1616 1617 memcpy(data, skb_data, skb_len); 1618 if (skb_len < tx_len) 1619 memset(data + skb_len, 0x00, tx_len - skb_len); 1620 } 1621 else { 1622 data = skb_data; 1623 } 1624 1625 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci); 1626 ASSERT(vc_map->vcc == vcc); 1627 1628 retry_here: 1629 1630 spin_lock_irqsave(&fore200e->q_lock, flags); 1631 1632 entry = &txq->host_entry[ txq->head ]; 1633 1634 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) { 1635 1636 /* try to free completed tx queue entries */ 1637 fore200e_tx_irq(fore200e); 1638 1639 if (*entry->status != STATUS_FREE) { 1640 1641 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1642 1643 /* retry once again? */ 1644 if (--retry > 0) { 1645 udelay(50); 1646 goto retry_here; 1647 } 1648 1649 atomic_inc(&vcc->stats->tx_err); 1650 1651 fore200e->tx_sat++; 1652 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n", 1653 fore200e->name, fore200e->cp_queues->heartbeat); 1654 if (vcc->pop) { 1655 vcc->pop(vcc, skb); 1656 } 1657 else { 1658 dev_kfree_skb_any(skb); 1659 } 1660 1661 if (tx_copy) 1662 kfree(data); 1663 1664 return -ENOBUFS; 1665 } 1666 } 1667 1668 entry->incarn = vc_map->incarn; 1669 entry->vc_map = vc_map; 1670 entry->skb = skb; 1671 entry->data = tx_copy ? data : NULL; 1672 1673 tpd = entry->tpd; 1674 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, DMA_TO_DEVICE); 1675 tpd->tsd[ 0 ].length = tx_len; 1676 1677 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX); 1678 txq->txing++; 1679 1680 /* The dma_map call above implies a dma_sync so the device can use it, 1681 * thus no explicit dma_sync call is necessary here. 1682 */ 1683 1684 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n", 1685 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal), 1686 tpd->tsd[0].length, skb_len); 1687 1688 if (skb_len < fore200e_vcc->tx_min_pdu) 1689 fore200e_vcc->tx_min_pdu = skb_len; 1690 if (skb_len > fore200e_vcc->tx_max_pdu) 1691 fore200e_vcc->tx_max_pdu = skb_len; 1692 fore200e_vcc->tx_pdu++; 1693 1694 /* set tx rate control information */ 1695 tpd->rate.data_cells = fore200e_vcc->rate.data_cells; 1696 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells; 1697 1698 if (cell_header) { 1699 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP); 1700 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT; 1701 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT; 1702 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT; 1703 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT; 1704 } 1705 else { 1706 /* set the ATM header, common to all cells conveying the PDU */ 1707 tpd->atm_header.clp = 0; 1708 tpd->atm_header.plt = 0; 1709 tpd->atm_header.vci = vcc->vci; 1710 tpd->atm_header.vpi = vcc->vpi; 1711 tpd->atm_header.gfc = 0; 1712 } 1713 1714 tpd->spec.length = tx_len; 1715 tpd->spec.nseg = 1; 1716 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal); 1717 tpd->spec.intr = 1; 1718 1719 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */ 1720 tpd_haddr.pad = 0; 1721 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */ 1722 1723 *entry->status = STATUS_PENDING; 1724 fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr); 1725 1726 spin_unlock_irqrestore(&fore200e->q_lock, flags); 1727 1728 return 0; 1729 } 1730 1731 1732 static int 1733 fore200e_getstats(struct fore200e* fore200e) 1734 { 1735 struct host_cmdq* cmdq = &fore200e->host_cmdq; 1736 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 1737 struct stats_opcode opcode; 1738 int ok; 1739 u32 stats_dma_addr; 1740 1741 if (fore200e->stats == NULL) { 1742 fore200e->stats = kzalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA); 1743 if (fore200e->stats == NULL) 1744 return -ENOMEM; 1745 } 1746 1747 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats, 1748 sizeof(struct stats), DMA_FROM_DEVICE); 1749 1750 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 1751 1752 opcode.opcode = OPCODE_GET_STATS; 1753 opcode.pad = 0; 1754 1755 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr); 1756 1757 *entry->status = STATUS_PENDING; 1758 1759 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode); 1760 1761 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 1762 1763 *entry->status = STATUS_FREE; 1764 1765 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE); 1766 1767 if (ok == 0) { 1768 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name); 1769 return -EIO; 1770 } 1771 1772 return 0; 1773 } 1774 1775 1776 static int 1777 fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen) 1778 { 1779 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */ 1780 1781 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n", 1782 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen); 1783 1784 return -EINVAL; 1785 } 1786 1787 1788 static int 1789 fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, unsigned int optlen) 1790 { 1791 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */ 1792 1793 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n", 1794 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen); 1795 1796 return -EINVAL; 1797 } 1798 1799 1800 #if 0 /* currently unused */ 1801 static int 1802 fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs) 1803 { 1804 struct host_cmdq* cmdq = &fore200e->host_cmdq; 1805 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 1806 struct oc3_opcode opcode; 1807 int ok; 1808 u32 oc3_regs_dma_addr; 1809 1810 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE); 1811 1812 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 1813 1814 opcode.opcode = OPCODE_GET_OC3; 1815 opcode.reg = 0; 1816 opcode.value = 0; 1817 opcode.mask = 0; 1818 1819 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr); 1820 1821 *entry->status = STATUS_PENDING; 1822 1823 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode); 1824 1825 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 1826 1827 *entry->status = STATUS_FREE; 1828 1829 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE); 1830 1831 if (ok == 0) { 1832 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name); 1833 return -EIO; 1834 } 1835 1836 return 0; 1837 } 1838 #endif 1839 1840 1841 static int 1842 fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask) 1843 { 1844 struct host_cmdq* cmdq = &fore200e->host_cmdq; 1845 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; 1846 struct oc3_opcode opcode; 1847 int ok; 1848 1849 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask); 1850 1851 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); 1852 1853 opcode.opcode = OPCODE_SET_OC3; 1854 opcode.reg = reg; 1855 opcode.value = value; 1856 opcode.mask = mask; 1857 1858 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr); 1859 1860 *entry->status = STATUS_PENDING; 1861 1862 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode); 1863 1864 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); 1865 1866 *entry->status = STATUS_FREE; 1867 1868 if (ok == 0) { 1869 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name); 1870 return -EIO; 1871 } 1872 1873 return 0; 1874 } 1875 1876 1877 static int 1878 fore200e_setloop(struct fore200e* fore200e, int loop_mode) 1879 { 1880 u32 mct_value, mct_mask; 1881 int error; 1882 1883 if (!capable(CAP_NET_ADMIN)) 1884 return -EPERM; 1885 1886 switch (loop_mode) { 1887 1888 case ATM_LM_NONE: 1889 mct_value = 0; 1890 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE; 1891 break; 1892 1893 case ATM_LM_LOC_PHY: 1894 mct_value = mct_mask = SUNI_MCT_DLE; 1895 break; 1896 1897 case ATM_LM_RMT_PHY: 1898 mct_value = mct_mask = SUNI_MCT_LLE; 1899 break; 1900 1901 default: 1902 return -EINVAL; 1903 } 1904 1905 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask); 1906 if (error == 0) 1907 fore200e->loop_mode = loop_mode; 1908 1909 return error; 1910 } 1911 1912 1913 static int 1914 fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg) 1915 { 1916 struct sonet_stats tmp; 1917 1918 if (fore200e_getstats(fore200e) < 0) 1919 return -EIO; 1920 1921 tmp.section_bip = be32_to_cpu(fore200e->stats->oc3.section_bip8_errors); 1922 tmp.line_bip = be32_to_cpu(fore200e->stats->oc3.line_bip24_errors); 1923 tmp.path_bip = be32_to_cpu(fore200e->stats->oc3.path_bip8_errors); 1924 tmp.line_febe = be32_to_cpu(fore200e->stats->oc3.line_febe_errors); 1925 tmp.path_febe = be32_to_cpu(fore200e->stats->oc3.path_febe_errors); 1926 tmp.corr_hcs = be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors); 1927 tmp.uncorr_hcs = be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors); 1928 tmp.tx_cells = be32_to_cpu(fore200e->stats->aal0.cells_transmitted) + 1929 be32_to_cpu(fore200e->stats->aal34.cells_transmitted) + 1930 be32_to_cpu(fore200e->stats->aal5.cells_transmitted); 1931 tmp.rx_cells = be32_to_cpu(fore200e->stats->aal0.cells_received) + 1932 be32_to_cpu(fore200e->stats->aal34.cells_received) + 1933 be32_to_cpu(fore200e->stats->aal5.cells_received); 1934 1935 if (arg) 1936 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0; 1937 1938 return 0; 1939 } 1940 1941 1942 static int 1943 fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg) 1944 { 1945 struct fore200e* fore200e = FORE200E_DEV(dev); 1946 1947 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg); 1948 1949 switch (cmd) { 1950 1951 case SONET_GETSTAT: 1952 return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg); 1953 1954 case SONET_GETDIAG: 1955 return put_user(0, (int __user *)arg) ? -EFAULT : 0; 1956 1957 case ATM_SETLOOP: 1958 return fore200e_setloop(fore200e, (int)(unsigned long)arg); 1959 1960 case ATM_GETLOOP: 1961 return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0; 1962 1963 case ATM_QUERYLOOP: 1964 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0; 1965 } 1966 1967 return -ENOSYS; /* not implemented */ 1968 } 1969 1970 1971 static int 1972 fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags) 1973 { 1974 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc); 1975 struct fore200e* fore200e = FORE200E_DEV(vcc->dev); 1976 1977 if (!test_bit(ATM_VF_READY, &vcc->flags)) { 1978 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi); 1979 return -EINVAL; 1980 } 1981 1982 DPRINTK(2, "change_qos %d.%d.%d, " 1983 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; " 1984 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n" 1985 "available_cell_rate = %u", 1986 vcc->itf, vcc->vpi, vcc->vci, 1987 fore200e_traffic_class[ qos->txtp.traffic_class ], 1988 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu, 1989 fore200e_traffic_class[ qos->rxtp.traffic_class ], 1990 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu, 1991 flags, fore200e->available_cell_rate); 1992 1993 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) { 1994 1995 mutex_lock(&fore200e->rate_mtx); 1996 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) { 1997 mutex_unlock(&fore200e->rate_mtx); 1998 return -EAGAIN; 1999 } 2000 2001 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr; 2002 fore200e->available_cell_rate -= qos->txtp.max_pcr; 2003 2004 mutex_unlock(&fore200e->rate_mtx); 2005 2006 memcpy(&vcc->qos, qos, sizeof(struct atm_qos)); 2007 2008 /* update rate control parameters */ 2009 fore200e_rate_ctrl(qos, &fore200e_vcc->rate); 2010 2011 set_bit(ATM_VF_HASQOS, &vcc->flags); 2012 2013 return 0; 2014 } 2015 2016 return -EINVAL; 2017 } 2018 2019 2020 static int fore200e_irq_request(struct fore200e *fore200e) 2021 { 2022 if (request_irq(fore200e->irq, fore200e_interrupt, IRQF_SHARED, fore200e->name, fore200e->atm_dev) < 0) { 2023 2024 printk(FORE200E "unable to reserve IRQ %s for device %s\n", 2025 fore200e_irq_itoa(fore200e->irq), fore200e->name); 2026 return -EBUSY; 2027 } 2028 2029 printk(FORE200E "IRQ %s reserved for device %s\n", 2030 fore200e_irq_itoa(fore200e->irq), fore200e->name); 2031 2032 #ifdef FORE200E_USE_TASKLET 2033 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e); 2034 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e); 2035 #endif 2036 2037 fore200e->state = FORE200E_STATE_IRQ; 2038 return 0; 2039 } 2040 2041 2042 static int fore200e_get_esi(struct fore200e *fore200e) 2043 { 2044 struct prom_data* prom = kzalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA); 2045 int ok, i; 2046 2047 if (!prom) 2048 return -ENOMEM; 2049 2050 ok = fore200e->bus->prom_read(fore200e, prom); 2051 if (ok < 0) { 2052 kfree(prom); 2053 return -EBUSY; 2054 } 2055 2056 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %pM\n", 2057 fore200e->name, 2058 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */ 2059 prom->serial_number & 0xFFFF, &prom->mac_addr[2]); 2060 2061 for (i = 0; i < ESI_LEN; i++) { 2062 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ]; 2063 } 2064 2065 kfree(prom); 2066 2067 return 0; 2068 } 2069 2070 2071 static int fore200e_alloc_rx_buf(struct fore200e *fore200e) 2072 { 2073 int scheme, magn, nbr, size, i; 2074 2075 struct host_bsq* bsq; 2076 struct buffer* buffer; 2077 2078 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 2079 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 2080 2081 bsq = &fore200e->host_bsq[ scheme ][ magn ]; 2082 2083 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ]; 2084 size = fore200e_rx_buf_size[ scheme ][ magn ]; 2085 2086 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn); 2087 2088 /* allocate the array of receive buffers */ 2089 buffer = bsq->buffer = kzalloc(nbr * sizeof(struct buffer), GFP_KERNEL); 2090 2091 if (buffer == NULL) 2092 return -ENOMEM; 2093 2094 bsq->freebuf = NULL; 2095 2096 for (i = 0; i < nbr; i++) { 2097 2098 buffer[ i ].scheme = scheme; 2099 buffer[ i ].magn = magn; 2100 #ifdef FORE200E_BSQ_DEBUG 2101 buffer[ i ].index = i; 2102 buffer[ i ].supplied = 0; 2103 #endif 2104 2105 /* allocate the receive buffer body */ 2106 if (fore200e_chunk_alloc(fore200e, 2107 &buffer[ i ].data, size, fore200e->bus->buffer_alignment, 2108 DMA_FROM_DEVICE) < 0) { 2109 2110 while (i > 0) 2111 fore200e_chunk_free(fore200e, &buffer[ --i ].data); 2112 kfree(buffer); 2113 2114 return -ENOMEM; 2115 } 2116 2117 /* insert the buffer into the free buffer list */ 2118 buffer[ i ].next = bsq->freebuf; 2119 bsq->freebuf = &buffer[ i ]; 2120 } 2121 /* all the buffers are free, initially */ 2122 bsq->freebuf_count = nbr; 2123 2124 #ifdef FORE200E_BSQ_DEBUG 2125 bsq_audit(3, bsq, scheme, magn); 2126 #endif 2127 } 2128 } 2129 2130 fore200e->state = FORE200E_STATE_ALLOC_BUF; 2131 return 0; 2132 } 2133 2134 2135 static int fore200e_init_bs_queue(struct fore200e *fore200e) 2136 { 2137 int scheme, magn, i; 2138 2139 struct host_bsq* bsq; 2140 struct cp_bsq_entry __iomem * cp_entry; 2141 2142 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { 2143 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { 2144 2145 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn); 2146 2147 bsq = &fore200e->host_bsq[ scheme ][ magn ]; 2148 2149 /* allocate and align the array of status words */ 2150 if (fore200e->bus->dma_chunk_alloc(fore200e, 2151 &bsq->status, 2152 sizeof(enum status), 2153 QUEUE_SIZE_BS, 2154 fore200e->bus->status_alignment) < 0) { 2155 return -ENOMEM; 2156 } 2157 2158 /* allocate and align the array of receive buffer descriptors */ 2159 if (fore200e->bus->dma_chunk_alloc(fore200e, 2160 &bsq->rbd_block, 2161 sizeof(struct rbd_block), 2162 QUEUE_SIZE_BS, 2163 fore200e->bus->descr_alignment) < 0) { 2164 2165 fore200e->bus->dma_chunk_free(fore200e, &bsq->status); 2166 return -ENOMEM; 2167 } 2168 2169 /* get the base address of the cp resident buffer supply queue entries */ 2170 cp_entry = fore200e->virt_base + 2171 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]); 2172 2173 /* fill the host resident and cp resident buffer supply queue entries */ 2174 for (i = 0; i < QUEUE_SIZE_BS; i++) { 2175 2176 bsq->host_entry[ i ].status = 2177 FORE200E_INDEX(bsq->status.align_addr, enum status, i); 2178 bsq->host_entry[ i ].rbd_block = 2179 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i); 2180 bsq->host_entry[ i ].rbd_block_dma = 2181 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i); 2182 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ]; 2183 2184 *bsq->host_entry[ i ].status = STATUS_FREE; 2185 2186 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i), 2187 &cp_entry[ i ].status_haddr); 2188 } 2189 } 2190 } 2191 2192 fore200e->state = FORE200E_STATE_INIT_BSQ; 2193 return 0; 2194 } 2195 2196 2197 static int fore200e_init_rx_queue(struct fore200e *fore200e) 2198 { 2199 struct host_rxq* rxq = &fore200e->host_rxq; 2200 struct cp_rxq_entry __iomem * cp_entry; 2201 int i; 2202 2203 DPRINTK(2, "receive queue is being initialized\n"); 2204 2205 /* allocate and align the array of status words */ 2206 if (fore200e->bus->dma_chunk_alloc(fore200e, 2207 &rxq->status, 2208 sizeof(enum status), 2209 QUEUE_SIZE_RX, 2210 fore200e->bus->status_alignment) < 0) { 2211 return -ENOMEM; 2212 } 2213 2214 /* allocate and align the array of receive PDU descriptors */ 2215 if (fore200e->bus->dma_chunk_alloc(fore200e, 2216 &rxq->rpd, 2217 sizeof(struct rpd), 2218 QUEUE_SIZE_RX, 2219 fore200e->bus->descr_alignment) < 0) { 2220 2221 fore200e->bus->dma_chunk_free(fore200e, &rxq->status); 2222 return -ENOMEM; 2223 } 2224 2225 /* get the base address of the cp resident rx queue entries */ 2226 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq); 2227 2228 /* fill the host resident and cp resident rx entries */ 2229 for (i=0; i < QUEUE_SIZE_RX; i++) { 2230 2231 rxq->host_entry[ i ].status = 2232 FORE200E_INDEX(rxq->status.align_addr, enum status, i); 2233 rxq->host_entry[ i ].rpd = 2234 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i); 2235 rxq->host_entry[ i ].rpd_dma = 2236 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i); 2237 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ]; 2238 2239 *rxq->host_entry[ i ].status = STATUS_FREE; 2240 2241 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i), 2242 &cp_entry[ i ].status_haddr); 2243 2244 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i), 2245 &cp_entry[ i ].rpd_haddr); 2246 } 2247 2248 /* set the head entry of the queue */ 2249 rxq->head = 0; 2250 2251 fore200e->state = FORE200E_STATE_INIT_RXQ; 2252 return 0; 2253 } 2254 2255 2256 static int fore200e_init_tx_queue(struct fore200e *fore200e) 2257 { 2258 struct host_txq* txq = &fore200e->host_txq; 2259 struct cp_txq_entry __iomem * cp_entry; 2260 int i; 2261 2262 DPRINTK(2, "transmit queue is being initialized\n"); 2263 2264 /* allocate and align the array of status words */ 2265 if (fore200e->bus->dma_chunk_alloc(fore200e, 2266 &txq->status, 2267 sizeof(enum status), 2268 QUEUE_SIZE_TX, 2269 fore200e->bus->status_alignment) < 0) { 2270 return -ENOMEM; 2271 } 2272 2273 /* allocate and align the array of transmit PDU descriptors */ 2274 if (fore200e->bus->dma_chunk_alloc(fore200e, 2275 &txq->tpd, 2276 sizeof(struct tpd), 2277 QUEUE_SIZE_TX, 2278 fore200e->bus->descr_alignment) < 0) { 2279 2280 fore200e->bus->dma_chunk_free(fore200e, &txq->status); 2281 return -ENOMEM; 2282 } 2283 2284 /* get the base address of the cp resident tx queue entries */ 2285 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq); 2286 2287 /* fill the host resident and cp resident tx entries */ 2288 for (i=0; i < QUEUE_SIZE_TX; i++) { 2289 2290 txq->host_entry[ i ].status = 2291 FORE200E_INDEX(txq->status.align_addr, enum status, i); 2292 txq->host_entry[ i ].tpd = 2293 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i); 2294 txq->host_entry[ i ].tpd_dma = 2295 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i); 2296 txq->host_entry[ i ].cp_entry = &cp_entry[ i ]; 2297 2298 *txq->host_entry[ i ].status = STATUS_FREE; 2299 2300 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i), 2301 &cp_entry[ i ].status_haddr); 2302 2303 /* although there is a one-to-one mapping of tx queue entries and tpds, 2304 we do not write here the DMA (physical) base address of each tpd into 2305 the related cp resident entry, because the cp relies on this write 2306 operation to detect that a new pdu has been submitted for tx */ 2307 } 2308 2309 /* set the head and tail entries of the queue */ 2310 txq->head = 0; 2311 txq->tail = 0; 2312 2313 fore200e->state = FORE200E_STATE_INIT_TXQ; 2314 return 0; 2315 } 2316 2317 2318 static int fore200e_init_cmd_queue(struct fore200e *fore200e) 2319 { 2320 struct host_cmdq* cmdq = &fore200e->host_cmdq; 2321 struct cp_cmdq_entry __iomem * cp_entry; 2322 int i; 2323 2324 DPRINTK(2, "command queue is being initialized\n"); 2325 2326 /* allocate and align the array of status words */ 2327 if (fore200e->bus->dma_chunk_alloc(fore200e, 2328 &cmdq->status, 2329 sizeof(enum status), 2330 QUEUE_SIZE_CMD, 2331 fore200e->bus->status_alignment) < 0) { 2332 return -ENOMEM; 2333 } 2334 2335 /* get the base address of the cp resident cmd queue entries */ 2336 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq); 2337 2338 /* fill the host resident and cp resident cmd entries */ 2339 for (i=0; i < QUEUE_SIZE_CMD; i++) { 2340 2341 cmdq->host_entry[ i ].status = 2342 FORE200E_INDEX(cmdq->status.align_addr, enum status, i); 2343 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ]; 2344 2345 *cmdq->host_entry[ i ].status = STATUS_FREE; 2346 2347 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i), 2348 &cp_entry[ i ].status_haddr); 2349 } 2350 2351 /* set the head entry of the queue */ 2352 cmdq->head = 0; 2353 2354 fore200e->state = FORE200E_STATE_INIT_CMDQ; 2355 return 0; 2356 } 2357 2358 2359 static void fore200e_param_bs_queue(struct fore200e *fore200e, 2360 enum buffer_scheme scheme, 2361 enum buffer_magn magn, int queue_length, 2362 int pool_size, int supply_blksize) 2363 { 2364 struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ]; 2365 2366 fore200e->bus->write(queue_length, &bs_spec->queue_length); 2367 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size); 2368 fore200e->bus->write(pool_size, &bs_spec->pool_size); 2369 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize); 2370 } 2371 2372 2373 static int fore200e_initialize(struct fore200e *fore200e) 2374 { 2375 struct cp_queues __iomem * cpq; 2376 int ok, scheme, magn; 2377 2378 DPRINTK(2, "device %s being initialized\n", fore200e->name); 2379 2380 mutex_init(&fore200e->rate_mtx); 2381 spin_lock_init(&fore200e->q_lock); 2382 2383 cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET; 2384 2385 /* enable cp to host interrupts */ 2386 fore200e->bus->write(1, &cpq->imask); 2387 2388 if (fore200e->bus->irq_enable) 2389 fore200e->bus->irq_enable(fore200e); 2390 2391 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect); 2392 2393 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len); 2394 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len); 2395 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len); 2396 2397 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension); 2398 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension); 2399 2400 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) 2401 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) 2402 fore200e_param_bs_queue(fore200e, scheme, magn, 2403 QUEUE_SIZE_BS, 2404 fore200e_rx_buf_nbr[ scheme ][ magn ], 2405 RBD_BLK_SIZE); 2406 2407 /* issue the initialize command */ 2408 fore200e->bus->write(STATUS_PENDING, &cpq->init.status); 2409 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode); 2410 2411 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000); 2412 if (ok == 0) { 2413 printk(FORE200E "device %s initialization failed\n", fore200e->name); 2414 return -ENODEV; 2415 } 2416 2417 printk(FORE200E "device %s initialized\n", fore200e->name); 2418 2419 fore200e->state = FORE200E_STATE_INITIALIZE; 2420 return 0; 2421 } 2422 2423 2424 static void fore200e_monitor_putc(struct fore200e *fore200e, char c) 2425 { 2426 struct cp_monitor __iomem * monitor = fore200e->cp_monitor; 2427 2428 #if 0 2429 printk("%c", c); 2430 #endif 2431 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send); 2432 } 2433 2434 2435 static int fore200e_monitor_getc(struct fore200e *fore200e) 2436 { 2437 struct cp_monitor __iomem * monitor = fore200e->cp_monitor; 2438 unsigned long timeout = jiffies + msecs_to_jiffies(50); 2439 int c; 2440 2441 while (time_before(jiffies, timeout)) { 2442 2443 c = (int) fore200e->bus->read(&monitor->soft_uart.recv); 2444 2445 if (c & FORE200E_CP_MONITOR_UART_AVAIL) { 2446 2447 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv); 2448 #if 0 2449 printk("%c", c & 0xFF); 2450 #endif 2451 return c & 0xFF; 2452 } 2453 } 2454 2455 return -1; 2456 } 2457 2458 2459 static void fore200e_monitor_puts(struct fore200e *fore200e, char *str) 2460 { 2461 while (*str) { 2462 2463 /* the i960 monitor doesn't accept any new character if it has something to say */ 2464 while (fore200e_monitor_getc(fore200e) >= 0); 2465 2466 fore200e_monitor_putc(fore200e, *str++); 2467 } 2468 2469 while (fore200e_monitor_getc(fore200e) >= 0); 2470 } 2471 2472 #ifdef __LITTLE_ENDIAN 2473 #define FW_EXT ".bin" 2474 #else 2475 #define FW_EXT "_ecd.bin2" 2476 #endif 2477 2478 static int fore200e_load_and_start_fw(struct fore200e *fore200e) 2479 { 2480 const struct firmware *firmware; 2481 struct device *device; 2482 const struct fw_header *fw_header; 2483 const __le32 *fw_data; 2484 u32 fw_size; 2485 u32 __iomem *load_addr; 2486 char buf[48]; 2487 int err = -ENODEV; 2488 2489 if (strcmp(fore200e->bus->model_name, "PCA-200E") == 0) 2490 device = &((struct pci_dev *) fore200e->bus_dev)->dev; 2491 #ifdef CONFIG_SBUS 2492 else if (strcmp(fore200e->bus->model_name, "SBA-200E") == 0) 2493 device = &((struct platform_device *) fore200e->bus_dev)->dev; 2494 #endif 2495 else 2496 return err; 2497 2498 sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT); 2499 if ((err = request_firmware(&firmware, buf, device)) < 0) { 2500 printk(FORE200E "problem loading firmware image %s\n", fore200e->bus->model_name); 2501 return err; 2502 } 2503 2504 fw_data = (const __le32 *)firmware->data; 2505 fw_size = firmware->size / sizeof(u32); 2506 fw_header = (const struct fw_header *)firmware->data; 2507 load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset); 2508 2509 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n", 2510 fore200e->name, load_addr, fw_size); 2511 2512 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) { 2513 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name); 2514 goto release; 2515 } 2516 2517 for (; fw_size--; fw_data++, load_addr++) 2518 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr); 2519 2520 DPRINTK(2, "device %s firmware being started\n", fore200e->name); 2521 2522 #if defined(__sparc_v9__) 2523 /* reported to be required by SBA cards on some sparc64 hosts */ 2524 fore200e_spin(100); 2525 #endif 2526 2527 sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset)); 2528 fore200e_monitor_puts(fore200e, buf); 2529 2530 if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) { 2531 printk(FORE200E "device %s firmware didn't start\n", fore200e->name); 2532 goto release; 2533 } 2534 2535 printk(FORE200E "device %s firmware started\n", fore200e->name); 2536 2537 fore200e->state = FORE200E_STATE_START_FW; 2538 err = 0; 2539 2540 release: 2541 release_firmware(firmware); 2542 return err; 2543 } 2544 2545 2546 static int fore200e_register(struct fore200e *fore200e, struct device *parent) 2547 { 2548 struct atm_dev* atm_dev; 2549 2550 DPRINTK(2, "device %s being registered\n", fore200e->name); 2551 2552 atm_dev = atm_dev_register(fore200e->bus->proc_name, parent, &fore200e_ops, 2553 -1, NULL); 2554 if (atm_dev == NULL) { 2555 printk(FORE200E "unable to register device %s\n", fore200e->name); 2556 return -ENODEV; 2557 } 2558 2559 atm_dev->dev_data = fore200e; 2560 fore200e->atm_dev = atm_dev; 2561 2562 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS; 2563 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS; 2564 2565 fore200e->available_cell_rate = ATM_OC3_PCR; 2566 2567 fore200e->state = FORE200E_STATE_REGISTER; 2568 return 0; 2569 } 2570 2571 2572 static int fore200e_init(struct fore200e *fore200e, struct device *parent) 2573 { 2574 if (fore200e_register(fore200e, parent) < 0) 2575 return -ENODEV; 2576 2577 if (fore200e->bus->configure(fore200e) < 0) 2578 return -ENODEV; 2579 2580 if (fore200e->bus->map(fore200e) < 0) 2581 return -ENODEV; 2582 2583 if (fore200e_reset(fore200e, 1) < 0) 2584 return -ENODEV; 2585 2586 if (fore200e_load_and_start_fw(fore200e) < 0) 2587 return -ENODEV; 2588 2589 if (fore200e_initialize(fore200e) < 0) 2590 return -ENODEV; 2591 2592 if (fore200e_init_cmd_queue(fore200e) < 0) 2593 return -ENOMEM; 2594 2595 if (fore200e_init_tx_queue(fore200e) < 0) 2596 return -ENOMEM; 2597 2598 if (fore200e_init_rx_queue(fore200e) < 0) 2599 return -ENOMEM; 2600 2601 if (fore200e_init_bs_queue(fore200e) < 0) 2602 return -ENOMEM; 2603 2604 if (fore200e_alloc_rx_buf(fore200e) < 0) 2605 return -ENOMEM; 2606 2607 if (fore200e_get_esi(fore200e) < 0) 2608 return -EIO; 2609 2610 if (fore200e_irq_request(fore200e) < 0) 2611 return -EBUSY; 2612 2613 fore200e_supply(fore200e); 2614 2615 /* all done, board initialization is now complete */ 2616 fore200e->state = FORE200E_STATE_COMPLETE; 2617 return 0; 2618 } 2619 2620 #ifdef CONFIG_SBUS 2621 static const struct of_device_id fore200e_sba_match[]; 2622 static int fore200e_sba_probe(struct platform_device *op) 2623 { 2624 const struct of_device_id *match; 2625 const struct fore200e_bus *bus; 2626 struct fore200e *fore200e; 2627 static int index = 0; 2628 int err; 2629 2630 match = of_match_device(fore200e_sba_match, &op->dev); 2631 if (!match) 2632 return -EINVAL; 2633 bus = match->data; 2634 2635 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL); 2636 if (!fore200e) 2637 return -ENOMEM; 2638 2639 fore200e->bus = bus; 2640 fore200e->bus_dev = op; 2641 fore200e->irq = op->archdata.irqs[0]; 2642 fore200e->phys_base = op->resource[0].start; 2643 2644 sprintf(fore200e->name, "%s-%d", bus->model_name, index); 2645 2646 err = fore200e_init(fore200e, &op->dev); 2647 if (err < 0) { 2648 fore200e_shutdown(fore200e); 2649 kfree(fore200e); 2650 return err; 2651 } 2652 2653 index++; 2654 dev_set_drvdata(&op->dev, fore200e); 2655 2656 return 0; 2657 } 2658 2659 static int fore200e_sba_remove(struct platform_device *op) 2660 { 2661 struct fore200e *fore200e = dev_get_drvdata(&op->dev); 2662 2663 fore200e_shutdown(fore200e); 2664 kfree(fore200e); 2665 2666 return 0; 2667 } 2668 2669 static const struct of_device_id fore200e_sba_match[] = { 2670 { 2671 .name = SBA200E_PROM_NAME, 2672 .data = (void *) &fore200e_bus[1], 2673 }, 2674 {}, 2675 }; 2676 MODULE_DEVICE_TABLE(of, fore200e_sba_match); 2677 2678 static struct platform_driver fore200e_sba_driver = { 2679 .driver = { 2680 .name = "fore_200e", 2681 .of_match_table = fore200e_sba_match, 2682 }, 2683 .probe = fore200e_sba_probe, 2684 .remove = fore200e_sba_remove, 2685 }; 2686 #endif 2687 2688 #ifdef CONFIG_PCI 2689 static int fore200e_pca_detect(struct pci_dev *pci_dev, 2690 const struct pci_device_id *pci_ent) 2691 { 2692 const struct fore200e_bus* bus = (struct fore200e_bus*) pci_ent->driver_data; 2693 struct fore200e* fore200e; 2694 int err = 0; 2695 static int index = 0; 2696 2697 if (pci_enable_device(pci_dev)) { 2698 err = -EINVAL; 2699 goto out; 2700 } 2701 2702 if (dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(32))) { 2703 err = -EINVAL; 2704 goto out; 2705 } 2706 2707 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL); 2708 if (fore200e == NULL) { 2709 err = -ENOMEM; 2710 goto out_disable; 2711 } 2712 2713 fore200e->bus = bus; 2714 fore200e->bus_dev = pci_dev; 2715 fore200e->irq = pci_dev->irq; 2716 fore200e->phys_base = pci_resource_start(pci_dev, 0); 2717 2718 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1); 2719 2720 pci_set_master(pci_dev); 2721 2722 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n", 2723 fore200e->bus->model_name, 2724 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq)); 2725 2726 sprintf(fore200e->name, "%s-%d", bus->model_name, index); 2727 2728 err = fore200e_init(fore200e, &pci_dev->dev); 2729 if (err < 0) { 2730 fore200e_shutdown(fore200e); 2731 goto out_free; 2732 } 2733 2734 ++index; 2735 pci_set_drvdata(pci_dev, fore200e); 2736 2737 out: 2738 return err; 2739 2740 out_free: 2741 kfree(fore200e); 2742 out_disable: 2743 pci_disable_device(pci_dev); 2744 goto out; 2745 } 2746 2747 2748 static void fore200e_pca_remove_one(struct pci_dev *pci_dev) 2749 { 2750 struct fore200e *fore200e; 2751 2752 fore200e = pci_get_drvdata(pci_dev); 2753 2754 fore200e_shutdown(fore200e); 2755 kfree(fore200e); 2756 pci_disable_device(pci_dev); 2757 } 2758 2759 2760 static struct pci_device_id fore200e_pca_tbl[] = { 2761 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID, 2762 0, 0, (unsigned long) &fore200e_bus[0] }, 2763 { 0, } 2764 }; 2765 2766 MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl); 2767 2768 static struct pci_driver fore200e_pca_driver = { 2769 .name = "fore_200e", 2770 .probe = fore200e_pca_detect, 2771 .remove = fore200e_pca_remove_one, 2772 .id_table = fore200e_pca_tbl, 2773 }; 2774 #endif 2775 2776 static int __init fore200e_module_init(void) 2777 { 2778 int err = 0; 2779 2780 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n"); 2781 2782 #ifdef CONFIG_SBUS 2783 err = platform_driver_register(&fore200e_sba_driver); 2784 if (err) 2785 return err; 2786 #endif 2787 2788 #ifdef CONFIG_PCI 2789 err = pci_register_driver(&fore200e_pca_driver); 2790 #endif 2791 2792 #ifdef CONFIG_SBUS 2793 if (err) 2794 platform_driver_unregister(&fore200e_sba_driver); 2795 #endif 2796 2797 return err; 2798 } 2799 2800 static void __exit fore200e_module_cleanup(void) 2801 { 2802 #ifdef CONFIG_PCI 2803 pci_unregister_driver(&fore200e_pca_driver); 2804 #endif 2805 #ifdef CONFIG_SBUS 2806 platform_driver_unregister(&fore200e_sba_driver); 2807 #endif 2808 } 2809 2810 static int 2811 fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page) 2812 { 2813 struct fore200e* fore200e = FORE200E_DEV(dev); 2814 struct fore200e_vcc* fore200e_vcc; 2815 struct atm_vcc* vcc; 2816 int i, len, left = *pos; 2817 unsigned long flags; 2818 2819 if (!left--) { 2820 2821 if (fore200e_getstats(fore200e) < 0) 2822 return -EIO; 2823 2824 len = sprintf(page,"\n" 2825 " device:\n" 2826 " internal name:\t\t%s\n", fore200e->name); 2827 2828 /* print bus-specific information */ 2829 if (fore200e->bus->proc_read) 2830 len += fore200e->bus->proc_read(fore200e, page + len); 2831 2832 len += sprintf(page + len, 2833 " interrupt line:\t\t%s\n" 2834 " physical base address:\t0x%p\n" 2835 " virtual base address:\t0x%p\n" 2836 " factory address (ESI):\t%pM\n" 2837 " board serial number:\t\t%d\n\n", 2838 fore200e_irq_itoa(fore200e->irq), 2839 (void*)fore200e->phys_base, 2840 fore200e->virt_base, 2841 fore200e->esi, 2842 fore200e->esi[4] * 256 + fore200e->esi[5]); 2843 2844 return len; 2845 } 2846 2847 if (!left--) 2848 return sprintf(page, 2849 " free small bufs, scheme 1:\t%d\n" 2850 " free large bufs, scheme 1:\t%d\n" 2851 " free small bufs, scheme 2:\t%d\n" 2852 " free large bufs, scheme 2:\t%d\n", 2853 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count, 2854 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count, 2855 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count, 2856 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count); 2857 2858 if (!left--) { 2859 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat); 2860 2861 len = sprintf(page,"\n\n" 2862 " cell processor:\n" 2863 " heartbeat state:\t\t"); 2864 2865 if (hb >> 16 != 0xDEAD) 2866 len += sprintf(page + len, "0x%08x\n", hb); 2867 else 2868 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF); 2869 2870 return len; 2871 } 2872 2873 if (!left--) { 2874 static const char* media_name[] = { 2875 "unshielded twisted pair", 2876 "multimode optical fiber ST", 2877 "multimode optical fiber SC", 2878 "single-mode optical fiber ST", 2879 "single-mode optical fiber SC", 2880 "unknown" 2881 }; 2882 2883 static const char* oc3_mode[] = { 2884 "normal operation", 2885 "diagnostic loopback", 2886 "line loopback", 2887 "unknown" 2888 }; 2889 2890 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release); 2891 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release); 2892 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision); 2893 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type)); 2894 u32 oc3_index; 2895 2896 if (media_index > 4) 2897 media_index = 5; 2898 2899 switch (fore200e->loop_mode) { 2900 case ATM_LM_NONE: oc3_index = 0; 2901 break; 2902 case ATM_LM_LOC_PHY: oc3_index = 1; 2903 break; 2904 case ATM_LM_RMT_PHY: oc3_index = 2; 2905 break; 2906 default: oc3_index = 3; 2907 } 2908 2909 return sprintf(page, 2910 " firmware release:\t\t%d.%d.%d\n" 2911 " monitor release:\t\t%d.%d\n" 2912 " media type:\t\t\t%s\n" 2913 " OC-3 revision:\t\t0x%x\n" 2914 " OC-3 mode:\t\t\t%s", 2915 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24, 2916 mon960_release >> 16, mon960_release << 16 >> 16, 2917 media_name[ media_index ], 2918 oc3_revision, 2919 oc3_mode[ oc3_index ]); 2920 } 2921 2922 if (!left--) { 2923 struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor; 2924 2925 return sprintf(page, 2926 "\n\n" 2927 " monitor:\n" 2928 " version number:\t\t%d\n" 2929 " boot status word:\t\t0x%08x\n", 2930 fore200e->bus->read(&cp_monitor->mon_version), 2931 fore200e->bus->read(&cp_monitor->bstat)); 2932 } 2933 2934 if (!left--) 2935 return sprintf(page, 2936 "\n" 2937 " device statistics:\n" 2938 " 4b5b:\n" 2939 " crc_header_errors:\t\t%10u\n" 2940 " framing_errors:\t\t%10u\n", 2941 be32_to_cpu(fore200e->stats->phy.crc_header_errors), 2942 be32_to_cpu(fore200e->stats->phy.framing_errors)); 2943 2944 if (!left--) 2945 return sprintf(page, "\n" 2946 " OC-3:\n" 2947 " section_bip8_errors:\t%10u\n" 2948 " path_bip8_errors:\t\t%10u\n" 2949 " line_bip24_errors:\t\t%10u\n" 2950 " line_febe_errors:\t\t%10u\n" 2951 " path_febe_errors:\t\t%10u\n" 2952 " corr_hcs_errors:\t\t%10u\n" 2953 " ucorr_hcs_errors:\t\t%10u\n", 2954 be32_to_cpu(fore200e->stats->oc3.section_bip8_errors), 2955 be32_to_cpu(fore200e->stats->oc3.path_bip8_errors), 2956 be32_to_cpu(fore200e->stats->oc3.line_bip24_errors), 2957 be32_to_cpu(fore200e->stats->oc3.line_febe_errors), 2958 be32_to_cpu(fore200e->stats->oc3.path_febe_errors), 2959 be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors), 2960 be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors)); 2961 2962 if (!left--) 2963 return sprintf(page,"\n" 2964 " ATM:\t\t\t\t cells\n" 2965 " TX:\t\t\t%10u\n" 2966 " RX:\t\t\t%10u\n" 2967 " vpi out of range:\t\t%10u\n" 2968 " vpi no conn:\t\t%10u\n" 2969 " vci out of range:\t\t%10u\n" 2970 " vci no conn:\t\t%10u\n", 2971 be32_to_cpu(fore200e->stats->atm.cells_transmitted), 2972 be32_to_cpu(fore200e->stats->atm.cells_received), 2973 be32_to_cpu(fore200e->stats->atm.vpi_bad_range), 2974 be32_to_cpu(fore200e->stats->atm.vpi_no_conn), 2975 be32_to_cpu(fore200e->stats->atm.vci_bad_range), 2976 be32_to_cpu(fore200e->stats->atm.vci_no_conn)); 2977 2978 if (!left--) 2979 return sprintf(page,"\n" 2980 " AAL0:\t\t\t cells\n" 2981 " TX:\t\t\t%10u\n" 2982 " RX:\t\t\t%10u\n" 2983 " dropped:\t\t\t%10u\n", 2984 be32_to_cpu(fore200e->stats->aal0.cells_transmitted), 2985 be32_to_cpu(fore200e->stats->aal0.cells_received), 2986 be32_to_cpu(fore200e->stats->aal0.cells_dropped)); 2987 2988 if (!left--) 2989 return sprintf(page,"\n" 2990 " AAL3/4:\n" 2991 " SAR sublayer:\t\t cells\n" 2992 " TX:\t\t\t%10u\n" 2993 " RX:\t\t\t%10u\n" 2994 " dropped:\t\t\t%10u\n" 2995 " CRC errors:\t\t%10u\n" 2996 " protocol errors:\t\t%10u\n\n" 2997 " CS sublayer:\t\t PDUs\n" 2998 " TX:\t\t\t%10u\n" 2999 " RX:\t\t\t%10u\n" 3000 " dropped:\t\t\t%10u\n" 3001 " protocol errors:\t\t%10u\n", 3002 be32_to_cpu(fore200e->stats->aal34.cells_transmitted), 3003 be32_to_cpu(fore200e->stats->aal34.cells_received), 3004 be32_to_cpu(fore200e->stats->aal34.cells_dropped), 3005 be32_to_cpu(fore200e->stats->aal34.cells_crc_errors), 3006 be32_to_cpu(fore200e->stats->aal34.cells_protocol_errors), 3007 be32_to_cpu(fore200e->stats->aal34.cspdus_transmitted), 3008 be32_to_cpu(fore200e->stats->aal34.cspdus_received), 3009 be32_to_cpu(fore200e->stats->aal34.cspdus_dropped), 3010 be32_to_cpu(fore200e->stats->aal34.cspdus_protocol_errors)); 3011 3012 if (!left--) 3013 return sprintf(page,"\n" 3014 " AAL5:\n" 3015 " SAR sublayer:\t\t cells\n" 3016 " TX:\t\t\t%10u\n" 3017 " RX:\t\t\t%10u\n" 3018 " dropped:\t\t\t%10u\n" 3019 " congestions:\t\t%10u\n\n" 3020 " CS sublayer:\t\t PDUs\n" 3021 " TX:\t\t\t%10u\n" 3022 " RX:\t\t\t%10u\n" 3023 " dropped:\t\t\t%10u\n" 3024 " CRC errors:\t\t%10u\n" 3025 " protocol errors:\t\t%10u\n", 3026 be32_to_cpu(fore200e->stats->aal5.cells_transmitted), 3027 be32_to_cpu(fore200e->stats->aal5.cells_received), 3028 be32_to_cpu(fore200e->stats->aal5.cells_dropped), 3029 be32_to_cpu(fore200e->stats->aal5.congestion_experienced), 3030 be32_to_cpu(fore200e->stats->aal5.cspdus_transmitted), 3031 be32_to_cpu(fore200e->stats->aal5.cspdus_received), 3032 be32_to_cpu(fore200e->stats->aal5.cspdus_dropped), 3033 be32_to_cpu(fore200e->stats->aal5.cspdus_crc_errors), 3034 be32_to_cpu(fore200e->stats->aal5.cspdus_protocol_errors)); 3035 3036 if (!left--) 3037 return sprintf(page,"\n" 3038 " AUX:\t\t allocation failures\n" 3039 " small b1:\t\t\t%10u\n" 3040 " large b1:\t\t\t%10u\n" 3041 " small b2:\t\t\t%10u\n" 3042 " large b2:\t\t\t%10u\n" 3043 " RX PDUs:\t\t\t%10u\n" 3044 " TX PDUs:\t\t\t%10lu\n", 3045 be32_to_cpu(fore200e->stats->aux.small_b1_failed), 3046 be32_to_cpu(fore200e->stats->aux.large_b1_failed), 3047 be32_to_cpu(fore200e->stats->aux.small_b2_failed), 3048 be32_to_cpu(fore200e->stats->aux.large_b2_failed), 3049 be32_to_cpu(fore200e->stats->aux.rpd_alloc_failed), 3050 fore200e->tx_sat); 3051 3052 if (!left--) 3053 return sprintf(page,"\n" 3054 " receive carrier:\t\t\t%s\n", 3055 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!"); 3056 3057 if (!left--) { 3058 return sprintf(page,"\n" 3059 " VCCs:\n address VPI VCI AAL " 3060 "TX PDUs TX min/max size RX PDUs RX min/max size\n"); 3061 } 3062 3063 for (i = 0; i < NBR_CONNECT; i++) { 3064 3065 vcc = fore200e->vc_map[i].vcc; 3066 3067 if (vcc == NULL) 3068 continue; 3069 3070 spin_lock_irqsave(&fore200e->q_lock, flags); 3071 3072 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) { 3073 3074 fore200e_vcc = FORE200E_VCC(vcc); 3075 ASSERT(fore200e_vcc); 3076 3077 len = sprintf(page, 3078 " %08x %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n", 3079 (u32)(unsigned long)vcc, 3080 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal), 3081 fore200e_vcc->tx_pdu, 3082 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu, 3083 fore200e_vcc->tx_max_pdu, 3084 fore200e_vcc->rx_pdu, 3085 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu, 3086 fore200e_vcc->rx_max_pdu); 3087 3088 spin_unlock_irqrestore(&fore200e->q_lock, flags); 3089 return len; 3090 } 3091 3092 spin_unlock_irqrestore(&fore200e->q_lock, flags); 3093 } 3094 3095 return 0; 3096 } 3097 3098 module_init(fore200e_module_init); 3099 module_exit(fore200e_module_cleanup); 3100 3101 3102 static const struct atmdev_ops fore200e_ops = 3103 { 3104 .open = fore200e_open, 3105 .close = fore200e_close, 3106 .ioctl = fore200e_ioctl, 3107 .getsockopt = fore200e_getsockopt, 3108 .setsockopt = fore200e_setsockopt, 3109 .send = fore200e_send, 3110 .change_qos = fore200e_change_qos, 3111 .proc_read = fore200e_proc_read, 3112 .owner = THIS_MODULE 3113 }; 3114 3115 3116 static const struct fore200e_bus fore200e_bus[] = { 3117 #ifdef CONFIG_PCI 3118 { "PCA-200E", "pca200e", 32, 4, 32, 3119 fore200e_pca_read, 3120 fore200e_pca_write, 3121 fore200e_pca_dma_map, 3122 fore200e_pca_dma_unmap, 3123 fore200e_pca_dma_sync_for_cpu, 3124 fore200e_pca_dma_sync_for_device, 3125 fore200e_pca_dma_chunk_alloc, 3126 fore200e_pca_dma_chunk_free, 3127 fore200e_pca_configure, 3128 fore200e_pca_map, 3129 fore200e_pca_reset, 3130 fore200e_pca_prom_read, 3131 fore200e_pca_unmap, 3132 NULL, 3133 fore200e_pca_irq_check, 3134 fore200e_pca_irq_ack, 3135 fore200e_pca_proc_read, 3136 }, 3137 #endif 3138 #ifdef CONFIG_SBUS 3139 { "SBA-200E", "sba200e", 32, 64, 32, 3140 fore200e_sba_read, 3141 fore200e_sba_write, 3142 fore200e_sba_dma_map, 3143 fore200e_sba_dma_unmap, 3144 fore200e_sba_dma_sync_for_cpu, 3145 fore200e_sba_dma_sync_for_device, 3146 fore200e_sba_dma_chunk_alloc, 3147 fore200e_sba_dma_chunk_free, 3148 fore200e_sba_configure, 3149 fore200e_sba_map, 3150 fore200e_sba_reset, 3151 fore200e_sba_prom_read, 3152 fore200e_sba_unmap, 3153 fore200e_sba_irq_enable, 3154 fore200e_sba_irq_check, 3155 fore200e_sba_irq_ack, 3156 fore200e_sba_proc_read, 3157 }, 3158 #endif 3159 {} 3160 }; 3161 3162 MODULE_LICENSE("GPL"); 3163 #ifdef CONFIG_PCI 3164 #ifdef __LITTLE_ENDIAN__ 3165 MODULE_FIRMWARE("pca200e.bin"); 3166 #else 3167 MODULE_FIRMWARE("pca200e_ecd.bin2"); 3168 #endif 3169 #endif /* CONFIG_PCI */ 3170 #ifdef CONFIG_SBUS 3171 MODULE_FIRMWARE("sba200e_ecd.bin2"); 3172 #endif 3173