1 /* 2 * sata_via.c - VIA Serial ATA controllers 3 * 4 * Maintained by: Jeff Garzik <jgarzik@pobox.com> 5 * Please ALWAYS copy linux-ide@vger.kernel.org 6 * on emails. 7 * 8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved. 9 * Copyright 2003-2004 Jeff Garzik 10 * 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2, or (at your option) 15 * any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; see the file COPYING. If not, write to 24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * 27 * libata documentation is available via 'make {ps|pdf}docs', 28 * as Documentation/DocBook/libata.* 29 * 30 * Hardware documentation available under NDA. 31 * 32 * 33 * 34 */ 35 36 #include <linux/kernel.h> 37 #include <linux/module.h> 38 #include <linux/pci.h> 39 #include <linux/init.h> 40 #include <linux/blkdev.h> 41 #include <linux/delay.h> 42 #include <linux/device.h> 43 #include <scsi/scsi_host.h> 44 #include <linux/libata.h> 45 46 #define DRV_NAME "sata_via" 47 #define DRV_VERSION "2.4" 48 49 /* 50 * vt8251 is different from other sata controllers of VIA. It has two 51 * channels, each channel has both Master and Slave slot. 52 */ 53 enum board_ids_enum { 54 vt6420, 55 vt6421, 56 vt8251, 57 }; 58 59 enum { 60 SATA_CHAN_ENAB = 0x40, /* SATA channel enable */ 61 SATA_INT_GATE = 0x41, /* SATA interrupt gating */ 62 SATA_NATIVE_MODE = 0x42, /* Native mode enable */ 63 PATA_UDMA_TIMING = 0xB3, /* PATA timing for DMA/ cable detect */ 64 PATA_PIO_TIMING = 0xAB, /* PATA timing register */ 65 66 PORT0 = (1 << 1), 67 PORT1 = (1 << 0), 68 ALL_PORTS = PORT0 | PORT1, 69 70 NATIVE_MODE_ALL = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4), 71 72 SATA_EXT_PHY = (1 << 6), /* 0==use PATA, 1==ext phy */ 73 }; 74 75 static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); 76 static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); 77 static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); 78 static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val); 79 static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val); 80 static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf); 81 static void svia_noop_freeze(struct ata_port *ap); 82 static int vt6420_prereset(struct ata_link *link, unsigned long deadline); 83 static int vt6421_pata_cable_detect(struct ata_port *ap); 84 static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev); 85 static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev); 86 87 static const struct pci_device_id svia_pci_tbl[] = { 88 { PCI_VDEVICE(VIA, 0x5337), vt6420 }, 89 { PCI_VDEVICE(VIA, 0x0591), vt6420 }, /* 2 sata chnls (Master) */ 90 { PCI_VDEVICE(VIA, 0x3149), vt6420 }, /* 2 sata chnls (Master) */ 91 { PCI_VDEVICE(VIA, 0x3249), vt6421 }, /* 2 sata chnls, 1 pata chnl */ 92 { PCI_VDEVICE(VIA, 0x5372), vt6420 }, 93 { PCI_VDEVICE(VIA, 0x7372), vt6420 }, 94 { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */ 95 { PCI_VDEVICE(VIA, 0x9000), vt8251 }, 96 97 { } /* terminate list */ 98 }; 99 100 static struct pci_driver svia_pci_driver = { 101 .name = DRV_NAME, 102 .id_table = svia_pci_tbl, 103 .probe = svia_init_one, 104 #ifdef CONFIG_PM 105 .suspend = ata_pci_device_suspend, 106 .resume = ata_pci_device_resume, 107 #endif 108 .remove = ata_pci_remove_one, 109 }; 110 111 static struct scsi_host_template svia_sht = { 112 ATA_BMDMA_SHT(DRV_NAME), 113 }; 114 115 static struct ata_port_operations svia_base_ops = { 116 .inherits = &ata_bmdma_port_ops, 117 .sff_tf_load = svia_tf_load, 118 }; 119 120 static struct ata_port_operations vt6420_sata_ops = { 121 .inherits = &svia_base_ops, 122 .freeze = svia_noop_freeze, 123 .prereset = vt6420_prereset, 124 }; 125 126 static struct ata_port_operations vt6421_pata_ops = { 127 .inherits = &svia_base_ops, 128 .cable_detect = vt6421_pata_cable_detect, 129 .set_piomode = vt6421_set_pio_mode, 130 .set_dmamode = vt6421_set_dma_mode, 131 }; 132 133 static struct ata_port_operations vt6421_sata_ops = { 134 .inherits = &svia_base_ops, 135 .scr_read = svia_scr_read, 136 .scr_write = svia_scr_write, 137 }; 138 139 static struct ata_port_operations vt8251_ops = { 140 .inherits = &svia_base_ops, 141 .hardreset = sata_std_hardreset, 142 .scr_read = vt8251_scr_read, 143 .scr_write = vt8251_scr_write, 144 }; 145 146 static const struct ata_port_info vt6420_port_info = { 147 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, 148 .pio_mask = ATA_PIO4, 149 .mwdma_mask = ATA_MWDMA2, 150 .udma_mask = ATA_UDMA6, 151 .port_ops = &vt6420_sata_ops, 152 }; 153 154 static struct ata_port_info vt6421_sport_info = { 155 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, 156 .pio_mask = ATA_PIO4, 157 .mwdma_mask = ATA_MWDMA2, 158 .udma_mask = ATA_UDMA6, 159 .port_ops = &vt6421_sata_ops, 160 }; 161 162 static struct ata_port_info vt6421_pport_info = { 163 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_LEGACY, 164 .pio_mask = ATA_PIO4, 165 /* No MWDMA */ 166 .udma_mask = ATA_UDMA6, 167 .port_ops = &vt6421_pata_ops, 168 }; 169 170 static struct ata_port_info vt8251_port_info = { 171 .flags = ATA_FLAG_SATA | ATA_FLAG_SLAVE_POSS | 172 ATA_FLAG_NO_LEGACY, 173 .pio_mask = ATA_PIO4, 174 .mwdma_mask = ATA_MWDMA2, 175 .udma_mask = ATA_UDMA6, 176 .port_ops = &vt8251_ops, 177 }; 178 179 MODULE_AUTHOR("Jeff Garzik"); 180 MODULE_DESCRIPTION("SCSI low-level driver for VIA SATA controllers"); 181 MODULE_LICENSE("GPL"); 182 MODULE_DEVICE_TABLE(pci, svia_pci_tbl); 183 MODULE_VERSION(DRV_VERSION); 184 185 static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) 186 { 187 if (sc_reg > SCR_CONTROL) 188 return -EINVAL; 189 *val = ioread32(link->ap->ioaddr.scr_addr + (4 * sc_reg)); 190 return 0; 191 } 192 193 static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) 194 { 195 if (sc_reg > SCR_CONTROL) 196 return -EINVAL; 197 iowrite32(val, link->ap->ioaddr.scr_addr + (4 * sc_reg)); 198 return 0; 199 } 200 201 static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val) 202 { 203 static const u8 ipm_tbl[] = { 1, 2, 6, 0 }; 204 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); 205 int slot = 2 * link->ap->port_no + link->pmp; 206 u32 v = 0; 207 u8 raw; 208 209 switch (scr) { 210 case SCR_STATUS: 211 pci_read_config_byte(pdev, 0xA0 + slot, &raw); 212 213 /* read the DET field, bit0 and 1 of the config byte */ 214 v |= raw & 0x03; 215 216 /* read the SPD field, bit4 of the configure byte */ 217 if (raw & (1 << 4)) 218 v |= 0x02 << 4; 219 else 220 v |= 0x01 << 4; 221 222 /* read the IPM field, bit2 and 3 of the config byte */ 223 v |= ipm_tbl[(raw >> 2) & 0x3]; 224 break; 225 226 case SCR_ERROR: 227 /* devices other than 5287 uses 0xA8 as base */ 228 WARN_ON(pdev->device != 0x5287); 229 pci_read_config_dword(pdev, 0xB0 + slot * 4, &v); 230 break; 231 232 case SCR_CONTROL: 233 pci_read_config_byte(pdev, 0xA4 + slot, &raw); 234 235 /* read the DET field, bit0 and bit1 */ 236 v |= ((raw & 0x02) << 1) | (raw & 0x01); 237 238 /* read the IPM field, bit2 and bit3 */ 239 v |= ((raw >> 2) & 0x03) << 8; 240 break; 241 242 default: 243 return -EINVAL; 244 } 245 246 *val = v; 247 return 0; 248 } 249 250 static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val) 251 { 252 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); 253 int slot = 2 * link->ap->port_no + link->pmp; 254 u32 v = 0; 255 256 switch (scr) { 257 case SCR_ERROR: 258 /* devices other than 5287 uses 0xA8 as base */ 259 WARN_ON(pdev->device != 0x5287); 260 pci_write_config_dword(pdev, 0xB0 + slot * 4, val); 261 return 0; 262 263 case SCR_CONTROL: 264 /* set the DET field */ 265 v |= ((val & 0x4) >> 1) | (val & 0x1); 266 267 /* set the IPM field */ 268 v |= ((val >> 8) & 0x3) << 2; 269 270 pci_write_config_byte(pdev, 0xA4 + slot, v); 271 return 0; 272 273 default: 274 return -EINVAL; 275 } 276 } 277 278 /** 279 * svia_tf_load - send taskfile registers to host controller 280 * @ap: Port to which output is sent 281 * @tf: ATA taskfile register set 282 * 283 * Outputs ATA taskfile to standard ATA host controller. 284 * 285 * This is to fix the internal bug of via chipsets, which will 286 * reset the device register after changing the IEN bit on ctl 287 * register. 288 */ 289 static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) 290 { 291 struct ata_taskfile ttf; 292 293 if (tf->ctl != ap->last_ctl) { 294 ttf = *tf; 295 ttf.flags |= ATA_TFLAG_DEVICE; 296 tf = &ttf; 297 } 298 ata_sff_tf_load(ap, tf); 299 } 300 301 static void svia_noop_freeze(struct ata_port *ap) 302 { 303 /* Some VIA controllers choke if ATA_NIEN is manipulated in 304 * certain way. Leave it alone and just clear pending IRQ. 305 */ 306 ap->ops->sff_check_status(ap); 307 ata_sff_irq_clear(ap); 308 } 309 310 /** 311 * vt6420_prereset - prereset for vt6420 312 * @link: target ATA link 313 * @deadline: deadline jiffies for the operation 314 * 315 * SCR registers on vt6420 are pieces of shit and may hang the 316 * whole machine completely if accessed with the wrong timing. 317 * To avoid such catastrophe, vt6420 doesn't provide generic SCR 318 * access operations, but uses SStatus and SControl only during 319 * boot probing in controlled way. 320 * 321 * As the old (pre EH update) probing code is proven to work, we 322 * strictly follow the access pattern. 323 * 324 * LOCKING: 325 * Kernel thread context (may sleep) 326 * 327 * RETURNS: 328 * 0 on success, -errno otherwise. 329 */ 330 static int vt6420_prereset(struct ata_link *link, unsigned long deadline) 331 { 332 struct ata_port *ap = link->ap; 333 struct ata_eh_context *ehc = &ap->link.eh_context; 334 unsigned long timeout = jiffies + (HZ * 5); 335 u32 sstatus, scontrol; 336 int online; 337 338 /* don't do any SCR stuff if we're not loading */ 339 if (!(ap->pflags & ATA_PFLAG_LOADING)) 340 goto skip_scr; 341 342 /* Resume phy. This is the old SATA resume sequence */ 343 svia_scr_write(link, SCR_CONTROL, 0x300); 344 svia_scr_read(link, SCR_CONTROL, &scontrol); /* flush */ 345 346 /* wait for phy to become ready, if necessary */ 347 do { 348 msleep(200); 349 svia_scr_read(link, SCR_STATUS, &sstatus); 350 if ((sstatus & 0xf) != 1) 351 break; 352 } while (time_before(jiffies, timeout)); 353 354 /* open code sata_print_link_status() */ 355 svia_scr_read(link, SCR_STATUS, &sstatus); 356 svia_scr_read(link, SCR_CONTROL, &scontrol); 357 358 online = (sstatus & 0xf) == 0x3; 359 360 ata_port_printk(ap, KERN_INFO, 361 "SATA link %s 1.5 Gbps (SStatus %X SControl %X)\n", 362 online ? "up" : "down", sstatus, scontrol); 363 364 /* SStatus is read one more time */ 365 svia_scr_read(link, SCR_STATUS, &sstatus); 366 367 if (!online) { 368 /* tell EH to bail */ 369 ehc->i.action &= ~ATA_EH_RESET; 370 return 0; 371 } 372 373 skip_scr: 374 /* wait for !BSY */ 375 ata_sff_wait_ready(link, deadline); 376 377 return 0; 378 } 379 380 static int vt6421_pata_cable_detect(struct ata_port *ap) 381 { 382 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 383 u8 tmp; 384 385 pci_read_config_byte(pdev, PATA_UDMA_TIMING, &tmp); 386 if (tmp & 0x10) 387 return ATA_CBL_PATA40; 388 return ATA_CBL_PATA80; 389 } 390 391 static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev) 392 { 393 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 394 static const u8 pio_bits[] = { 0xA8, 0x65, 0x65, 0x31, 0x20 }; 395 pci_write_config_byte(pdev, PATA_PIO_TIMING, pio_bits[adev->pio_mode - XFER_PIO_0]); 396 } 397 398 static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev) 399 { 400 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 401 static const u8 udma_bits[] = { 0xEE, 0xE8, 0xE6, 0xE4, 0xE2, 0xE1, 0xE0, 0xE0 }; 402 pci_write_config_byte(pdev, PATA_UDMA_TIMING, udma_bits[adev->dma_mode - XFER_UDMA_0]); 403 } 404 405 static const unsigned int svia_bar_sizes[] = { 406 8, 4, 8, 4, 16, 256 407 }; 408 409 static const unsigned int vt6421_bar_sizes[] = { 410 16, 16, 16, 16, 32, 128 411 }; 412 413 static void __iomem *svia_scr_addr(void __iomem *addr, unsigned int port) 414 { 415 return addr + (port * 128); 416 } 417 418 static void __iomem *vt6421_scr_addr(void __iomem *addr, unsigned int port) 419 { 420 return addr + (port * 64); 421 } 422 423 static void vt6421_init_addrs(struct ata_port *ap) 424 { 425 void __iomem * const * iomap = ap->host->iomap; 426 void __iomem *reg_addr = iomap[ap->port_no]; 427 void __iomem *bmdma_addr = iomap[4] + (ap->port_no * 8); 428 struct ata_ioports *ioaddr = &ap->ioaddr; 429 430 ioaddr->cmd_addr = reg_addr; 431 ioaddr->altstatus_addr = 432 ioaddr->ctl_addr = (void __iomem *) 433 ((unsigned long)(reg_addr + 8) | ATA_PCI_CTL_OFS); 434 ioaddr->bmdma_addr = bmdma_addr; 435 ioaddr->scr_addr = vt6421_scr_addr(iomap[5], ap->port_no); 436 437 ata_sff_std_ports(ioaddr); 438 439 ata_port_pbar_desc(ap, ap->port_no, -1, "port"); 440 ata_port_pbar_desc(ap, 4, ap->port_no * 8, "bmdma"); 441 } 442 443 static int vt6420_prepare_host(struct pci_dev *pdev, struct ata_host **r_host) 444 { 445 const struct ata_port_info *ppi[] = { &vt6420_port_info, NULL }; 446 struct ata_host *host; 447 int rc; 448 449 rc = ata_pci_sff_prepare_host(pdev, ppi, &host); 450 if (rc) 451 return rc; 452 *r_host = host; 453 454 rc = pcim_iomap_regions(pdev, 1 << 5, DRV_NAME); 455 if (rc) { 456 dev_printk(KERN_ERR, &pdev->dev, "failed to iomap PCI BAR 5\n"); 457 return rc; 458 } 459 460 host->ports[0]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 0); 461 host->ports[1]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 1); 462 463 return 0; 464 } 465 466 static int vt6421_prepare_host(struct pci_dev *pdev, struct ata_host **r_host) 467 { 468 const struct ata_port_info *ppi[] = 469 { &vt6421_sport_info, &vt6421_sport_info, &vt6421_pport_info }; 470 struct ata_host *host; 471 int i, rc; 472 473 *r_host = host = ata_host_alloc_pinfo(&pdev->dev, ppi, ARRAY_SIZE(ppi)); 474 if (!host) { 475 dev_printk(KERN_ERR, &pdev->dev, "failed to allocate host\n"); 476 return -ENOMEM; 477 } 478 479 rc = pcim_iomap_regions(pdev, 0x3f, DRV_NAME); 480 if (rc) { 481 dev_printk(KERN_ERR, &pdev->dev, "failed to request/iomap " 482 "PCI BARs (errno=%d)\n", rc); 483 return rc; 484 } 485 host->iomap = pcim_iomap_table(pdev); 486 487 for (i = 0; i < host->n_ports; i++) 488 vt6421_init_addrs(host->ports[i]); 489 490 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); 491 if (rc) 492 return rc; 493 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); 494 if (rc) 495 return rc; 496 497 return 0; 498 } 499 500 static int vt8251_prepare_host(struct pci_dev *pdev, struct ata_host **r_host) 501 { 502 const struct ata_port_info *ppi[] = { &vt8251_port_info, NULL }; 503 struct ata_host *host; 504 int i, rc; 505 506 rc = ata_pci_sff_prepare_host(pdev, ppi, &host); 507 if (rc) 508 return rc; 509 *r_host = host; 510 511 rc = pcim_iomap_regions(pdev, 1 << 5, DRV_NAME); 512 if (rc) { 513 dev_printk(KERN_ERR, &pdev->dev, "failed to iomap PCI BAR 5\n"); 514 return rc; 515 } 516 517 /* 8251 hosts four sata ports as M/S of the two channels */ 518 for (i = 0; i < host->n_ports; i++) 519 ata_slave_link_init(host->ports[i]); 520 521 return 0; 522 } 523 524 static void svia_configure(struct pci_dev *pdev) 525 { 526 u8 tmp8; 527 528 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &tmp8); 529 dev_printk(KERN_INFO, &pdev->dev, "routed to hard irq line %d\n", 530 (int) (tmp8 & 0xf0) == 0xf0 ? 0 : tmp8 & 0x0f); 531 532 /* make sure SATA channels are enabled */ 533 pci_read_config_byte(pdev, SATA_CHAN_ENAB, &tmp8); 534 if ((tmp8 & ALL_PORTS) != ALL_PORTS) { 535 dev_printk(KERN_DEBUG, &pdev->dev, 536 "enabling SATA channels (0x%x)\n", 537 (int) tmp8); 538 tmp8 |= ALL_PORTS; 539 pci_write_config_byte(pdev, SATA_CHAN_ENAB, tmp8); 540 } 541 542 /* make sure interrupts for each channel sent to us */ 543 pci_read_config_byte(pdev, SATA_INT_GATE, &tmp8); 544 if ((tmp8 & ALL_PORTS) != ALL_PORTS) { 545 dev_printk(KERN_DEBUG, &pdev->dev, 546 "enabling SATA channel interrupts (0x%x)\n", 547 (int) tmp8); 548 tmp8 |= ALL_PORTS; 549 pci_write_config_byte(pdev, SATA_INT_GATE, tmp8); 550 } 551 552 /* make sure native mode is enabled */ 553 pci_read_config_byte(pdev, SATA_NATIVE_MODE, &tmp8); 554 if ((tmp8 & NATIVE_MODE_ALL) != NATIVE_MODE_ALL) { 555 dev_printk(KERN_DEBUG, &pdev->dev, 556 "enabling SATA channel native mode (0x%x)\n", 557 (int) tmp8); 558 tmp8 |= NATIVE_MODE_ALL; 559 pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8); 560 } 561 } 562 563 static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 564 { 565 static int printed_version; 566 unsigned int i; 567 int rc; 568 struct ata_host *host = NULL; 569 int board_id = (int) ent->driver_data; 570 const unsigned *bar_sizes; 571 572 if (!printed_version++) 573 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 574 575 rc = pcim_enable_device(pdev); 576 if (rc) 577 return rc; 578 579 if (board_id == vt6421) 580 bar_sizes = &vt6421_bar_sizes[0]; 581 else 582 bar_sizes = &svia_bar_sizes[0]; 583 584 for (i = 0; i < ARRAY_SIZE(svia_bar_sizes); i++) 585 if ((pci_resource_start(pdev, i) == 0) || 586 (pci_resource_len(pdev, i) < bar_sizes[i])) { 587 dev_printk(KERN_ERR, &pdev->dev, 588 "invalid PCI BAR %u (sz 0x%llx, val 0x%llx)\n", 589 i, 590 (unsigned long long)pci_resource_start(pdev, i), 591 (unsigned long long)pci_resource_len(pdev, i)); 592 return -ENODEV; 593 } 594 595 switch (board_id) { 596 case vt6420: 597 rc = vt6420_prepare_host(pdev, &host); 598 break; 599 case vt6421: 600 rc = vt6421_prepare_host(pdev, &host); 601 break; 602 case vt8251: 603 rc = vt8251_prepare_host(pdev, &host); 604 break; 605 default: 606 rc = -EINVAL; 607 } 608 if (rc) 609 return rc; 610 611 svia_configure(pdev); 612 613 pci_set_master(pdev); 614 return ata_host_activate(host, pdev->irq, ata_sff_interrupt, 615 IRQF_SHARED, &svia_sht); 616 } 617 618 static int __init svia_init(void) 619 { 620 return pci_register_driver(&svia_pci_driver); 621 } 622 623 static void __exit svia_exit(void) 624 { 625 pci_unregister_driver(&svia_pci_driver); 626 } 627 628 module_init(svia_init); 629 module_exit(svia_exit); 630