xref: /openbmc/linux/drivers/ata/sata_via.c (revision 64c70b1c)
1 /*
2  *  sata_via.c - VIA Serial ATA controllers
3  *
4  *  Maintained by:  Jeff Garzik <jgarzik@pobox.com>
5  * 		   Please ALWAYS copy linux-ide@vger.kernel.org
6  		   on emails.
7  *
8  *  Copyright 2003-2004 Red Hat, Inc.  All rights reserved.
9  *  Copyright 2003-2004 Jeff Garzik
10  *
11  *
12  *  This program is free software; you can redistribute it and/or modify
13  *  it under the terms of the GNU General Public License as published by
14  *  the Free Software Foundation; either version 2, or (at your option)
15  *  any later version.
16  *
17  *  This program is distributed in the hope that it will be useful,
18  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
19  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  *  GNU General Public License for more details.
21  *
22  *  You should have received a copy of the GNU General Public License
23  *  along with this program; see the file COPYING.  If not, write to
24  *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25  *
26  *
27  *  libata documentation is available via 'make {ps|pdf}docs',
28  *  as Documentation/DocBook/libata.*
29  *
30  *  Hardware documentation available under NDA.
31  *
32  *
33  *  To-do list:
34  *  - VT6421 PATA support
35  *
36  */
37 
38 #include <linux/kernel.h>
39 #include <linux/module.h>
40 #include <linux/pci.h>
41 #include <linux/init.h>
42 #include <linux/blkdev.h>
43 #include <linux/delay.h>
44 #include <linux/device.h>
45 #include <scsi/scsi_host.h>
46 #include <linux/libata.h>
47 
48 #define DRV_NAME	"sata_via"
49 #define DRV_VERSION	"2.2"
50 
51 enum board_ids_enum {
52 	vt6420,
53 	vt6421,
54 };
55 
56 enum {
57 	SATA_CHAN_ENAB		= 0x40, /* SATA channel enable */
58 	SATA_INT_GATE		= 0x41, /* SATA interrupt gating */
59 	SATA_NATIVE_MODE	= 0x42, /* Native mode enable */
60 	SATA_PATA_SHARING	= 0x49, /* PATA/SATA sharing func ctrl */
61 	PATA_UDMA_TIMING	= 0xB3, /* PATA timing for DMA/ cable detect */
62 	PATA_PIO_TIMING		= 0xAB, /* PATA timing register */
63 
64 	PORT0			= (1 << 1),
65 	PORT1			= (1 << 0),
66 	ALL_PORTS		= PORT0 | PORT1,
67 
68 	NATIVE_MODE_ALL		= (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4),
69 
70 	SATA_EXT_PHY		= (1 << 6), /* 0==use PATA, 1==ext phy */
71 	SATA_2DEV		= (1 << 5), /* SATA is master/slave */
72 };
73 
74 static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
75 static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg);
76 static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
77 static void svia_noop_freeze(struct ata_port *ap);
78 static void vt6420_error_handler(struct ata_port *ap);
79 static int vt6421_pata_cable_detect(struct ata_port *ap);
80 static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev);
81 static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev);
82 
83 static const struct pci_device_id svia_pci_tbl[] = {
84 	{ PCI_VDEVICE(VIA, 0x5337), vt6420 },
85 	{ PCI_VDEVICE(VIA, 0x0591), vt6420 },
86 	{ PCI_VDEVICE(VIA, 0x3149), vt6420 },
87 	{ PCI_VDEVICE(VIA, 0x3249), vt6421 },
88 	{ PCI_VDEVICE(VIA, 0x5287), vt6420 },
89 	{ PCI_VDEVICE(VIA, 0x5372), vt6420 },
90 	{ PCI_VDEVICE(VIA, 0x7372), vt6420 },
91 
92 	{ }	/* terminate list */
93 };
94 
95 static struct pci_driver svia_pci_driver = {
96 	.name			= DRV_NAME,
97 	.id_table		= svia_pci_tbl,
98 	.probe			= svia_init_one,
99 #ifdef CONFIG_PM
100 	.suspend		= ata_pci_device_suspend,
101 	.resume			= ata_pci_device_resume,
102 #endif
103 	.remove			= ata_pci_remove_one,
104 };
105 
106 static struct scsi_host_template svia_sht = {
107 	.module			= THIS_MODULE,
108 	.name			= DRV_NAME,
109 	.ioctl			= ata_scsi_ioctl,
110 	.queuecommand		= ata_scsi_queuecmd,
111 	.can_queue		= ATA_DEF_QUEUE,
112 	.this_id		= ATA_SHT_THIS_ID,
113 	.sg_tablesize		= LIBATA_MAX_PRD,
114 	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
115 	.emulated		= ATA_SHT_EMULATED,
116 	.use_clustering		= ATA_SHT_USE_CLUSTERING,
117 	.proc_name		= DRV_NAME,
118 	.dma_boundary		= ATA_DMA_BOUNDARY,
119 	.slave_configure	= ata_scsi_slave_config,
120 	.slave_destroy		= ata_scsi_slave_destroy,
121 	.bios_param		= ata_std_bios_param,
122 };
123 
124 static const struct ata_port_operations vt6420_sata_ops = {
125 	.port_disable		= ata_port_disable,
126 
127 	.tf_load		= ata_tf_load,
128 	.tf_read		= ata_tf_read,
129 	.check_status		= ata_check_status,
130 	.exec_command		= ata_exec_command,
131 	.dev_select		= ata_std_dev_select,
132 
133 	.bmdma_setup            = ata_bmdma_setup,
134 	.bmdma_start            = ata_bmdma_start,
135 	.bmdma_stop		= ata_bmdma_stop,
136 	.bmdma_status		= ata_bmdma_status,
137 
138 	.qc_prep		= ata_qc_prep,
139 	.qc_issue		= ata_qc_issue_prot,
140 	.data_xfer		= ata_data_xfer,
141 
142 	.freeze			= svia_noop_freeze,
143 	.thaw			= ata_bmdma_thaw,
144 	.error_handler		= vt6420_error_handler,
145 	.post_internal_cmd	= ata_bmdma_post_internal_cmd,
146 
147 	.irq_clear		= ata_bmdma_irq_clear,
148 	.irq_on			= ata_irq_on,
149 	.irq_ack		= ata_irq_ack,
150 
151 	.port_start		= ata_port_start,
152 };
153 
154 static const struct ata_port_operations vt6421_pata_ops = {
155 	.port_disable		= ata_port_disable,
156 
157 	.set_piomode		= vt6421_set_pio_mode,
158 	.set_dmamode		= vt6421_set_dma_mode,
159 
160 	.tf_load		= ata_tf_load,
161 	.tf_read		= ata_tf_read,
162 	.check_status		= ata_check_status,
163 	.exec_command		= ata_exec_command,
164 	.dev_select		= ata_std_dev_select,
165 
166 	.bmdma_setup            = ata_bmdma_setup,
167 	.bmdma_start            = ata_bmdma_start,
168 	.bmdma_stop		= ata_bmdma_stop,
169 	.bmdma_status		= ata_bmdma_status,
170 
171 	.qc_prep		= ata_qc_prep,
172 	.qc_issue		= ata_qc_issue_prot,
173 	.data_xfer		= ata_data_xfer,
174 
175 	.freeze			= ata_bmdma_freeze,
176 	.thaw			= ata_bmdma_thaw,
177 	.error_handler		= ata_bmdma_error_handler,
178 	.post_internal_cmd	= ata_bmdma_post_internal_cmd,
179 	.cable_detect		= vt6421_pata_cable_detect,
180 
181 	.irq_clear		= ata_bmdma_irq_clear,
182 	.irq_on			= ata_irq_on,
183 	.irq_ack		= ata_irq_ack,
184 
185 	.port_start		= ata_port_start,
186 };
187 
188 static const struct ata_port_operations vt6421_sata_ops = {
189 	.port_disable		= ata_port_disable,
190 
191 	.tf_load		= ata_tf_load,
192 	.tf_read		= ata_tf_read,
193 	.check_status		= ata_check_status,
194 	.exec_command		= ata_exec_command,
195 	.dev_select		= ata_std_dev_select,
196 
197 	.bmdma_setup            = ata_bmdma_setup,
198 	.bmdma_start            = ata_bmdma_start,
199 	.bmdma_stop		= ata_bmdma_stop,
200 	.bmdma_status		= ata_bmdma_status,
201 
202 	.qc_prep		= ata_qc_prep,
203 	.qc_issue		= ata_qc_issue_prot,
204 	.data_xfer		= ata_data_xfer,
205 
206 	.freeze			= ata_bmdma_freeze,
207 	.thaw			= ata_bmdma_thaw,
208 	.error_handler		= ata_bmdma_error_handler,
209 	.post_internal_cmd	= ata_bmdma_post_internal_cmd,
210 	.cable_detect		= ata_cable_sata,
211 
212 	.irq_clear		= ata_bmdma_irq_clear,
213 	.irq_on			= ata_irq_on,
214 	.irq_ack		= ata_irq_ack,
215 
216 	.scr_read		= svia_scr_read,
217 	.scr_write		= svia_scr_write,
218 
219 	.port_start		= ata_port_start,
220 };
221 
222 static const struct ata_port_info vt6420_port_info = {
223 	.flags		= ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
224 	.pio_mask	= 0x1f,
225 	.mwdma_mask	= 0x07,
226 	.udma_mask	= ATA_UDMA6,
227 	.port_ops	= &vt6420_sata_ops,
228 };
229 
230 static struct ata_port_info vt6421_sport_info = {
231 	.flags		= ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
232 	.pio_mask	= 0x1f,
233 	.mwdma_mask	= 0x07,
234 	.udma_mask	= ATA_UDMA6,
235 	.port_ops	= &vt6421_sata_ops,
236 };
237 
238 static struct ata_port_info vt6421_pport_info = {
239 	.flags		= ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_LEGACY,
240 	.pio_mask	= 0x1f,
241 	.mwdma_mask	= 0,
242 	.udma_mask	= ATA_UDMA6,
243 	.port_ops	= &vt6421_pata_ops,
244 };
245 
246 MODULE_AUTHOR("Jeff Garzik");
247 MODULE_DESCRIPTION("SCSI low-level driver for VIA SATA controllers");
248 MODULE_LICENSE("GPL");
249 MODULE_DEVICE_TABLE(pci, svia_pci_tbl);
250 MODULE_VERSION(DRV_VERSION);
251 
252 static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg)
253 {
254 	if (sc_reg > SCR_CONTROL)
255 		return 0xffffffffU;
256 	return ioread32(ap->ioaddr.scr_addr + (4 * sc_reg));
257 }
258 
259 static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
260 {
261 	if (sc_reg > SCR_CONTROL)
262 		return;
263 	iowrite32(val, ap->ioaddr.scr_addr + (4 * sc_reg));
264 }
265 
266 static void svia_noop_freeze(struct ata_port *ap)
267 {
268 	/* Some VIA controllers choke if ATA_NIEN is manipulated in
269 	 * certain way.  Leave it alone and just clear pending IRQ.
270 	 */
271 	ata_chk_status(ap);
272 	ata_bmdma_irq_clear(ap);
273 }
274 
275 /**
276  *	vt6420_prereset - prereset for vt6420
277  *	@ap: target ATA port
278  *	@deadline: deadline jiffies for the operation
279  *
280  *	SCR registers on vt6420 are pieces of shit and may hang the
281  *	whole machine completely if accessed with the wrong timing.
282  *	To avoid such catastrophe, vt6420 doesn't provide generic SCR
283  *	access operations, but uses SStatus and SControl only during
284  *	boot probing in controlled way.
285  *
286  *	As the old (pre EH update) probing code is proven to work, we
287  *	strictly follow the access pattern.
288  *
289  *	LOCKING:
290  *	Kernel thread context (may sleep)
291  *
292  *	RETURNS:
293  *	0 on success, -errno otherwise.
294  */
295 static int vt6420_prereset(struct ata_port *ap, unsigned long deadline)
296 {
297 	struct ata_eh_context *ehc = &ap->eh_context;
298 	unsigned long timeout = jiffies + (HZ * 5);
299 	u32 sstatus, scontrol;
300 	int online;
301 
302 	/* don't do any SCR stuff if we're not loading */
303 	if (!(ap->pflags & ATA_PFLAG_LOADING))
304 		goto skip_scr;
305 
306 	/* Resume phy.  This is the old SATA resume sequence */
307 	svia_scr_write(ap, SCR_CONTROL, 0x300);
308 	svia_scr_read(ap, SCR_CONTROL); /* flush */
309 
310 	/* wait for phy to become ready, if necessary */
311 	do {
312 		msleep(200);
313 		if ((svia_scr_read(ap, SCR_STATUS) & 0xf) != 1)
314 			break;
315 	} while (time_before(jiffies, timeout));
316 
317 	/* open code sata_print_link_status() */
318 	sstatus = svia_scr_read(ap, SCR_STATUS);
319 	scontrol = svia_scr_read(ap, SCR_CONTROL);
320 
321 	online = (sstatus & 0xf) == 0x3;
322 
323 	ata_port_printk(ap, KERN_INFO,
324 			"SATA link %s 1.5 Gbps (SStatus %X SControl %X)\n",
325 			online ? "up" : "down", sstatus, scontrol);
326 
327 	/* SStatus is read one more time */
328 	svia_scr_read(ap, SCR_STATUS);
329 
330 	if (!online) {
331 		/* tell EH to bail */
332 		ehc->i.action &= ~ATA_EH_RESET_MASK;
333 		return 0;
334 	}
335 
336  skip_scr:
337 	/* wait for !BSY */
338 	ata_wait_ready(ap, deadline);
339 
340 	return 0;
341 }
342 
343 static void vt6420_error_handler(struct ata_port *ap)
344 {
345 	return ata_bmdma_drive_eh(ap, vt6420_prereset, ata_std_softreset,
346 				  NULL, ata_std_postreset);
347 }
348 
349 static int vt6421_pata_cable_detect(struct ata_port *ap)
350 {
351 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
352 	u8 tmp;
353 
354 	pci_read_config_byte(pdev, PATA_UDMA_TIMING, &tmp);
355 	if (tmp & 0x10)
356 		return ATA_CBL_PATA40;
357 	return ATA_CBL_PATA80;
358 }
359 
360 static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
361 {
362 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
363 	static const u8 pio_bits[] = { 0xA8, 0x65, 0x65, 0x31, 0x20 };
364 	pci_write_config_byte(pdev, PATA_PIO_TIMING, pio_bits[adev->pio_mode - XFER_PIO_0]);
365 }
366 
367 static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
368 {
369 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
370 	static const u8 udma_bits[] = { 0xEE, 0xE8, 0xE6, 0xE4, 0xE2, 0xE1, 0xE0, 0xE0 };
371 	pci_write_config_byte(pdev, PATA_UDMA_TIMING, udma_bits[adev->pio_mode - XFER_UDMA_0]);
372 }
373 
374 static const unsigned int svia_bar_sizes[] = {
375 	8, 4, 8, 4, 16, 256
376 };
377 
378 static const unsigned int vt6421_bar_sizes[] = {
379 	16, 16, 16, 16, 32, 128
380 };
381 
382 static void __iomem * svia_scr_addr(void __iomem *addr, unsigned int port)
383 {
384 	return addr + (port * 128);
385 }
386 
387 static void __iomem * vt6421_scr_addr(void __iomem *addr, unsigned int port)
388 {
389 	return addr + (port * 64);
390 }
391 
392 static void vt6421_init_addrs(struct ata_port *ap)
393 {
394 	void __iomem * const * iomap = ap->host->iomap;
395 	void __iomem *reg_addr = iomap[ap->port_no];
396 	void __iomem *bmdma_addr = iomap[4] + (ap->port_no * 8);
397 	struct ata_ioports *ioaddr = &ap->ioaddr;
398 
399 	ioaddr->cmd_addr = reg_addr;
400 	ioaddr->altstatus_addr =
401 	ioaddr->ctl_addr = (void __iomem *)
402 		((unsigned long)(reg_addr + 8) | ATA_PCI_CTL_OFS);
403 	ioaddr->bmdma_addr = bmdma_addr;
404 	ioaddr->scr_addr = vt6421_scr_addr(iomap[5], ap->port_no);
405 
406 	ata_std_ports(ioaddr);
407 }
408 
409 static int vt6420_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
410 {
411 	const struct ata_port_info *ppi[] = { &vt6420_port_info, NULL };
412 	struct ata_host *host;
413 	int rc;
414 
415 	rc = ata_pci_prepare_native_host(pdev, ppi, &host);
416 	if (rc)
417 		return rc;
418 	*r_host = host;
419 
420 	rc = pcim_iomap_regions(pdev, 1 << 5, DRV_NAME);
421 	if (rc) {
422 		dev_printk(KERN_ERR, &pdev->dev, "failed to iomap PCI BAR 5\n");
423 		return rc;
424 	}
425 
426 	host->ports[0]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 0);
427 	host->ports[1]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 1);
428 
429 	return 0;
430 }
431 
432 static int vt6421_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
433 {
434 	const struct ata_port_info *ppi[] =
435 		{ &vt6421_sport_info, &vt6421_sport_info, &vt6421_pport_info };
436 	struct ata_host *host;
437 	int i, rc;
438 
439 	*r_host = host = ata_host_alloc_pinfo(&pdev->dev, ppi, ARRAY_SIZE(ppi));
440 	if (!host) {
441 		dev_printk(KERN_ERR, &pdev->dev, "failed to allocate host\n");
442 		return -ENOMEM;
443 	}
444 
445 	rc = pcim_iomap_regions(pdev, 0x3f, DRV_NAME);
446 	if (rc) {
447 		dev_printk(KERN_ERR, &pdev->dev, "failed to request/iomap "
448 			   "PCI BARs (errno=%d)\n", rc);
449 		return rc;
450 	}
451 	host->iomap = pcim_iomap_table(pdev);
452 
453 	for (i = 0; i < host->n_ports; i++)
454 		vt6421_init_addrs(host->ports[i]);
455 
456 	rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
457 	if (rc)
458 		return rc;
459 	rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
460 	if (rc)
461 		return rc;
462 
463 	return 0;
464 }
465 
466 static void svia_configure(struct pci_dev *pdev)
467 {
468 	u8 tmp8;
469 
470 	pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &tmp8);
471 	dev_printk(KERN_INFO, &pdev->dev, "routed to hard irq line %d\n",
472 	       (int) (tmp8 & 0xf0) == 0xf0 ? 0 : tmp8 & 0x0f);
473 
474 	/* make sure SATA channels are enabled */
475 	pci_read_config_byte(pdev, SATA_CHAN_ENAB, &tmp8);
476 	if ((tmp8 & ALL_PORTS) != ALL_PORTS) {
477 		dev_printk(KERN_DEBUG, &pdev->dev,
478 			   "enabling SATA channels (0x%x)\n",
479 		           (int) tmp8);
480 		tmp8 |= ALL_PORTS;
481 		pci_write_config_byte(pdev, SATA_CHAN_ENAB, tmp8);
482 	}
483 
484 	/* make sure interrupts for each channel sent to us */
485 	pci_read_config_byte(pdev, SATA_INT_GATE, &tmp8);
486 	if ((tmp8 & ALL_PORTS) != ALL_PORTS) {
487 		dev_printk(KERN_DEBUG, &pdev->dev,
488 			   "enabling SATA channel interrupts (0x%x)\n",
489 		           (int) tmp8);
490 		tmp8 |= ALL_PORTS;
491 		pci_write_config_byte(pdev, SATA_INT_GATE, tmp8);
492 	}
493 
494 	/* make sure native mode is enabled */
495 	pci_read_config_byte(pdev, SATA_NATIVE_MODE, &tmp8);
496 	if ((tmp8 & NATIVE_MODE_ALL) != NATIVE_MODE_ALL) {
497 		dev_printk(KERN_DEBUG, &pdev->dev,
498 			   "enabling SATA channel native mode (0x%x)\n",
499 		           (int) tmp8);
500 		tmp8 |= NATIVE_MODE_ALL;
501 		pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8);
502 	}
503 }
504 
505 static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
506 {
507 	static int printed_version;
508 	unsigned int i;
509 	int rc;
510 	struct ata_host *host;
511 	int board_id = (int) ent->driver_data;
512 	const int *bar_sizes;
513 	u8 tmp8;
514 
515 	if (!printed_version++)
516 		dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
517 
518 	rc = pcim_enable_device(pdev);
519 	if (rc)
520 		return rc;
521 
522 	if (board_id == vt6420) {
523 		pci_read_config_byte(pdev, SATA_PATA_SHARING, &tmp8);
524 		if (tmp8 & SATA_2DEV) {
525 			dev_printk(KERN_ERR, &pdev->dev,
526 				   "SATA master/slave not supported (0x%x)\n",
527 		       		   (int) tmp8);
528 			return -EIO;
529 		}
530 
531 		bar_sizes = &svia_bar_sizes[0];
532 	} else {
533 		bar_sizes = &vt6421_bar_sizes[0];
534 	}
535 
536 	for (i = 0; i < ARRAY_SIZE(svia_bar_sizes); i++)
537 		if ((pci_resource_start(pdev, i) == 0) ||
538 		    (pci_resource_len(pdev, i) < bar_sizes[i])) {
539 			dev_printk(KERN_ERR, &pdev->dev,
540 				"invalid PCI BAR %u (sz 0x%llx, val 0x%llx)\n",
541 				i,
542 			        (unsigned long long)pci_resource_start(pdev, i),
543 			        (unsigned long long)pci_resource_len(pdev, i));
544 			return -ENODEV;
545 		}
546 
547 	if (board_id == vt6420)
548 		rc = vt6420_prepare_host(pdev, &host);
549 	else
550 		rc = vt6421_prepare_host(pdev, &host);
551 	if (rc)
552 		return rc;
553 
554 	svia_configure(pdev);
555 
556 	pci_set_master(pdev);
557 	return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED,
558 				 &svia_sht);
559 }
560 
561 static int __init svia_init(void)
562 {
563 	return pci_register_driver(&svia_pci_driver);
564 }
565 
566 static void __exit svia_exit(void)
567 {
568 	pci_unregister_driver(&svia_pci_driver);
569 }
570 
571 module_init(svia_init);
572 module_exit(svia_exit);
573