1 /* 2 * sata_uli.c - ULi Electronics SATA 3 * 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2, or (at your option) 8 * any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; see the file COPYING. If not, write to 17 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 18 * 19 * 20 * libata documentation is available via 'make {ps|pdf}docs', 21 * as Documentation/DocBook/libata.* 22 * 23 * Hardware documentation available under NDA. 24 * 25 */ 26 27 #include <linux/kernel.h> 28 #include <linux/module.h> 29 #include <linux/gfp.h> 30 #include <linux/pci.h> 31 #include <linux/init.h> 32 #include <linux/blkdev.h> 33 #include <linux/delay.h> 34 #include <linux/interrupt.h> 35 #include <linux/device.h> 36 #include <scsi/scsi_host.h> 37 #include <linux/libata.h> 38 39 #define DRV_NAME "sata_uli" 40 #define DRV_VERSION "1.3" 41 42 enum { 43 uli_5289 = 0, 44 uli_5287 = 1, 45 uli_5281 = 2, 46 47 uli_max_ports = 4, 48 49 /* PCI configuration registers */ 50 ULI5287_BASE = 0x90, /* sata0 phy SCR registers */ 51 ULI5287_OFFS = 0x10, /* offset from sata0->sata1 phy regs */ 52 ULI5281_BASE = 0x60, /* sata0 phy SCR registers */ 53 ULI5281_OFFS = 0x60, /* offset from sata0->sata1 phy regs */ 54 }; 55 56 struct uli_priv { 57 unsigned int scr_cfg_addr[uli_max_ports]; 58 }; 59 60 static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); 61 static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); 62 static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); 63 64 static const struct pci_device_id uli_pci_tbl[] = { 65 { PCI_VDEVICE(AL, 0x5289), uli_5289 }, 66 { PCI_VDEVICE(AL, 0x5287), uli_5287 }, 67 { PCI_VDEVICE(AL, 0x5281), uli_5281 }, 68 69 { } /* terminate list */ 70 }; 71 72 static struct pci_driver uli_pci_driver = { 73 .name = DRV_NAME, 74 .id_table = uli_pci_tbl, 75 .probe = uli_init_one, 76 .remove = ata_pci_remove_one, 77 }; 78 79 static struct scsi_host_template uli_sht = { 80 ATA_BMDMA_SHT(DRV_NAME), 81 }; 82 83 static struct ata_port_operations uli_ops = { 84 .inherits = &ata_bmdma_port_ops, 85 .scr_read = uli_scr_read, 86 .scr_write = uli_scr_write, 87 .hardreset = ATA_OP_NULL, 88 }; 89 90 static const struct ata_port_info uli_port_info = { 91 .flags = ATA_FLAG_SATA | ATA_FLAG_IGN_SIMPLEX, 92 .pio_mask = ATA_PIO4, 93 .udma_mask = ATA_UDMA6, 94 .port_ops = &uli_ops, 95 }; 96 97 98 MODULE_AUTHOR("Peer Chen"); 99 MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller"); 100 MODULE_LICENSE("GPL"); 101 MODULE_DEVICE_TABLE(pci, uli_pci_tbl); 102 MODULE_VERSION(DRV_VERSION); 103 104 static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg) 105 { 106 struct uli_priv *hpriv = ap->host->private_data; 107 return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg); 108 } 109 110 static u32 uli_scr_cfg_read(struct ata_link *link, unsigned int sc_reg) 111 { 112 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); 113 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg); 114 u32 val; 115 116 pci_read_config_dword(pdev, cfg_addr, &val); 117 return val; 118 } 119 120 static void uli_scr_cfg_write(struct ata_link *link, unsigned int scr, u32 val) 121 { 122 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); 123 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr); 124 125 pci_write_config_dword(pdev, cfg_addr, val); 126 } 127 128 static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) 129 { 130 if (sc_reg > SCR_CONTROL) 131 return -EINVAL; 132 133 *val = uli_scr_cfg_read(link, sc_reg); 134 return 0; 135 } 136 137 static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) 138 { 139 if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0 140 return -EINVAL; 141 142 uli_scr_cfg_write(link, sc_reg, val); 143 return 0; 144 } 145 146 static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 147 { 148 static int printed_version; 149 const struct ata_port_info *ppi[] = { &uli_port_info, NULL }; 150 unsigned int board_idx = (unsigned int) ent->driver_data; 151 struct ata_host *host; 152 struct uli_priv *hpriv; 153 void __iomem * const *iomap; 154 struct ata_ioports *ioaddr; 155 int n_ports, rc; 156 157 if (!printed_version++) 158 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); 159 160 rc = pcim_enable_device(pdev); 161 if (rc) 162 return rc; 163 164 n_ports = 2; 165 if (board_idx == uli_5287) 166 n_ports = 4; 167 168 /* allocate the host */ 169 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports); 170 if (!host) 171 return -ENOMEM; 172 173 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL); 174 if (!hpriv) 175 return -ENOMEM; 176 host->private_data = hpriv; 177 178 /* the first two ports are standard SFF */ 179 rc = ata_pci_sff_init_host(host); 180 if (rc) 181 return rc; 182 183 ata_pci_bmdma_init(host); 184 185 iomap = host->iomap; 186 187 switch (board_idx) { 188 case uli_5287: 189 /* If there are four, the last two live right after 190 * the standard SFF ports. 191 */ 192 hpriv->scr_cfg_addr[0] = ULI5287_BASE; 193 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS; 194 195 ioaddr = &host->ports[2]->ioaddr; 196 ioaddr->cmd_addr = iomap[0] + 8; 197 ioaddr->altstatus_addr = 198 ioaddr->ctl_addr = (void __iomem *) 199 ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4; 200 ioaddr->bmdma_addr = iomap[4] + 16; 201 hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4; 202 ata_sff_std_ports(ioaddr); 203 204 ata_port_desc(host->ports[2], 205 "cmd 0x%llx ctl 0x%llx bmdma 0x%llx", 206 (unsigned long long)pci_resource_start(pdev, 0) + 8, 207 ((unsigned long long)pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4, 208 (unsigned long long)pci_resource_start(pdev, 4) + 16); 209 210 ioaddr = &host->ports[3]->ioaddr; 211 ioaddr->cmd_addr = iomap[2] + 8; 212 ioaddr->altstatus_addr = 213 ioaddr->ctl_addr = (void __iomem *) 214 ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4; 215 ioaddr->bmdma_addr = iomap[4] + 24; 216 hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5; 217 ata_sff_std_ports(ioaddr); 218 219 ata_port_desc(host->ports[2], 220 "cmd 0x%llx ctl 0x%llx bmdma 0x%llx", 221 (unsigned long long)pci_resource_start(pdev, 2) + 9, 222 ((unsigned long long)pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4, 223 (unsigned long long)pci_resource_start(pdev, 4) + 24); 224 225 break; 226 227 case uli_5289: 228 hpriv->scr_cfg_addr[0] = ULI5287_BASE; 229 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS; 230 break; 231 232 case uli_5281: 233 hpriv->scr_cfg_addr[0] = ULI5281_BASE; 234 hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS; 235 break; 236 237 default: 238 BUG(); 239 break; 240 } 241 242 pci_set_master(pdev); 243 pci_intx(pdev, 1); 244 return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt, 245 IRQF_SHARED, &uli_sht); 246 } 247 248 static int __init uli_init(void) 249 { 250 return pci_register_driver(&uli_pci_driver); 251 } 252 253 static void __exit uli_exit(void) 254 { 255 pci_unregister_driver(&uli_pci_driver); 256 } 257 258 259 module_init(uli_init); 260 module_exit(uli_exit); 261