xref: /openbmc/linux/drivers/ata/pata_sl82c105.c (revision b34e08d5)
1 /*
2  * pata_sl82c105.c 	- SL82C105 PATA for new ATA layer
3  *			  (C) 2005 Red Hat Inc
4  *			  (C) 2011 Bartlomiej Zolnierkiewicz
5  *
6  * Based in part on linux/drivers/ide/pci/sl82c105.c
7  * 		SL82C105/Winbond 553 IDE driver
8  *
9  * and in part on the documentation and errata sheet
10  *
11  *
12  * Note: The controller like many controllers has shared timings for
13  * PIO and DMA. We thus flip to the DMA timings in dma_start and flip back
14  * in the dma_stop function. Thus we actually don't need a set_dmamode
15  * method as the PIO method is always called and will set the right PIO
16  * timing parameters.
17  */
18 
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/pci.h>
22 #include <linux/blkdev.h>
23 #include <linux/delay.h>
24 #include <scsi/scsi_host.h>
25 #include <linux/libata.h>
26 
27 #define DRV_NAME "pata_sl82c105"
28 #define DRV_VERSION "0.3.3"
29 
30 enum {
31 	/*
32 	 * SL82C105 PCI config register 0x40 bits.
33 	 */
34 	CTRL_IDE_IRQB	=	(1 << 30),
35 	CTRL_IDE_IRQA   =	(1 << 28),
36 	CTRL_LEGIRQ     =	(1 << 11),
37 	CTRL_P1F16      =	(1 << 5),
38 	CTRL_P1EN       =	(1 << 4),
39 	CTRL_P0F16      =	(1 << 1),
40 	CTRL_P0EN       =	(1 << 0)
41 };
42 
43 /**
44  *	sl82c105_pre_reset		-	probe begin
45  *	@link: ATA link
46  *	@deadline: deadline jiffies for the operation
47  *
48  *	Set up cable type and use generic probe init
49  */
50 
51 static int sl82c105_pre_reset(struct ata_link *link, unsigned long deadline)
52 {
53 	static const struct pci_bits sl82c105_enable_bits[] = {
54 		{ 0x40, 1, 0x01, 0x01 },
55 		{ 0x40, 1, 0x10, 0x10 }
56 	};
57 	struct ata_port *ap = link->ap;
58 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
59 
60 	if (ap->port_no && !pci_test_config_bits(pdev, &sl82c105_enable_bits[ap->port_no]))
61 		return -ENOENT;
62 	return ata_sff_prereset(link, deadline);
63 }
64 
65 
66 /**
67  *	sl82c105_configure_piomode	-	set chip PIO timing
68  *	@ap: ATA interface
69  *	@adev: ATA device
70  *	@pio: PIO mode
71  *
72  *	Called to do the PIO mode setup. Our timing registers are shared
73  *	so a configure_dmamode call will undo any work we do here and vice
74  *	versa
75  */
76 
77 static void sl82c105_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio)
78 {
79 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
80 	static u16 pio_timing[5] = {
81 		0x50D, 0x407, 0x304, 0x242, 0x240
82 	};
83 	u16 dummy;
84 	int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno);
85 
86 	pci_write_config_word(pdev, timing, pio_timing[pio]);
87 	/* Can we lose this oddity of the old driver */
88 	pci_read_config_word(pdev, timing, &dummy);
89 }
90 
91 /**
92  *	sl82c105_set_piomode	-	set initial PIO mode data
93  *	@ap: ATA interface
94  *	@adev: ATA device
95  *
96  *	Called to do the PIO mode setup. Our timing registers are shared
97  *	but we want to set the PIO timing by default.
98  */
99 
100 static void sl82c105_set_piomode(struct ata_port *ap, struct ata_device *adev)
101 {
102 	sl82c105_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
103 }
104 
105 /**
106  *	sl82c105_configure_dmamode	-	set DMA mode in chip
107  *	@ap: ATA interface
108  *	@adev: ATA device
109  *
110  *	Load DMA cycle times into the chip ready for a DMA transfer
111  *	to occur.
112  */
113 
114 static void sl82c105_configure_dmamode(struct ata_port *ap, struct ata_device *adev)
115 {
116 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
117 	static u16 dma_timing[3] = {
118 		0x707, 0x201, 0x200
119 	};
120 	u16 dummy;
121 	int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno);
122 	int dma = adev->dma_mode - XFER_MW_DMA_0;
123 
124 	pci_write_config_word(pdev, timing, dma_timing[dma]);
125 	/* Can we lose this oddity of the old driver */
126 	pci_read_config_word(pdev, timing, &dummy);
127 }
128 
129 /**
130  *	sl82c105_reset_engine	-	Reset the DMA engine
131  *	@ap: ATA interface
132  *
133  *	The sl82c105 has some serious problems with the DMA engine
134  *	when transfers don't run as expected or ATAPI is used. The
135  *	recommended fix is to reset the engine each use using a chip
136  *	test register.
137  */
138 
139 static void sl82c105_reset_engine(struct ata_port *ap)
140 {
141 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
142 	u16 val;
143 
144 	pci_read_config_word(pdev, 0x7E, &val);
145 	pci_write_config_word(pdev, 0x7E, val | 4);
146 	pci_write_config_word(pdev, 0x7E, val & ~4);
147 }
148 
149 /**
150  *	sl82c105_bmdma_start		-	DMA engine begin
151  *	@qc: ATA command
152  *
153  *	Reset the DMA engine each use as recommended by the errata
154  *	document.
155  *
156  *	FIXME: if we switch clock at BMDMA start/end we might get better
157  *	PIO performance on DMA capable devices.
158  */
159 
160 static void sl82c105_bmdma_start(struct ata_queued_cmd *qc)
161 {
162 	struct ata_port *ap = qc->ap;
163 
164 	udelay(100);
165 	sl82c105_reset_engine(ap);
166 	udelay(100);
167 
168 	/* Set the clocks for DMA */
169 	sl82c105_configure_dmamode(ap, qc->dev);
170 	/* Activate DMA */
171 	ata_bmdma_start(qc);
172 }
173 
174 /**
175  *	sl82c105_bmdma_end		-	DMA engine stop
176  *	@qc: ATA command
177  *
178  *	Reset the DMA engine each use as recommended by the errata
179  *	document.
180  *
181  *	This function is also called to turn off DMA when a timeout occurs
182  *	during DMA operation. In both cases we need to reset the engine,
183  *	so no actual eng_timeout handler is required.
184  *
185  *	We assume bmdma_stop is always called if bmdma_start as called. If
186  *	not then we may need to wrap qc_issue.
187  */
188 
189 static void sl82c105_bmdma_stop(struct ata_queued_cmd *qc)
190 {
191 	struct ata_port *ap = qc->ap;
192 
193 	ata_bmdma_stop(qc);
194 	sl82c105_reset_engine(ap);
195 	udelay(100);
196 
197 	/* This will redo the initial setup of the DMA device to matching
198 	   PIO timings */
199 	sl82c105_set_piomode(ap, qc->dev);
200 }
201 
202 /**
203  *	sl82c105_qc_defer	-	implement serialization
204  *	@qc: command
205  *
206  *	We must issue one command per host not per channel because
207  *	of the reset bug.
208  *
209  *	Q: is the scsi host lock sufficient ?
210  */
211 
212 static int sl82c105_qc_defer(struct ata_queued_cmd *qc)
213 {
214 	struct ata_host *host = qc->ap->host;
215 	struct ata_port *alt = host->ports[1 ^ qc->ap->port_no];
216 	int rc;
217 
218 	/* First apply the usual rules */
219 	rc = ata_std_qc_defer(qc);
220 	if (rc != 0)
221 		return rc;
222 
223 	/* Now apply serialization rules. Only allow a command if the
224 	   other channel state machine is idle */
225 	if (alt && alt->qc_active)
226 		return	ATA_DEFER_PORT;
227 	return 0;
228 }
229 
230 static bool sl82c105_sff_irq_check(struct ata_port *ap)
231 {
232 	struct pci_dev *pdev	= to_pci_dev(ap->host->dev);
233 	u32 val, mask		= ap->port_no ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
234 
235 	pci_read_config_dword(pdev, 0x40, &val);
236 
237 	return val & mask;
238 }
239 
240 static struct scsi_host_template sl82c105_sht = {
241 	ATA_BMDMA_SHT(DRV_NAME),
242 };
243 
244 static struct ata_port_operations sl82c105_port_ops = {
245 	.inherits	= &ata_bmdma_port_ops,
246 	.qc_defer	= sl82c105_qc_defer,
247 	.bmdma_start 	= sl82c105_bmdma_start,
248 	.bmdma_stop	= sl82c105_bmdma_stop,
249 	.cable_detect	= ata_cable_40wire,
250 	.set_piomode	= sl82c105_set_piomode,
251 	.prereset	= sl82c105_pre_reset,
252 	.sff_irq_check	= sl82c105_sff_irq_check,
253 };
254 
255 /**
256  *	sl82c105_bridge_revision	-	find bridge version
257  *	@pdev: PCI device for the ATA function
258  *
259  *	Locates the PCI bridge associated with the ATA function and
260  *	providing it is a Winbond 553 reports the revision. If it cannot
261  *	find a revision or the right device it returns -1
262  */
263 
264 static int sl82c105_bridge_revision(struct pci_dev *pdev)
265 {
266 	struct pci_dev *bridge;
267 
268 	/*
269 	 * The bridge should be part of the same device, but function 0.
270 	 */
271 	bridge = pci_get_slot(pdev->bus,
272 			       PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
273 	if (!bridge)
274 		return -1;
275 
276 	/*
277 	 * Make sure it is a Winbond 553 and is an ISA bridge.
278 	 */
279 	if (bridge->vendor != PCI_VENDOR_ID_WINBOND ||
280 	    bridge->device != PCI_DEVICE_ID_WINBOND_83C553 ||
281 	    bridge->class >> 8 != PCI_CLASS_BRIDGE_ISA) {
282 	    	pci_dev_put(bridge);
283 		return -1;
284 	}
285 	/*
286 	 * We need to find function 0's revision, not function 1
287 	 */
288 	pci_dev_put(bridge);
289 	return bridge->revision;
290 }
291 
292 static void sl82c105_fixup(struct pci_dev *pdev)
293 {
294 	u32 val;
295 
296 	pci_read_config_dword(pdev, 0x40, &val);
297 	val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
298 	pci_write_config_dword(pdev, 0x40, val);
299 }
300 
301 static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id)
302 {
303 	static const struct ata_port_info info_dma = {
304 		.flags = ATA_FLAG_SLAVE_POSS,
305 		.pio_mask = ATA_PIO4,
306 		.mwdma_mask = ATA_MWDMA2,
307 		.port_ops = &sl82c105_port_ops
308 	};
309 	static const struct ata_port_info info_early = {
310 		.flags = ATA_FLAG_SLAVE_POSS,
311 		.pio_mask = ATA_PIO4,
312 		.port_ops = &sl82c105_port_ops
313 	};
314 	/* for now use only the first port */
315 	const struct ata_port_info *ppi[] = { &info_early,
316 					       NULL };
317 	int rev;
318 	int rc;
319 
320 	rc = pcim_enable_device(dev);
321 	if (rc)
322 		return rc;
323 
324 	rev = sl82c105_bridge_revision(dev);
325 
326 	if (rev == -1)
327 		dev_warn(&dev->dev,
328 			 "pata_sl82c105: Unable to find bridge, disabling DMA\n");
329 	else if (rev <= 5)
330 		dev_warn(&dev->dev,
331 			 "pata_sl82c105: Early bridge revision, no DMA available\n");
332 	else
333 		ppi[0] = &info_dma;
334 
335 	sl82c105_fixup(dev);
336 
337 	return ata_pci_bmdma_init_one(dev, ppi, &sl82c105_sht, NULL, 0);
338 }
339 
340 #ifdef CONFIG_PM
341 static int sl82c105_reinit_one(struct pci_dev *pdev)
342 {
343 	struct ata_host *host = pci_get_drvdata(pdev);
344 	int rc;
345 
346 	rc = ata_pci_device_do_resume(pdev);
347 	if (rc)
348 		return rc;
349 
350 	sl82c105_fixup(pdev);
351 
352 	ata_host_resume(host);
353 	return 0;
354 }
355 #endif
356 
357 static const struct pci_device_id sl82c105[] = {
358 	{ PCI_VDEVICE(WINBOND, PCI_DEVICE_ID_WINBOND_82C105), },
359 
360 	{ },
361 };
362 
363 static struct pci_driver sl82c105_pci_driver = {
364 	.name 		= DRV_NAME,
365 	.id_table	= sl82c105,
366 	.probe 		= sl82c105_init_one,
367 	.remove		= ata_pci_remove_one,
368 #ifdef CONFIG_PM
369 	.suspend	= ata_pci_device_suspend,
370 	.resume		= sl82c105_reinit_one,
371 #endif
372 };
373 
374 module_pci_driver(sl82c105_pci_driver);
375 
376 MODULE_AUTHOR("Alan Cox");
377 MODULE_DESCRIPTION("low-level driver for Sl82c105");
378 MODULE_LICENSE("GPL");
379 MODULE_DEVICE_TABLE(pci, sl82c105);
380 MODULE_VERSION(DRV_VERSION);
381