1669a5db4SJeff Garzik /* 2669a5db4SJeff Garzik * pata_sis.c - SiS ATA driver 3669a5db4SJeff Garzik * 4669a5db4SJeff Garzik * (C) 2005 Red Hat <alan@redhat.com> 5669a5db4SJeff Garzik * 6669a5db4SJeff Garzik * Based upon linux/drivers/ide/pci/sis5513.c 7669a5db4SJeff Garzik * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> 8669a5db4SJeff Garzik * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer 9669a5db4SJeff Garzik * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz> 10669a5db4SJeff Garzik * SiS Taiwan : for direct support and hardware. 11669a5db4SJeff Garzik * Daniela Engert : for initial ATA100 advices and numerous others. 12669a5db4SJeff Garzik * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt : 13669a5db4SJeff Garzik * for checking code correctness, providing patches. 14669a5db4SJeff Garzik * Original tests and design on the SiS620 chipset. 15669a5db4SJeff Garzik * ATA100 tests and design on the SiS735 chipset. 16669a5db4SJeff Garzik * ATA16/33 support from specs 17669a5db4SJeff Garzik * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw> 18669a5db4SJeff Garzik * 19669a5db4SJeff Garzik * 20669a5db4SJeff Garzik * TODO 21669a5db4SJeff Garzik * Check MWDMA on drives that don't support MWDMA speed pio cycles ? 22669a5db4SJeff Garzik * More Testing 23669a5db4SJeff Garzik */ 24669a5db4SJeff Garzik 25669a5db4SJeff Garzik #include <linux/kernel.h> 26669a5db4SJeff Garzik #include <linux/module.h> 27669a5db4SJeff Garzik #include <linux/pci.h> 28669a5db4SJeff Garzik #include <linux/init.h> 29669a5db4SJeff Garzik #include <linux/blkdev.h> 30669a5db4SJeff Garzik #include <linux/delay.h> 31669a5db4SJeff Garzik #include <linux/device.h> 32669a5db4SJeff Garzik #include <scsi/scsi_host.h> 33669a5db4SJeff Garzik #include <linux/libata.h> 34669a5db4SJeff Garzik #include <linux/ata.h> 35669a5db4SJeff Garzik 36669a5db4SJeff Garzik #define DRV_NAME "pata_sis" 37af323a2fSAlan Cox #define DRV_VERSION "0.4.3" 38669a5db4SJeff Garzik 39669a5db4SJeff Garzik struct sis_chipset { 40669a5db4SJeff Garzik u16 device; /* PCI host ID */ 41669a5db4SJeff Garzik struct ata_port_info *info; /* Info block */ 42669a5db4SJeff Garzik /* Probably add family, cable detect type etc here to clean 43669a5db4SJeff Garzik up code later */ 44669a5db4SJeff Garzik }; 45669a5db4SJeff Garzik 46669a5db4SJeff Garzik /** 47669a5db4SJeff Garzik * sis_port_base - return PCI configuration base for dev 48669a5db4SJeff Garzik * @adev: device 49669a5db4SJeff Garzik * 50669a5db4SJeff Garzik * Returns the base of the PCI configuration registers for this port 51669a5db4SJeff Garzik * number. 52669a5db4SJeff Garzik */ 53669a5db4SJeff Garzik 54669a5db4SJeff Garzik static int sis_port_base(struct ata_device *adev) 55669a5db4SJeff Garzik { 56669a5db4SJeff Garzik return 0x40 + (4 * adev->ap->port_no) + (2 * adev->devno); 57669a5db4SJeff Garzik } 58669a5db4SJeff Garzik 59669a5db4SJeff Garzik /** 60669a5db4SJeff Garzik * sis_133_pre_reset - check for 40/80 pin 61669a5db4SJeff Garzik * @ap: Port 62669a5db4SJeff Garzik * 63669a5db4SJeff Garzik * Perform cable detection for the later UDMA133 capable 64669a5db4SJeff Garzik * SiS chipset. 65669a5db4SJeff Garzik */ 66669a5db4SJeff Garzik 67669a5db4SJeff Garzik static int sis_133_pre_reset(struct ata_port *ap) 68669a5db4SJeff Garzik { 69669a5db4SJeff Garzik static const struct pci_bits sis_enable_bits[] = { 70669a5db4SJeff Garzik { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ 71669a5db4SJeff Garzik { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ 72669a5db4SJeff Garzik }; 73669a5db4SJeff Garzik 74669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 75669a5db4SJeff Garzik u16 tmp; 76669a5db4SJeff Garzik 77669a5db4SJeff Garzik if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) { 78669a5db4SJeff Garzik ata_port_disable(ap); 79669a5db4SJeff Garzik printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); 80669a5db4SJeff Garzik return 0; 81669a5db4SJeff Garzik } 82669a5db4SJeff Garzik /* The top bit of this register is the cable detect bit */ 83669a5db4SJeff Garzik pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp); 84669a5db4SJeff Garzik if (tmp & 0x8000) 85669a5db4SJeff Garzik ap->cbl = ATA_CBL_PATA40; 86669a5db4SJeff Garzik else 87669a5db4SJeff Garzik ap->cbl = ATA_CBL_PATA80; 88669a5db4SJeff Garzik 89669a5db4SJeff Garzik return ata_std_prereset(ap); 90669a5db4SJeff Garzik } 91669a5db4SJeff Garzik 92669a5db4SJeff Garzik /** 93669a5db4SJeff Garzik * sis_error_handler - Probe specified port on PATA host controller 94669a5db4SJeff Garzik * @ap: Port to probe 95669a5db4SJeff Garzik * 96669a5db4SJeff Garzik * LOCKING: 97669a5db4SJeff Garzik * None (inherited from caller). 98669a5db4SJeff Garzik */ 99669a5db4SJeff Garzik 100669a5db4SJeff Garzik static void sis_133_error_handler(struct ata_port *ap) 101669a5db4SJeff Garzik { 102669a5db4SJeff Garzik ata_bmdma_drive_eh(ap, sis_133_pre_reset, ata_std_softreset, NULL, ata_std_postreset); 103669a5db4SJeff Garzik } 104669a5db4SJeff Garzik 105669a5db4SJeff Garzik 106669a5db4SJeff Garzik /** 107669a5db4SJeff Garzik * sis_66_pre_reset - check for 40/80 pin 108669a5db4SJeff Garzik * @ap: Port 109669a5db4SJeff Garzik * 110669a5db4SJeff Garzik * Perform cable detection on the UDMA66, UDMA100 and early UDMA133 111669a5db4SJeff Garzik * SiS IDE controllers. 112669a5db4SJeff Garzik */ 113669a5db4SJeff Garzik 114669a5db4SJeff Garzik static int sis_66_pre_reset(struct ata_port *ap) 115669a5db4SJeff Garzik { 116669a5db4SJeff Garzik static const struct pci_bits sis_enable_bits[] = { 117669a5db4SJeff Garzik { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ 118669a5db4SJeff Garzik { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ 119669a5db4SJeff Garzik }; 120669a5db4SJeff Garzik 121669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 122669a5db4SJeff Garzik u8 tmp; 123669a5db4SJeff Garzik 124669a5db4SJeff Garzik if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) { 125669a5db4SJeff Garzik ata_port_disable(ap); 126669a5db4SJeff Garzik printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); 127669a5db4SJeff Garzik return 0; 128669a5db4SJeff Garzik } 129669a5db4SJeff Garzik /* Older chips keep cable detect in bits 4/5 of reg 0x48 */ 130669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x48, &tmp); 131669a5db4SJeff Garzik tmp >>= ap->port_no; 132669a5db4SJeff Garzik if (tmp & 0x10) 133669a5db4SJeff Garzik ap->cbl = ATA_CBL_PATA40; 134669a5db4SJeff Garzik else 135669a5db4SJeff Garzik ap->cbl = ATA_CBL_PATA80; 136669a5db4SJeff Garzik 137669a5db4SJeff Garzik return ata_std_prereset(ap); 138669a5db4SJeff Garzik } 139669a5db4SJeff Garzik 140669a5db4SJeff Garzik /** 141669a5db4SJeff Garzik * sis_66_error_handler - Probe specified port on PATA host controller 142669a5db4SJeff Garzik * @ap: Port to probe 143669a5db4SJeff Garzik * @classes: 144669a5db4SJeff Garzik * 145669a5db4SJeff Garzik * LOCKING: 146669a5db4SJeff Garzik * None (inherited from caller). 147669a5db4SJeff Garzik */ 148669a5db4SJeff Garzik 149669a5db4SJeff Garzik static void sis_66_error_handler(struct ata_port *ap) 150669a5db4SJeff Garzik { 151669a5db4SJeff Garzik ata_bmdma_drive_eh(ap, sis_66_pre_reset, ata_std_softreset, NULL, ata_std_postreset); 152669a5db4SJeff Garzik } 153669a5db4SJeff Garzik 154669a5db4SJeff Garzik /** 155669a5db4SJeff Garzik * sis_old_pre_reset - probe begin 156669a5db4SJeff Garzik * @ap: ATA port 157669a5db4SJeff Garzik * 158669a5db4SJeff Garzik * Set up cable type and use generic probe init 159669a5db4SJeff Garzik */ 160669a5db4SJeff Garzik 161669a5db4SJeff Garzik static int sis_old_pre_reset(struct ata_port *ap) 162669a5db4SJeff Garzik { 163669a5db4SJeff Garzik static const struct pci_bits sis_enable_bits[] = { 164669a5db4SJeff Garzik { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ 165669a5db4SJeff Garzik { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ 166669a5db4SJeff Garzik }; 167669a5db4SJeff Garzik 168669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 169669a5db4SJeff Garzik 170669a5db4SJeff Garzik if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) { 171669a5db4SJeff Garzik ata_port_disable(ap); 172669a5db4SJeff Garzik printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); 173669a5db4SJeff Garzik return 0; 174669a5db4SJeff Garzik } 175669a5db4SJeff Garzik ap->cbl = ATA_CBL_PATA40; 176669a5db4SJeff Garzik return ata_std_prereset(ap); 177669a5db4SJeff Garzik } 178669a5db4SJeff Garzik 179669a5db4SJeff Garzik 180669a5db4SJeff Garzik /** 181669a5db4SJeff Garzik * sis_old_error_handler - Probe specified port on PATA host controller 182669a5db4SJeff Garzik * @ap: Port to probe 183669a5db4SJeff Garzik * 184669a5db4SJeff Garzik * LOCKING: 185669a5db4SJeff Garzik * None (inherited from caller). 186669a5db4SJeff Garzik */ 187669a5db4SJeff Garzik 188669a5db4SJeff Garzik static void sis_old_error_handler(struct ata_port *ap) 189669a5db4SJeff Garzik { 190669a5db4SJeff Garzik ata_bmdma_drive_eh(ap, sis_old_pre_reset, ata_std_softreset, NULL, ata_std_postreset); 191669a5db4SJeff Garzik } 192669a5db4SJeff Garzik 193669a5db4SJeff Garzik /** 194669a5db4SJeff Garzik * sis_set_fifo - Set RWP fifo bits for this device 195669a5db4SJeff Garzik * @ap: Port 196669a5db4SJeff Garzik * @adev: Device 197669a5db4SJeff Garzik * 198669a5db4SJeff Garzik * SIS chipsets implement prefetch/postwrite bits for each device 199669a5db4SJeff Garzik * on both channels. This functionality is not ATAPI compatible and 200669a5db4SJeff Garzik * must be configured according to the class of device present 201669a5db4SJeff Garzik */ 202669a5db4SJeff Garzik 203669a5db4SJeff Garzik static void sis_set_fifo(struct ata_port *ap, struct ata_device *adev) 204669a5db4SJeff Garzik { 205669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 206669a5db4SJeff Garzik u8 fifoctrl; 207669a5db4SJeff Garzik u8 mask = 0x11; 208669a5db4SJeff Garzik 209669a5db4SJeff Garzik mask <<= (2 * ap->port_no); 210669a5db4SJeff Garzik mask <<= adev->devno; 211669a5db4SJeff Garzik 212669a5db4SJeff Garzik /* This holds various bits including the FIFO control */ 213669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x4B, &fifoctrl); 214669a5db4SJeff Garzik fifoctrl &= ~mask; 215669a5db4SJeff Garzik 216669a5db4SJeff Garzik /* Enable for ATA (disk) only */ 217669a5db4SJeff Garzik if (adev->class == ATA_DEV_ATA) 218669a5db4SJeff Garzik fifoctrl |= mask; 219669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4B, fifoctrl); 220669a5db4SJeff Garzik } 221669a5db4SJeff Garzik 222669a5db4SJeff Garzik /** 223669a5db4SJeff Garzik * sis_old_set_piomode - Initialize host controller PATA PIO timings 224669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 225669a5db4SJeff Garzik * @adev: Device we are configuring for. 226669a5db4SJeff Garzik * 227669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 228669a5db4SJeff Garzik * function handles PIO set up for all chips that are pre ATA100 and 229669a5db4SJeff Garzik * also early ATA100 devices. 230669a5db4SJeff Garzik * 231669a5db4SJeff Garzik * LOCKING: 232669a5db4SJeff Garzik * None (inherited from caller). 233669a5db4SJeff Garzik */ 234669a5db4SJeff Garzik 235669a5db4SJeff Garzik static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev) 236669a5db4SJeff Garzik { 237669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 238669a5db4SJeff Garzik int port = sis_port_base(adev); 239669a5db4SJeff Garzik u8 t1, t2; 240669a5db4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 241669a5db4SJeff Garzik 242669a5db4SJeff Garzik const u8 active[] = { 0x00, 0x07, 0x04, 0x03, 0x01 }; 243669a5db4SJeff Garzik const u8 recovery[] = { 0x00, 0x06, 0x04, 0x03, 0x03 }; 244669a5db4SJeff Garzik 245669a5db4SJeff Garzik sis_set_fifo(ap, adev); 246669a5db4SJeff Garzik 247669a5db4SJeff Garzik pci_read_config_byte(pdev, port, &t1); 248669a5db4SJeff Garzik pci_read_config_byte(pdev, port + 1, &t2); 249669a5db4SJeff Garzik 250669a5db4SJeff Garzik t1 &= ~0x0F; /* Clear active/recovery timings */ 251669a5db4SJeff Garzik t2 &= ~0x07; 252669a5db4SJeff Garzik 253669a5db4SJeff Garzik t1 |= active[speed]; 254669a5db4SJeff Garzik t2 |= recovery[speed]; 255669a5db4SJeff Garzik 256669a5db4SJeff Garzik pci_write_config_byte(pdev, port, t1); 257669a5db4SJeff Garzik pci_write_config_byte(pdev, port + 1, t2); 258669a5db4SJeff Garzik } 259669a5db4SJeff Garzik 260669a5db4SJeff Garzik /** 261669a5db4SJeff Garzik * sis_100_set_pioode - Initialize host controller PATA PIO timings 262669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 263669a5db4SJeff Garzik * @adev: Device we are configuring for. 264669a5db4SJeff Garzik * 265669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 266669a5db4SJeff Garzik * function handles PIO set up for ATA100 devices and early ATA133. 267669a5db4SJeff Garzik * 268669a5db4SJeff Garzik * LOCKING: 269669a5db4SJeff Garzik * None (inherited from caller). 270669a5db4SJeff Garzik */ 271669a5db4SJeff Garzik 272669a5db4SJeff Garzik static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev) 273669a5db4SJeff Garzik { 274669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 275669a5db4SJeff Garzik int port = sis_port_base(adev); 276669a5db4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 277669a5db4SJeff Garzik 278669a5db4SJeff Garzik const u8 actrec[] = { 0x00, 0x67, 0x44, 0x33, 0x31 }; 279669a5db4SJeff Garzik 280669a5db4SJeff Garzik sis_set_fifo(ap, adev); 281669a5db4SJeff Garzik 282669a5db4SJeff Garzik pci_write_config_byte(pdev, port, actrec[speed]); 283669a5db4SJeff Garzik } 284669a5db4SJeff Garzik 285669a5db4SJeff Garzik /** 286669a5db4SJeff Garzik * sis_133_set_pioode - Initialize host controller PATA PIO timings 287669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 288669a5db4SJeff Garzik * @adev: Device we are configuring for. 289669a5db4SJeff Garzik * 290669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 291669a5db4SJeff Garzik * function handles PIO set up for the later ATA133 devices. 292669a5db4SJeff Garzik * 293669a5db4SJeff Garzik * LOCKING: 294669a5db4SJeff Garzik * None (inherited from caller). 295669a5db4SJeff Garzik */ 296669a5db4SJeff Garzik 297669a5db4SJeff Garzik static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev) 298669a5db4SJeff Garzik { 299669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 300669a5db4SJeff Garzik int port = 0x40; 301669a5db4SJeff Garzik u32 t1; 302669a5db4SJeff Garzik u32 reg54; 303669a5db4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 304669a5db4SJeff Garzik 305669a5db4SJeff Garzik const u32 timing133[] = { 306669a5db4SJeff Garzik 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */ 307669a5db4SJeff Garzik 0x0C266000, 308669a5db4SJeff Garzik 0x04263000, 309669a5db4SJeff Garzik 0x0C0A3000, 310669a5db4SJeff Garzik 0x05093000 311669a5db4SJeff Garzik }; 312669a5db4SJeff Garzik const u32 timing100[] = { 313669a5db4SJeff Garzik 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */ 314669a5db4SJeff Garzik 0x091C4000, 315669a5db4SJeff Garzik 0x031C2000, 316669a5db4SJeff Garzik 0x09072000, 317669a5db4SJeff Garzik 0x04062000 318669a5db4SJeff Garzik }; 319669a5db4SJeff Garzik 320669a5db4SJeff Garzik sis_set_fifo(ap, adev); 321669a5db4SJeff Garzik 322669a5db4SJeff Garzik /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ 323669a5db4SJeff Garzik pci_read_config_dword(pdev, 0x54, ®54); 324669a5db4SJeff Garzik if (reg54 & 0x40000000) 325669a5db4SJeff Garzik port = 0x70; 326669a5db4SJeff Garzik port += 8 * ap->port_no + 4 * adev->devno; 327669a5db4SJeff Garzik 328669a5db4SJeff Garzik pci_read_config_dword(pdev, port, &t1); 329669a5db4SJeff Garzik t1 &= 0xC0C00FFF; /* Mask out timing */ 330669a5db4SJeff Garzik 331669a5db4SJeff Garzik if (t1 & 0x08) /* 100 or 133 ? */ 332669a5db4SJeff Garzik t1 |= timing133[speed]; 333669a5db4SJeff Garzik else 334669a5db4SJeff Garzik t1 |= timing100[speed]; 335669a5db4SJeff Garzik pci_write_config_byte(pdev, port, t1); 336669a5db4SJeff Garzik } 337669a5db4SJeff Garzik 338669a5db4SJeff Garzik /** 339669a5db4SJeff Garzik * sis_old_set_dmamode - Initialize host controller PATA DMA timings 340669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 341669a5db4SJeff Garzik * @adev: Device to program 342669a5db4SJeff Garzik * 343669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 344669a5db4SJeff Garzik * Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike 345669a5db4SJeff Garzik * the old ide/pci driver. 346669a5db4SJeff Garzik * 347669a5db4SJeff Garzik * LOCKING: 348669a5db4SJeff Garzik * None (inherited from caller). 349669a5db4SJeff Garzik */ 350669a5db4SJeff Garzik 351669a5db4SJeff Garzik static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev) 352669a5db4SJeff Garzik { 353669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 354669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 355669a5db4SJeff Garzik int drive_pci = sis_port_base(adev); 356669a5db4SJeff Garzik u16 timing; 357669a5db4SJeff Garzik 358669a5db4SJeff Garzik const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; 359669a5db4SJeff Garzik const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 }; 360669a5db4SJeff Garzik 361669a5db4SJeff Garzik pci_read_config_word(pdev, drive_pci, &timing); 362669a5db4SJeff Garzik 363669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 364669a5db4SJeff Garzik /* bits 3-0 hold recovery timing bits 8-10 active timing and 365669a5db4SJeff Garzik the higer bits are dependant on the device */ 366669a5db4SJeff Garzik timing &= ~ 0x870F; 367669a5db4SJeff Garzik timing |= mwdma_bits[speed]; 368669a5db4SJeff Garzik pci_write_config_word(pdev, drive_pci, timing); 369669a5db4SJeff Garzik } else { 370669a5db4SJeff Garzik /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */ 371669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 372669a5db4SJeff Garzik timing &= ~0x6000; 373669a5db4SJeff Garzik timing |= udma_bits[speed]; 374669a5db4SJeff Garzik } 375669a5db4SJeff Garzik } 376669a5db4SJeff Garzik 377669a5db4SJeff Garzik /** 378669a5db4SJeff Garzik * sis_66_set_dmamode - Initialize host controller PATA DMA timings 379669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 380669a5db4SJeff Garzik * @adev: Device to program 381669a5db4SJeff Garzik * 382669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 383669a5db4SJeff Garzik * Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike 384669a5db4SJeff Garzik * the old ide/pci driver. 385669a5db4SJeff Garzik * 386669a5db4SJeff Garzik * LOCKING: 387669a5db4SJeff Garzik * None (inherited from caller). 388669a5db4SJeff Garzik */ 389669a5db4SJeff Garzik 390669a5db4SJeff Garzik static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev) 391669a5db4SJeff Garzik { 392669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 393669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 394669a5db4SJeff Garzik int drive_pci = sis_port_base(adev); 395669a5db4SJeff Garzik u16 timing; 396669a5db4SJeff Garzik 397669a5db4SJeff Garzik const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; 398669a5db4SJeff Garzik const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000}; 399669a5db4SJeff Garzik 400669a5db4SJeff Garzik pci_read_config_word(pdev, drive_pci, &timing); 401669a5db4SJeff Garzik 402669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 403669a5db4SJeff Garzik /* bits 3-0 hold recovery timing bits 8-10 active timing and 404669a5db4SJeff Garzik the higer bits are dependant on the device, bit 15 udma */ 405669a5db4SJeff Garzik timing &= ~ 0x870F; 406669a5db4SJeff Garzik timing |= mwdma_bits[speed]; 407669a5db4SJeff Garzik } else { 408669a5db4SJeff Garzik /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ 409669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 410669a5db4SJeff Garzik timing &= ~0x6000; 411669a5db4SJeff Garzik timing |= udma_bits[speed]; 412669a5db4SJeff Garzik } 413669a5db4SJeff Garzik pci_write_config_word(pdev, drive_pci, timing); 414669a5db4SJeff Garzik } 415669a5db4SJeff Garzik 416669a5db4SJeff Garzik /** 417669a5db4SJeff Garzik * sis_100_set_dmamode - Initialize host controller PATA DMA timings 418669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 419669a5db4SJeff Garzik * @adev: Device to program 420669a5db4SJeff Garzik * 421669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 422669a5db4SJeff Garzik * Handles UDMA66 and early UDMA100 devices. 423669a5db4SJeff Garzik * 424669a5db4SJeff Garzik * LOCKING: 425669a5db4SJeff Garzik * None (inherited from caller). 426669a5db4SJeff Garzik */ 427669a5db4SJeff Garzik 428669a5db4SJeff Garzik static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev) 429669a5db4SJeff Garzik { 430669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 431669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 432669a5db4SJeff Garzik int drive_pci = sis_port_base(adev); 433669a5db4SJeff Garzik u16 timing; 434669a5db4SJeff Garzik 435669a5db4SJeff Garzik const u16 udma_bits[] = { 0x8B00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100}; 436669a5db4SJeff Garzik 437669a5db4SJeff Garzik pci_read_config_word(pdev, drive_pci, &timing); 438669a5db4SJeff Garzik 439669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 440669a5db4SJeff Garzik /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */ 441669a5db4SJeff Garzik } else { 442669a5db4SJeff Garzik /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ 443669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 444669a5db4SJeff Garzik timing &= ~0x0F00; 445669a5db4SJeff Garzik timing |= udma_bits[speed]; 446669a5db4SJeff Garzik } 447669a5db4SJeff Garzik pci_write_config_word(pdev, drive_pci, timing); 448669a5db4SJeff Garzik } 449669a5db4SJeff Garzik 450669a5db4SJeff Garzik /** 451669a5db4SJeff Garzik * sis_133_early_set_dmamode - Initialize host controller PATA DMA timings 452669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 453669a5db4SJeff Garzik * @adev: Device to program 454669a5db4SJeff Garzik * 455669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 456669a5db4SJeff Garzik * Handles early SiS 961 bridges. Supports MWDMA as well unlike 457669a5db4SJeff Garzik * the old ide/pci driver. 458669a5db4SJeff Garzik * 459669a5db4SJeff Garzik * LOCKING: 460669a5db4SJeff Garzik * None (inherited from caller). 461669a5db4SJeff Garzik */ 462669a5db4SJeff Garzik 463669a5db4SJeff Garzik static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *adev) 464669a5db4SJeff Garzik { 465669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 466669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 467669a5db4SJeff Garzik int drive_pci = sis_port_base(adev); 468669a5db4SJeff Garzik u16 timing; 469669a5db4SJeff Garzik 470669a5db4SJeff Garzik const u16 udma_bits[] = { 0x8F00, 0x8A00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100}; 471669a5db4SJeff Garzik 472669a5db4SJeff Garzik pci_read_config_word(pdev, drive_pci, &timing); 473669a5db4SJeff Garzik 474669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 475669a5db4SJeff Garzik /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */ 476669a5db4SJeff Garzik } else { 477669a5db4SJeff Garzik /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ 478669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 479669a5db4SJeff Garzik timing &= ~0x0F00; 480669a5db4SJeff Garzik timing |= udma_bits[speed]; 481669a5db4SJeff Garzik } 482669a5db4SJeff Garzik pci_write_config_word(pdev, drive_pci, timing); 483669a5db4SJeff Garzik } 484669a5db4SJeff Garzik 485669a5db4SJeff Garzik /** 486669a5db4SJeff Garzik * sis_133_set_dmamode - Initialize host controller PATA DMA timings 487669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 488669a5db4SJeff Garzik * @adev: Device to program 489669a5db4SJeff Garzik * 490669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 491669a5db4SJeff Garzik * Handles early SiS 961 bridges. Supports MWDMA as well unlike 492669a5db4SJeff Garzik * the old ide/pci driver. 493669a5db4SJeff Garzik * 494669a5db4SJeff Garzik * LOCKING: 495669a5db4SJeff Garzik * None (inherited from caller). 496669a5db4SJeff Garzik */ 497669a5db4SJeff Garzik 498669a5db4SJeff Garzik static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev) 499669a5db4SJeff Garzik { 500669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 501669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 502669a5db4SJeff Garzik int port = 0x40; 503669a5db4SJeff Garzik u32 t1; 504669a5db4SJeff Garzik u32 reg54; 505669a5db4SJeff Garzik 506669a5db4SJeff Garzik /* bits 4- cycle time 8 - cvs time */ 507669a5db4SJeff Garzik const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 }; 508669a5db4SJeff Garzik const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 }; 509669a5db4SJeff Garzik 510669a5db4SJeff Garzik /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ 511669a5db4SJeff Garzik pci_read_config_dword(pdev, 0x54, ®54); 512669a5db4SJeff Garzik if (reg54 & 0x40000000) 513669a5db4SJeff Garzik port = 0x70; 514669a5db4SJeff Garzik port += (8 * ap->port_no) + (4 * adev->devno); 515669a5db4SJeff Garzik 516669a5db4SJeff Garzik pci_read_config_dword(pdev, port, &t1); 517669a5db4SJeff Garzik 518669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 519669a5db4SJeff Garzik t1 &= ~0x00000004; 520669a5db4SJeff Garzik /* FIXME: need data sheet to add MWDMA here. Also lacking on 521669a5db4SJeff Garzik ide/pci driver */ 522669a5db4SJeff Garzik } else { 523669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 524669a5db4SJeff Garzik /* if & 8 no UDMA133 - need info for ... */ 525669a5db4SJeff Garzik t1 &= ~0x00000FF0; 526669a5db4SJeff Garzik t1 |= 0x00000004; 527669a5db4SJeff Garzik if (t1 & 0x08) 528669a5db4SJeff Garzik t1 |= timing_u133[speed]; 529669a5db4SJeff Garzik else 530669a5db4SJeff Garzik t1 |= timing_u100[speed]; 531669a5db4SJeff Garzik } 532669a5db4SJeff Garzik pci_write_config_dword(pdev, port, t1); 533669a5db4SJeff Garzik } 534669a5db4SJeff Garzik 535669a5db4SJeff Garzik static struct scsi_host_template sis_sht = { 536669a5db4SJeff Garzik .module = THIS_MODULE, 537669a5db4SJeff Garzik .name = DRV_NAME, 538669a5db4SJeff Garzik .ioctl = ata_scsi_ioctl, 539669a5db4SJeff Garzik .queuecommand = ata_scsi_queuecmd, 540669a5db4SJeff Garzik .can_queue = ATA_DEF_QUEUE, 541669a5db4SJeff Garzik .this_id = ATA_SHT_THIS_ID, 542669a5db4SJeff Garzik .sg_tablesize = LIBATA_MAX_PRD, 543669a5db4SJeff Garzik .max_sectors = ATA_MAX_SECTORS, 544669a5db4SJeff Garzik .cmd_per_lun = ATA_SHT_CMD_PER_LUN, 545669a5db4SJeff Garzik .emulated = ATA_SHT_EMULATED, 546669a5db4SJeff Garzik .use_clustering = ATA_SHT_USE_CLUSTERING, 547669a5db4SJeff Garzik .proc_name = DRV_NAME, 548669a5db4SJeff Garzik .dma_boundary = ATA_DMA_BOUNDARY, 549669a5db4SJeff Garzik .slave_configure = ata_scsi_slave_config, 550669a5db4SJeff Garzik .bios_param = ata_std_bios_param, 551669a5db4SJeff Garzik }; 552669a5db4SJeff Garzik 553669a5db4SJeff Garzik static const struct ata_port_operations sis_133_ops = { 554669a5db4SJeff Garzik .port_disable = ata_port_disable, 555669a5db4SJeff Garzik .set_piomode = sis_133_set_piomode, 556669a5db4SJeff Garzik .set_dmamode = sis_133_set_dmamode, 557669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 558669a5db4SJeff Garzik 559669a5db4SJeff Garzik .tf_load = ata_tf_load, 560669a5db4SJeff Garzik .tf_read = ata_tf_read, 561669a5db4SJeff Garzik .check_status = ata_check_status, 562669a5db4SJeff Garzik .exec_command = ata_exec_command, 563669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 564669a5db4SJeff Garzik 565669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 566669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 567669a5db4SJeff Garzik .error_handler = sis_133_error_handler, 568669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 569669a5db4SJeff Garzik 570669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 571669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 572669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 573669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 574669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 575669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 576669a5db4SJeff Garzik .data_xfer = ata_pio_data_xfer, 577669a5db4SJeff Garzik 578669a5db4SJeff Garzik .eng_timeout = ata_eng_timeout, 579669a5db4SJeff Garzik 580669a5db4SJeff Garzik .irq_handler = ata_interrupt, 581669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 582669a5db4SJeff Garzik 583669a5db4SJeff Garzik .port_start = ata_port_start, 584669a5db4SJeff Garzik .port_stop = ata_port_stop, 585669a5db4SJeff Garzik .host_stop = ata_host_stop, 586669a5db4SJeff Garzik }; 587669a5db4SJeff Garzik 588669a5db4SJeff Garzik static const struct ata_port_operations sis_133_early_ops = { 589669a5db4SJeff Garzik .port_disable = ata_port_disable, 590669a5db4SJeff Garzik .set_piomode = sis_100_set_piomode, 591669a5db4SJeff Garzik .set_dmamode = sis_133_early_set_dmamode, 592669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 593669a5db4SJeff Garzik 594669a5db4SJeff Garzik .tf_load = ata_tf_load, 595669a5db4SJeff Garzik .tf_read = ata_tf_read, 596669a5db4SJeff Garzik .check_status = ata_check_status, 597669a5db4SJeff Garzik .exec_command = ata_exec_command, 598669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 599669a5db4SJeff Garzik 600669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 601669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 602669a5db4SJeff Garzik .error_handler = sis_66_error_handler, 603669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 604669a5db4SJeff Garzik 605669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 606669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 607669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 608669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 609669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 610669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 611669a5db4SJeff Garzik .data_xfer = ata_pio_data_xfer, 612669a5db4SJeff Garzik 613669a5db4SJeff Garzik .eng_timeout = ata_eng_timeout, 614669a5db4SJeff Garzik 615669a5db4SJeff Garzik .irq_handler = ata_interrupt, 616669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 617669a5db4SJeff Garzik 618669a5db4SJeff Garzik .port_start = ata_port_start, 619669a5db4SJeff Garzik .port_stop = ata_port_stop, 620669a5db4SJeff Garzik .host_stop = ata_host_stop, 621669a5db4SJeff Garzik }; 622669a5db4SJeff Garzik 623669a5db4SJeff Garzik static const struct ata_port_operations sis_100_ops = { 624669a5db4SJeff Garzik .port_disable = ata_port_disable, 625669a5db4SJeff Garzik .set_piomode = sis_100_set_piomode, 626669a5db4SJeff Garzik .set_dmamode = sis_100_set_dmamode, 627669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 628669a5db4SJeff Garzik 629669a5db4SJeff Garzik .tf_load = ata_tf_load, 630669a5db4SJeff Garzik .tf_read = ata_tf_read, 631669a5db4SJeff Garzik .check_status = ata_check_status, 632669a5db4SJeff Garzik .exec_command = ata_exec_command, 633669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 634669a5db4SJeff Garzik 635669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 636669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 637669a5db4SJeff Garzik .error_handler = sis_66_error_handler, 638669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 639669a5db4SJeff Garzik 640669a5db4SJeff Garzik 641669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 642669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 643669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 644669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 645669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 646669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 647669a5db4SJeff Garzik .data_xfer = ata_pio_data_xfer, 648669a5db4SJeff Garzik 649669a5db4SJeff Garzik .eng_timeout = ata_eng_timeout, 650669a5db4SJeff Garzik 651669a5db4SJeff Garzik .irq_handler = ata_interrupt, 652669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 653669a5db4SJeff Garzik 654669a5db4SJeff Garzik .port_start = ata_port_start, 655669a5db4SJeff Garzik .port_stop = ata_port_stop, 656669a5db4SJeff Garzik .host_stop = ata_host_stop, 657669a5db4SJeff Garzik }; 658669a5db4SJeff Garzik 659669a5db4SJeff Garzik static const struct ata_port_operations sis_66_ops = { 660669a5db4SJeff Garzik .port_disable = ata_port_disable, 661669a5db4SJeff Garzik .set_piomode = sis_old_set_piomode, 662669a5db4SJeff Garzik .set_dmamode = sis_66_set_dmamode, 663669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 664669a5db4SJeff Garzik 665669a5db4SJeff Garzik .tf_load = ata_tf_load, 666669a5db4SJeff Garzik .tf_read = ata_tf_read, 667669a5db4SJeff Garzik .check_status = ata_check_status, 668669a5db4SJeff Garzik .exec_command = ata_exec_command, 669669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 670669a5db4SJeff Garzik 671669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 672669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 673669a5db4SJeff Garzik .error_handler = sis_66_error_handler, 674669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 675669a5db4SJeff Garzik 676669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 677669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 678669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 679669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 680669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 681669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 682669a5db4SJeff Garzik .data_xfer = ata_pio_data_xfer, 683669a5db4SJeff Garzik 684669a5db4SJeff Garzik .eng_timeout = ata_eng_timeout, 685669a5db4SJeff Garzik 686669a5db4SJeff Garzik .irq_handler = ata_interrupt, 687669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 688669a5db4SJeff Garzik 689669a5db4SJeff Garzik .port_start = ata_port_start, 690669a5db4SJeff Garzik .port_stop = ata_port_stop, 691669a5db4SJeff Garzik .host_stop = ata_host_stop, 692669a5db4SJeff Garzik }; 693669a5db4SJeff Garzik 694669a5db4SJeff Garzik static const struct ata_port_operations sis_old_ops = { 695669a5db4SJeff Garzik .port_disable = ata_port_disable, 696669a5db4SJeff Garzik .set_piomode = sis_old_set_piomode, 697669a5db4SJeff Garzik .set_dmamode = sis_old_set_dmamode, 698669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 699669a5db4SJeff Garzik 700669a5db4SJeff Garzik .tf_load = ata_tf_load, 701669a5db4SJeff Garzik .tf_read = ata_tf_read, 702669a5db4SJeff Garzik .check_status = ata_check_status, 703669a5db4SJeff Garzik .exec_command = ata_exec_command, 704669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 705669a5db4SJeff Garzik 706669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 707669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 708669a5db4SJeff Garzik .error_handler = sis_old_error_handler, 709669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 710669a5db4SJeff Garzik 711669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 712669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 713669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 714669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 715669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 716669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 717669a5db4SJeff Garzik .data_xfer = ata_pio_data_xfer, 718669a5db4SJeff Garzik 719669a5db4SJeff Garzik .eng_timeout = ata_eng_timeout, 720669a5db4SJeff Garzik 721669a5db4SJeff Garzik .irq_handler = ata_interrupt, 722669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 723669a5db4SJeff Garzik 724669a5db4SJeff Garzik .port_start = ata_port_start, 725669a5db4SJeff Garzik .port_stop = ata_port_stop, 726669a5db4SJeff Garzik .host_stop = ata_host_stop, 727669a5db4SJeff Garzik }; 728669a5db4SJeff Garzik 729669a5db4SJeff Garzik static struct ata_port_info sis_info = { 730669a5db4SJeff Garzik .sht = &sis_sht, 731669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 732669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 733669a5db4SJeff Garzik .mwdma_mask = 0x07, 734669a5db4SJeff Garzik .udma_mask = 0, 735669a5db4SJeff Garzik .port_ops = &sis_old_ops, 736669a5db4SJeff Garzik }; 737669a5db4SJeff Garzik static struct ata_port_info sis_info33 = { 738669a5db4SJeff Garzik .sht = &sis_sht, 739669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 740669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 741669a5db4SJeff Garzik .mwdma_mask = 0x07, 742669a5db4SJeff Garzik .udma_mask = ATA_UDMA2, /* UDMA 33 */ 743669a5db4SJeff Garzik .port_ops = &sis_old_ops, 744669a5db4SJeff Garzik }; 745669a5db4SJeff Garzik static struct ata_port_info sis_info66 = { 746669a5db4SJeff Garzik .sht = &sis_sht, 747669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 748669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 749669a5db4SJeff Garzik .udma_mask = ATA_UDMA4, /* UDMA 66 */ 750669a5db4SJeff Garzik .port_ops = &sis_66_ops, 751669a5db4SJeff Garzik }; 752669a5db4SJeff Garzik static struct ata_port_info sis_info100 = { 753669a5db4SJeff Garzik .sht = &sis_sht, 754669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 755669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 756669a5db4SJeff Garzik .udma_mask = ATA_UDMA5, 757669a5db4SJeff Garzik .port_ops = &sis_100_ops, 758669a5db4SJeff Garzik }; 759669a5db4SJeff Garzik static struct ata_port_info sis_info100_early = { 760669a5db4SJeff Garzik .sht = &sis_sht, 761669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 762669a5db4SJeff Garzik .udma_mask = ATA_UDMA5, 763669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 764669a5db4SJeff Garzik .port_ops = &sis_66_ops, 765669a5db4SJeff Garzik }; 766669a5db4SJeff Garzik static struct ata_port_info sis_info133 = { 767669a5db4SJeff Garzik .sht = &sis_sht, 768669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 769669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 770669a5db4SJeff Garzik .udma_mask = ATA_UDMA6, 771669a5db4SJeff Garzik .port_ops = &sis_133_ops, 772669a5db4SJeff Garzik }; 773669a5db4SJeff Garzik static struct ata_port_info sis_info133_early = { 774669a5db4SJeff Garzik .sht = &sis_sht, 775669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 776669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 777669a5db4SJeff Garzik .udma_mask = ATA_UDMA6, 778669a5db4SJeff Garzik .port_ops = &sis_133_early_ops, 779669a5db4SJeff Garzik }; 780669a5db4SJeff Garzik 781669a5db4SJeff Garzik 782669a5db4SJeff Garzik static void sis_fixup(struct pci_dev *pdev, struct sis_chipset *sis) 783669a5db4SJeff Garzik { 784669a5db4SJeff Garzik u16 regw; 785669a5db4SJeff Garzik u8 reg; 786669a5db4SJeff Garzik 787669a5db4SJeff Garzik if (sis->info == &sis_info133) { 788669a5db4SJeff Garzik pci_read_config_word(pdev, 0x50, ®w); 789669a5db4SJeff Garzik if (regw & 0x08) 790669a5db4SJeff Garzik pci_write_config_word(pdev, 0x50, regw & ~0x08); 791669a5db4SJeff Garzik pci_read_config_word(pdev, 0x52, ®w); 792669a5db4SJeff Garzik if (regw & 0x08) 793669a5db4SJeff Garzik pci_write_config_word(pdev, 0x52, regw & ~0x08); 794669a5db4SJeff Garzik return; 795669a5db4SJeff Garzik } 796669a5db4SJeff Garzik 797669a5db4SJeff Garzik if (sis->info == &sis_info133_early || sis->info == &sis_info100) { 798669a5db4SJeff Garzik /* Fix up latency */ 799669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80); 800669a5db4SJeff Garzik /* Set compatibility bit */ 801669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x49, ®); 802669a5db4SJeff Garzik if (!(reg & 0x01)) 803669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x49, reg | 0x01); 804669a5db4SJeff Garzik return; 805669a5db4SJeff Garzik } 806669a5db4SJeff Garzik 807669a5db4SJeff Garzik if (sis->info == &sis_info66 || sis->info == &sis_info100_early) { 808669a5db4SJeff Garzik /* Fix up latency */ 809669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80); 810669a5db4SJeff Garzik /* Set compatibility bit */ 811669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x52, ®); 812669a5db4SJeff Garzik if (!(reg & 0x04)) 813669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x52, reg | 0x04); 814669a5db4SJeff Garzik return; 815669a5db4SJeff Garzik } 816669a5db4SJeff Garzik 817669a5db4SJeff Garzik if (sis->info == &sis_info33) { 818669a5db4SJeff Garzik pci_read_config_byte(pdev, PCI_CLASS_PROG, ®); 819669a5db4SJeff Garzik if (( reg & 0x0F ) != 0x00) 820669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_CLASS_PROG, reg & 0xF0); 821669a5db4SJeff Garzik /* Fall through to ATA16 fixup below */ 822669a5db4SJeff Garzik } 823669a5db4SJeff Garzik 824669a5db4SJeff Garzik if (sis->info == &sis_info || sis->info == &sis_info33) { 825669a5db4SJeff Garzik /* force per drive recovery and active timings 826669a5db4SJeff Garzik needed on ATA_33 and below chips */ 827669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x52, ®); 828669a5db4SJeff Garzik if (!(reg & 0x08)) 829669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x52, reg|0x08); 830669a5db4SJeff Garzik return; 831669a5db4SJeff Garzik } 832669a5db4SJeff Garzik 833669a5db4SJeff Garzik BUG(); 834669a5db4SJeff Garzik } 835669a5db4SJeff Garzik 836669a5db4SJeff Garzik /** 837669a5db4SJeff Garzik * sis_init_one - Register SiS ATA PCI device with kernel services 838669a5db4SJeff Garzik * @pdev: PCI device to register 839669a5db4SJeff Garzik * @ent: Entry in sis_pci_tbl matching with @pdev 840669a5db4SJeff Garzik * 841669a5db4SJeff Garzik * Called from kernel PCI layer. We probe for combined mode (sigh), 842669a5db4SJeff Garzik * and then hand over control to libata, for it to do the rest. 843669a5db4SJeff Garzik * 844669a5db4SJeff Garzik * LOCKING: 845669a5db4SJeff Garzik * Inherited from PCI layer (may sleep). 846669a5db4SJeff Garzik * 847669a5db4SJeff Garzik * RETURNS: 848669a5db4SJeff Garzik * Zero on success, or -ERRNO value. 849669a5db4SJeff Garzik */ 850669a5db4SJeff Garzik 851669a5db4SJeff Garzik static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 852669a5db4SJeff Garzik { 853669a5db4SJeff Garzik static int printed_version; 854669a5db4SJeff Garzik static struct ata_port_info *port_info[2]; 855669a5db4SJeff Garzik struct ata_port_info *port; 856669a5db4SJeff Garzik struct pci_dev *host = NULL; 857669a5db4SJeff Garzik struct sis_chipset *chipset = NULL; 858669a5db4SJeff Garzik 859669a5db4SJeff Garzik static struct sis_chipset sis_chipsets[] = { 860af323a2fSAlan Cox 861af323a2fSAlan Cox { 0x0968, &sis_info133 }, 862af323a2fSAlan Cox { 0x0966, &sis_info133 }, 863af323a2fSAlan Cox { 0x0965, &sis_info133 }, 864669a5db4SJeff Garzik { 0x0745, &sis_info100 }, 865669a5db4SJeff Garzik { 0x0735, &sis_info100 }, 866669a5db4SJeff Garzik { 0x0733, &sis_info100 }, 867669a5db4SJeff Garzik { 0x0635, &sis_info100 }, 868669a5db4SJeff Garzik { 0x0633, &sis_info100 }, 869669a5db4SJeff Garzik 870669a5db4SJeff Garzik { 0x0730, &sis_info100_early }, /* 100 with ATA 66 layout */ 871669a5db4SJeff Garzik { 0x0550, &sis_info100_early }, /* 100 with ATA 66 layout */ 872669a5db4SJeff Garzik 873669a5db4SJeff Garzik { 0x0640, &sis_info66 }, 874669a5db4SJeff Garzik { 0x0630, &sis_info66 }, 875669a5db4SJeff Garzik { 0x0620, &sis_info66 }, 876669a5db4SJeff Garzik { 0x0540, &sis_info66 }, 877669a5db4SJeff Garzik { 0x0530, &sis_info66 }, 878669a5db4SJeff Garzik 879669a5db4SJeff Garzik { 0x5600, &sis_info33 }, 880669a5db4SJeff Garzik { 0x5598, &sis_info33 }, 881669a5db4SJeff Garzik { 0x5597, &sis_info33 }, 882669a5db4SJeff Garzik { 0x5591, &sis_info33 }, 883669a5db4SJeff Garzik { 0x5582, &sis_info33 }, 884669a5db4SJeff Garzik { 0x5581, &sis_info33 }, 885669a5db4SJeff Garzik 886669a5db4SJeff Garzik { 0x5596, &sis_info }, 887669a5db4SJeff Garzik { 0x5571, &sis_info }, 888669a5db4SJeff Garzik { 0x5517, &sis_info }, 889669a5db4SJeff Garzik { 0x5511, &sis_info }, 890669a5db4SJeff Garzik 891669a5db4SJeff Garzik {0} 892669a5db4SJeff Garzik }; 893669a5db4SJeff Garzik static struct sis_chipset sis133_early = { 894669a5db4SJeff Garzik 0x0, &sis_info133_early 895669a5db4SJeff Garzik }; 896669a5db4SJeff Garzik static struct sis_chipset sis133 = { 897669a5db4SJeff Garzik 0x0, &sis_info133 898669a5db4SJeff Garzik }; 899669a5db4SJeff Garzik static struct sis_chipset sis100_early = { 900669a5db4SJeff Garzik 0x0, &sis_info100_early 901669a5db4SJeff Garzik }; 902669a5db4SJeff Garzik static struct sis_chipset sis100 = { 903669a5db4SJeff Garzik 0x0, &sis_info100 904669a5db4SJeff Garzik }; 905669a5db4SJeff Garzik 906669a5db4SJeff Garzik if (!printed_version++) 907669a5db4SJeff Garzik dev_printk(KERN_DEBUG, &pdev->dev, 908669a5db4SJeff Garzik "version " DRV_VERSION "\n"); 909669a5db4SJeff Garzik 910669a5db4SJeff Garzik /* We have to find the bridge first */ 911669a5db4SJeff Garzik 912669a5db4SJeff Garzik for (chipset = &sis_chipsets[0]; chipset->device; chipset++) { 913669a5db4SJeff Garzik host = pci_get_device(PCI_VENDOR_ID_SI, chipset->device, NULL); 914669a5db4SJeff Garzik if (host != NULL) { 915669a5db4SJeff Garzik if (chipset->device == 0x630) { /* SIS630 */ 916669a5db4SJeff Garzik u8 host_rev; 917669a5db4SJeff Garzik pci_read_config_byte(host, PCI_REVISION_ID, &host_rev); 918669a5db4SJeff Garzik if (host_rev >= 0x30) /* 630 ET */ 919669a5db4SJeff Garzik chipset = &sis100_early; 920669a5db4SJeff Garzik } 921669a5db4SJeff Garzik break; 922669a5db4SJeff Garzik } 923669a5db4SJeff Garzik } 924669a5db4SJeff Garzik 925669a5db4SJeff Garzik /* Look for concealed bridges */ 926669a5db4SJeff Garzik if (host == NULL) { 927669a5db4SJeff Garzik /* Second check */ 928669a5db4SJeff Garzik u32 idemisc; 929669a5db4SJeff Garzik u16 trueid; 930669a5db4SJeff Garzik 931669a5db4SJeff Garzik /* Disable ID masking and register remapping then 932669a5db4SJeff Garzik see what the real ID is */ 933669a5db4SJeff Garzik 934669a5db4SJeff Garzik pci_read_config_dword(pdev, 0x54, &idemisc); 935669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc & 0x7fffffff); 936669a5db4SJeff Garzik pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid); 937669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc); 938669a5db4SJeff Garzik 939669a5db4SJeff Garzik switch(trueid) { 940669a5db4SJeff Garzik case 0x5518: /* SIS 962/963 */ 941669a5db4SJeff Garzik chipset = &sis133; 942669a5db4SJeff Garzik if ((idemisc & 0x40000000) == 0) { 943669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc | 0x40000000); 944669a5db4SJeff Garzik printk(KERN_INFO "SIS5513: Switching to 5513 register mapping\n"); 945669a5db4SJeff Garzik } 946669a5db4SJeff Garzik break; 947669a5db4SJeff Garzik case 0x0180: /* SIS 965/965L */ 948669a5db4SJeff Garzik chipset = &sis133; 949669a5db4SJeff Garzik break; 950669a5db4SJeff Garzik case 0x1180: /* SIS 966/966L */ 951669a5db4SJeff Garzik chipset = &sis133; 952669a5db4SJeff Garzik break; 953669a5db4SJeff Garzik } 954669a5db4SJeff Garzik } 955669a5db4SJeff Garzik 956669a5db4SJeff Garzik /* Further check */ 957669a5db4SJeff Garzik if (chipset == NULL) { 958669a5db4SJeff Garzik struct pci_dev *lpc_bridge; 959669a5db4SJeff Garzik u16 trueid; 960669a5db4SJeff Garzik u8 prefctl; 961669a5db4SJeff Garzik u8 idecfg; 962669a5db4SJeff Garzik u8 sbrev; 963669a5db4SJeff Garzik 964669a5db4SJeff Garzik /* Try the second unmasking technique */ 965669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x4a, &idecfg); 966669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4a, idecfg | 0x10); 967669a5db4SJeff Garzik pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid); 968669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4a, idecfg); 969669a5db4SJeff Garzik 970669a5db4SJeff Garzik switch(trueid) { 971669a5db4SJeff Garzik case 0x5517: 972669a5db4SJeff Garzik lpc_bridge = pci_get_slot(pdev->bus, 0x10); /* Bus 0 Dev 2 Fn 0 */ 973669a5db4SJeff Garzik if (lpc_bridge == NULL) 974669a5db4SJeff Garzik break; 975669a5db4SJeff Garzik pci_read_config_byte(lpc_bridge, PCI_REVISION_ID, &sbrev); 976669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x49, &prefctl); 977669a5db4SJeff Garzik pci_dev_put(lpc_bridge); 978669a5db4SJeff Garzik 979669a5db4SJeff Garzik if (sbrev == 0x10 && (prefctl & 0x80)) { 980669a5db4SJeff Garzik chipset = &sis133_early; 981669a5db4SJeff Garzik break; 982669a5db4SJeff Garzik } 983669a5db4SJeff Garzik chipset = &sis100; 984669a5db4SJeff Garzik break; 985669a5db4SJeff Garzik } 986669a5db4SJeff Garzik } 987669a5db4SJeff Garzik pci_dev_put(host); 988669a5db4SJeff Garzik 989669a5db4SJeff Garzik /* No chipset info, no support */ 990669a5db4SJeff Garzik if (chipset == NULL) 991669a5db4SJeff Garzik return -ENODEV; 992669a5db4SJeff Garzik 993669a5db4SJeff Garzik port = chipset->info; 994669a5db4SJeff Garzik port->private_data = chipset; 995669a5db4SJeff Garzik 996669a5db4SJeff Garzik sis_fixup(pdev, chipset); 997669a5db4SJeff Garzik 998669a5db4SJeff Garzik port_info[0] = port_info[1] = port; 999669a5db4SJeff Garzik return ata_pci_init_one(pdev, port_info, 2); 1000669a5db4SJeff Garzik } 1001669a5db4SJeff Garzik 1002669a5db4SJeff Garzik static const struct pci_device_id sis_pci_tbl[] = { 1003669a5db4SJeff Garzik { PCI_DEVICE(PCI_VENDOR_ID_SI, 0x5513), }, /* SiS 5513 */ 1004669a5db4SJeff Garzik { PCI_DEVICE(PCI_VENDOR_ID_SI, 0x5518), }, /* SiS 5518 */ 1005669a5db4SJeff Garzik { } 1006669a5db4SJeff Garzik }; 1007669a5db4SJeff Garzik 1008669a5db4SJeff Garzik static struct pci_driver sis_pci_driver = { 1009669a5db4SJeff Garzik .name = DRV_NAME, 1010669a5db4SJeff Garzik .id_table = sis_pci_tbl, 1011669a5db4SJeff Garzik .probe = sis_init_one, 1012669a5db4SJeff Garzik .remove = ata_pci_remove_one, 1013669a5db4SJeff Garzik }; 1014669a5db4SJeff Garzik 1015669a5db4SJeff Garzik static int __init sis_init(void) 1016669a5db4SJeff Garzik { 1017669a5db4SJeff Garzik return pci_register_driver(&sis_pci_driver); 1018669a5db4SJeff Garzik } 1019669a5db4SJeff Garzik 1020669a5db4SJeff Garzik static void __exit sis_exit(void) 1021669a5db4SJeff Garzik { 1022669a5db4SJeff Garzik pci_unregister_driver(&sis_pci_driver); 1023669a5db4SJeff Garzik } 1024669a5db4SJeff Garzik 1025669a5db4SJeff Garzik 1026669a5db4SJeff Garzik module_init(sis_init); 1027669a5db4SJeff Garzik module_exit(sis_exit); 1028669a5db4SJeff Garzik 1029669a5db4SJeff Garzik MODULE_AUTHOR("Alan Cox"); 1030669a5db4SJeff Garzik MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA"); 1031669a5db4SJeff Garzik MODULE_LICENSE("GPL"); 1032669a5db4SJeff Garzik MODULE_DEVICE_TABLE(pci, sis_pci_tbl); 1033669a5db4SJeff Garzik MODULE_VERSION(DRV_VERSION); 1034669a5db4SJeff Garzik 1035