1669a5db4SJeff Garzik /* 2669a5db4SJeff Garzik * pata_sis.c - SiS ATA driver 3669a5db4SJeff Garzik * 4669a5db4SJeff Garzik * (C) 2005 Red Hat <alan@redhat.com> 5669a5db4SJeff Garzik * 6669a5db4SJeff Garzik * Based upon linux/drivers/ide/pci/sis5513.c 7669a5db4SJeff Garzik * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> 8669a5db4SJeff Garzik * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer 9669a5db4SJeff Garzik * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz> 10669a5db4SJeff Garzik * SiS Taiwan : for direct support and hardware. 11669a5db4SJeff Garzik * Daniela Engert : for initial ATA100 advices and numerous others. 12669a5db4SJeff Garzik * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt : 13669a5db4SJeff Garzik * for checking code correctness, providing patches. 14669a5db4SJeff Garzik * Original tests and design on the SiS620 chipset. 15669a5db4SJeff Garzik * ATA100 tests and design on the SiS735 chipset. 16669a5db4SJeff Garzik * ATA16/33 support from specs 17669a5db4SJeff Garzik * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw> 18669a5db4SJeff Garzik * 19669a5db4SJeff Garzik * 20669a5db4SJeff Garzik * TODO 21669a5db4SJeff Garzik * Check MWDMA on drives that don't support MWDMA speed pio cycles ? 22669a5db4SJeff Garzik * More Testing 23669a5db4SJeff Garzik */ 24669a5db4SJeff Garzik 25669a5db4SJeff Garzik #include <linux/kernel.h> 26669a5db4SJeff Garzik #include <linux/module.h> 27669a5db4SJeff Garzik #include <linux/pci.h> 28669a5db4SJeff Garzik #include <linux/init.h> 29669a5db4SJeff Garzik #include <linux/blkdev.h> 30669a5db4SJeff Garzik #include <linux/delay.h> 31669a5db4SJeff Garzik #include <linux/device.h> 32669a5db4SJeff Garzik #include <scsi/scsi_host.h> 33669a5db4SJeff Garzik #include <linux/libata.h> 34669a5db4SJeff Garzik #include <linux/ata.h> 354bb64fb9SAlan #include "sis.h" 36669a5db4SJeff Garzik 37669a5db4SJeff Garzik #define DRV_NAME "pata_sis" 382e413f51SAlan Cox #define DRV_VERSION "0.5.1" 39669a5db4SJeff Garzik 40669a5db4SJeff Garzik struct sis_chipset { 41669a5db4SJeff Garzik u16 device; /* PCI host ID */ 421626aeb8STejun Heo const struct ata_port_info *info; /* Info block */ 43669a5db4SJeff Garzik /* Probably add family, cable detect type etc here to clean 44669a5db4SJeff Garzik up code later */ 45669a5db4SJeff Garzik }; 46669a5db4SJeff Garzik 477dcbc1f2SJakub W. Jozwicki J struct sis_laptop { 487dcbc1f2SJakub W. Jozwicki J u16 device; 497dcbc1f2SJakub W. Jozwicki J u16 subvendor; 507dcbc1f2SJakub W. Jozwicki J u16 subdevice; 517dcbc1f2SJakub W. Jozwicki J }; 527dcbc1f2SJakub W. Jozwicki J 537dcbc1f2SJakub W. Jozwicki J static const struct sis_laptop sis_laptop[] = { 547dcbc1f2SJakub W. Jozwicki J /* devid, subvendor, subdev */ 557dcbc1f2SJakub W. Jozwicki J { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */ 567dcbc1f2SJakub W. Jozwicki J /* end marker */ 577dcbc1f2SJakub W. Jozwicki J { 0, } 587dcbc1f2SJakub W. Jozwicki J }; 597dcbc1f2SJakub W. Jozwicki J 607dcbc1f2SJakub W. Jozwicki J static int sis_short_ata40(struct pci_dev *dev) 617dcbc1f2SJakub W. Jozwicki J { 627dcbc1f2SJakub W. Jozwicki J const struct sis_laptop *lap = &sis_laptop[0]; 637dcbc1f2SJakub W. Jozwicki J 647dcbc1f2SJakub W. Jozwicki J while (lap->device) { 657dcbc1f2SJakub W. Jozwicki J if (lap->device == dev->device && 667dcbc1f2SJakub W. Jozwicki J lap->subvendor == dev->subsystem_vendor && 677dcbc1f2SJakub W. Jozwicki J lap->subdevice == dev->subsystem_device) 687dcbc1f2SJakub W. Jozwicki J return 1; 697dcbc1f2SJakub W. Jozwicki J lap++; 707dcbc1f2SJakub W. Jozwicki J } 717dcbc1f2SJakub W. Jozwicki J 727dcbc1f2SJakub W. Jozwicki J return 0; 737dcbc1f2SJakub W. Jozwicki J } 747dcbc1f2SJakub W. Jozwicki J 75669a5db4SJeff Garzik /** 76dd668d15SAlan Cox * sis_old_port_base - return PCI configuration base for dev 77669a5db4SJeff Garzik * @adev: device 78669a5db4SJeff Garzik * 79669a5db4SJeff Garzik * Returns the base of the PCI configuration registers for this port 80669a5db4SJeff Garzik * number. 81669a5db4SJeff Garzik */ 82669a5db4SJeff Garzik 83dd668d15SAlan Cox static int sis_old_port_base(struct ata_device *adev) 84669a5db4SJeff Garzik { 85669a5db4SJeff Garzik return 0x40 + (4 * adev->ap->port_no) + (2 * adev->devno); 86669a5db4SJeff Garzik } 87669a5db4SJeff Garzik 88669a5db4SJeff Garzik /** 892e413f51SAlan Cox * sis_133_cable_detect - check for 40/80 pin 90669a5db4SJeff Garzik * @ap: Port 91d4b2bab4STejun Heo * @deadline: deadline jiffies for the operation 92669a5db4SJeff Garzik * 93669a5db4SJeff Garzik * Perform cable detection for the later UDMA133 capable 94669a5db4SJeff Garzik * SiS chipset. 95669a5db4SJeff Garzik */ 96669a5db4SJeff Garzik 972e413f51SAlan Cox static int sis_133_cable_detect(struct ata_port *ap) 982e413f51SAlan Cox { 992e413f51SAlan Cox struct pci_dev *pdev = to_pci_dev(ap->host->dev); 1002e413f51SAlan Cox u16 tmp; 1012e413f51SAlan Cox 1022e413f51SAlan Cox /* The top bit of this register is the cable detect bit */ 1032e413f51SAlan Cox pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp); 1042e413f51SAlan Cox if ((tmp & 0x8000) && !sis_short_ata40(pdev)) 1052e413f51SAlan Cox return ATA_CBL_PATA40; 1062e413f51SAlan Cox return ATA_CBL_PATA80; 1072e413f51SAlan Cox } 1082e413f51SAlan Cox 1092e413f51SAlan Cox /** 1102e413f51SAlan Cox * sis_66_cable_detect - check for 40/80 pin 1112e413f51SAlan Cox * @ap: Port 112d4b2bab4STejun Heo * @deadline: deadline jiffies for the operation 1132e413f51SAlan Cox * 1142e413f51SAlan Cox * Perform cable detection on the UDMA66, UDMA100 and early UDMA133 1152e413f51SAlan Cox * SiS IDE controllers. 1162e413f51SAlan Cox */ 1172e413f51SAlan Cox 1182e413f51SAlan Cox static int sis_66_cable_detect(struct ata_port *ap) 1192e413f51SAlan Cox { 1202e413f51SAlan Cox struct pci_dev *pdev = to_pci_dev(ap->host->dev); 1212e413f51SAlan Cox u8 tmp; 1222e413f51SAlan Cox 1232e413f51SAlan Cox /* Older chips keep cable detect in bits 4/5 of reg 0x48 */ 1242e413f51SAlan Cox pci_read_config_byte(pdev, 0x48, &tmp); 1252e413f51SAlan Cox tmp >>= ap->port_no; 1262e413f51SAlan Cox if ((tmp & 0x10) && !sis_short_ata40(pdev)) 1272e413f51SAlan Cox return ATA_CBL_PATA40; 1282e413f51SAlan Cox return ATA_CBL_PATA80; 1292e413f51SAlan Cox } 1302e413f51SAlan Cox 1312e413f51SAlan Cox 1322e413f51SAlan Cox /** 1332e413f51SAlan Cox * sis_pre_reset - probe begin 1342e413f51SAlan Cox * @ap: ATA port 135d4b2bab4STejun Heo * @deadline: deadline jiffies for the operation 1362e413f51SAlan Cox * 1372e413f51SAlan Cox * Set up cable type and use generic probe init 1382e413f51SAlan Cox */ 1392e413f51SAlan Cox 14027c78b37SJeff Garzik static int sis_pre_reset(struct ata_port *ap, unsigned long deadline) 141669a5db4SJeff Garzik { 142669a5db4SJeff Garzik static const struct pci_bits sis_enable_bits[] = { 143669a5db4SJeff Garzik { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ 144669a5db4SJeff Garzik { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ 145669a5db4SJeff Garzik }; 146669a5db4SJeff Garzik 147669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 148669a5db4SJeff Garzik 149c961922bSAlan Cox if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) 150c961922bSAlan Cox return -ENOENT; 151d4b2bab4STejun Heo 152d4b2bab4STejun Heo return ata_std_prereset(ap, deadline); 153669a5db4SJeff Garzik } 154669a5db4SJeff Garzik 1552e413f51SAlan Cox 156669a5db4SJeff Garzik /** 157669a5db4SJeff Garzik * sis_error_handler - Probe specified port on PATA host controller 158669a5db4SJeff Garzik * @ap: Port to probe 159669a5db4SJeff Garzik * 160669a5db4SJeff Garzik * LOCKING: 161669a5db4SJeff Garzik * None (inherited from caller). 162669a5db4SJeff Garzik */ 163669a5db4SJeff Garzik 1642e413f51SAlan Cox static void sis_error_handler(struct ata_port *ap) 165669a5db4SJeff Garzik { 1662e413f51SAlan Cox ata_bmdma_drive_eh(ap, sis_pre_reset, ata_std_softreset, NULL, ata_std_postreset); 167669a5db4SJeff Garzik } 168669a5db4SJeff Garzik 169669a5db4SJeff Garzik /** 170669a5db4SJeff Garzik * sis_set_fifo - Set RWP fifo bits for this device 171669a5db4SJeff Garzik * @ap: Port 172669a5db4SJeff Garzik * @adev: Device 173669a5db4SJeff Garzik * 174669a5db4SJeff Garzik * SIS chipsets implement prefetch/postwrite bits for each device 175669a5db4SJeff Garzik * on both channels. This functionality is not ATAPI compatible and 176669a5db4SJeff Garzik * must be configured according to the class of device present 177669a5db4SJeff Garzik */ 178669a5db4SJeff Garzik 179669a5db4SJeff Garzik static void sis_set_fifo(struct ata_port *ap, struct ata_device *adev) 180669a5db4SJeff Garzik { 181669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 182669a5db4SJeff Garzik u8 fifoctrl; 183669a5db4SJeff Garzik u8 mask = 0x11; 184669a5db4SJeff Garzik 185669a5db4SJeff Garzik mask <<= (2 * ap->port_no); 186669a5db4SJeff Garzik mask <<= adev->devno; 187669a5db4SJeff Garzik 188669a5db4SJeff Garzik /* This holds various bits including the FIFO control */ 189669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x4B, &fifoctrl); 190669a5db4SJeff Garzik fifoctrl &= ~mask; 191669a5db4SJeff Garzik 192669a5db4SJeff Garzik /* Enable for ATA (disk) only */ 193669a5db4SJeff Garzik if (adev->class == ATA_DEV_ATA) 194669a5db4SJeff Garzik fifoctrl |= mask; 195669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4B, fifoctrl); 196669a5db4SJeff Garzik } 197669a5db4SJeff Garzik 198669a5db4SJeff Garzik /** 199669a5db4SJeff Garzik * sis_old_set_piomode - Initialize host controller PATA PIO timings 200669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 201669a5db4SJeff Garzik * @adev: Device we are configuring for. 202669a5db4SJeff Garzik * 203669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 204669a5db4SJeff Garzik * function handles PIO set up for all chips that are pre ATA100 and 205669a5db4SJeff Garzik * also early ATA100 devices. 206669a5db4SJeff Garzik * 207669a5db4SJeff Garzik * LOCKING: 208669a5db4SJeff Garzik * None (inherited from caller). 209669a5db4SJeff Garzik */ 210669a5db4SJeff Garzik 211669a5db4SJeff Garzik static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev) 212669a5db4SJeff Garzik { 213669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 214dd668d15SAlan Cox int port = sis_old_port_base(adev); 215669a5db4SJeff Garzik u8 t1, t2; 216669a5db4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 217669a5db4SJeff Garzik 218669a5db4SJeff Garzik const u8 active[] = { 0x00, 0x07, 0x04, 0x03, 0x01 }; 219669a5db4SJeff Garzik const u8 recovery[] = { 0x00, 0x06, 0x04, 0x03, 0x03 }; 220669a5db4SJeff Garzik 221669a5db4SJeff Garzik sis_set_fifo(ap, adev); 222669a5db4SJeff Garzik 223669a5db4SJeff Garzik pci_read_config_byte(pdev, port, &t1); 224669a5db4SJeff Garzik pci_read_config_byte(pdev, port + 1, &t2); 225669a5db4SJeff Garzik 226669a5db4SJeff Garzik t1 &= ~0x0F; /* Clear active/recovery timings */ 227669a5db4SJeff Garzik t2 &= ~0x07; 228669a5db4SJeff Garzik 229669a5db4SJeff Garzik t1 |= active[speed]; 230669a5db4SJeff Garzik t2 |= recovery[speed]; 231669a5db4SJeff Garzik 232669a5db4SJeff Garzik pci_write_config_byte(pdev, port, t1); 233669a5db4SJeff Garzik pci_write_config_byte(pdev, port + 1, t2); 234669a5db4SJeff Garzik } 235669a5db4SJeff Garzik 236669a5db4SJeff Garzik /** 237669a5db4SJeff Garzik * sis_100_set_pioode - Initialize host controller PATA PIO timings 238669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 239669a5db4SJeff Garzik * @adev: Device we are configuring for. 240669a5db4SJeff Garzik * 241669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 242669a5db4SJeff Garzik * function handles PIO set up for ATA100 devices and early ATA133. 243669a5db4SJeff Garzik * 244669a5db4SJeff Garzik * LOCKING: 245669a5db4SJeff Garzik * None (inherited from caller). 246669a5db4SJeff Garzik */ 247669a5db4SJeff Garzik 248669a5db4SJeff Garzik static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev) 249669a5db4SJeff Garzik { 250669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 251dd668d15SAlan Cox int port = sis_old_port_base(adev); 252669a5db4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 253669a5db4SJeff Garzik 254669a5db4SJeff Garzik const u8 actrec[] = { 0x00, 0x67, 0x44, 0x33, 0x31 }; 255669a5db4SJeff Garzik 256669a5db4SJeff Garzik sis_set_fifo(ap, adev); 257669a5db4SJeff Garzik 258669a5db4SJeff Garzik pci_write_config_byte(pdev, port, actrec[speed]); 259669a5db4SJeff Garzik } 260669a5db4SJeff Garzik 261669a5db4SJeff Garzik /** 262669a5db4SJeff Garzik * sis_133_set_pioode - Initialize host controller PATA PIO timings 263669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 264669a5db4SJeff Garzik * @adev: Device we are configuring for. 265669a5db4SJeff Garzik * 266669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 267669a5db4SJeff Garzik * function handles PIO set up for the later ATA133 devices. 268669a5db4SJeff Garzik * 269669a5db4SJeff Garzik * LOCKING: 270669a5db4SJeff Garzik * None (inherited from caller). 271669a5db4SJeff Garzik */ 272669a5db4SJeff Garzik 273669a5db4SJeff Garzik static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev) 274669a5db4SJeff Garzik { 275669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 276669a5db4SJeff Garzik int port = 0x40; 277669a5db4SJeff Garzik u32 t1; 278669a5db4SJeff Garzik u32 reg54; 279669a5db4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 280669a5db4SJeff Garzik 281669a5db4SJeff Garzik const u32 timing133[] = { 282669a5db4SJeff Garzik 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */ 283669a5db4SJeff Garzik 0x0C266000, 284669a5db4SJeff Garzik 0x04263000, 285669a5db4SJeff Garzik 0x0C0A3000, 286669a5db4SJeff Garzik 0x05093000 287669a5db4SJeff Garzik }; 288669a5db4SJeff Garzik const u32 timing100[] = { 289669a5db4SJeff Garzik 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */ 290669a5db4SJeff Garzik 0x091C4000, 291669a5db4SJeff Garzik 0x031C2000, 292669a5db4SJeff Garzik 0x09072000, 293669a5db4SJeff Garzik 0x04062000 294669a5db4SJeff Garzik }; 295669a5db4SJeff Garzik 296669a5db4SJeff Garzik sis_set_fifo(ap, adev); 297669a5db4SJeff Garzik 298669a5db4SJeff Garzik /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ 299669a5db4SJeff Garzik pci_read_config_dword(pdev, 0x54, ®54); 300669a5db4SJeff Garzik if (reg54 & 0x40000000) 301669a5db4SJeff Garzik port = 0x70; 302669a5db4SJeff Garzik port += 8 * ap->port_no + 4 * adev->devno; 303669a5db4SJeff Garzik 304669a5db4SJeff Garzik pci_read_config_dword(pdev, port, &t1); 305669a5db4SJeff Garzik t1 &= 0xC0C00FFF; /* Mask out timing */ 306669a5db4SJeff Garzik 307669a5db4SJeff Garzik if (t1 & 0x08) /* 100 or 133 ? */ 308669a5db4SJeff Garzik t1 |= timing133[speed]; 309669a5db4SJeff Garzik else 310669a5db4SJeff Garzik t1 |= timing100[speed]; 311669a5db4SJeff Garzik pci_write_config_byte(pdev, port, t1); 312669a5db4SJeff Garzik } 313669a5db4SJeff Garzik 314669a5db4SJeff Garzik /** 315669a5db4SJeff Garzik * sis_old_set_dmamode - Initialize host controller PATA DMA timings 316669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 317669a5db4SJeff Garzik * @adev: Device to program 318669a5db4SJeff Garzik * 319669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 320669a5db4SJeff Garzik * Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike 321669a5db4SJeff Garzik * the old ide/pci driver. 322669a5db4SJeff Garzik * 323669a5db4SJeff Garzik * LOCKING: 324669a5db4SJeff Garzik * None (inherited from caller). 325669a5db4SJeff Garzik */ 326669a5db4SJeff Garzik 327669a5db4SJeff Garzik static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev) 328669a5db4SJeff Garzik { 329669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 330669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 331dd668d15SAlan Cox int drive_pci = sis_old_port_base(adev); 332669a5db4SJeff Garzik u16 timing; 333669a5db4SJeff Garzik 334669a5db4SJeff Garzik const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; 335669a5db4SJeff Garzik const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 }; 336669a5db4SJeff Garzik 337669a5db4SJeff Garzik pci_read_config_word(pdev, drive_pci, &timing); 338669a5db4SJeff Garzik 339669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 340669a5db4SJeff Garzik /* bits 3-0 hold recovery timing bits 8-10 active timing and 341669a5db4SJeff Garzik the higer bits are dependant on the device */ 342669a5db4SJeff Garzik timing &= ~ 0x870F; 343669a5db4SJeff Garzik timing |= mwdma_bits[speed]; 344669a5db4SJeff Garzik pci_write_config_word(pdev, drive_pci, timing); 345669a5db4SJeff Garzik } else { 346669a5db4SJeff Garzik /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */ 347669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 348669a5db4SJeff Garzik timing &= ~0x6000; 349669a5db4SJeff Garzik timing |= udma_bits[speed]; 350669a5db4SJeff Garzik } 351669a5db4SJeff Garzik } 352669a5db4SJeff Garzik 353669a5db4SJeff Garzik /** 354669a5db4SJeff Garzik * sis_66_set_dmamode - Initialize host controller PATA DMA timings 355669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 356669a5db4SJeff Garzik * @adev: Device to program 357669a5db4SJeff Garzik * 358669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 359669a5db4SJeff Garzik * Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike 360669a5db4SJeff Garzik * the old ide/pci driver. 361669a5db4SJeff Garzik * 362669a5db4SJeff Garzik * LOCKING: 363669a5db4SJeff Garzik * None (inherited from caller). 364669a5db4SJeff Garzik */ 365669a5db4SJeff Garzik 366669a5db4SJeff Garzik static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev) 367669a5db4SJeff Garzik { 368669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 369669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 370dd668d15SAlan Cox int drive_pci = sis_old_port_base(adev); 371669a5db4SJeff Garzik u16 timing; 372669a5db4SJeff Garzik 373669a5db4SJeff Garzik const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; 374669a5db4SJeff Garzik const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000}; 375669a5db4SJeff Garzik 376669a5db4SJeff Garzik pci_read_config_word(pdev, drive_pci, &timing); 377669a5db4SJeff Garzik 378669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 379669a5db4SJeff Garzik /* bits 3-0 hold recovery timing bits 8-10 active timing and 380669a5db4SJeff Garzik the higer bits are dependant on the device, bit 15 udma */ 381669a5db4SJeff Garzik timing &= ~0x870F; 382669a5db4SJeff Garzik timing |= mwdma_bits[speed]; 383669a5db4SJeff Garzik } else { 384669a5db4SJeff Garzik /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ 385669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 386dd668d15SAlan Cox timing &= ~0xF000; 387669a5db4SJeff Garzik timing |= udma_bits[speed]; 388669a5db4SJeff Garzik } 389669a5db4SJeff Garzik pci_write_config_word(pdev, drive_pci, timing); 390669a5db4SJeff Garzik } 391669a5db4SJeff Garzik 392669a5db4SJeff Garzik /** 393669a5db4SJeff Garzik * sis_100_set_dmamode - Initialize host controller PATA DMA timings 394669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 395669a5db4SJeff Garzik * @adev: Device to program 396669a5db4SJeff Garzik * 397669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 398669a5db4SJeff Garzik * Handles UDMA66 and early UDMA100 devices. 399669a5db4SJeff Garzik * 400669a5db4SJeff Garzik * LOCKING: 401669a5db4SJeff Garzik * None (inherited from caller). 402669a5db4SJeff Garzik */ 403669a5db4SJeff Garzik 404669a5db4SJeff Garzik static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev) 405669a5db4SJeff Garzik { 406669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 407669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 408dd668d15SAlan Cox int drive_pci = sis_old_port_base(adev); 409dd668d15SAlan Cox u8 timing; 410669a5db4SJeff Garzik 411dd668d15SAlan Cox const u8 udma_bits[] = { 0x8B, 0x87, 0x85, 0x83, 0x82, 0x81}; 412669a5db4SJeff Garzik 413dd668d15SAlan Cox pci_read_config_byte(pdev, drive_pci + 1, &timing); 414669a5db4SJeff Garzik 415669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 416669a5db4SJeff Garzik /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */ 417669a5db4SJeff Garzik } else { 418dd668d15SAlan Cox /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */ 419669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 420dd668d15SAlan Cox timing &= ~0x8F; 421669a5db4SJeff Garzik timing |= udma_bits[speed]; 422669a5db4SJeff Garzik } 423dd668d15SAlan Cox pci_write_config_byte(pdev, drive_pci + 1, timing); 424669a5db4SJeff Garzik } 425669a5db4SJeff Garzik 426669a5db4SJeff Garzik /** 427669a5db4SJeff Garzik * sis_133_early_set_dmamode - Initialize host controller PATA DMA timings 428669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 429669a5db4SJeff Garzik * @adev: Device to program 430669a5db4SJeff Garzik * 431669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 432669a5db4SJeff Garzik * Handles early SiS 961 bridges. Supports MWDMA as well unlike 433669a5db4SJeff Garzik * the old ide/pci driver. 434669a5db4SJeff Garzik * 435669a5db4SJeff Garzik * LOCKING: 436669a5db4SJeff Garzik * None (inherited from caller). 437669a5db4SJeff Garzik */ 438669a5db4SJeff Garzik 439669a5db4SJeff Garzik static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *adev) 440669a5db4SJeff Garzik { 441669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 442669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 443dd668d15SAlan Cox int drive_pci = sis_old_port_base(adev); 444dd668d15SAlan Cox u8 timing; 445dd668d15SAlan Cox /* Low 4 bits are timing */ 446dd668d15SAlan Cox static const u8 udma_bits[] = { 0x8F, 0x8A, 0x87, 0x85, 0x83, 0x82, 0x81}; 447669a5db4SJeff Garzik 448dd668d15SAlan Cox pci_read_config_byte(pdev, drive_pci + 1, &timing); 449669a5db4SJeff Garzik 450669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 451669a5db4SJeff Garzik /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */ 452669a5db4SJeff Garzik } else { 453dd668d15SAlan Cox /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */ 454669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 455dd668d15SAlan Cox timing &= ~0x8F; 456669a5db4SJeff Garzik timing |= udma_bits[speed]; 457669a5db4SJeff Garzik } 458dd668d15SAlan Cox pci_write_config_byte(pdev, drive_pci + 1, timing); 459669a5db4SJeff Garzik } 460669a5db4SJeff Garzik 461669a5db4SJeff Garzik /** 462669a5db4SJeff Garzik * sis_133_set_dmamode - Initialize host controller PATA DMA timings 463669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 464669a5db4SJeff Garzik * @adev: Device to program 465669a5db4SJeff Garzik * 466669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 467669a5db4SJeff Garzik * Handles early SiS 961 bridges. Supports MWDMA as well unlike 468669a5db4SJeff Garzik * the old ide/pci driver. 469669a5db4SJeff Garzik * 470669a5db4SJeff Garzik * LOCKING: 471669a5db4SJeff Garzik * None (inherited from caller). 472669a5db4SJeff Garzik */ 473669a5db4SJeff Garzik 474669a5db4SJeff Garzik static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev) 475669a5db4SJeff Garzik { 476669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 477669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 478669a5db4SJeff Garzik int port = 0x40; 479669a5db4SJeff Garzik u32 t1; 480669a5db4SJeff Garzik u32 reg54; 481669a5db4SJeff Garzik 482669a5db4SJeff Garzik /* bits 4- cycle time 8 - cvs time */ 4832e413f51SAlan Cox static const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 }; 4842e413f51SAlan Cox static const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 }; 485669a5db4SJeff Garzik 486669a5db4SJeff Garzik /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ 487669a5db4SJeff Garzik pci_read_config_dword(pdev, 0x54, ®54); 488669a5db4SJeff Garzik if (reg54 & 0x40000000) 489669a5db4SJeff Garzik port = 0x70; 490669a5db4SJeff Garzik port += (8 * ap->port_no) + (4 * adev->devno); 491669a5db4SJeff Garzik 492669a5db4SJeff Garzik pci_read_config_dword(pdev, port, &t1); 493669a5db4SJeff Garzik 494669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 495669a5db4SJeff Garzik t1 &= ~0x00000004; 496669a5db4SJeff Garzik /* FIXME: need data sheet to add MWDMA here. Also lacking on 497669a5db4SJeff Garzik ide/pci driver */ 498669a5db4SJeff Garzik } else { 499669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 500669a5db4SJeff Garzik /* if & 8 no UDMA133 - need info for ... */ 501669a5db4SJeff Garzik t1 &= ~0x00000FF0; 502669a5db4SJeff Garzik t1 |= 0x00000004; 503669a5db4SJeff Garzik if (t1 & 0x08) 504669a5db4SJeff Garzik t1 |= timing_u133[speed]; 505669a5db4SJeff Garzik else 506669a5db4SJeff Garzik t1 |= timing_u100[speed]; 507669a5db4SJeff Garzik } 508669a5db4SJeff Garzik pci_write_config_dword(pdev, port, t1); 509669a5db4SJeff Garzik } 510669a5db4SJeff Garzik 511669a5db4SJeff Garzik static struct scsi_host_template sis_sht = { 512669a5db4SJeff Garzik .module = THIS_MODULE, 513669a5db4SJeff Garzik .name = DRV_NAME, 514669a5db4SJeff Garzik .ioctl = ata_scsi_ioctl, 515669a5db4SJeff Garzik .queuecommand = ata_scsi_queuecmd, 516669a5db4SJeff Garzik .can_queue = ATA_DEF_QUEUE, 517669a5db4SJeff Garzik .this_id = ATA_SHT_THIS_ID, 518669a5db4SJeff Garzik .sg_tablesize = LIBATA_MAX_PRD, 519669a5db4SJeff Garzik .cmd_per_lun = ATA_SHT_CMD_PER_LUN, 520669a5db4SJeff Garzik .emulated = ATA_SHT_EMULATED, 521669a5db4SJeff Garzik .use_clustering = ATA_SHT_USE_CLUSTERING, 522669a5db4SJeff Garzik .proc_name = DRV_NAME, 523669a5db4SJeff Garzik .dma_boundary = ATA_DMA_BOUNDARY, 524669a5db4SJeff Garzik .slave_configure = ata_scsi_slave_config, 525afdfe899STejun Heo .slave_destroy = ata_scsi_slave_destroy, 526669a5db4SJeff Garzik .bios_param = ata_std_bios_param, 527669a5db4SJeff Garzik }; 528669a5db4SJeff Garzik 529669a5db4SJeff Garzik static const struct ata_port_operations sis_133_ops = { 530669a5db4SJeff Garzik .port_disable = ata_port_disable, 531669a5db4SJeff Garzik .set_piomode = sis_133_set_piomode, 532669a5db4SJeff Garzik .set_dmamode = sis_133_set_dmamode, 533669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 534669a5db4SJeff Garzik 535669a5db4SJeff Garzik .tf_load = ata_tf_load, 536669a5db4SJeff Garzik .tf_read = ata_tf_read, 537669a5db4SJeff Garzik .check_status = ata_check_status, 538669a5db4SJeff Garzik .exec_command = ata_exec_command, 539669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 540669a5db4SJeff Garzik 541669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 542669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 5432e413f51SAlan Cox .error_handler = sis_error_handler, 544669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 5452e413f51SAlan Cox .cable_detect = sis_133_cable_detect, 546669a5db4SJeff Garzik 547669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 548669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 549669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 550669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 551669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 552669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 5530d5ff566STejun Heo .data_xfer = ata_data_xfer, 554669a5db4SJeff Garzik 555669a5db4SJeff Garzik .irq_handler = ata_interrupt, 556669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 557246ce3b6SAkira Iguchi .irq_on = ata_irq_on, 558246ce3b6SAkira Iguchi .irq_ack = ata_irq_ack, 559669a5db4SJeff Garzik 560669a5db4SJeff Garzik .port_start = ata_port_start, 561669a5db4SJeff Garzik }; 562669a5db4SJeff Garzik 563a3cabb27SUwe Koziolek static const struct ata_port_operations sis_133_for_sata_ops = { 564a3cabb27SUwe Koziolek .port_disable = ata_port_disable, 565a3cabb27SUwe Koziolek .set_piomode = sis_133_set_piomode, 566a3cabb27SUwe Koziolek .set_dmamode = sis_133_set_dmamode, 567a3cabb27SUwe Koziolek .mode_filter = ata_pci_default_filter, 568a3cabb27SUwe Koziolek 569a3cabb27SUwe Koziolek .tf_load = ata_tf_load, 570a3cabb27SUwe Koziolek .tf_read = ata_tf_read, 571a3cabb27SUwe Koziolek .check_status = ata_check_status, 572a3cabb27SUwe Koziolek .exec_command = ata_exec_command, 573a3cabb27SUwe Koziolek .dev_select = ata_std_dev_select, 574a3cabb27SUwe Koziolek 575a3cabb27SUwe Koziolek .freeze = ata_bmdma_freeze, 576a3cabb27SUwe Koziolek .thaw = ata_bmdma_thaw, 577a3cabb27SUwe Koziolek .error_handler = ata_bmdma_error_handler, 578a3cabb27SUwe Koziolek .post_internal_cmd = ata_bmdma_post_internal_cmd, 579a3cabb27SUwe Koziolek .cable_detect = sis_133_cable_detect, 580a3cabb27SUwe Koziolek 581a3cabb27SUwe Koziolek .bmdma_setup = ata_bmdma_setup, 582a3cabb27SUwe Koziolek .bmdma_start = ata_bmdma_start, 583a3cabb27SUwe Koziolek .bmdma_stop = ata_bmdma_stop, 584a3cabb27SUwe Koziolek .bmdma_status = ata_bmdma_status, 585a3cabb27SUwe Koziolek .qc_prep = ata_qc_prep, 586a3cabb27SUwe Koziolek .qc_issue = ata_qc_issue_prot, 587a3cabb27SUwe Koziolek .data_xfer = ata_data_xfer, 588a3cabb27SUwe Koziolek 589a3cabb27SUwe Koziolek .irq_handler = ata_interrupt, 590a3cabb27SUwe Koziolek .irq_clear = ata_bmdma_irq_clear, 591a3cabb27SUwe Koziolek .irq_on = ata_irq_on, 592a3cabb27SUwe Koziolek .irq_ack = ata_irq_ack, 593a3cabb27SUwe Koziolek 594a3cabb27SUwe Koziolek .port_start = ata_port_start, 595a3cabb27SUwe Koziolek }; 596a3cabb27SUwe Koziolek 597669a5db4SJeff Garzik static const struct ata_port_operations sis_133_early_ops = { 598669a5db4SJeff Garzik .port_disable = ata_port_disable, 599669a5db4SJeff Garzik .set_piomode = sis_100_set_piomode, 600669a5db4SJeff Garzik .set_dmamode = sis_133_early_set_dmamode, 601669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 602669a5db4SJeff Garzik 603669a5db4SJeff Garzik .tf_load = ata_tf_load, 604669a5db4SJeff Garzik .tf_read = ata_tf_read, 605669a5db4SJeff Garzik .check_status = ata_check_status, 606669a5db4SJeff Garzik .exec_command = ata_exec_command, 607669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 608669a5db4SJeff Garzik 609669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 610669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 6112e413f51SAlan Cox .error_handler = sis_error_handler, 612669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 6132e413f51SAlan Cox .cable_detect = sis_66_cable_detect, 614669a5db4SJeff Garzik 615669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 616669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 617669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 618669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 619669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 620669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 6210d5ff566STejun Heo .data_xfer = ata_data_xfer, 622669a5db4SJeff Garzik 623669a5db4SJeff Garzik .irq_handler = ata_interrupt, 624669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 625246ce3b6SAkira Iguchi .irq_on = ata_irq_on, 626246ce3b6SAkira Iguchi .irq_ack = ata_irq_ack, 627669a5db4SJeff Garzik 628669a5db4SJeff Garzik .port_start = ata_port_start, 629669a5db4SJeff Garzik }; 630669a5db4SJeff Garzik 631669a5db4SJeff Garzik static const struct ata_port_operations sis_100_ops = { 632669a5db4SJeff Garzik .port_disable = ata_port_disable, 633669a5db4SJeff Garzik .set_piomode = sis_100_set_piomode, 634669a5db4SJeff Garzik .set_dmamode = sis_100_set_dmamode, 635669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 636669a5db4SJeff Garzik 637669a5db4SJeff Garzik .tf_load = ata_tf_load, 638669a5db4SJeff Garzik .tf_read = ata_tf_read, 639669a5db4SJeff Garzik .check_status = ata_check_status, 640669a5db4SJeff Garzik .exec_command = ata_exec_command, 641669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 642669a5db4SJeff Garzik 643669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 644669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 6452e413f51SAlan Cox .error_handler = sis_error_handler, 646669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 6472e413f51SAlan Cox .cable_detect = sis_66_cable_detect, 648669a5db4SJeff Garzik 649669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 650669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 651669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 652669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 653669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 654669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 6550d5ff566STejun Heo .data_xfer = ata_data_xfer, 656669a5db4SJeff Garzik 657669a5db4SJeff Garzik .irq_handler = ata_interrupt, 658669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 659246ce3b6SAkira Iguchi .irq_on = ata_irq_on, 660246ce3b6SAkira Iguchi .irq_ack = ata_irq_ack, 661669a5db4SJeff Garzik 662669a5db4SJeff Garzik .port_start = ata_port_start, 663669a5db4SJeff Garzik }; 664669a5db4SJeff Garzik 665669a5db4SJeff Garzik static const struct ata_port_operations sis_66_ops = { 666669a5db4SJeff Garzik .port_disable = ata_port_disable, 667669a5db4SJeff Garzik .set_piomode = sis_old_set_piomode, 668669a5db4SJeff Garzik .set_dmamode = sis_66_set_dmamode, 669669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 670669a5db4SJeff Garzik 671669a5db4SJeff Garzik .tf_load = ata_tf_load, 672669a5db4SJeff Garzik .tf_read = ata_tf_read, 673669a5db4SJeff Garzik .check_status = ata_check_status, 674669a5db4SJeff Garzik .exec_command = ata_exec_command, 675669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 6762e413f51SAlan Cox .cable_detect = sis_66_cable_detect, 677669a5db4SJeff Garzik 678669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 679669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 6802e413f51SAlan Cox .error_handler = sis_error_handler, 681669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 682669a5db4SJeff Garzik 683669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 684669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 685669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 686669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 687669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 688669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 6890d5ff566STejun Heo .data_xfer = ata_data_xfer, 690669a5db4SJeff Garzik 691669a5db4SJeff Garzik .irq_handler = ata_interrupt, 692669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 693246ce3b6SAkira Iguchi .irq_on = ata_irq_on, 694246ce3b6SAkira Iguchi .irq_ack = ata_irq_ack, 695669a5db4SJeff Garzik 696669a5db4SJeff Garzik .port_start = ata_port_start, 697669a5db4SJeff Garzik }; 698669a5db4SJeff Garzik 699669a5db4SJeff Garzik static const struct ata_port_operations sis_old_ops = { 700669a5db4SJeff Garzik .port_disable = ata_port_disable, 701669a5db4SJeff Garzik .set_piomode = sis_old_set_piomode, 702669a5db4SJeff Garzik .set_dmamode = sis_old_set_dmamode, 703669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 704669a5db4SJeff Garzik 705669a5db4SJeff Garzik .tf_load = ata_tf_load, 706669a5db4SJeff Garzik .tf_read = ata_tf_read, 707669a5db4SJeff Garzik .check_status = ata_check_status, 708669a5db4SJeff Garzik .exec_command = ata_exec_command, 709669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 710669a5db4SJeff Garzik 711669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 712669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 7132e413f51SAlan Cox .error_handler = sis_error_handler, 714669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 7152e413f51SAlan Cox .cable_detect = ata_cable_40wire, 716669a5db4SJeff Garzik 717669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 718669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 719669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 720669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 721669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 722669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 7230d5ff566STejun Heo .data_xfer = ata_data_xfer, 724669a5db4SJeff Garzik 725669a5db4SJeff Garzik .irq_handler = ata_interrupt, 726669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 727246ce3b6SAkira Iguchi .irq_on = ata_irq_on, 728246ce3b6SAkira Iguchi .irq_ack = ata_irq_ack, 729669a5db4SJeff Garzik 730669a5db4SJeff Garzik .port_start = ata_port_start, 731669a5db4SJeff Garzik }; 732669a5db4SJeff Garzik 7331626aeb8STejun Heo static const struct ata_port_info sis_info = { 734669a5db4SJeff Garzik .sht = &sis_sht, 735669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 736669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 737669a5db4SJeff Garzik .mwdma_mask = 0x07, 738669a5db4SJeff Garzik .udma_mask = 0, 739669a5db4SJeff Garzik .port_ops = &sis_old_ops, 740669a5db4SJeff Garzik }; 7411626aeb8STejun Heo static const struct ata_port_info sis_info33 = { 742669a5db4SJeff Garzik .sht = &sis_sht, 743669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 744669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 745669a5db4SJeff Garzik .mwdma_mask = 0x07, 746669a5db4SJeff Garzik .udma_mask = ATA_UDMA2, /* UDMA 33 */ 747669a5db4SJeff Garzik .port_ops = &sis_old_ops, 748669a5db4SJeff Garzik }; 7491626aeb8STejun Heo static const struct ata_port_info sis_info66 = { 750669a5db4SJeff Garzik .sht = &sis_sht, 751669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 752669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 753669a5db4SJeff Garzik .udma_mask = ATA_UDMA4, /* UDMA 66 */ 754669a5db4SJeff Garzik .port_ops = &sis_66_ops, 755669a5db4SJeff Garzik }; 7561626aeb8STejun Heo static const struct ata_port_info sis_info100 = { 757669a5db4SJeff Garzik .sht = &sis_sht, 758669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 759669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 760669a5db4SJeff Garzik .udma_mask = ATA_UDMA5, 761669a5db4SJeff Garzik .port_ops = &sis_100_ops, 762669a5db4SJeff Garzik }; 7631626aeb8STejun Heo static const struct ata_port_info sis_info100_early = { 764669a5db4SJeff Garzik .sht = &sis_sht, 765669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 766669a5db4SJeff Garzik .udma_mask = ATA_UDMA5, 767669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 768669a5db4SJeff Garzik .port_ops = &sis_66_ops, 769669a5db4SJeff Garzik }; 770a3cabb27SUwe Koziolek static const struct ata_port_info sis_info133 = { 771669a5db4SJeff Garzik .sht = &sis_sht, 772669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 773669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 774669a5db4SJeff Garzik .udma_mask = ATA_UDMA6, 775669a5db4SJeff Garzik .port_ops = &sis_133_ops, 776669a5db4SJeff Garzik }; 777a3cabb27SUwe Koziolek const struct ata_port_info sis_info133_for_sata = { 778a3cabb27SUwe Koziolek .sht = &sis_sht, 779a3cabb27SUwe Koziolek .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 780a3cabb27SUwe Koziolek .pio_mask = 0x1f, /* pio0-4 */ 781a3cabb27SUwe Koziolek .udma_mask = ATA_UDMA6, 782a3cabb27SUwe Koziolek .port_ops = &sis_133_for_sata_ops, 783a3cabb27SUwe Koziolek }; 7841626aeb8STejun Heo static const struct ata_port_info sis_info133_early = { 785669a5db4SJeff Garzik .sht = &sis_sht, 786669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 787669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 788669a5db4SJeff Garzik .udma_mask = ATA_UDMA6, 789669a5db4SJeff Garzik .port_ops = &sis_133_early_ops, 790669a5db4SJeff Garzik }; 791669a5db4SJeff Garzik 7929b14dec5SAlan /* Privately shared with the SiS180 SATA driver, not for use elsewhere */ 793a3cabb27SUwe Koziolek EXPORT_SYMBOL_GPL(sis_info133_for_sata); 794669a5db4SJeff Garzik 795669a5db4SJeff Garzik static void sis_fixup(struct pci_dev *pdev, struct sis_chipset *sis) 796669a5db4SJeff Garzik { 797669a5db4SJeff Garzik u16 regw; 798669a5db4SJeff Garzik u8 reg; 799669a5db4SJeff Garzik 800669a5db4SJeff Garzik if (sis->info == &sis_info133) { 801669a5db4SJeff Garzik pci_read_config_word(pdev, 0x50, ®w); 802669a5db4SJeff Garzik if (regw & 0x08) 803669a5db4SJeff Garzik pci_write_config_word(pdev, 0x50, regw & ~0x08); 804669a5db4SJeff Garzik pci_read_config_word(pdev, 0x52, ®w); 805669a5db4SJeff Garzik if (regw & 0x08) 806669a5db4SJeff Garzik pci_write_config_word(pdev, 0x52, regw & ~0x08); 807669a5db4SJeff Garzik return; 808669a5db4SJeff Garzik } 809669a5db4SJeff Garzik 810669a5db4SJeff Garzik if (sis->info == &sis_info133_early || sis->info == &sis_info100) { 811669a5db4SJeff Garzik /* Fix up latency */ 812669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80); 813669a5db4SJeff Garzik /* Set compatibility bit */ 814669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x49, ®); 815669a5db4SJeff Garzik if (!(reg & 0x01)) 816669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x49, reg | 0x01); 817669a5db4SJeff Garzik return; 818669a5db4SJeff Garzik } 819669a5db4SJeff Garzik 820669a5db4SJeff Garzik if (sis->info == &sis_info66 || sis->info == &sis_info100_early) { 821669a5db4SJeff Garzik /* Fix up latency */ 822669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80); 823669a5db4SJeff Garzik /* Set compatibility bit */ 824669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x52, ®); 825669a5db4SJeff Garzik if (!(reg & 0x04)) 826669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x52, reg | 0x04); 827669a5db4SJeff Garzik return; 828669a5db4SJeff Garzik } 829669a5db4SJeff Garzik 830669a5db4SJeff Garzik if (sis->info == &sis_info33) { 831669a5db4SJeff Garzik pci_read_config_byte(pdev, PCI_CLASS_PROG, ®); 832669a5db4SJeff Garzik if (( reg & 0x0F ) != 0x00) 833669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_CLASS_PROG, reg & 0xF0); 834669a5db4SJeff Garzik /* Fall through to ATA16 fixup below */ 835669a5db4SJeff Garzik } 836669a5db4SJeff Garzik 837669a5db4SJeff Garzik if (sis->info == &sis_info || sis->info == &sis_info33) { 838669a5db4SJeff Garzik /* force per drive recovery and active timings 839669a5db4SJeff Garzik needed on ATA_33 and below chips */ 840669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x52, ®); 841669a5db4SJeff Garzik if (!(reg & 0x08)) 842669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x52, reg|0x08); 843669a5db4SJeff Garzik return; 844669a5db4SJeff Garzik } 845669a5db4SJeff Garzik 846669a5db4SJeff Garzik BUG(); 847669a5db4SJeff Garzik } 848669a5db4SJeff Garzik 849669a5db4SJeff Garzik /** 850669a5db4SJeff Garzik * sis_init_one - Register SiS ATA PCI device with kernel services 851669a5db4SJeff Garzik * @pdev: PCI device to register 852669a5db4SJeff Garzik * @ent: Entry in sis_pci_tbl matching with @pdev 853669a5db4SJeff Garzik * 854669a5db4SJeff Garzik * Called from kernel PCI layer. We probe for combined mode (sigh), 855669a5db4SJeff Garzik * and then hand over control to libata, for it to do the rest. 856669a5db4SJeff Garzik * 857669a5db4SJeff Garzik * LOCKING: 858669a5db4SJeff Garzik * Inherited from PCI layer (may sleep). 859669a5db4SJeff Garzik * 860669a5db4SJeff Garzik * RETURNS: 861669a5db4SJeff Garzik * Zero on success, or -ERRNO value. 862669a5db4SJeff Garzik */ 863669a5db4SJeff Garzik 864669a5db4SJeff Garzik static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 865669a5db4SJeff Garzik { 866669a5db4SJeff Garzik static int printed_version; 8671626aeb8STejun Heo struct ata_port_info port; 8681626aeb8STejun Heo const struct ata_port_info *ppi[] = { &port, NULL }; 869669a5db4SJeff Garzik struct pci_dev *host = NULL; 870669a5db4SJeff Garzik struct sis_chipset *chipset = NULL; 871f3769e9dSAlan Cox struct sis_chipset *sets; 872669a5db4SJeff Garzik 873669a5db4SJeff Garzik static struct sis_chipset sis_chipsets[] = { 874af323a2fSAlan Cox 875af323a2fSAlan Cox { 0x0968, &sis_info133 }, 876af323a2fSAlan Cox { 0x0966, &sis_info133 }, 877af323a2fSAlan Cox { 0x0965, &sis_info133 }, 878669a5db4SJeff Garzik { 0x0745, &sis_info100 }, 879669a5db4SJeff Garzik { 0x0735, &sis_info100 }, 880669a5db4SJeff Garzik { 0x0733, &sis_info100 }, 881669a5db4SJeff Garzik { 0x0635, &sis_info100 }, 882669a5db4SJeff Garzik { 0x0633, &sis_info100 }, 883669a5db4SJeff Garzik 884669a5db4SJeff Garzik { 0x0730, &sis_info100_early }, /* 100 with ATA 66 layout */ 885669a5db4SJeff Garzik { 0x0550, &sis_info100_early }, /* 100 with ATA 66 layout */ 886669a5db4SJeff Garzik 887669a5db4SJeff Garzik { 0x0640, &sis_info66 }, 888669a5db4SJeff Garzik { 0x0630, &sis_info66 }, 889669a5db4SJeff Garzik { 0x0620, &sis_info66 }, 890669a5db4SJeff Garzik { 0x0540, &sis_info66 }, 891669a5db4SJeff Garzik { 0x0530, &sis_info66 }, 892669a5db4SJeff Garzik 893669a5db4SJeff Garzik { 0x5600, &sis_info33 }, 894669a5db4SJeff Garzik { 0x5598, &sis_info33 }, 895669a5db4SJeff Garzik { 0x5597, &sis_info33 }, 896669a5db4SJeff Garzik { 0x5591, &sis_info33 }, 897669a5db4SJeff Garzik { 0x5582, &sis_info33 }, 898669a5db4SJeff Garzik { 0x5581, &sis_info33 }, 899669a5db4SJeff Garzik 900669a5db4SJeff Garzik { 0x5596, &sis_info }, 901669a5db4SJeff Garzik { 0x5571, &sis_info }, 902669a5db4SJeff Garzik { 0x5517, &sis_info }, 903669a5db4SJeff Garzik { 0x5511, &sis_info }, 904669a5db4SJeff Garzik 905669a5db4SJeff Garzik {0} 906669a5db4SJeff Garzik }; 907669a5db4SJeff Garzik static struct sis_chipset sis133_early = { 908669a5db4SJeff Garzik 0x0, &sis_info133_early 909669a5db4SJeff Garzik }; 910669a5db4SJeff Garzik static struct sis_chipset sis133 = { 911669a5db4SJeff Garzik 0x0, &sis_info133 912669a5db4SJeff Garzik }; 913669a5db4SJeff Garzik static struct sis_chipset sis100_early = { 914669a5db4SJeff Garzik 0x0, &sis_info100_early 915669a5db4SJeff Garzik }; 916669a5db4SJeff Garzik static struct sis_chipset sis100 = { 917669a5db4SJeff Garzik 0x0, &sis_info100 918669a5db4SJeff Garzik }; 919669a5db4SJeff Garzik 920669a5db4SJeff Garzik if (!printed_version++) 921669a5db4SJeff Garzik dev_printk(KERN_DEBUG, &pdev->dev, 922669a5db4SJeff Garzik "version " DRV_VERSION "\n"); 923669a5db4SJeff Garzik 924669a5db4SJeff Garzik /* We have to find the bridge first */ 925669a5db4SJeff Garzik 926f3769e9dSAlan Cox for (sets = &sis_chipsets[0]; sets->device; sets++) { 927f3769e9dSAlan Cox host = pci_get_device(PCI_VENDOR_ID_SI, sets->device, NULL); 928669a5db4SJeff Garzik if (host != NULL) { 929f3769e9dSAlan Cox chipset = sets; /* Match found */ 930f3769e9dSAlan Cox if (sets->device == 0x630) { /* SIS630 */ 931669a5db4SJeff Garzik u8 host_rev; 932669a5db4SJeff Garzik pci_read_config_byte(host, PCI_REVISION_ID, &host_rev); 933669a5db4SJeff Garzik if (host_rev >= 0x30) /* 630 ET */ 934669a5db4SJeff Garzik chipset = &sis100_early; 935669a5db4SJeff Garzik } 936669a5db4SJeff Garzik break; 937669a5db4SJeff Garzik } 938669a5db4SJeff Garzik } 939669a5db4SJeff Garzik 940669a5db4SJeff Garzik /* Look for concealed bridges */ 941f3769e9dSAlan Cox if (chipset == NULL) { 942669a5db4SJeff Garzik /* Second check */ 943669a5db4SJeff Garzik u32 idemisc; 944669a5db4SJeff Garzik u16 trueid; 945669a5db4SJeff Garzik 946669a5db4SJeff Garzik /* Disable ID masking and register remapping then 947669a5db4SJeff Garzik see what the real ID is */ 948669a5db4SJeff Garzik 949669a5db4SJeff Garzik pci_read_config_dword(pdev, 0x54, &idemisc); 950669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc & 0x7fffffff); 951669a5db4SJeff Garzik pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid); 952669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc); 953669a5db4SJeff Garzik 954669a5db4SJeff Garzik switch(trueid) { 955669a5db4SJeff Garzik case 0x5518: /* SIS 962/963 */ 956669a5db4SJeff Garzik chipset = &sis133; 957669a5db4SJeff Garzik if ((idemisc & 0x40000000) == 0) { 958669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc | 0x40000000); 959669a5db4SJeff Garzik printk(KERN_INFO "SIS5513: Switching to 5513 register mapping\n"); 960669a5db4SJeff Garzik } 961669a5db4SJeff Garzik break; 962669a5db4SJeff Garzik case 0x0180: /* SIS 965/965L */ 963669a5db4SJeff Garzik chipset = &sis133; 964669a5db4SJeff Garzik break; 965669a5db4SJeff Garzik case 0x1180: /* SIS 966/966L */ 966669a5db4SJeff Garzik chipset = &sis133; 967669a5db4SJeff Garzik break; 968669a5db4SJeff Garzik } 969669a5db4SJeff Garzik } 970669a5db4SJeff Garzik 971669a5db4SJeff Garzik /* Further check */ 972669a5db4SJeff Garzik if (chipset == NULL) { 973669a5db4SJeff Garzik struct pci_dev *lpc_bridge; 974669a5db4SJeff Garzik u16 trueid; 975669a5db4SJeff Garzik u8 prefctl; 976669a5db4SJeff Garzik u8 idecfg; 977669a5db4SJeff Garzik u8 sbrev; 978669a5db4SJeff Garzik 979669a5db4SJeff Garzik /* Try the second unmasking technique */ 980669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x4a, &idecfg); 981669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4a, idecfg | 0x10); 982669a5db4SJeff Garzik pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid); 983669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4a, idecfg); 984669a5db4SJeff Garzik 985669a5db4SJeff Garzik switch(trueid) { 986669a5db4SJeff Garzik case 0x5517: 987669a5db4SJeff Garzik lpc_bridge = pci_get_slot(pdev->bus, 0x10); /* Bus 0 Dev 2 Fn 0 */ 988669a5db4SJeff Garzik if (lpc_bridge == NULL) 989669a5db4SJeff Garzik break; 990669a5db4SJeff Garzik pci_read_config_byte(lpc_bridge, PCI_REVISION_ID, &sbrev); 991669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x49, &prefctl); 992669a5db4SJeff Garzik pci_dev_put(lpc_bridge); 993669a5db4SJeff Garzik 994669a5db4SJeff Garzik if (sbrev == 0x10 && (prefctl & 0x80)) { 995669a5db4SJeff Garzik chipset = &sis133_early; 996669a5db4SJeff Garzik break; 997669a5db4SJeff Garzik } 998669a5db4SJeff Garzik chipset = &sis100; 999669a5db4SJeff Garzik break; 1000669a5db4SJeff Garzik } 1001669a5db4SJeff Garzik } 1002669a5db4SJeff Garzik pci_dev_put(host); 1003669a5db4SJeff Garzik 1004669a5db4SJeff Garzik /* No chipset info, no support */ 1005669a5db4SJeff Garzik if (chipset == NULL) 1006669a5db4SJeff Garzik return -ENODEV; 1007669a5db4SJeff Garzik 10081626aeb8STejun Heo port = *chipset->info; 10091626aeb8STejun Heo port.private_data = chipset; 1010669a5db4SJeff Garzik 1011669a5db4SJeff Garzik sis_fixup(pdev, chipset); 1012669a5db4SJeff Garzik 10131626aeb8STejun Heo return ata_pci_init_one(pdev, ppi); 1014669a5db4SJeff Garzik } 1015669a5db4SJeff Garzik 1016669a5db4SJeff Garzik static const struct pci_device_id sis_pci_tbl[] = { 10172d2744fcSJeff Garzik { PCI_VDEVICE(SI, 0x5513), }, /* SiS 5513 */ 10182d2744fcSJeff Garzik { PCI_VDEVICE(SI, 0x5518), }, /* SiS 5518 */ 1019a3cabb27SUwe Koziolek { PCI_VDEVICE(SI, 0x1180), }, /* SiS 1180 */ 10202d2744fcSJeff Garzik 1021669a5db4SJeff Garzik { } 1022669a5db4SJeff Garzik }; 1023669a5db4SJeff Garzik 1024669a5db4SJeff Garzik static struct pci_driver sis_pci_driver = { 1025669a5db4SJeff Garzik .name = DRV_NAME, 1026669a5db4SJeff Garzik .id_table = sis_pci_tbl, 1027669a5db4SJeff Garzik .probe = sis_init_one, 1028669a5db4SJeff Garzik .remove = ata_pci_remove_one, 1029438ac6d5STejun Heo #ifdef CONFIG_PM 103062d64ae0SAlan .suspend = ata_pci_device_suspend, 103162d64ae0SAlan .resume = ata_pci_device_resume, 1032438ac6d5STejun Heo #endif 1033669a5db4SJeff Garzik }; 1034669a5db4SJeff Garzik 1035669a5db4SJeff Garzik static int __init sis_init(void) 1036669a5db4SJeff Garzik { 1037669a5db4SJeff Garzik return pci_register_driver(&sis_pci_driver); 1038669a5db4SJeff Garzik } 1039669a5db4SJeff Garzik 1040669a5db4SJeff Garzik static void __exit sis_exit(void) 1041669a5db4SJeff Garzik { 1042669a5db4SJeff Garzik pci_unregister_driver(&sis_pci_driver); 1043669a5db4SJeff Garzik } 1044669a5db4SJeff Garzik 1045669a5db4SJeff Garzik module_init(sis_init); 1046669a5db4SJeff Garzik module_exit(sis_exit); 1047669a5db4SJeff Garzik 1048669a5db4SJeff Garzik MODULE_AUTHOR("Alan Cox"); 1049669a5db4SJeff Garzik MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA"); 1050669a5db4SJeff Garzik MODULE_LICENSE("GPL"); 1051669a5db4SJeff Garzik MODULE_DEVICE_TABLE(pci, sis_pci_tbl); 1052669a5db4SJeff Garzik MODULE_VERSION(DRV_VERSION); 1053669a5db4SJeff Garzik 1054