1669a5db4SJeff Garzik /* 2669a5db4SJeff Garzik * pata_sis.c - SiS ATA driver 3669a5db4SJeff Garzik * 4669a5db4SJeff Garzik * (C) 2005 Red Hat <alan@redhat.com> 5669a5db4SJeff Garzik * 6669a5db4SJeff Garzik * Based upon linux/drivers/ide/pci/sis5513.c 7669a5db4SJeff Garzik * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> 8669a5db4SJeff Garzik * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer 9669a5db4SJeff Garzik * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz> 10669a5db4SJeff Garzik * SiS Taiwan : for direct support and hardware. 11669a5db4SJeff Garzik * Daniela Engert : for initial ATA100 advices and numerous others. 12669a5db4SJeff Garzik * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt : 13669a5db4SJeff Garzik * for checking code correctness, providing patches. 14669a5db4SJeff Garzik * Original tests and design on the SiS620 chipset. 15669a5db4SJeff Garzik * ATA100 tests and design on the SiS735 chipset. 16669a5db4SJeff Garzik * ATA16/33 support from specs 17669a5db4SJeff Garzik * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw> 18669a5db4SJeff Garzik * 19669a5db4SJeff Garzik * 20669a5db4SJeff Garzik * TODO 21669a5db4SJeff Garzik * Check MWDMA on drives that don't support MWDMA speed pio cycles ? 22669a5db4SJeff Garzik * More Testing 23669a5db4SJeff Garzik */ 24669a5db4SJeff Garzik 25669a5db4SJeff Garzik #include <linux/kernel.h> 26669a5db4SJeff Garzik #include <linux/module.h> 27669a5db4SJeff Garzik #include <linux/pci.h> 28669a5db4SJeff Garzik #include <linux/init.h> 29669a5db4SJeff Garzik #include <linux/blkdev.h> 30669a5db4SJeff Garzik #include <linux/delay.h> 31669a5db4SJeff Garzik #include <linux/device.h> 32669a5db4SJeff Garzik #include <scsi/scsi_host.h> 33669a5db4SJeff Garzik #include <linux/libata.h> 34669a5db4SJeff Garzik #include <linux/ata.h> 35669a5db4SJeff Garzik 36669a5db4SJeff Garzik #define DRV_NAME "pata_sis" 3762d64ae0SAlan #define DRV_VERSION "0.4.5" 38669a5db4SJeff Garzik 39669a5db4SJeff Garzik struct sis_chipset { 40669a5db4SJeff Garzik u16 device; /* PCI host ID */ 41669a5db4SJeff Garzik struct ata_port_info *info; /* Info block */ 42669a5db4SJeff Garzik /* Probably add family, cable detect type etc here to clean 43669a5db4SJeff Garzik up code later */ 44669a5db4SJeff Garzik }; 45669a5db4SJeff Garzik 467dcbc1f2SJakub W. Jozwicki J struct sis_laptop { 477dcbc1f2SJakub W. Jozwicki J u16 device; 487dcbc1f2SJakub W. Jozwicki J u16 subvendor; 497dcbc1f2SJakub W. Jozwicki J u16 subdevice; 507dcbc1f2SJakub W. Jozwicki J }; 517dcbc1f2SJakub W. Jozwicki J 527dcbc1f2SJakub W. Jozwicki J static const struct sis_laptop sis_laptop[] = { 537dcbc1f2SJakub W. Jozwicki J /* devid, subvendor, subdev */ 547dcbc1f2SJakub W. Jozwicki J { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */ 557dcbc1f2SJakub W. Jozwicki J /* end marker */ 567dcbc1f2SJakub W. Jozwicki J { 0, } 577dcbc1f2SJakub W. Jozwicki J }; 587dcbc1f2SJakub W. Jozwicki J 597dcbc1f2SJakub W. Jozwicki J static int sis_short_ata40(struct pci_dev *dev) 607dcbc1f2SJakub W. Jozwicki J { 617dcbc1f2SJakub W. Jozwicki J const struct sis_laptop *lap = &sis_laptop[0]; 627dcbc1f2SJakub W. Jozwicki J 637dcbc1f2SJakub W. Jozwicki J while (lap->device) { 647dcbc1f2SJakub W. Jozwicki J if (lap->device == dev->device && 657dcbc1f2SJakub W. Jozwicki J lap->subvendor == dev->subsystem_vendor && 667dcbc1f2SJakub W. Jozwicki J lap->subdevice == dev->subsystem_device) 677dcbc1f2SJakub W. Jozwicki J return 1; 687dcbc1f2SJakub W. Jozwicki J lap++; 697dcbc1f2SJakub W. Jozwicki J } 707dcbc1f2SJakub W. Jozwicki J 717dcbc1f2SJakub W. Jozwicki J return 0; 727dcbc1f2SJakub W. Jozwicki J } 737dcbc1f2SJakub W. Jozwicki J 74669a5db4SJeff Garzik /** 75669a5db4SJeff Garzik * sis_port_base - return PCI configuration base for dev 76669a5db4SJeff Garzik * @adev: device 77669a5db4SJeff Garzik * 78669a5db4SJeff Garzik * Returns the base of the PCI configuration registers for this port 79669a5db4SJeff Garzik * number. 80669a5db4SJeff Garzik */ 81669a5db4SJeff Garzik 82669a5db4SJeff Garzik static int sis_port_base(struct ata_device *adev) 83669a5db4SJeff Garzik { 84669a5db4SJeff Garzik return 0x40 + (4 * adev->ap->port_no) + (2 * adev->devno); 85669a5db4SJeff Garzik } 86669a5db4SJeff Garzik 87669a5db4SJeff Garzik /** 88669a5db4SJeff Garzik * sis_133_pre_reset - check for 40/80 pin 89669a5db4SJeff Garzik * @ap: Port 90669a5db4SJeff Garzik * 91669a5db4SJeff Garzik * Perform cable detection for the later UDMA133 capable 92669a5db4SJeff Garzik * SiS chipset. 93669a5db4SJeff Garzik */ 94669a5db4SJeff Garzik 95669a5db4SJeff Garzik static int sis_133_pre_reset(struct ata_port *ap) 96669a5db4SJeff Garzik { 97669a5db4SJeff Garzik static const struct pci_bits sis_enable_bits[] = { 98669a5db4SJeff Garzik { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ 99669a5db4SJeff Garzik { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ 100669a5db4SJeff Garzik }; 101669a5db4SJeff Garzik 102669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 103669a5db4SJeff Garzik u16 tmp; 104669a5db4SJeff Garzik 105c961922bSAlan Cox if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) 106c961922bSAlan Cox return -ENOENT; 107c961922bSAlan Cox 108669a5db4SJeff Garzik /* The top bit of this register is the cable detect bit */ 109669a5db4SJeff Garzik pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp); 1107dcbc1f2SJakub W. Jozwicki J if ((tmp & 0x8000) && !sis_short_ata40(pdev)) 111669a5db4SJeff Garzik ap->cbl = ATA_CBL_PATA40; 112669a5db4SJeff Garzik else 113669a5db4SJeff Garzik ap->cbl = ATA_CBL_PATA80; 114669a5db4SJeff Garzik 115669a5db4SJeff Garzik return ata_std_prereset(ap); 116669a5db4SJeff Garzik } 117669a5db4SJeff Garzik 118669a5db4SJeff Garzik /** 119669a5db4SJeff Garzik * sis_error_handler - Probe specified port on PATA host controller 120669a5db4SJeff Garzik * @ap: Port to probe 121669a5db4SJeff Garzik * 122669a5db4SJeff Garzik * LOCKING: 123669a5db4SJeff Garzik * None (inherited from caller). 124669a5db4SJeff Garzik */ 125669a5db4SJeff Garzik 126669a5db4SJeff Garzik static void sis_133_error_handler(struct ata_port *ap) 127669a5db4SJeff Garzik { 128669a5db4SJeff Garzik ata_bmdma_drive_eh(ap, sis_133_pre_reset, ata_std_softreset, NULL, ata_std_postreset); 129669a5db4SJeff Garzik } 130669a5db4SJeff Garzik 131669a5db4SJeff Garzik 132669a5db4SJeff Garzik /** 133669a5db4SJeff Garzik * sis_66_pre_reset - check for 40/80 pin 134669a5db4SJeff Garzik * @ap: Port 135669a5db4SJeff Garzik * 136669a5db4SJeff Garzik * Perform cable detection on the UDMA66, UDMA100 and early UDMA133 137669a5db4SJeff Garzik * SiS IDE controllers. 138669a5db4SJeff Garzik */ 139669a5db4SJeff Garzik 140669a5db4SJeff Garzik static int sis_66_pre_reset(struct ata_port *ap) 141669a5db4SJeff Garzik { 142669a5db4SJeff Garzik static const struct pci_bits sis_enable_bits[] = { 143669a5db4SJeff Garzik { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ 144669a5db4SJeff Garzik { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ 145669a5db4SJeff Garzik }; 146669a5db4SJeff Garzik 147669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 148669a5db4SJeff Garzik u8 tmp; 149669a5db4SJeff Garzik 150669a5db4SJeff Garzik if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) { 151669a5db4SJeff Garzik ata_port_disable(ap); 152669a5db4SJeff Garzik printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); 153669a5db4SJeff Garzik return 0; 154669a5db4SJeff Garzik } 155669a5db4SJeff Garzik /* Older chips keep cable detect in bits 4/5 of reg 0x48 */ 156669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x48, &tmp); 157669a5db4SJeff Garzik tmp >>= ap->port_no; 1587dcbc1f2SJakub W. Jozwicki J if ((tmp & 0x10) && !sis_short_ata40(pdev)) 159669a5db4SJeff Garzik ap->cbl = ATA_CBL_PATA40; 160669a5db4SJeff Garzik else 161669a5db4SJeff Garzik ap->cbl = ATA_CBL_PATA80; 162669a5db4SJeff Garzik 163669a5db4SJeff Garzik return ata_std_prereset(ap); 164669a5db4SJeff Garzik } 165669a5db4SJeff Garzik 166669a5db4SJeff Garzik /** 167669a5db4SJeff Garzik * sis_66_error_handler - Probe specified port on PATA host controller 168669a5db4SJeff Garzik * @ap: Port to probe 169669a5db4SJeff Garzik * @classes: 170669a5db4SJeff Garzik * 171669a5db4SJeff Garzik * LOCKING: 172669a5db4SJeff Garzik * None (inherited from caller). 173669a5db4SJeff Garzik */ 174669a5db4SJeff Garzik 175669a5db4SJeff Garzik static void sis_66_error_handler(struct ata_port *ap) 176669a5db4SJeff Garzik { 177669a5db4SJeff Garzik ata_bmdma_drive_eh(ap, sis_66_pre_reset, ata_std_softreset, NULL, ata_std_postreset); 178669a5db4SJeff Garzik } 179669a5db4SJeff Garzik 180669a5db4SJeff Garzik /** 181669a5db4SJeff Garzik * sis_old_pre_reset - probe begin 182669a5db4SJeff Garzik * @ap: ATA port 183669a5db4SJeff Garzik * 184669a5db4SJeff Garzik * Set up cable type and use generic probe init 185669a5db4SJeff Garzik */ 186669a5db4SJeff Garzik 187669a5db4SJeff Garzik static int sis_old_pre_reset(struct ata_port *ap) 188669a5db4SJeff Garzik { 189669a5db4SJeff Garzik static const struct pci_bits sis_enable_bits[] = { 190669a5db4SJeff Garzik { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ 191669a5db4SJeff Garzik { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ 192669a5db4SJeff Garzik }; 193669a5db4SJeff Garzik 194669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 195669a5db4SJeff Garzik 196669a5db4SJeff Garzik if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) { 197669a5db4SJeff Garzik ata_port_disable(ap); 198669a5db4SJeff Garzik printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); 199669a5db4SJeff Garzik return 0; 200669a5db4SJeff Garzik } 201669a5db4SJeff Garzik ap->cbl = ATA_CBL_PATA40; 202669a5db4SJeff Garzik return ata_std_prereset(ap); 203669a5db4SJeff Garzik } 204669a5db4SJeff Garzik 205669a5db4SJeff Garzik 206669a5db4SJeff Garzik /** 207669a5db4SJeff Garzik * sis_old_error_handler - Probe specified port on PATA host controller 208669a5db4SJeff Garzik * @ap: Port to probe 209669a5db4SJeff Garzik * 210669a5db4SJeff Garzik * LOCKING: 211669a5db4SJeff Garzik * None (inherited from caller). 212669a5db4SJeff Garzik */ 213669a5db4SJeff Garzik 214669a5db4SJeff Garzik static void sis_old_error_handler(struct ata_port *ap) 215669a5db4SJeff Garzik { 216669a5db4SJeff Garzik ata_bmdma_drive_eh(ap, sis_old_pre_reset, ata_std_softreset, NULL, ata_std_postreset); 217669a5db4SJeff Garzik } 218669a5db4SJeff Garzik 219669a5db4SJeff Garzik /** 220669a5db4SJeff Garzik * sis_set_fifo - Set RWP fifo bits for this device 221669a5db4SJeff Garzik * @ap: Port 222669a5db4SJeff Garzik * @adev: Device 223669a5db4SJeff Garzik * 224669a5db4SJeff Garzik * SIS chipsets implement prefetch/postwrite bits for each device 225669a5db4SJeff Garzik * on both channels. This functionality is not ATAPI compatible and 226669a5db4SJeff Garzik * must be configured according to the class of device present 227669a5db4SJeff Garzik */ 228669a5db4SJeff Garzik 229669a5db4SJeff Garzik static void sis_set_fifo(struct ata_port *ap, struct ata_device *adev) 230669a5db4SJeff Garzik { 231669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 232669a5db4SJeff Garzik u8 fifoctrl; 233669a5db4SJeff Garzik u8 mask = 0x11; 234669a5db4SJeff Garzik 235669a5db4SJeff Garzik mask <<= (2 * ap->port_no); 236669a5db4SJeff Garzik mask <<= adev->devno; 237669a5db4SJeff Garzik 238669a5db4SJeff Garzik /* This holds various bits including the FIFO control */ 239669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x4B, &fifoctrl); 240669a5db4SJeff Garzik fifoctrl &= ~mask; 241669a5db4SJeff Garzik 242669a5db4SJeff Garzik /* Enable for ATA (disk) only */ 243669a5db4SJeff Garzik if (adev->class == ATA_DEV_ATA) 244669a5db4SJeff Garzik fifoctrl |= mask; 245669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4B, fifoctrl); 246669a5db4SJeff Garzik } 247669a5db4SJeff Garzik 248669a5db4SJeff Garzik /** 249669a5db4SJeff Garzik * sis_old_set_piomode - Initialize host controller PATA PIO timings 250669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 251669a5db4SJeff Garzik * @adev: Device we are configuring for. 252669a5db4SJeff Garzik * 253669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 254669a5db4SJeff Garzik * function handles PIO set up for all chips that are pre ATA100 and 255669a5db4SJeff Garzik * also early ATA100 devices. 256669a5db4SJeff Garzik * 257669a5db4SJeff Garzik * LOCKING: 258669a5db4SJeff Garzik * None (inherited from caller). 259669a5db4SJeff Garzik */ 260669a5db4SJeff Garzik 261669a5db4SJeff Garzik static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev) 262669a5db4SJeff Garzik { 263669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 264669a5db4SJeff Garzik int port = sis_port_base(adev); 265669a5db4SJeff Garzik u8 t1, t2; 266669a5db4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 267669a5db4SJeff Garzik 268669a5db4SJeff Garzik const u8 active[] = { 0x00, 0x07, 0x04, 0x03, 0x01 }; 269669a5db4SJeff Garzik const u8 recovery[] = { 0x00, 0x06, 0x04, 0x03, 0x03 }; 270669a5db4SJeff Garzik 271669a5db4SJeff Garzik sis_set_fifo(ap, adev); 272669a5db4SJeff Garzik 273669a5db4SJeff Garzik pci_read_config_byte(pdev, port, &t1); 274669a5db4SJeff Garzik pci_read_config_byte(pdev, port + 1, &t2); 275669a5db4SJeff Garzik 276669a5db4SJeff Garzik t1 &= ~0x0F; /* Clear active/recovery timings */ 277669a5db4SJeff Garzik t2 &= ~0x07; 278669a5db4SJeff Garzik 279669a5db4SJeff Garzik t1 |= active[speed]; 280669a5db4SJeff Garzik t2 |= recovery[speed]; 281669a5db4SJeff Garzik 282669a5db4SJeff Garzik pci_write_config_byte(pdev, port, t1); 283669a5db4SJeff Garzik pci_write_config_byte(pdev, port + 1, t2); 284669a5db4SJeff Garzik } 285669a5db4SJeff Garzik 286669a5db4SJeff Garzik /** 287669a5db4SJeff Garzik * sis_100_set_pioode - Initialize host controller PATA PIO timings 288669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 289669a5db4SJeff Garzik * @adev: Device we are configuring for. 290669a5db4SJeff Garzik * 291669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 292669a5db4SJeff Garzik * function handles PIO set up for ATA100 devices and early ATA133. 293669a5db4SJeff Garzik * 294669a5db4SJeff Garzik * LOCKING: 295669a5db4SJeff Garzik * None (inherited from caller). 296669a5db4SJeff Garzik */ 297669a5db4SJeff Garzik 298669a5db4SJeff Garzik static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev) 299669a5db4SJeff Garzik { 300669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 301669a5db4SJeff Garzik int port = sis_port_base(adev); 302669a5db4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 303669a5db4SJeff Garzik 304669a5db4SJeff Garzik const u8 actrec[] = { 0x00, 0x67, 0x44, 0x33, 0x31 }; 305669a5db4SJeff Garzik 306669a5db4SJeff Garzik sis_set_fifo(ap, adev); 307669a5db4SJeff Garzik 308669a5db4SJeff Garzik pci_write_config_byte(pdev, port, actrec[speed]); 309669a5db4SJeff Garzik } 310669a5db4SJeff Garzik 311669a5db4SJeff Garzik /** 312669a5db4SJeff Garzik * sis_133_set_pioode - Initialize host controller PATA PIO timings 313669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 314669a5db4SJeff Garzik * @adev: Device we are configuring for. 315669a5db4SJeff Garzik * 316669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 317669a5db4SJeff Garzik * function handles PIO set up for the later ATA133 devices. 318669a5db4SJeff Garzik * 319669a5db4SJeff Garzik * LOCKING: 320669a5db4SJeff Garzik * None (inherited from caller). 321669a5db4SJeff Garzik */ 322669a5db4SJeff Garzik 323669a5db4SJeff Garzik static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev) 324669a5db4SJeff Garzik { 325669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 326669a5db4SJeff Garzik int port = 0x40; 327669a5db4SJeff Garzik u32 t1; 328669a5db4SJeff Garzik u32 reg54; 329669a5db4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 330669a5db4SJeff Garzik 331669a5db4SJeff Garzik const u32 timing133[] = { 332669a5db4SJeff Garzik 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */ 333669a5db4SJeff Garzik 0x0C266000, 334669a5db4SJeff Garzik 0x04263000, 335669a5db4SJeff Garzik 0x0C0A3000, 336669a5db4SJeff Garzik 0x05093000 337669a5db4SJeff Garzik }; 338669a5db4SJeff Garzik const u32 timing100[] = { 339669a5db4SJeff Garzik 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */ 340669a5db4SJeff Garzik 0x091C4000, 341669a5db4SJeff Garzik 0x031C2000, 342669a5db4SJeff Garzik 0x09072000, 343669a5db4SJeff Garzik 0x04062000 344669a5db4SJeff Garzik }; 345669a5db4SJeff Garzik 346669a5db4SJeff Garzik sis_set_fifo(ap, adev); 347669a5db4SJeff Garzik 348669a5db4SJeff Garzik /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ 349669a5db4SJeff Garzik pci_read_config_dword(pdev, 0x54, ®54); 350669a5db4SJeff Garzik if (reg54 & 0x40000000) 351669a5db4SJeff Garzik port = 0x70; 352669a5db4SJeff Garzik port += 8 * ap->port_no + 4 * adev->devno; 353669a5db4SJeff Garzik 354669a5db4SJeff Garzik pci_read_config_dword(pdev, port, &t1); 355669a5db4SJeff Garzik t1 &= 0xC0C00FFF; /* Mask out timing */ 356669a5db4SJeff Garzik 357669a5db4SJeff Garzik if (t1 & 0x08) /* 100 or 133 ? */ 358669a5db4SJeff Garzik t1 |= timing133[speed]; 359669a5db4SJeff Garzik else 360669a5db4SJeff Garzik t1 |= timing100[speed]; 361669a5db4SJeff Garzik pci_write_config_byte(pdev, port, t1); 362669a5db4SJeff Garzik } 363669a5db4SJeff Garzik 364669a5db4SJeff Garzik /** 365669a5db4SJeff Garzik * sis_old_set_dmamode - Initialize host controller PATA DMA timings 366669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 367669a5db4SJeff Garzik * @adev: Device to program 368669a5db4SJeff Garzik * 369669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 370669a5db4SJeff Garzik * Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike 371669a5db4SJeff Garzik * the old ide/pci driver. 372669a5db4SJeff Garzik * 373669a5db4SJeff Garzik * LOCKING: 374669a5db4SJeff Garzik * None (inherited from caller). 375669a5db4SJeff Garzik */ 376669a5db4SJeff Garzik 377669a5db4SJeff Garzik static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev) 378669a5db4SJeff Garzik { 379669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 380669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 381669a5db4SJeff Garzik int drive_pci = sis_port_base(adev); 382669a5db4SJeff Garzik u16 timing; 383669a5db4SJeff Garzik 384669a5db4SJeff Garzik const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; 385669a5db4SJeff Garzik const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 }; 386669a5db4SJeff Garzik 387669a5db4SJeff Garzik pci_read_config_word(pdev, drive_pci, &timing); 388669a5db4SJeff Garzik 389669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 390669a5db4SJeff Garzik /* bits 3-0 hold recovery timing bits 8-10 active timing and 391669a5db4SJeff Garzik the higer bits are dependant on the device */ 392669a5db4SJeff Garzik timing &= ~ 0x870F; 393669a5db4SJeff Garzik timing |= mwdma_bits[speed]; 394669a5db4SJeff Garzik pci_write_config_word(pdev, drive_pci, timing); 395669a5db4SJeff Garzik } else { 396669a5db4SJeff Garzik /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */ 397669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 398669a5db4SJeff Garzik timing &= ~0x6000; 399669a5db4SJeff Garzik timing |= udma_bits[speed]; 400669a5db4SJeff Garzik } 401669a5db4SJeff Garzik } 402669a5db4SJeff Garzik 403669a5db4SJeff Garzik /** 404669a5db4SJeff Garzik * sis_66_set_dmamode - Initialize host controller PATA DMA timings 405669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 406669a5db4SJeff Garzik * @adev: Device to program 407669a5db4SJeff Garzik * 408669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 409669a5db4SJeff Garzik * Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike 410669a5db4SJeff Garzik * the old ide/pci driver. 411669a5db4SJeff Garzik * 412669a5db4SJeff Garzik * LOCKING: 413669a5db4SJeff Garzik * None (inherited from caller). 414669a5db4SJeff Garzik */ 415669a5db4SJeff Garzik 416669a5db4SJeff Garzik static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev) 417669a5db4SJeff Garzik { 418669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 419669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 420669a5db4SJeff Garzik int drive_pci = sis_port_base(adev); 421669a5db4SJeff Garzik u16 timing; 422669a5db4SJeff Garzik 423669a5db4SJeff Garzik const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; 424669a5db4SJeff Garzik const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000}; 425669a5db4SJeff Garzik 426669a5db4SJeff Garzik pci_read_config_word(pdev, drive_pci, &timing); 427669a5db4SJeff Garzik 428669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 429669a5db4SJeff Garzik /* bits 3-0 hold recovery timing bits 8-10 active timing and 430669a5db4SJeff Garzik the higer bits are dependant on the device, bit 15 udma */ 431669a5db4SJeff Garzik timing &= ~ 0x870F; 432669a5db4SJeff Garzik timing |= mwdma_bits[speed]; 433669a5db4SJeff Garzik } else { 434669a5db4SJeff Garzik /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ 435669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 436669a5db4SJeff Garzik timing &= ~0x6000; 437669a5db4SJeff Garzik timing |= udma_bits[speed]; 438669a5db4SJeff Garzik } 439669a5db4SJeff Garzik pci_write_config_word(pdev, drive_pci, timing); 440669a5db4SJeff Garzik } 441669a5db4SJeff Garzik 442669a5db4SJeff Garzik /** 443669a5db4SJeff Garzik * sis_100_set_dmamode - Initialize host controller PATA DMA timings 444669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 445669a5db4SJeff Garzik * @adev: Device to program 446669a5db4SJeff Garzik * 447669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 448669a5db4SJeff Garzik * Handles UDMA66 and early UDMA100 devices. 449669a5db4SJeff Garzik * 450669a5db4SJeff Garzik * LOCKING: 451669a5db4SJeff Garzik * None (inherited from caller). 452669a5db4SJeff Garzik */ 453669a5db4SJeff Garzik 454669a5db4SJeff Garzik static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev) 455669a5db4SJeff Garzik { 456669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 457669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 458669a5db4SJeff Garzik int drive_pci = sis_port_base(adev); 459669a5db4SJeff Garzik u16 timing; 460669a5db4SJeff Garzik 461669a5db4SJeff Garzik const u16 udma_bits[] = { 0x8B00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100}; 462669a5db4SJeff Garzik 463669a5db4SJeff Garzik pci_read_config_word(pdev, drive_pci, &timing); 464669a5db4SJeff Garzik 465669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 466669a5db4SJeff Garzik /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */ 467669a5db4SJeff Garzik } else { 468669a5db4SJeff Garzik /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ 469669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 470669a5db4SJeff Garzik timing &= ~0x0F00; 471669a5db4SJeff Garzik timing |= udma_bits[speed]; 472669a5db4SJeff Garzik } 473669a5db4SJeff Garzik pci_write_config_word(pdev, drive_pci, timing); 474669a5db4SJeff Garzik } 475669a5db4SJeff Garzik 476669a5db4SJeff Garzik /** 477669a5db4SJeff Garzik * sis_133_early_set_dmamode - Initialize host controller PATA DMA timings 478669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 479669a5db4SJeff Garzik * @adev: Device to program 480669a5db4SJeff Garzik * 481669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 482669a5db4SJeff Garzik * Handles early SiS 961 bridges. Supports MWDMA as well unlike 483669a5db4SJeff Garzik * the old ide/pci driver. 484669a5db4SJeff Garzik * 485669a5db4SJeff Garzik * LOCKING: 486669a5db4SJeff Garzik * None (inherited from caller). 487669a5db4SJeff Garzik */ 488669a5db4SJeff Garzik 489669a5db4SJeff Garzik static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *adev) 490669a5db4SJeff Garzik { 491669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 492669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 493669a5db4SJeff Garzik int drive_pci = sis_port_base(adev); 494669a5db4SJeff Garzik u16 timing; 495669a5db4SJeff Garzik 496669a5db4SJeff Garzik const u16 udma_bits[] = { 0x8F00, 0x8A00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100}; 497669a5db4SJeff Garzik 498669a5db4SJeff Garzik pci_read_config_word(pdev, drive_pci, &timing); 499669a5db4SJeff Garzik 500669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 501669a5db4SJeff Garzik /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */ 502669a5db4SJeff Garzik } else { 503669a5db4SJeff Garzik /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ 504669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 505669a5db4SJeff Garzik timing &= ~0x0F00; 506669a5db4SJeff Garzik timing |= udma_bits[speed]; 507669a5db4SJeff Garzik } 508669a5db4SJeff Garzik pci_write_config_word(pdev, drive_pci, timing); 509669a5db4SJeff Garzik } 510669a5db4SJeff Garzik 511669a5db4SJeff Garzik /** 512669a5db4SJeff Garzik * sis_133_set_dmamode - Initialize host controller PATA DMA timings 513669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 514669a5db4SJeff Garzik * @adev: Device to program 515669a5db4SJeff Garzik * 516669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 517669a5db4SJeff Garzik * Handles early SiS 961 bridges. Supports MWDMA as well unlike 518669a5db4SJeff Garzik * the old ide/pci driver. 519669a5db4SJeff Garzik * 520669a5db4SJeff Garzik * LOCKING: 521669a5db4SJeff Garzik * None (inherited from caller). 522669a5db4SJeff Garzik */ 523669a5db4SJeff Garzik 524669a5db4SJeff Garzik static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev) 525669a5db4SJeff Garzik { 526669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 527669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 528669a5db4SJeff Garzik int port = 0x40; 529669a5db4SJeff Garzik u32 t1; 530669a5db4SJeff Garzik u32 reg54; 531669a5db4SJeff Garzik 532669a5db4SJeff Garzik /* bits 4- cycle time 8 - cvs time */ 533669a5db4SJeff Garzik const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 }; 534669a5db4SJeff Garzik const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 }; 535669a5db4SJeff Garzik 536669a5db4SJeff Garzik /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ 537669a5db4SJeff Garzik pci_read_config_dword(pdev, 0x54, ®54); 538669a5db4SJeff Garzik if (reg54 & 0x40000000) 539669a5db4SJeff Garzik port = 0x70; 540669a5db4SJeff Garzik port += (8 * ap->port_no) + (4 * adev->devno); 541669a5db4SJeff Garzik 542669a5db4SJeff Garzik pci_read_config_dword(pdev, port, &t1); 543669a5db4SJeff Garzik 544669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 545669a5db4SJeff Garzik t1 &= ~0x00000004; 546669a5db4SJeff Garzik /* FIXME: need data sheet to add MWDMA here. Also lacking on 547669a5db4SJeff Garzik ide/pci driver */ 548669a5db4SJeff Garzik } else { 549669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 550669a5db4SJeff Garzik /* if & 8 no UDMA133 - need info for ... */ 551669a5db4SJeff Garzik t1 &= ~0x00000FF0; 552669a5db4SJeff Garzik t1 |= 0x00000004; 553669a5db4SJeff Garzik if (t1 & 0x08) 554669a5db4SJeff Garzik t1 |= timing_u133[speed]; 555669a5db4SJeff Garzik else 556669a5db4SJeff Garzik t1 |= timing_u100[speed]; 557669a5db4SJeff Garzik } 558669a5db4SJeff Garzik pci_write_config_dword(pdev, port, t1); 559669a5db4SJeff Garzik } 560669a5db4SJeff Garzik 561669a5db4SJeff Garzik static struct scsi_host_template sis_sht = { 562669a5db4SJeff Garzik .module = THIS_MODULE, 563669a5db4SJeff Garzik .name = DRV_NAME, 564669a5db4SJeff Garzik .ioctl = ata_scsi_ioctl, 565669a5db4SJeff Garzik .queuecommand = ata_scsi_queuecmd, 566669a5db4SJeff Garzik .can_queue = ATA_DEF_QUEUE, 567669a5db4SJeff Garzik .this_id = ATA_SHT_THIS_ID, 568669a5db4SJeff Garzik .sg_tablesize = LIBATA_MAX_PRD, 569669a5db4SJeff Garzik .cmd_per_lun = ATA_SHT_CMD_PER_LUN, 570669a5db4SJeff Garzik .emulated = ATA_SHT_EMULATED, 571669a5db4SJeff Garzik .use_clustering = ATA_SHT_USE_CLUSTERING, 572669a5db4SJeff Garzik .proc_name = DRV_NAME, 573669a5db4SJeff Garzik .dma_boundary = ATA_DMA_BOUNDARY, 574669a5db4SJeff Garzik .slave_configure = ata_scsi_slave_config, 575afdfe899STejun Heo .slave_destroy = ata_scsi_slave_destroy, 576669a5db4SJeff Garzik .bios_param = ata_std_bios_param, 57762d64ae0SAlan .resume = ata_scsi_device_resume, 57862d64ae0SAlan .suspend = ata_scsi_device_suspend, 579669a5db4SJeff Garzik }; 580669a5db4SJeff Garzik 581669a5db4SJeff Garzik static const struct ata_port_operations sis_133_ops = { 582669a5db4SJeff Garzik .port_disable = ata_port_disable, 583669a5db4SJeff Garzik .set_piomode = sis_133_set_piomode, 584669a5db4SJeff Garzik .set_dmamode = sis_133_set_dmamode, 585669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 586669a5db4SJeff Garzik 587669a5db4SJeff Garzik .tf_load = ata_tf_load, 588669a5db4SJeff Garzik .tf_read = ata_tf_read, 589669a5db4SJeff Garzik .check_status = ata_check_status, 590669a5db4SJeff Garzik .exec_command = ata_exec_command, 591669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 592669a5db4SJeff Garzik 593669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 594669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 595669a5db4SJeff Garzik .error_handler = sis_133_error_handler, 596669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 597669a5db4SJeff Garzik 598669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 599669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 600669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 601669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 602669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 603669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 604669a5db4SJeff Garzik .data_xfer = ata_pio_data_xfer, 605669a5db4SJeff Garzik 606669a5db4SJeff Garzik .irq_handler = ata_interrupt, 607669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 608669a5db4SJeff Garzik 609669a5db4SJeff Garzik .port_start = ata_port_start, 610669a5db4SJeff Garzik .port_stop = ata_port_stop, 611669a5db4SJeff Garzik .host_stop = ata_host_stop, 612669a5db4SJeff Garzik }; 613669a5db4SJeff Garzik 614669a5db4SJeff Garzik static const struct ata_port_operations sis_133_early_ops = { 615669a5db4SJeff Garzik .port_disable = ata_port_disable, 616669a5db4SJeff Garzik .set_piomode = sis_100_set_piomode, 617669a5db4SJeff Garzik .set_dmamode = sis_133_early_set_dmamode, 618669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 619669a5db4SJeff Garzik 620669a5db4SJeff Garzik .tf_load = ata_tf_load, 621669a5db4SJeff Garzik .tf_read = ata_tf_read, 622669a5db4SJeff Garzik .check_status = ata_check_status, 623669a5db4SJeff Garzik .exec_command = ata_exec_command, 624669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 625669a5db4SJeff Garzik 626669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 627669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 628669a5db4SJeff Garzik .error_handler = sis_66_error_handler, 629669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 630669a5db4SJeff Garzik 631669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 632669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 633669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 634669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 635669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 636669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 637669a5db4SJeff Garzik .data_xfer = ata_pio_data_xfer, 638669a5db4SJeff Garzik 639669a5db4SJeff Garzik .irq_handler = ata_interrupt, 640669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 641669a5db4SJeff Garzik 642669a5db4SJeff Garzik .port_start = ata_port_start, 643669a5db4SJeff Garzik .port_stop = ata_port_stop, 644669a5db4SJeff Garzik .host_stop = ata_host_stop, 645669a5db4SJeff Garzik }; 646669a5db4SJeff Garzik 647669a5db4SJeff Garzik static const struct ata_port_operations sis_100_ops = { 648669a5db4SJeff Garzik .port_disable = ata_port_disable, 649669a5db4SJeff Garzik .set_piomode = sis_100_set_piomode, 650669a5db4SJeff Garzik .set_dmamode = sis_100_set_dmamode, 651669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 652669a5db4SJeff Garzik 653669a5db4SJeff Garzik .tf_load = ata_tf_load, 654669a5db4SJeff Garzik .tf_read = ata_tf_read, 655669a5db4SJeff Garzik .check_status = ata_check_status, 656669a5db4SJeff Garzik .exec_command = ata_exec_command, 657669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 658669a5db4SJeff Garzik 659669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 660669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 661669a5db4SJeff Garzik .error_handler = sis_66_error_handler, 662669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 663669a5db4SJeff Garzik 664669a5db4SJeff Garzik 665669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 666669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 667669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 668669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 669669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 670669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 671669a5db4SJeff Garzik .data_xfer = ata_pio_data_xfer, 672669a5db4SJeff Garzik 673669a5db4SJeff Garzik .irq_handler = ata_interrupt, 674669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 675669a5db4SJeff Garzik 676669a5db4SJeff Garzik .port_start = ata_port_start, 677669a5db4SJeff Garzik .port_stop = ata_port_stop, 678669a5db4SJeff Garzik .host_stop = ata_host_stop, 679669a5db4SJeff Garzik }; 680669a5db4SJeff Garzik 681669a5db4SJeff Garzik static const struct ata_port_operations sis_66_ops = { 682669a5db4SJeff Garzik .port_disable = ata_port_disable, 683669a5db4SJeff Garzik .set_piomode = sis_old_set_piomode, 684669a5db4SJeff Garzik .set_dmamode = sis_66_set_dmamode, 685669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 686669a5db4SJeff Garzik 687669a5db4SJeff Garzik .tf_load = ata_tf_load, 688669a5db4SJeff Garzik .tf_read = ata_tf_read, 689669a5db4SJeff Garzik .check_status = ata_check_status, 690669a5db4SJeff Garzik .exec_command = ata_exec_command, 691669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 692669a5db4SJeff Garzik 693669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 694669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 695669a5db4SJeff Garzik .error_handler = sis_66_error_handler, 696669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 697669a5db4SJeff Garzik 698669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 699669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 700669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 701669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 702669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 703669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 704669a5db4SJeff Garzik .data_xfer = ata_pio_data_xfer, 705669a5db4SJeff Garzik 706669a5db4SJeff Garzik .irq_handler = ata_interrupt, 707669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 708669a5db4SJeff Garzik 709669a5db4SJeff Garzik .port_start = ata_port_start, 710669a5db4SJeff Garzik .port_stop = ata_port_stop, 711669a5db4SJeff Garzik .host_stop = ata_host_stop, 712669a5db4SJeff Garzik }; 713669a5db4SJeff Garzik 714669a5db4SJeff Garzik static const struct ata_port_operations sis_old_ops = { 715669a5db4SJeff Garzik .port_disable = ata_port_disable, 716669a5db4SJeff Garzik .set_piomode = sis_old_set_piomode, 717669a5db4SJeff Garzik .set_dmamode = sis_old_set_dmamode, 718669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 719669a5db4SJeff Garzik 720669a5db4SJeff Garzik .tf_load = ata_tf_load, 721669a5db4SJeff Garzik .tf_read = ata_tf_read, 722669a5db4SJeff Garzik .check_status = ata_check_status, 723669a5db4SJeff Garzik .exec_command = ata_exec_command, 724669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 725669a5db4SJeff Garzik 726669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 727669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 728669a5db4SJeff Garzik .error_handler = sis_old_error_handler, 729669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 730669a5db4SJeff Garzik 731669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 732669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 733669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 734669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 735669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 736669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 737669a5db4SJeff Garzik .data_xfer = ata_pio_data_xfer, 738669a5db4SJeff Garzik 739669a5db4SJeff Garzik .irq_handler = ata_interrupt, 740669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 741669a5db4SJeff Garzik 742669a5db4SJeff Garzik .port_start = ata_port_start, 743669a5db4SJeff Garzik .port_stop = ata_port_stop, 744669a5db4SJeff Garzik .host_stop = ata_host_stop, 745669a5db4SJeff Garzik }; 746669a5db4SJeff Garzik 747669a5db4SJeff Garzik static struct ata_port_info sis_info = { 748669a5db4SJeff Garzik .sht = &sis_sht, 749669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 750669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 751669a5db4SJeff Garzik .mwdma_mask = 0x07, 752669a5db4SJeff Garzik .udma_mask = 0, 753669a5db4SJeff Garzik .port_ops = &sis_old_ops, 754669a5db4SJeff Garzik }; 755669a5db4SJeff Garzik static struct ata_port_info sis_info33 = { 756669a5db4SJeff Garzik .sht = &sis_sht, 757669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 758669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 759669a5db4SJeff Garzik .mwdma_mask = 0x07, 760669a5db4SJeff Garzik .udma_mask = ATA_UDMA2, /* UDMA 33 */ 761669a5db4SJeff Garzik .port_ops = &sis_old_ops, 762669a5db4SJeff Garzik }; 763669a5db4SJeff Garzik static struct ata_port_info sis_info66 = { 764669a5db4SJeff Garzik .sht = &sis_sht, 765669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 766669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 767669a5db4SJeff Garzik .udma_mask = ATA_UDMA4, /* UDMA 66 */ 768669a5db4SJeff Garzik .port_ops = &sis_66_ops, 769669a5db4SJeff Garzik }; 770669a5db4SJeff Garzik static struct ata_port_info sis_info100 = { 771669a5db4SJeff Garzik .sht = &sis_sht, 772669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 773669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 774669a5db4SJeff Garzik .udma_mask = ATA_UDMA5, 775669a5db4SJeff Garzik .port_ops = &sis_100_ops, 776669a5db4SJeff Garzik }; 777669a5db4SJeff Garzik static struct ata_port_info sis_info100_early = { 778669a5db4SJeff Garzik .sht = &sis_sht, 779669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 780669a5db4SJeff Garzik .udma_mask = ATA_UDMA5, 781669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 782669a5db4SJeff Garzik .port_ops = &sis_66_ops, 783669a5db4SJeff Garzik }; 784669a5db4SJeff Garzik static struct ata_port_info sis_info133 = { 785669a5db4SJeff Garzik .sht = &sis_sht, 786669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 787669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 788669a5db4SJeff Garzik .udma_mask = ATA_UDMA6, 789669a5db4SJeff Garzik .port_ops = &sis_133_ops, 790669a5db4SJeff Garzik }; 791669a5db4SJeff Garzik static struct ata_port_info sis_info133_early = { 792669a5db4SJeff Garzik .sht = &sis_sht, 793669a5db4SJeff Garzik .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 794669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 795669a5db4SJeff Garzik .udma_mask = ATA_UDMA6, 796669a5db4SJeff Garzik .port_ops = &sis_133_early_ops, 797669a5db4SJeff Garzik }; 798669a5db4SJeff Garzik 7999b14dec5SAlan /* Privately shared with the SiS180 SATA driver, not for use elsewhere */ 8009b14dec5SAlan EXPORT_SYMBOL_GPL(sis_info133); 801669a5db4SJeff Garzik 802669a5db4SJeff Garzik static void sis_fixup(struct pci_dev *pdev, struct sis_chipset *sis) 803669a5db4SJeff Garzik { 804669a5db4SJeff Garzik u16 regw; 805669a5db4SJeff Garzik u8 reg; 806669a5db4SJeff Garzik 807669a5db4SJeff Garzik if (sis->info == &sis_info133) { 808669a5db4SJeff Garzik pci_read_config_word(pdev, 0x50, ®w); 809669a5db4SJeff Garzik if (regw & 0x08) 810669a5db4SJeff Garzik pci_write_config_word(pdev, 0x50, regw & ~0x08); 811669a5db4SJeff Garzik pci_read_config_word(pdev, 0x52, ®w); 812669a5db4SJeff Garzik if (regw & 0x08) 813669a5db4SJeff Garzik pci_write_config_word(pdev, 0x52, regw & ~0x08); 814669a5db4SJeff Garzik return; 815669a5db4SJeff Garzik } 816669a5db4SJeff Garzik 817669a5db4SJeff Garzik if (sis->info == &sis_info133_early || sis->info == &sis_info100) { 818669a5db4SJeff Garzik /* Fix up latency */ 819669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80); 820669a5db4SJeff Garzik /* Set compatibility bit */ 821669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x49, ®); 822669a5db4SJeff Garzik if (!(reg & 0x01)) 823669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x49, reg | 0x01); 824669a5db4SJeff Garzik return; 825669a5db4SJeff Garzik } 826669a5db4SJeff Garzik 827669a5db4SJeff Garzik if (sis->info == &sis_info66 || sis->info == &sis_info100_early) { 828669a5db4SJeff Garzik /* Fix up latency */ 829669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80); 830669a5db4SJeff Garzik /* Set compatibility bit */ 831669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x52, ®); 832669a5db4SJeff Garzik if (!(reg & 0x04)) 833669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x52, reg | 0x04); 834669a5db4SJeff Garzik return; 835669a5db4SJeff Garzik } 836669a5db4SJeff Garzik 837669a5db4SJeff Garzik if (sis->info == &sis_info33) { 838669a5db4SJeff Garzik pci_read_config_byte(pdev, PCI_CLASS_PROG, ®); 839669a5db4SJeff Garzik if (( reg & 0x0F ) != 0x00) 840669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_CLASS_PROG, reg & 0xF0); 841669a5db4SJeff Garzik /* Fall through to ATA16 fixup below */ 842669a5db4SJeff Garzik } 843669a5db4SJeff Garzik 844669a5db4SJeff Garzik if (sis->info == &sis_info || sis->info == &sis_info33) { 845669a5db4SJeff Garzik /* force per drive recovery and active timings 846669a5db4SJeff Garzik needed on ATA_33 and below chips */ 847669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x52, ®); 848669a5db4SJeff Garzik if (!(reg & 0x08)) 849669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x52, reg|0x08); 850669a5db4SJeff Garzik return; 851669a5db4SJeff Garzik } 852669a5db4SJeff Garzik 853669a5db4SJeff Garzik BUG(); 854669a5db4SJeff Garzik } 855669a5db4SJeff Garzik 856669a5db4SJeff Garzik /** 857669a5db4SJeff Garzik * sis_init_one - Register SiS ATA PCI device with kernel services 858669a5db4SJeff Garzik * @pdev: PCI device to register 859669a5db4SJeff Garzik * @ent: Entry in sis_pci_tbl matching with @pdev 860669a5db4SJeff Garzik * 861669a5db4SJeff Garzik * Called from kernel PCI layer. We probe for combined mode (sigh), 862669a5db4SJeff Garzik * and then hand over control to libata, for it to do the rest. 863669a5db4SJeff Garzik * 864669a5db4SJeff Garzik * LOCKING: 865669a5db4SJeff Garzik * Inherited from PCI layer (may sleep). 866669a5db4SJeff Garzik * 867669a5db4SJeff Garzik * RETURNS: 868669a5db4SJeff Garzik * Zero on success, or -ERRNO value. 869669a5db4SJeff Garzik */ 870669a5db4SJeff Garzik 871669a5db4SJeff Garzik static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 872669a5db4SJeff Garzik { 873669a5db4SJeff Garzik static int printed_version; 874669a5db4SJeff Garzik static struct ata_port_info *port_info[2]; 875669a5db4SJeff Garzik struct ata_port_info *port; 876669a5db4SJeff Garzik struct pci_dev *host = NULL; 877669a5db4SJeff Garzik struct sis_chipset *chipset = NULL; 878669a5db4SJeff Garzik 879669a5db4SJeff Garzik static struct sis_chipset sis_chipsets[] = { 880af323a2fSAlan Cox 881af323a2fSAlan Cox { 0x0968, &sis_info133 }, 882af323a2fSAlan Cox { 0x0966, &sis_info133 }, 883af323a2fSAlan Cox { 0x0965, &sis_info133 }, 884669a5db4SJeff Garzik { 0x0745, &sis_info100 }, 885669a5db4SJeff Garzik { 0x0735, &sis_info100 }, 886669a5db4SJeff Garzik { 0x0733, &sis_info100 }, 887669a5db4SJeff Garzik { 0x0635, &sis_info100 }, 888669a5db4SJeff Garzik { 0x0633, &sis_info100 }, 889669a5db4SJeff Garzik 890669a5db4SJeff Garzik { 0x0730, &sis_info100_early }, /* 100 with ATA 66 layout */ 891669a5db4SJeff Garzik { 0x0550, &sis_info100_early }, /* 100 with ATA 66 layout */ 892669a5db4SJeff Garzik 893669a5db4SJeff Garzik { 0x0640, &sis_info66 }, 894669a5db4SJeff Garzik { 0x0630, &sis_info66 }, 895669a5db4SJeff Garzik { 0x0620, &sis_info66 }, 896669a5db4SJeff Garzik { 0x0540, &sis_info66 }, 897669a5db4SJeff Garzik { 0x0530, &sis_info66 }, 898669a5db4SJeff Garzik 899669a5db4SJeff Garzik { 0x5600, &sis_info33 }, 900669a5db4SJeff Garzik { 0x5598, &sis_info33 }, 901669a5db4SJeff Garzik { 0x5597, &sis_info33 }, 902669a5db4SJeff Garzik { 0x5591, &sis_info33 }, 903669a5db4SJeff Garzik { 0x5582, &sis_info33 }, 904669a5db4SJeff Garzik { 0x5581, &sis_info33 }, 905669a5db4SJeff Garzik 906669a5db4SJeff Garzik { 0x5596, &sis_info }, 907669a5db4SJeff Garzik { 0x5571, &sis_info }, 908669a5db4SJeff Garzik { 0x5517, &sis_info }, 909669a5db4SJeff Garzik { 0x5511, &sis_info }, 910669a5db4SJeff Garzik 911669a5db4SJeff Garzik {0} 912669a5db4SJeff Garzik }; 913669a5db4SJeff Garzik static struct sis_chipset sis133_early = { 914669a5db4SJeff Garzik 0x0, &sis_info133_early 915669a5db4SJeff Garzik }; 916669a5db4SJeff Garzik static struct sis_chipset sis133 = { 917669a5db4SJeff Garzik 0x0, &sis_info133 918669a5db4SJeff Garzik }; 919669a5db4SJeff Garzik static struct sis_chipset sis100_early = { 920669a5db4SJeff Garzik 0x0, &sis_info100_early 921669a5db4SJeff Garzik }; 922669a5db4SJeff Garzik static struct sis_chipset sis100 = { 923669a5db4SJeff Garzik 0x0, &sis_info100 924669a5db4SJeff Garzik }; 925669a5db4SJeff Garzik 926669a5db4SJeff Garzik if (!printed_version++) 927669a5db4SJeff Garzik dev_printk(KERN_DEBUG, &pdev->dev, 928669a5db4SJeff Garzik "version " DRV_VERSION "\n"); 929669a5db4SJeff Garzik 930669a5db4SJeff Garzik /* We have to find the bridge first */ 931669a5db4SJeff Garzik 932669a5db4SJeff Garzik for (chipset = &sis_chipsets[0]; chipset->device; chipset++) { 933669a5db4SJeff Garzik host = pci_get_device(PCI_VENDOR_ID_SI, chipset->device, NULL); 934669a5db4SJeff Garzik if (host != NULL) { 935669a5db4SJeff Garzik if (chipset->device == 0x630) { /* SIS630 */ 936669a5db4SJeff Garzik u8 host_rev; 937669a5db4SJeff Garzik pci_read_config_byte(host, PCI_REVISION_ID, &host_rev); 938669a5db4SJeff Garzik if (host_rev >= 0x30) /* 630 ET */ 939669a5db4SJeff Garzik chipset = &sis100_early; 940669a5db4SJeff Garzik } 941669a5db4SJeff Garzik break; 942669a5db4SJeff Garzik } 943669a5db4SJeff Garzik } 944669a5db4SJeff Garzik 945669a5db4SJeff Garzik /* Look for concealed bridges */ 946669a5db4SJeff Garzik if (host == NULL) { 947669a5db4SJeff Garzik /* Second check */ 948669a5db4SJeff Garzik u32 idemisc; 949669a5db4SJeff Garzik u16 trueid; 950669a5db4SJeff Garzik 951669a5db4SJeff Garzik /* Disable ID masking and register remapping then 952669a5db4SJeff Garzik see what the real ID is */ 953669a5db4SJeff Garzik 954669a5db4SJeff Garzik pci_read_config_dword(pdev, 0x54, &idemisc); 955669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc & 0x7fffffff); 956669a5db4SJeff Garzik pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid); 957669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc); 958669a5db4SJeff Garzik 959669a5db4SJeff Garzik switch(trueid) { 960669a5db4SJeff Garzik case 0x5518: /* SIS 962/963 */ 961669a5db4SJeff Garzik chipset = &sis133; 962669a5db4SJeff Garzik if ((idemisc & 0x40000000) == 0) { 963669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc | 0x40000000); 964669a5db4SJeff Garzik printk(KERN_INFO "SIS5513: Switching to 5513 register mapping\n"); 965669a5db4SJeff Garzik } 966669a5db4SJeff Garzik break; 967669a5db4SJeff Garzik case 0x0180: /* SIS 965/965L */ 968669a5db4SJeff Garzik chipset = &sis133; 969669a5db4SJeff Garzik break; 970669a5db4SJeff Garzik case 0x1180: /* SIS 966/966L */ 971669a5db4SJeff Garzik chipset = &sis133; 972669a5db4SJeff Garzik break; 973669a5db4SJeff Garzik } 974669a5db4SJeff Garzik } 975669a5db4SJeff Garzik 976669a5db4SJeff Garzik /* Further check */ 977669a5db4SJeff Garzik if (chipset == NULL) { 978669a5db4SJeff Garzik struct pci_dev *lpc_bridge; 979669a5db4SJeff Garzik u16 trueid; 980669a5db4SJeff Garzik u8 prefctl; 981669a5db4SJeff Garzik u8 idecfg; 982669a5db4SJeff Garzik u8 sbrev; 983669a5db4SJeff Garzik 984669a5db4SJeff Garzik /* Try the second unmasking technique */ 985669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x4a, &idecfg); 986669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4a, idecfg | 0x10); 987669a5db4SJeff Garzik pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid); 988669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4a, idecfg); 989669a5db4SJeff Garzik 990669a5db4SJeff Garzik switch(trueid) { 991669a5db4SJeff Garzik case 0x5517: 992669a5db4SJeff Garzik lpc_bridge = pci_get_slot(pdev->bus, 0x10); /* Bus 0 Dev 2 Fn 0 */ 993669a5db4SJeff Garzik if (lpc_bridge == NULL) 994669a5db4SJeff Garzik break; 995669a5db4SJeff Garzik pci_read_config_byte(lpc_bridge, PCI_REVISION_ID, &sbrev); 996669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x49, &prefctl); 997669a5db4SJeff Garzik pci_dev_put(lpc_bridge); 998669a5db4SJeff Garzik 999669a5db4SJeff Garzik if (sbrev == 0x10 && (prefctl & 0x80)) { 1000669a5db4SJeff Garzik chipset = &sis133_early; 1001669a5db4SJeff Garzik break; 1002669a5db4SJeff Garzik } 1003669a5db4SJeff Garzik chipset = &sis100; 1004669a5db4SJeff Garzik break; 1005669a5db4SJeff Garzik } 1006669a5db4SJeff Garzik } 1007669a5db4SJeff Garzik pci_dev_put(host); 1008669a5db4SJeff Garzik 1009669a5db4SJeff Garzik /* No chipset info, no support */ 1010669a5db4SJeff Garzik if (chipset == NULL) 1011669a5db4SJeff Garzik return -ENODEV; 1012669a5db4SJeff Garzik 1013669a5db4SJeff Garzik port = chipset->info; 1014669a5db4SJeff Garzik port->private_data = chipset; 1015669a5db4SJeff Garzik 1016669a5db4SJeff Garzik sis_fixup(pdev, chipset); 1017669a5db4SJeff Garzik 1018669a5db4SJeff Garzik port_info[0] = port_info[1] = port; 1019669a5db4SJeff Garzik return ata_pci_init_one(pdev, port_info, 2); 1020669a5db4SJeff Garzik } 1021669a5db4SJeff Garzik 1022669a5db4SJeff Garzik static const struct pci_device_id sis_pci_tbl[] = { 10232d2744fcSJeff Garzik { PCI_VDEVICE(SI, 0x5513), }, /* SiS 5513 */ 10242d2744fcSJeff Garzik { PCI_VDEVICE(SI, 0x5518), }, /* SiS 5518 */ 10252d2744fcSJeff Garzik 1026669a5db4SJeff Garzik { } 1027669a5db4SJeff Garzik }; 1028669a5db4SJeff Garzik 1029669a5db4SJeff Garzik static struct pci_driver sis_pci_driver = { 1030669a5db4SJeff Garzik .name = DRV_NAME, 1031669a5db4SJeff Garzik .id_table = sis_pci_tbl, 1032669a5db4SJeff Garzik .probe = sis_init_one, 1033669a5db4SJeff Garzik .remove = ata_pci_remove_one, 103462d64ae0SAlan .suspend = ata_pci_device_suspend, 103562d64ae0SAlan .resume = ata_pci_device_resume, 1036669a5db4SJeff Garzik }; 1037669a5db4SJeff Garzik 1038669a5db4SJeff Garzik static int __init sis_init(void) 1039669a5db4SJeff Garzik { 1040669a5db4SJeff Garzik return pci_register_driver(&sis_pci_driver); 1041669a5db4SJeff Garzik } 1042669a5db4SJeff Garzik 1043669a5db4SJeff Garzik static void __exit sis_exit(void) 1044669a5db4SJeff Garzik { 1045669a5db4SJeff Garzik pci_unregister_driver(&sis_pci_driver); 1046669a5db4SJeff Garzik } 1047669a5db4SJeff Garzik 1048669a5db4SJeff Garzik module_init(sis_init); 1049669a5db4SJeff Garzik module_exit(sis_exit); 1050669a5db4SJeff Garzik 1051669a5db4SJeff Garzik MODULE_AUTHOR("Alan Cox"); 1052669a5db4SJeff Garzik MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA"); 1053669a5db4SJeff Garzik MODULE_LICENSE("GPL"); 1054669a5db4SJeff Garzik MODULE_DEVICE_TABLE(pci, sis_pci_tbl); 1055669a5db4SJeff Garzik MODULE_VERSION(DRV_VERSION); 1056669a5db4SJeff Garzik 1057