1669a5db4SJeff Garzik /* 2669a5db4SJeff Garzik * pata_sis.c - SiS ATA driver 3669a5db4SJeff Garzik * 4669a5db4SJeff Garzik * (C) 2005 Red Hat <alan@redhat.com> 54761c06cSBartlomiej Zolnierkiewicz * (C) 2007 Bartlomiej Zolnierkiewicz 6669a5db4SJeff Garzik * 7669a5db4SJeff Garzik * Based upon linux/drivers/ide/pci/sis5513.c 8669a5db4SJeff Garzik * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> 9669a5db4SJeff Garzik * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer 10669a5db4SJeff Garzik * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz> 11669a5db4SJeff Garzik * SiS Taiwan : for direct support and hardware. 12669a5db4SJeff Garzik * Daniela Engert : for initial ATA100 advices and numerous others. 13669a5db4SJeff Garzik * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt : 14669a5db4SJeff Garzik * for checking code correctness, providing patches. 15669a5db4SJeff Garzik * Original tests and design on the SiS620 chipset. 16669a5db4SJeff Garzik * ATA100 tests and design on the SiS735 chipset. 17669a5db4SJeff Garzik * ATA16/33 support from specs 18669a5db4SJeff Garzik * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw> 19669a5db4SJeff Garzik * 20669a5db4SJeff Garzik * 21669a5db4SJeff Garzik * TODO 22669a5db4SJeff Garzik * Check MWDMA on drives that don't support MWDMA speed pio cycles ? 23669a5db4SJeff Garzik * More Testing 24669a5db4SJeff Garzik */ 25669a5db4SJeff Garzik 26669a5db4SJeff Garzik #include <linux/kernel.h> 27669a5db4SJeff Garzik #include <linux/module.h> 28669a5db4SJeff Garzik #include <linux/pci.h> 29669a5db4SJeff Garzik #include <linux/init.h> 30669a5db4SJeff Garzik #include <linux/blkdev.h> 31669a5db4SJeff Garzik #include <linux/delay.h> 32669a5db4SJeff Garzik #include <linux/device.h> 33669a5db4SJeff Garzik #include <scsi/scsi_host.h> 34669a5db4SJeff Garzik #include <linux/libata.h> 35669a5db4SJeff Garzik #include <linux/ata.h> 364bb64fb9SAlan #include "sis.h" 37669a5db4SJeff Garzik 38669a5db4SJeff Garzik #define DRV_NAME "pata_sis" 394761c06cSBartlomiej Zolnierkiewicz #define DRV_VERSION "0.5.2" 40669a5db4SJeff Garzik 41669a5db4SJeff Garzik struct sis_chipset { 42669a5db4SJeff Garzik u16 device; /* PCI host ID */ 431626aeb8STejun Heo const struct ata_port_info *info; /* Info block */ 44669a5db4SJeff Garzik /* Probably add family, cable detect type etc here to clean 45669a5db4SJeff Garzik up code later */ 46669a5db4SJeff Garzik }; 47669a5db4SJeff Garzik 487dcbc1f2SJakub W. Jozwicki J struct sis_laptop { 497dcbc1f2SJakub W. Jozwicki J u16 device; 507dcbc1f2SJakub W. Jozwicki J u16 subvendor; 517dcbc1f2SJakub W. Jozwicki J u16 subdevice; 527dcbc1f2SJakub W. Jozwicki J }; 537dcbc1f2SJakub W. Jozwicki J 547dcbc1f2SJakub W. Jozwicki J static const struct sis_laptop sis_laptop[] = { 557dcbc1f2SJakub W. Jozwicki J /* devid, subvendor, subdev */ 567dcbc1f2SJakub W. Jozwicki J { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */ 574f2d47cfSAlan Cox { 0x5513, 0x1734, 0x105F }, /* FSC Amilo A1630 */ 581f71d067SGabriel C { 0x5513, 0x1071, 0x8640 }, /* EasyNote K5305 */ 597dcbc1f2SJakub W. Jozwicki J /* end marker */ 607dcbc1f2SJakub W. Jozwicki J { 0, } 617dcbc1f2SJakub W. Jozwicki J }; 627dcbc1f2SJakub W. Jozwicki J 637dcbc1f2SJakub W. Jozwicki J static int sis_short_ata40(struct pci_dev *dev) 647dcbc1f2SJakub W. Jozwicki J { 657dcbc1f2SJakub W. Jozwicki J const struct sis_laptop *lap = &sis_laptop[0]; 667dcbc1f2SJakub W. Jozwicki J 677dcbc1f2SJakub W. Jozwicki J while (lap->device) { 687dcbc1f2SJakub W. Jozwicki J if (lap->device == dev->device && 697dcbc1f2SJakub W. Jozwicki J lap->subvendor == dev->subsystem_vendor && 707dcbc1f2SJakub W. Jozwicki J lap->subdevice == dev->subsystem_device) 717dcbc1f2SJakub W. Jozwicki J return 1; 727dcbc1f2SJakub W. Jozwicki J lap++; 737dcbc1f2SJakub W. Jozwicki J } 747dcbc1f2SJakub W. Jozwicki J 757dcbc1f2SJakub W. Jozwicki J return 0; 767dcbc1f2SJakub W. Jozwicki J } 777dcbc1f2SJakub W. Jozwicki J 78669a5db4SJeff Garzik /** 79dd668d15SAlan Cox * sis_old_port_base - return PCI configuration base for dev 80669a5db4SJeff Garzik * @adev: device 81669a5db4SJeff Garzik * 82669a5db4SJeff Garzik * Returns the base of the PCI configuration registers for this port 83669a5db4SJeff Garzik * number. 84669a5db4SJeff Garzik */ 85669a5db4SJeff Garzik 86dd668d15SAlan Cox static int sis_old_port_base(struct ata_device *adev) 87669a5db4SJeff Garzik { 889af5c9c9STejun Heo return 0x40 + (4 * adev->link->ap->port_no) + (2 * adev->devno); 89669a5db4SJeff Garzik } 90669a5db4SJeff Garzik 91669a5db4SJeff Garzik /** 922e413f51SAlan Cox * sis_133_cable_detect - check for 40/80 pin 93669a5db4SJeff Garzik * @ap: Port 94d4b2bab4STejun Heo * @deadline: deadline jiffies for the operation 95669a5db4SJeff Garzik * 96669a5db4SJeff Garzik * Perform cable detection for the later UDMA133 capable 97669a5db4SJeff Garzik * SiS chipset. 98669a5db4SJeff Garzik */ 99669a5db4SJeff Garzik 1002e413f51SAlan Cox static int sis_133_cable_detect(struct ata_port *ap) 1012e413f51SAlan Cox { 1022e413f51SAlan Cox struct pci_dev *pdev = to_pci_dev(ap->host->dev); 1032e413f51SAlan Cox u16 tmp; 1042e413f51SAlan Cox 1052e413f51SAlan Cox /* The top bit of this register is the cable detect bit */ 1062e413f51SAlan Cox pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp); 1072e413f51SAlan Cox if ((tmp & 0x8000) && !sis_short_ata40(pdev)) 1082e413f51SAlan Cox return ATA_CBL_PATA40; 1092e413f51SAlan Cox return ATA_CBL_PATA80; 1102e413f51SAlan Cox } 1112e413f51SAlan Cox 1122e413f51SAlan Cox /** 1132e413f51SAlan Cox * sis_66_cable_detect - check for 40/80 pin 1142e413f51SAlan Cox * @ap: Port 115d4b2bab4STejun Heo * @deadline: deadline jiffies for the operation 1162e413f51SAlan Cox * 1172e413f51SAlan Cox * Perform cable detection on the UDMA66, UDMA100 and early UDMA133 1182e413f51SAlan Cox * SiS IDE controllers. 1192e413f51SAlan Cox */ 1202e413f51SAlan Cox 1212e413f51SAlan Cox static int sis_66_cable_detect(struct ata_port *ap) 1222e413f51SAlan Cox { 1232e413f51SAlan Cox struct pci_dev *pdev = to_pci_dev(ap->host->dev); 1242e413f51SAlan Cox u8 tmp; 1252e413f51SAlan Cox 1262e413f51SAlan Cox /* Older chips keep cable detect in bits 4/5 of reg 0x48 */ 1272e413f51SAlan Cox pci_read_config_byte(pdev, 0x48, &tmp); 1282e413f51SAlan Cox tmp >>= ap->port_no; 1292e413f51SAlan Cox if ((tmp & 0x10) && !sis_short_ata40(pdev)) 1302e413f51SAlan Cox return ATA_CBL_PATA40; 1312e413f51SAlan Cox return ATA_CBL_PATA80; 1322e413f51SAlan Cox } 1332e413f51SAlan Cox 1342e413f51SAlan Cox 1352e413f51SAlan Cox /** 1362e413f51SAlan Cox * sis_pre_reset - probe begin 137cc0680a5STejun Heo * @link: ATA link 138d4b2bab4STejun Heo * @deadline: deadline jiffies for the operation 1392e413f51SAlan Cox * 1402e413f51SAlan Cox * Set up cable type and use generic probe init 1412e413f51SAlan Cox */ 1422e413f51SAlan Cox 143cc0680a5STejun Heo static int sis_pre_reset(struct ata_link *link, unsigned long deadline) 144669a5db4SJeff Garzik { 145669a5db4SJeff Garzik static const struct pci_bits sis_enable_bits[] = { 146669a5db4SJeff Garzik { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ 147669a5db4SJeff Garzik { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ 148669a5db4SJeff Garzik }; 149669a5db4SJeff Garzik 150cc0680a5STejun Heo struct ata_port *ap = link->ap; 151669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 152669a5db4SJeff Garzik 153c961922bSAlan Cox if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) 154c961922bSAlan Cox return -ENOENT; 155d4b2bab4STejun Heo 15615ce0943SAlan Cox /* Clear the FIFO settings. We can't enable the FIFO until 15715ce0943SAlan Cox we know we are poking at a disk */ 15815ce0943SAlan Cox pci_write_config_byte(pdev, 0x4B, 0); 159cc0680a5STejun Heo return ata_std_prereset(link, deadline); 160669a5db4SJeff Garzik } 161669a5db4SJeff Garzik 1622e413f51SAlan Cox 163669a5db4SJeff Garzik /** 164669a5db4SJeff Garzik * sis_error_handler - Probe specified port on PATA host controller 165669a5db4SJeff Garzik * @ap: Port to probe 166669a5db4SJeff Garzik * 167669a5db4SJeff Garzik * LOCKING: 168669a5db4SJeff Garzik * None (inherited from caller). 169669a5db4SJeff Garzik */ 170669a5db4SJeff Garzik 1712e413f51SAlan Cox static void sis_error_handler(struct ata_port *ap) 172669a5db4SJeff Garzik { 1732e413f51SAlan Cox ata_bmdma_drive_eh(ap, sis_pre_reset, ata_std_softreset, NULL, ata_std_postreset); 174669a5db4SJeff Garzik } 175669a5db4SJeff Garzik 176669a5db4SJeff Garzik /** 177669a5db4SJeff Garzik * sis_set_fifo - Set RWP fifo bits for this device 178669a5db4SJeff Garzik * @ap: Port 179669a5db4SJeff Garzik * @adev: Device 180669a5db4SJeff Garzik * 181669a5db4SJeff Garzik * SIS chipsets implement prefetch/postwrite bits for each device 182669a5db4SJeff Garzik * on both channels. This functionality is not ATAPI compatible and 183669a5db4SJeff Garzik * must be configured according to the class of device present 184669a5db4SJeff Garzik */ 185669a5db4SJeff Garzik 186669a5db4SJeff Garzik static void sis_set_fifo(struct ata_port *ap, struct ata_device *adev) 187669a5db4SJeff Garzik { 188669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 189669a5db4SJeff Garzik u8 fifoctrl; 190669a5db4SJeff Garzik u8 mask = 0x11; 191669a5db4SJeff Garzik 192669a5db4SJeff Garzik mask <<= (2 * ap->port_no); 193669a5db4SJeff Garzik mask <<= adev->devno; 194669a5db4SJeff Garzik 195669a5db4SJeff Garzik /* This holds various bits including the FIFO control */ 196669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x4B, &fifoctrl); 197669a5db4SJeff Garzik fifoctrl &= ~mask; 198669a5db4SJeff Garzik 199669a5db4SJeff Garzik /* Enable for ATA (disk) only */ 200669a5db4SJeff Garzik if (adev->class == ATA_DEV_ATA) 201669a5db4SJeff Garzik fifoctrl |= mask; 202669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4B, fifoctrl); 203669a5db4SJeff Garzik } 204669a5db4SJeff Garzik 205669a5db4SJeff Garzik /** 206669a5db4SJeff Garzik * sis_old_set_piomode - Initialize host controller PATA PIO timings 207669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 208669a5db4SJeff Garzik * @adev: Device we are configuring for. 209669a5db4SJeff Garzik * 210669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 211669a5db4SJeff Garzik * function handles PIO set up for all chips that are pre ATA100 and 212669a5db4SJeff Garzik * also early ATA100 devices. 213669a5db4SJeff Garzik * 214669a5db4SJeff Garzik * LOCKING: 215669a5db4SJeff Garzik * None (inherited from caller). 216669a5db4SJeff Garzik */ 217669a5db4SJeff Garzik 218669a5db4SJeff Garzik static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev) 219669a5db4SJeff Garzik { 220669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 221dd668d15SAlan Cox int port = sis_old_port_base(adev); 222669a5db4SJeff Garzik u8 t1, t2; 223669a5db4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 224669a5db4SJeff Garzik 225669a5db4SJeff Garzik const u8 active[] = { 0x00, 0x07, 0x04, 0x03, 0x01 }; 226669a5db4SJeff Garzik const u8 recovery[] = { 0x00, 0x06, 0x04, 0x03, 0x03 }; 227669a5db4SJeff Garzik 228669a5db4SJeff Garzik sis_set_fifo(ap, adev); 229669a5db4SJeff Garzik 230669a5db4SJeff Garzik pci_read_config_byte(pdev, port, &t1); 231669a5db4SJeff Garzik pci_read_config_byte(pdev, port + 1, &t2); 232669a5db4SJeff Garzik 233669a5db4SJeff Garzik t1 &= ~0x0F; /* Clear active/recovery timings */ 234669a5db4SJeff Garzik t2 &= ~0x07; 235669a5db4SJeff Garzik 236669a5db4SJeff Garzik t1 |= active[speed]; 237669a5db4SJeff Garzik t2 |= recovery[speed]; 238669a5db4SJeff Garzik 239669a5db4SJeff Garzik pci_write_config_byte(pdev, port, t1); 240669a5db4SJeff Garzik pci_write_config_byte(pdev, port + 1, t2); 241669a5db4SJeff Garzik } 242669a5db4SJeff Garzik 243669a5db4SJeff Garzik /** 2444761c06cSBartlomiej Zolnierkiewicz * sis_100_set_piomode - Initialize host controller PATA PIO timings 245669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 246669a5db4SJeff Garzik * @adev: Device we are configuring for. 247669a5db4SJeff Garzik * 248669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 249669a5db4SJeff Garzik * function handles PIO set up for ATA100 devices and early ATA133. 250669a5db4SJeff Garzik * 251669a5db4SJeff Garzik * LOCKING: 252669a5db4SJeff Garzik * None (inherited from caller). 253669a5db4SJeff Garzik */ 254669a5db4SJeff Garzik 255669a5db4SJeff Garzik static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev) 256669a5db4SJeff Garzik { 257669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 258dd668d15SAlan Cox int port = sis_old_port_base(adev); 259669a5db4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 260669a5db4SJeff Garzik 261669a5db4SJeff Garzik const u8 actrec[] = { 0x00, 0x67, 0x44, 0x33, 0x31 }; 262669a5db4SJeff Garzik 263669a5db4SJeff Garzik sis_set_fifo(ap, adev); 264669a5db4SJeff Garzik 265669a5db4SJeff Garzik pci_write_config_byte(pdev, port, actrec[speed]); 266669a5db4SJeff Garzik } 267669a5db4SJeff Garzik 268669a5db4SJeff Garzik /** 2694761c06cSBartlomiej Zolnierkiewicz * sis_133_set_piomode - Initialize host controller PATA PIO timings 270669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 271669a5db4SJeff Garzik * @adev: Device we are configuring for. 272669a5db4SJeff Garzik * 273669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 274669a5db4SJeff Garzik * function handles PIO set up for the later ATA133 devices. 275669a5db4SJeff Garzik * 276669a5db4SJeff Garzik * LOCKING: 277669a5db4SJeff Garzik * None (inherited from caller). 278669a5db4SJeff Garzik */ 279669a5db4SJeff Garzik 280669a5db4SJeff Garzik static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev) 281669a5db4SJeff Garzik { 282669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 283669a5db4SJeff Garzik int port = 0x40; 284669a5db4SJeff Garzik u32 t1; 285669a5db4SJeff Garzik u32 reg54; 286669a5db4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 287669a5db4SJeff Garzik 288669a5db4SJeff Garzik const u32 timing133[] = { 289669a5db4SJeff Garzik 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */ 290669a5db4SJeff Garzik 0x0C266000, 291669a5db4SJeff Garzik 0x04263000, 292669a5db4SJeff Garzik 0x0C0A3000, 293669a5db4SJeff Garzik 0x05093000 294669a5db4SJeff Garzik }; 295669a5db4SJeff Garzik const u32 timing100[] = { 296669a5db4SJeff Garzik 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */ 297669a5db4SJeff Garzik 0x091C4000, 298669a5db4SJeff Garzik 0x031C2000, 299669a5db4SJeff Garzik 0x09072000, 300669a5db4SJeff Garzik 0x04062000 301669a5db4SJeff Garzik }; 302669a5db4SJeff Garzik 303669a5db4SJeff Garzik sis_set_fifo(ap, adev); 304669a5db4SJeff Garzik 305669a5db4SJeff Garzik /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ 306669a5db4SJeff Garzik pci_read_config_dword(pdev, 0x54, ®54); 307669a5db4SJeff Garzik if (reg54 & 0x40000000) 308669a5db4SJeff Garzik port = 0x70; 309669a5db4SJeff Garzik port += 8 * ap->port_no + 4 * adev->devno; 310669a5db4SJeff Garzik 311669a5db4SJeff Garzik pci_read_config_dword(pdev, port, &t1); 312669a5db4SJeff Garzik t1 &= 0xC0C00FFF; /* Mask out timing */ 313669a5db4SJeff Garzik 314669a5db4SJeff Garzik if (t1 & 0x08) /* 100 or 133 ? */ 315669a5db4SJeff Garzik t1 |= timing133[speed]; 316669a5db4SJeff Garzik else 317669a5db4SJeff Garzik t1 |= timing100[speed]; 318669a5db4SJeff Garzik pci_write_config_byte(pdev, port, t1); 319669a5db4SJeff Garzik } 320669a5db4SJeff Garzik 321669a5db4SJeff Garzik /** 322669a5db4SJeff Garzik * sis_old_set_dmamode - Initialize host controller PATA DMA timings 323669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 324669a5db4SJeff Garzik * @adev: Device to program 325669a5db4SJeff Garzik * 326669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 327669a5db4SJeff Garzik * Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike 328669a5db4SJeff Garzik * the old ide/pci driver. 329669a5db4SJeff Garzik * 330669a5db4SJeff Garzik * LOCKING: 331669a5db4SJeff Garzik * None (inherited from caller). 332669a5db4SJeff Garzik */ 333669a5db4SJeff Garzik 334669a5db4SJeff Garzik static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev) 335669a5db4SJeff Garzik { 336669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 337669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 338dd668d15SAlan Cox int drive_pci = sis_old_port_base(adev); 339669a5db4SJeff Garzik u16 timing; 340669a5db4SJeff Garzik 3414761c06cSBartlomiej Zolnierkiewicz const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 }; 342669a5db4SJeff Garzik const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 }; 343669a5db4SJeff Garzik 344669a5db4SJeff Garzik pci_read_config_word(pdev, drive_pci, &timing); 345669a5db4SJeff Garzik 346669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 347669a5db4SJeff Garzik /* bits 3-0 hold recovery timing bits 8-10 active timing and 3481967b7ffSJoe Perches the higher bits are dependant on the device */ 349669a5db4SJeff Garzik timing &= ~0x870F; 350669a5db4SJeff Garzik timing |= mwdma_bits[speed]; 351669a5db4SJeff Garzik } else { 352669a5db4SJeff Garzik /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */ 353669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 354669a5db4SJeff Garzik timing &= ~0x6000; 355669a5db4SJeff Garzik timing |= udma_bits[speed]; 356669a5db4SJeff Garzik } 3574761c06cSBartlomiej Zolnierkiewicz pci_write_config_word(pdev, drive_pci, timing); 358669a5db4SJeff Garzik } 359669a5db4SJeff Garzik 360669a5db4SJeff Garzik /** 361669a5db4SJeff Garzik * sis_66_set_dmamode - Initialize host controller PATA DMA timings 362669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 363669a5db4SJeff Garzik * @adev: Device to program 364669a5db4SJeff Garzik * 365669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 366669a5db4SJeff Garzik * Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike 367669a5db4SJeff Garzik * the old ide/pci driver. 368669a5db4SJeff Garzik * 369669a5db4SJeff Garzik * LOCKING: 370669a5db4SJeff Garzik * None (inherited from caller). 371669a5db4SJeff Garzik */ 372669a5db4SJeff Garzik 373669a5db4SJeff Garzik static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev) 374669a5db4SJeff Garzik { 375669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 376669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 377dd668d15SAlan Cox int drive_pci = sis_old_port_base(adev); 378669a5db4SJeff Garzik u16 timing; 379669a5db4SJeff Garzik 380edeb614cSTejun Heo /* MWDMA 0-2 and UDMA 0-5 */ 3814761c06cSBartlomiej Zolnierkiewicz const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 }; 382edeb614cSTejun Heo const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000, 0x8000 }; 383669a5db4SJeff Garzik 384669a5db4SJeff Garzik pci_read_config_word(pdev, drive_pci, &timing); 385669a5db4SJeff Garzik 386669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 387669a5db4SJeff Garzik /* bits 3-0 hold recovery timing bits 8-10 active timing and 3881967b7ffSJoe Perches the higher bits are dependant on the device, bit 15 udma */ 389669a5db4SJeff Garzik timing &= ~0x870F; 390669a5db4SJeff Garzik timing |= mwdma_bits[speed]; 391669a5db4SJeff Garzik } else { 392669a5db4SJeff Garzik /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ 393669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 394dd668d15SAlan Cox timing &= ~0xF000; 395669a5db4SJeff Garzik timing |= udma_bits[speed]; 396669a5db4SJeff Garzik } 397669a5db4SJeff Garzik pci_write_config_word(pdev, drive_pci, timing); 398669a5db4SJeff Garzik } 399669a5db4SJeff Garzik 400669a5db4SJeff Garzik /** 401669a5db4SJeff Garzik * sis_100_set_dmamode - Initialize host controller PATA DMA timings 402669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 403669a5db4SJeff Garzik * @adev: Device to program 404669a5db4SJeff Garzik * 405669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 406669a5db4SJeff Garzik * Handles UDMA66 and early UDMA100 devices. 407669a5db4SJeff Garzik * 408669a5db4SJeff Garzik * LOCKING: 409669a5db4SJeff Garzik * None (inherited from caller). 410669a5db4SJeff Garzik */ 411669a5db4SJeff Garzik 412669a5db4SJeff Garzik static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev) 413669a5db4SJeff Garzik { 414669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 415669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 416dd668d15SAlan Cox int drive_pci = sis_old_port_base(adev); 417dd668d15SAlan Cox u8 timing; 418669a5db4SJeff Garzik 419dd668d15SAlan Cox const u8 udma_bits[] = { 0x8B, 0x87, 0x85, 0x83, 0x82, 0x81}; 420669a5db4SJeff Garzik 421dd668d15SAlan Cox pci_read_config_byte(pdev, drive_pci + 1, &timing); 422669a5db4SJeff Garzik 423669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 424669a5db4SJeff Garzik /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */ 425669a5db4SJeff Garzik } else { 426dd668d15SAlan Cox /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */ 427669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 428dd668d15SAlan Cox timing &= ~0x8F; 429669a5db4SJeff Garzik timing |= udma_bits[speed]; 430669a5db4SJeff Garzik } 431dd668d15SAlan Cox pci_write_config_byte(pdev, drive_pci + 1, timing); 432669a5db4SJeff Garzik } 433669a5db4SJeff Garzik 434669a5db4SJeff Garzik /** 435669a5db4SJeff Garzik * sis_133_early_set_dmamode - Initialize host controller PATA DMA timings 436669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 437669a5db4SJeff Garzik * @adev: Device to program 438669a5db4SJeff Garzik * 439669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 4404761c06cSBartlomiej Zolnierkiewicz * Handles early SiS 961 bridges. 441669a5db4SJeff Garzik * 442669a5db4SJeff Garzik * LOCKING: 443669a5db4SJeff Garzik * None (inherited from caller). 444669a5db4SJeff Garzik */ 445669a5db4SJeff Garzik 446669a5db4SJeff Garzik static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *adev) 447669a5db4SJeff Garzik { 448669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 449669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 450dd668d15SAlan Cox int drive_pci = sis_old_port_base(adev); 451dd668d15SAlan Cox u8 timing; 452dd668d15SAlan Cox /* Low 4 bits are timing */ 453dd668d15SAlan Cox static const u8 udma_bits[] = { 0x8F, 0x8A, 0x87, 0x85, 0x83, 0x82, 0x81}; 454669a5db4SJeff Garzik 455dd668d15SAlan Cox pci_read_config_byte(pdev, drive_pci + 1, &timing); 456669a5db4SJeff Garzik 457669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 458669a5db4SJeff Garzik /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */ 459669a5db4SJeff Garzik } else { 460dd668d15SAlan Cox /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */ 461669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 462dd668d15SAlan Cox timing &= ~0x8F; 463669a5db4SJeff Garzik timing |= udma_bits[speed]; 464669a5db4SJeff Garzik } 465dd668d15SAlan Cox pci_write_config_byte(pdev, drive_pci + 1, timing); 466669a5db4SJeff Garzik } 467669a5db4SJeff Garzik 468669a5db4SJeff Garzik /** 469669a5db4SJeff Garzik * sis_133_set_dmamode - Initialize host controller PATA DMA timings 470669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 471669a5db4SJeff Garzik * @adev: Device to program 472669a5db4SJeff Garzik * 473669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 474669a5db4SJeff Garzik * 475669a5db4SJeff Garzik * LOCKING: 476669a5db4SJeff Garzik * None (inherited from caller). 477669a5db4SJeff Garzik */ 478669a5db4SJeff Garzik 479669a5db4SJeff Garzik static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev) 480669a5db4SJeff Garzik { 481669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 482669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 483669a5db4SJeff Garzik int port = 0x40; 484669a5db4SJeff Garzik u32 t1; 485669a5db4SJeff Garzik u32 reg54; 486669a5db4SJeff Garzik 487669a5db4SJeff Garzik /* bits 4- cycle time 8 - cvs time */ 4882e413f51SAlan Cox static const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 }; 4892e413f51SAlan Cox static const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 }; 490669a5db4SJeff Garzik 491669a5db4SJeff Garzik /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ 492669a5db4SJeff Garzik pci_read_config_dword(pdev, 0x54, ®54); 493669a5db4SJeff Garzik if (reg54 & 0x40000000) 494669a5db4SJeff Garzik port = 0x70; 495669a5db4SJeff Garzik port += (8 * ap->port_no) + (4 * adev->devno); 496669a5db4SJeff Garzik 497669a5db4SJeff Garzik pci_read_config_dword(pdev, port, &t1); 498669a5db4SJeff Garzik 499669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 500669a5db4SJeff Garzik t1 &= ~0x00000004; 501669a5db4SJeff Garzik /* FIXME: need data sheet to add MWDMA here. Also lacking on 502669a5db4SJeff Garzik ide/pci driver */ 503669a5db4SJeff Garzik } else { 504669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 505669a5db4SJeff Garzik /* if & 8 no UDMA133 - need info for ... */ 506669a5db4SJeff Garzik t1 &= ~0x00000FF0; 507669a5db4SJeff Garzik t1 |= 0x00000004; 508669a5db4SJeff Garzik if (t1 & 0x08) 509669a5db4SJeff Garzik t1 |= timing_u133[speed]; 510669a5db4SJeff Garzik else 511669a5db4SJeff Garzik t1 |= timing_u100[speed]; 512669a5db4SJeff Garzik } 513669a5db4SJeff Garzik pci_write_config_dword(pdev, port, t1); 514669a5db4SJeff Garzik } 515669a5db4SJeff Garzik 516669a5db4SJeff Garzik static struct scsi_host_template sis_sht = { 517669a5db4SJeff Garzik .module = THIS_MODULE, 518669a5db4SJeff Garzik .name = DRV_NAME, 519669a5db4SJeff Garzik .ioctl = ata_scsi_ioctl, 520669a5db4SJeff Garzik .queuecommand = ata_scsi_queuecmd, 521669a5db4SJeff Garzik .can_queue = ATA_DEF_QUEUE, 522669a5db4SJeff Garzik .this_id = ATA_SHT_THIS_ID, 523669a5db4SJeff Garzik .sg_tablesize = LIBATA_MAX_PRD, 524669a5db4SJeff Garzik .cmd_per_lun = ATA_SHT_CMD_PER_LUN, 525669a5db4SJeff Garzik .emulated = ATA_SHT_EMULATED, 526669a5db4SJeff Garzik .use_clustering = ATA_SHT_USE_CLUSTERING, 527669a5db4SJeff Garzik .proc_name = DRV_NAME, 528669a5db4SJeff Garzik .dma_boundary = ATA_DMA_BOUNDARY, 529669a5db4SJeff Garzik .slave_configure = ata_scsi_slave_config, 530afdfe899STejun Heo .slave_destroy = ata_scsi_slave_destroy, 531669a5db4SJeff Garzik .bios_param = ata_std_bios_param, 532669a5db4SJeff Garzik }; 533669a5db4SJeff Garzik 534669a5db4SJeff Garzik static const struct ata_port_operations sis_133_ops = { 535669a5db4SJeff Garzik .set_piomode = sis_133_set_piomode, 536669a5db4SJeff Garzik .set_dmamode = sis_133_set_dmamode, 537669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 538669a5db4SJeff Garzik 539669a5db4SJeff Garzik .tf_load = ata_tf_load, 540669a5db4SJeff Garzik .tf_read = ata_tf_read, 541669a5db4SJeff Garzik .check_status = ata_check_status, 542669a5db4SJeff Garzik .exec_command = ata_exec_command, 543669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 544669a5db4SJeff Garzik 545669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 546669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 5472e413f51SAlan Cox .error_handler = sis_error_handler, 548669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 5492e413f51SAlan Cox .cable_detect = sis_133_cable_detect, 550669a5db4SJeff Garzik 551669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 552669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 553669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 554669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 555669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 556669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 5570d5ff566STejun Heo .data_xfer = ata_data_xfer, 558669a5db4SJeff Garzik 559669a5db4SJeff Garzik .irq_handler = ata_interrupt, 560669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 561246ce3b6SAkira Iguchi .irq_on = ata_irq_on, 562669a5db4SJeff Garzik 56381ad1837SAlan Cox .port_start = ata_sff_port_start, 564669a5db4SJeff Garzik }; 565669a5db4SJeff Garzik 566a3cabb27SUwe Koziolek static const struct ata_port_operations sis_133_for_sata_ops = { 567a3cabb27SUwe Koziolek .set_piomode = sis_133_set_piomode, 568a3cabb27SUwe Koziolek .set_dmamode = sis_133_set_dmamode, 569a3cabb27SUwe Koziolek .mode_filter = ata_pci_default_filter, 570a3cabb27SUwe Koziolek 571a3cabb27SUwe Koziolek .tf_load = ata_tf_load, 572a3cabb27SUwe Koziolek .tf_read = ata_tf_read, 573a3cabb27SUwe Koziolek .check_status = ata_check_status, 574a3cabb27SUwe Koziolek .exec_command = ata_exec_command, 575a3cabb27SUwe Koziolek .dev_select = ata_std_dev_select, 576a3cabb27SUwe Koziolek 577a3cabb27SUwe Koziolek .freeze = ata_bmdma_freeze, 578a3cabb27SUwe Koziolek .thaw = ata_bmdma_thaw, 579a3cabb27SUwe Koziolek .error_handler = ata_bmdma_error_handler, 580a3cabb27SUwe Koziolek .post_internal_cmd = ata_bmdma_post_internal_cmd, 581a3cabb27SUwe Koziolek .cable_detect = sis_133_cable_detect, 582a3cabb27SUwe Koziolek 583a3cabb27SUwe Koziolek .bmdma_setup = ata_bmdma_setup, 584a3cabb27SUwe Koziolek .bmdma_start = ata_bmdma_start, 585a3cabb27SUwe Koziolek .bmdma_stop = ata_bmdma_stop, 586a3cabb27SUwe Koziolek .bmdma_status = ata_bmdma_status, 587a3cabb27SUwe Koziolek .qc_prep = ata_qc_prep, 588a3cabb27SUwe Koziolek .qc_issue = ata_qc_issue_prot, 589a3cabb27SUwe Koziolek .data_xfer = ata_data_xfer, 590a3cabb27SUwe Koziolek 591a3cabb27SUwe Koziolek .irq_handler = ata_interrupt, 592a3cabb27SUwe Koziolek .irq_clear = ata_bmdma_irq_clear, 593a3cabb27SUwe Koziolek .irq_on = ata_irq_on, 594a3cabb27SUwe Koziolek 59581ad1837SAlan Cox .port_start = ata_sff_port_start, 596a3cabb27SUwe Koziolek }; 597a3cabb27SUwe Koziolek 598669a5db4SJeff Garzik static const struct ata_port_operations sis_133_early_ops = { 599669a5db4SJeff Garzik .set_piomode = sis_100_set_piomode, 600669a5db4SJeff Garzik .set_dmamode = sis_133_early_set_dmamode, 601669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 602669a5db4SJeff Garzik 603669a5db4SJeff Garzik .tf_load = ata_tf_load, 604669a5db4SJeff Garzik .tf_read = ata_tf_read, 605669a5db4SJeff Garzik .check_status = ata_check_status, 606669a5db4SJeff Garzik .exec_command = ata_exec_command, 607669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 608669a5db4SJeff Garzik 609669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 610669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 6112e413f51SAlan Cox .error_handler = sis_error_handler, 612669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 6132e413f51SAlan Cox .cable_detect = sis_66_cable_detect, 614669a5db4SJeff Garzik 615669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 616669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 617669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 618669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 619669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 620669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 6210d5ff566STejun Heo .data_xfer = ata_data_xfer, 622669a5db4SJeff Garzik 623669a5db4SJeff Garzik .irq_handler = ata_interrupt, 624669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 625246ce3b6SAkira Iguchi .irq_on = ata_irq_on, 626669a5db4SJeff Garzik 62781ad1837SAlan Cox .port_start = ata_sff_port_start, 628669a5db4SJeff Garzik }; 629669a5db4SJeff Garzik 630669a5db4SJeff Garzik static const struct ata_port_operations sis_100_ops = { 631669a5db4SJeff Garzik .set_piomode = sis_100_set_piomode, 632669a5db4SJeff Garzik .set_dmamode = sis_100_set_dmamode, 633669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 634669a5db4SJeff Garzik 635669a5db4SJeff Garzik .tf_load = ata_tf_load, 636669a5db4SJeff Garzik .tf_read = ata_tf_read, 637669a5db4SJeff Garzik .check_status = ata_check_status, 638669a5db4SJeff Garzik .exec_command = ata_exec_command, 639669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 640669a5db4SJeff Garzik 641669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 642669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 6432e413f51SAlan Cox .error_handler = sis_error_handler, 644669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 6452e413f51SAlan Cox .cable_detect = sis_66_cable_detect, 646669a5db4SJeff Garzik 647669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 648669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 649669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 650669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 651669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 652669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 6530d5ff566STejun Heo .data_xfer = ata_data_xfer, 654669a5db4SJeff Garzik 655669a5db4SJeff Garzik .irq_handler = ata_interrupt, 656669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 657246ce3b6SAkira Iguchi .irq_on = ata_irq_on, 658669a5db4SJeff Garzik 65981ad1837SAlan Cox .port_start = ata_sff_port_start, 660669a5db4SJeff Garzik }; 661669a5db4SJeff Garzik 662669a5db4SJeff Garzik static const struct ata_port_operations sis_66_ops = { 663669a5db4SJeff Garzik .set_piomode = sis_old_set_piomode, 664669a5db4SJeff Garzik .set_dmamode = sis_66_set_dmamode, 665669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 666669a5db4SJeff Garzik 667669a5db4SJeff Garzik .tf_load = ata_tf_load, 668669a5db4SJeff Garzik .tf_read = ata_tf_read, 669669a5db4SJeff Garzik .check_status = ata_check_status, 670669a5db4SJeff Garzik .exec_command = ata_exec_command, 671669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 6722e413f51SAlan Cox .cable_detect = sis_66_cable_detect, 673669a5db4SJeff Garzik 674669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 675669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 6762e413f51SAlan Cox .error_handler = sis_error_handler, 677669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 678669a5db4SJeff Garzik 679669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 680669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 681669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 682669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 683669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 684669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 6850d5ff566STejun Heo .data_xfer = ata_data_xfer, 686669a5db4SJeff Garzik 687669a5db4SJeff Garzik .irq_handler = ata_interrupt, 688669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 689246ce3b6SAkira Iguchi .irq_on = ata_irq_on, 690669a5db4SJeff Garzik 69181ad1837SAlan Cox .port_start = ata_sff_port_start, 692669a5db4SJeff Garzik }; 693669a5db4SJeff Garzik 694669a5db4SJeff Garzik static const struct ata_port_operations sis_old_ops = { 695669a5db4SJeff Garzik .set_piomode = sis_old_set_piomode, 696669a5db4SJeff Garzik .set_dmamode = sis_old_set_dmamode, 697669a5db4SJeff Garzik .mode_filter = ata_pci_default_filter, 698669a5db4SJeff Garzik 699669a5db4SJeff Garzik .tf_load = ata_tf_load, 700669a5db4SJeff Garzik .tf_read = ata_tf_read, 701669a5db4SJeff Garzik .check_status = ata_check_status, 702669a5db4SJeff Garzik .exec_command = ata_exec_command, 703669a5db4SJeff Garzik .dev_select = ata_std_dev_select, 704669a5db4SJeff Garzik 705669a5db4SJeff Garzik .freeze = ata_bmdma_freeze, 706669a5db4SJeff Garzik .thaw = ata_bmdma_thaw, 7072e413f51SAlan Cox .error_handler = sis_error_handler, 708669a5db4SJeff Garzik .post_internal_cmd = ata_bmdma_post_internal_cmd, 7092e413f51SAlan Cox .cable_detect = ata_cable_40wire, 710669a5db4SJeff Garzik 711669a5db4SJeff Garzik .bmdma_setup = ata_bmdma_setup, 712669a5db4SJeff Garzik .bmdma_start = ata_bmdma_start, 713669a5db4SJeff Garzik .bmdma_stop = ata_bmdma_stop, 714669a5db4SJeff Garzik .bmdma_status = ata_bmdma_status, 715669a5db4SJeff Garzik .qc_prep = ata_qc_prep, 716669a5db4SJeff Garzik .qc_issue = ata_qc_issue_prot, 7170d5ff566STejun Heo .data_xfer = ata_data_xfer, 718669a5db4SJeff Garzik 719669a5db4SJeff Garzik .irq_handler = ata_interrupt, 720669a5db4SJeff Garzik .irq_clear = ata_bmdma_irq_clear, 721246ce3b6SAkira Iguchi .irq_on = ata_irq_on, 722669a5db4SJeff Garzik 72381ad1837SAlan Cox .port_start = ata_sff_port_start, 724669a5db4SJeff Garzik }; 725669a5db4SJeff Garzik 7261626aeb8STejun Heo static const struct ata_port_info sis_info = { 727669a5db4SJeff Garzik .sht = &sis_sht, 7281d2808fdSJeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 729669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 730669a5db4SJeff Garzik .mwdma_mask = 0x07, 731669a5db4SJeff Garzik .udma_mask = 0, 732669a5db4SJeff Garzik .port_ops = &sis_old_ops, 733669a5db4SJeff Garzik }; 7341626aeb8STejun Heo static const struct ata_port_info sis_info33 = { 735669a5db4SJeff Garzik .sht = &sis_sht, 7361d2808fdSJeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 737669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 738669a5db4SJeff Garzik .mwdma_mask = 0x07, 739669a5db4SJeff Garzik .udma_mask = ATA_UDMA2, /* UDMA 33 */ 740669a5db4SJeff Garzik .port_ops = &sis_old_ops, 741669a5db4SJeff Garzik }; 7421626aeb8STejun Heo static const struct ata_port_info sis_info66 = { 743669a5db4SJeff Garzik .sht = &sis_sht, 7441d2808fdSJeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 745669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 746669a5db4SJeff Garzik .udma_mask = ATA_UDMA4, /* UDMA 66 */ 747669a5db4SJeff Garzik .port_ops = &sis_66_ops, 748669a5db4SJeff Garzik }; 7491626aeb8STejun Heo static const struct ata_port_info sis_info100 = { 750669a5db4SJeff Garzik .sht = &sis_sht, 7511d2808fdSJeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 752669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 753669a5db4SJeff Garzik .udma_mask = ATA_UDMA5, 754669a5db4SJeff Garzik .port_ops = &sis_100_ops, 755669a5db4SJeff Garzik }; 7561626aeb8STejun Heo static const struct ata_port_info sis_info100_early = { 757669a5db4SJeff Garzik .sht = &sis_sht, 7581d2808fdSJeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 759669a5db4SJeff Garzik .udma_mask = ATA_UDMA5, 760669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 761669a5db4SJeff Garzik .port_ops = &sis_66_ops, 762669a5db4SJeff Garzik }; 763a3cabb27SUwe Koziolek static const struct ata_port_info sis_info133 = { 764669a5db4SJeff Garzik .sht = &sis_sht, 7651d2808fdSJeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 766669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 767669a5db4SJeff Garzik .udma_mask = ATA_UDMA6, 768669a5db4SJeff Garzik .port_ops = &sis_133_ops, 769669a5db4SJeff Garzik }; 770a3cabb27SUwe Koziolek const struct ata_port_info sis_info133_for_sata = { 771a3cabb27SUwe Koziolek .sht = &sis_sht, 772a3cabb27SUwe Koziolek .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, 773a3cabb27SUwe Koziolek .pio_mask = 0x1f, /* pio0-4 */ 774a3cabb27SUwe Koziolek .udma_mask = ATA_UDMA6, 775a3cabb27SUwe Koziolek .port_ops = &sis_133_for_sata_ops, 776a3cabb27SUwe Koziolek }; 7771626aeb8STejun Heo static const struct ata_port_info sis_info133_early = { 778669a5db4SJeff Garzik .sht = &sis_sht, 7791d2808fdSJeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 780669a5db4SJeff Garzik .pio_mask = 0x1f, /* pio0-4 */ 781669a5db4SJeff Garzik .udma_mask = ATA_UDMA6, 782669a5db4SJeff Garzik .port_ops = &sis_133_early_ops, 783669a5db4SJeff Garzik }; 784669a5db4SJeff Garzik 7859b14dec5SAlan /* Privately shared with the SiS180 SATA driver, not for use elsewhere */ 786a3cabb27SUwe Koziolek EXPORT_SYMBOL_GPL(sis_info133_for_sata); 787669a5db4SJeff Garzik 788669a5db4SJeff Garzik static void sis_fixup(struct pci_dev *pdev, struct sis_chipset *sis) 789669a5db4SJeff Garzik { 790669a5db4SJeff Garzik u16 regw; 791669a5db4SJeff Garzik u8 reg; 792669a5db4SJeff Garzik 793669a5db4SJeff Garzik if (sis->info == &sis_info133) { 794669a5db4SJeff Garzik pci_read_config_word(pdev, 0x50, ®w); 795669a5db4SJeff Garzik if (regw & 0x08) 796669a5db4SJeff Garzik pci_write_config_word(pdev, 0x50, regw & ~0x08); 797669a5db4SJeff Garzik pci_read_config_word(pdev, 0x52, ®w); 798669a5db4SJeff Garzik if (regw & 0x08) 799669a5db4SJeff Garzik pci_write_config_word(pdev, 0x52, regw & ~0x08); 800669a5db4SJeff Garzik return; 801669a5db4SJeff Garzik } 802669a5db4SJeff Garzik 803669a5db4SJeff Garzik if (sis->info == &sis_info133_early || sis->info == &sis_info100) { 804669a5db4SJeff Garzik /* Fix up latency */ 805669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80); 806669a5db4SJeff Garzik /* Set compatibility bit */ 807669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x49, ®); 808669a5db4SJeff Garzik if (!(reg & 0x01)) 809669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x49, reg | 0x01); 810669a5db4SJeff Garzik return; 811669a5db4SJeff Garzik } 812669a5db4SJeff Garzik 813669a5db4SJeff Garzik if (sis->info == &sis_info66 || sis->info == &sis_info100_early) { 814669a5db4SJeff Garzik /* Fix up latency */ 815669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80); 816669a5db4SJeff Garzik /* Set compatibility bit */ 817669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x52, ®); 818669a5db4SJeff Garzik if (!(reg & 0x04)) 819669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x52, reg | 0x04); 820669a5db4SJeff Garzik return; 821669a5db4SJeff Garzik } 822669a5db4SJeff Garzik 823669a5db4SJeff Garzik if (sis->info == &sis_info33) { 824669a5db4SJeff Garzik pci_read_config_byte(pdev, PCI_CLASS_PROG, ®); 825669a5db4SJeff Garzik if (( reg & 0x0F ) != 0x00) 826669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_CLASS_PROG, reg & 0xF0); 827669a5db4SJeff Garzik /* Fall through to ATA16 fixup below */ 828669a5db4SJeff Garzik } 829669a5db4SJeff Garzik 830669a5db4SJeff Garzik if (sis->info == &sis_info || sis->info == &sis_info33) { 831669a5db4SJeff Garzik /* force per drive recovery and active timings 832669a5db4SJeff Garzik needed on ATA_33 and below chips */ 833669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x52, ®); 834669a5db4SJeff Garzik if (!(reg & 0x08)) 835669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x52, reg|0x08); 836669a5db4SJeff Garzik return; 837669a5db4SJeff Garzik } 838669a5db4SJeff Garzik 839669a5db4SJeff Garzik BUG(); 840669a5db4SJeff Garzik } 841669a5db4SJeff Garzik 842669a5db4SJeff Garzik /** 843669a5db4SJeff Garzik * sis_init_one - Register SiS ATA PCI device with kernel services 844669a5db4SJeff Garzik * @pdev: PCI device to register 845669a5db4SJeff Garzik * @ent: Entry in sis_pci_tbl matching with @pdev 846669a5db4SJeff Garzik * 847669a5db4SJeff Garzik * Called from kernel PCI layer. We probe for combined mode (sigh), 848669a5db4SJeff Garzik * and then hand over control to libata, for it to do the rest. 849669a5db4SJeff Garzik * 850669a5db4SJeff Garzik * LOCKING: 851669a5db4SJeff Garzik * Inherited from PCI layer (may sleep). 852669a5db4SJeff Garzik * 853669a5db4SJeff Garzik * RETURNS: 854669a5db4SJeff Garzik * Zero on success, or -ERRNO value. 855669a5db4SJeff Garzik */ 856669a5db4SJeff Garzik 857669a5db4SJeff Garzik static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 858669a5db4SJeff Garzik { 859669a5db4SJeff Garzik static int printed_version; 8601626aeb8STejun Heo struct ata_port_info port; 8611626aeb8STejun Heo const struct ata_port_info *ppi[] = { &port, NULL }; 862669a5db4SJeff Garzik struct pci_dev *host = NULL; 863669a5db4SJeff Garzik struct sis_chipset *chipset = NULL; 864f3769e9dSAlan Cox struct sis_chipset *sets; 865669a5db4SJeff Garzik 866669a5db4SJeff Garzik static struct sis_chipset sis_chipsets[] = { 867af323a2fSAlan Cox 868af323a2fSAlan Cox { 0x0968, &sis_info133 }, 869af323a2fSAlan Cox { 0x0966, &sis_info133 }, 870af323a2fSAlan Cox { 0x0965, &sis_info133 }, 871669a5db4SJeff Garzik { 0x0745, &sis_info100 }, 872669a5db4SJeff Garzik { 0x0735, &sis_info100 }, 873669a5db4SJeff Garzik { 0x0733, &sis_info100 }, 874669a5db4SJeff Garzik { 0x0635, &sis_info100 }, 875669a5db4SJeff Garzik { 0x0633, &sis_info100 }, 876669a5db4SJeff Garzik 877669a5db4SJeff Garzik { 0x0730, &sis_info100_early }, /* 100 with ATA 66 layout */ 878669a5db4SJeff Garzik { 0x0550, &sis_info100_early }, /* 100 with ATA 66 layout */ 879669a5db4SJeff Garzik 880669a5db4SJeff Garzik { 0x0640, &sis_info66 }, 881669a5db4SJeff Garzik { 0x0630, &sis_info66 }, 882669a5db4SJeff Garzik { 0x0620, &sis_info66 }, 883669a5db4SJeff Garzik { 0x0540, &sis_info66 }, 884669a5db4SJeff Garzik { 0x0530, &sis_info66 }, 885669a5db4SJeff Garzik 886669a5db4SJeff Garzik { 0x5600, &sis_info33 }, 887669a5db4SJeff Garzik { 0x5598, &sis_info33 }, 888669a5db4SJeff Garzik { 0x5597, &sis_info33 }, 889669a5db4SJeff Garzik { 0x5591, &sis_info33 }, 890669a5db4SJeff Garzik { 0x5582, &sis_info33 }, 891669a5db4SJeff Garzik { 0x5581, &sis_info33 }, 892669a5db4SJeff Garzik 893669a5db4SJeff Garzik { 0x5596, &sis_info }, 894669a5db4SJeff Garzik { 0x5571, &sis_info }, 895669a5db4SJeff Garzik { 0x5517, &sis_info }, 896669a5db4SJeff Garzik { 0x5511, &sis_info }, 897669a5db4SJeff Garzik 898669a5db4SJeff Garzik {0} 899669a5db4SJeff Garzik }; 900669a5db4SJeff Garzik static struct sis_chipset sis133_early = { 901669a5db4SJeff Garzik 0x0, &sis_info133_early 902669a5db4SJeff Garzik }; 903669a5db4SJeff Garzik static struct sis_chipset sis133 = { 904669a5db4SJeff Garzik 0x0, &sis_info133 905669a5db4SJeff Garzik }; 906669a5db4SJeff Garzik static struct sis_chipset sis100_early = { 907669a5db4SJeff Garzik 0x0, &sis_info100_early 908669a5db4SJeff Garzik }; 909669a5db4SJeff Garzik static struct sis_chipset sis100 = { 910669a5db4SJeff Garzik 0x0, &sis_info100 911669a5db4SJeff Garzik }; 912669a5db4SJeff Garzik 913669a5db4SJeff Garzik if (!printed_version++) 914669a5db4SJeff Garzik dev_printk(KERN_DEBUG, &pdev->dev, 915669a5db4SJeff Garzik "version " DRV_VERSION "\n"); 916669a5db4SJeff Garzik 917669a5db4SJeff Garzik /* We have to find the bridge first */ 918669a5db4SJeff Garzik 919f3769e9dSAlan Cox for (sets = &sis_chipsets[0]; sets->device; sets++) { 920f3769e9dSAlan Cox host = pci_get_device(PCI_VENDOR_ID_SI, sets->device, NULL); 921669a5db4SJeff Garzik if (host != NULL) { 922f3769e9dSAlan Cox chipset = sets; /* Match found */ 923f3769e9dSAlan Cox if (sets->device == 0x630) { /* SIS630 */ 92444c10138SAuke Kok if (host->revision >= 0x30) /* 630 ET */ 925669a5db4SJeff Garzik chipset = &sis100_early; 926669a5db4SJeff Garzik } 927669a5db4SJeff Garzik break; 928669a5db4SJeff Garzik } 929669a5db4SJeff Garzik } 930669a5db4SJeff Garzik 931669a5db4SJeff Garzik /* Look for concealed bridges */ 932f3769e9dSAlan Cox if (chipset == NULL) { 933669a5db4SJeff Garzik /* Second check */ 934669a5db4SJeff Garzik u32 idemisc; 935669a5db4SJeff Garzik u16 trueid; 936669a5db4SJeff Garzik 937669a5db4SJeff Garzik /* Disable ID masking and register remapping then 938669a5db4SJeff Garzik see what the real ID is */ 939669a5db4SJeff Garzik 940669a5db4SJeff Garzik pci_read_config_dword(pdev, 0x54, &idemisc); 941669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc & 0x7fffffff); 942669a5db4SJeff Garzik pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid); 943669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc); 944669a5db4SJeff Garzik 945669a5db4SJeff Garzik switch(trueid) { 946669a5db4SJeff Garzik case 0x5518: /* SIS 962/963 */ 947669a5db4SJeff Garzik chipset = &sis133; 948669a5db4SJeff Garzik if ((idemisc & 0x40000000) == 0) { 949669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc | 0x40000000); 950669a5db4SJeff Garzik printk(KERN_INFO "SIS5513: Switching to 5513 register mapping\n"); 951669a5db4SJeff Garzik } 952669a5db4SJeff Garzik break; 953669a5db4SJeff Garzik case 0x0180: /* SIS 965/965L */ 954669a5db4SJeff Garzik chipset = &sis133; 955669a5db4SJeff Garzik break; 956669a5db4SJeff Garzik case 0x1180: /* SIS 966/966L */ 957669a5db4SJeff Garzik chipset = &sis133; 958669a5db4SJeff Garzik break; 959669a5db4SJeff Garzik } 960669a5db4SJeff Garzik } 961669a5db4SJeff Garzik 962669a5db4SJeff Garzik /* Further check */ 963669a5db4SJeff Garzik if (chipset == NULL) { 964669a5db4SJeff Garzik struct pci_dev *lpc_bridge; 965669a5db4SJeff Garzik u16 trueid; 966669a5db4SJeff Garzik u8 prefctl; 967669a5db4SJeff Garzik u8 idecfg; 968669a5db4SJeff Garzik 969669a5db4SJeff Garzik /* Try the second unmasking technique */ 970669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x4a, &idecfg); 971669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4a, idecfg | 0x10); 972669a5db4SJeff Garzik pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid); 973669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4a, idecfg); 974669a5db4SJeff Garzik 975669a5db4SJeff Garzik switch(trueid) { 976669a5db4SJeff Garzik case 0x5517: 977669a5db4SJeff Garzik lpc_bridge = pci_get_slot(pdev->bus, 0x10); /* Bus 0 Dev 2 Fn 0 */ 978669a5db4SJeff Garzik if (lpc_bridge == NULL) 979669a5db4SJeff Garzik break; 980669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x49, &prefctl); 981669a5db4SJeff Garzik pci_dev_put(lpc_bridge); 982669a5db4SJeff Garzik 98344c10138SAuke Kok if (lpc_bridge->revision == 0x10 && (prefctl & 0x80)) { 984669a5db4SJeff Garzik chipset = &sis133_early; 985669a5db4SJeff Garzik break; 986669a5db4SJeff Garzik } 987669a5db4SJeff Garzik chipset = &sis100; 988669a5db4SJeff Garzik break; 989669a5db4SJeff Garzik } 990669a5db4SJeff Garzik } 991669a5db4SJeff Garzik pci_dev_put(host); 992669a5db4SJeff Garzik 993669a5db4SJeff Garzik /* No chipset info, no support */ 994669a5db4SJeff Garzik if (chipset == NULL) 995669a5db4SJeff Garzik return -ENODEV; 996669a5db4SJeff Garzik 9971626aeb8STejun Heo port = *chipset->info; 9981626aeb8STejun Heo port.private_data = chipset; 999669a5db4SJeff Garzik 1000669a5db4SJeff Garzik sis_fixup(pdev, chipset); 1001669a5db4SJeff Garzik 10021626aeb8STejun Heo return ata_pci_init_one(pdev, ppi); 1003669a5db4SJeff Garzik } 1004669a5db4SJeff Garzik 1005669a5db4SJeff Garzik static const struct pci_device_id sis_pci_tbl[] = { 10062d2744fcSJeff Garzik { PCI_VDEVICE(SI, 0x5513), }, /* SiS 5513 */ 10072d2744fcSJeff Garzik { PCI_VDEVICE(SI, 0x5518), }, /* SiS 5518 */ 1008a3cabb27SUwe Koziolek { PCI_VDEVICE(SI, 0x1180), }, /* SiS 1180 */ 10092d2744fcSJeff Garzik 1010669a5db4SJeff Garzik { } 1011669a5db4SJeff Garzik }; 1012669a5db4SJeff Garzik 1013669a5db4SJeff Garzik static struct pci_driver sis_pci_driver = { 1014669a5db4SJeff Garzik .name = DRV_NAME, 1015669a5db4SJeff Garzik .id_table = sis_pci_tbl, 1016669a5db4SJeff Garzik .probe = sis_init_one, 1017669a5db4SJeff Garzik .remove = ata_pci_remove_one, 1018438ac6d5STejun Heo #ifdef CONFIG_PM 101962d64ae0SAlan .suspend = ata_pci_device_suspend, 102062d64ae0SAlan .resume = ata_pci_device_resume, 1021438ac6d5STejun Heo #endif 1022669a5db4SJeff Garzik }; 1023669a5db4SJeff Garzik 1024669a5db4SJeff Garzik static int __init sis_init(void) 1025669a5db4SJeff Garzik { 1026669a5db4SJeff Garzik return pci_register_driver(&sis_pci_driver); 1027669a5db4SJeff Garzik } 1028669a5db4SJeff Garzik 1029669a5db4SJeff Garzik static void __exit sis_exit(void) 1030669a5db4SJeff Garzik { 1031669a5db4SJeff Garzik pci_unregister_driver(&sis_pci_driver); 1032669a5db4SJeff Garzik } 1033669a5db4SJeff Garzik 1034669a5db4SJeff Garzik module_init(sis_init); 1035669a5db4SJeff Garzik module_exit(sis_exit); 1036669a5db4SJeff Garzik 1037669a5db4SJeff Garzik MODULE_AUTHOR("Alan Cox"); 1038669a5db4SJeff Garzik MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA"); 1039669a5db4SJeff Garzik MODULE_LICENSE("GPL"); 1040669a5db4SJeff Garzik MODULE_DEVICE_TABLE(pci, sis_pci_tbl); 1041669a5db4SJeff Garzik MODULE_VERSION(DRV_VERSION); 1042669a5db4SJeff Garzik 1043