1669a5db4SJeff Garzik /* 2669a5db4SJeff Garzik * pata_sis.c - SiS ATA driver 3669a5db4SJeff Garzik * 4ab771630SAlan Cox * (C) 2005 Red Hat 5750c7136SBartlomiej Zolnierkiewicz * (C) 2007,2009 Bartlomiej Zolnierkiewicz 6669a5db4SJeff Garzik * 7669a5db4SJeff Garzik * Based upon linux/drivers/ide/pci/sis5513.c 8669a5db4SJeff Garzik * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> 9669a5db4SJeff Garzik * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer 10669a5db4SJeff Garzik * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz> 11669a5db4SJeff Garzik * SiS Taiwan : for direct support and hardware. 12669a5db4SJeff Garzik * Daniela Engert : for initial ATA100 advices and numerous others. 13669a5db4SJeff Garzik * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt : 14669a5db4SJeff Garzik * for checking code correctness, providing patches. 15669a5db4SJeff Garzik * Original tests and design on the SiS620 chipset. 16669a5db4SJeff Garzik * ATA100 tests and design on the SiS735 chipset. 17669a5db4SJeff Garzik * ATA16/33 support from specs 18669a5db4SJeff Garzik * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw> 19669a5db4SJeff Garzik * 20669a5db4SJeff Garzik * 21669a5db4SJeff Garzik * TODO 22669a5db4SJeff Garzik * Check MWDMA on drives that don't support MWDMA speed pio cycles ? 23669a5db4SJeff Garzik * More Testing 24669a5db4SJeff Garzik */ 25669a5db4SJeff Garzik 26669a5db4SJeff Garzik #include <linux/kernel.h> 27669a5db4SJeff Garzik #include <linux/module.h> 28669a5db4SJeff Garzik #include <linux/pci.h> 29669a5db4SJeff Garzik #include <linux/init.h> 30669a5db4SJeff Garzik #include <linux/blkdev.h> 31669a5db4SJeff Garzik #include <linux/delay.h> 32669a5db4SJeff Garzik #include <linux/device.h> 33669a5db4SJeff Garzik #include <scsi/scsi_host.h> 34669a5db4SJeff Garzik #include <linux/libata.h> 35669a5db4SJeff Garzik #include <linux/ata.h> 364bb64fb9SAlan #include "sis.h" 37669a5db4SJeff Garzik 38669a5db4SJeff Garzik #define DRV_NAME "pata_sis" 394761c06cSBartlomiej Zolnierkiewicz #define DRV_VERSION "0.5.2" 40669a5db4SJeff Garzik 41669a5db4SJeff Garzik struct sis_chipset { 42669a5db4SJeff Garzik u16 device; /* PCI host ID */ 431626aeb8STejun Heo const struct ata_port_info *info; /* Info block */ 44669a5db4SJeff Garzik /* Probably add family, cable detect type etc here to clean 45669a5db4SJeff Garzik up code later */ 46669a5db4SJeff Garzik }; 47669a5db4SJeff Garzik 487dcbc1f2SJakub W. Jozwicki J struct sis_laptop { 497dcbc1f2SJakub W. Jozwicki J u16 device; 507dcbc1f2SJakub W. Jozwicki J u16 subvendor; 517dcbc1f2SJakub W. Jozwicki J u16 subdevice; 527dcbc1f2SJakub W. Jozwicki J }; 537dcbc1f2SJakub W. Jozwicki J 547dcbc1f2SJakub W. Jozwicki J static const struct sis_laptop sis_laptop[] = { 557dcbc1f2SJakub W. Jozwicki J /* devid, subvendor, subdev */ 567dcbc1f2SJakub W. Jozwicki J { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */ 574f2d47cfSAlan Cox { 0x5513, 0x1734, 0x105F }, /* FSC Amilo A1630 */ 581f71d067SGabriel C { 0x5513, 0x1071, 0x8640 }, /* EasyNote K5305 */ 597dcbc1f2SJakub W. Jozwicki J /* end marker */ 607dcbc1f2SJakub W. Jozwicki J { 0, } 617dcbc1f2SJakub W. Jozwicki J }; 627dcbc1f2SJakub W. Jozwicki J 637dcbc1f2SJakub W. Jozwicki J static int sis_short_ata40(struct pci_dev *dev) 647dcbc1f2SJakub W. Jozwicki J { 657dcbc1f2SJakub W. Jozwicki J const struct sis_laptop *lap = &sis_laptop[0]; 667dcbc1f2SJakub W. Jozwicki J 677dcbc1f2SJakub W. Jozwicki J while (lap->device) { 687dcbc1f2SJakub W. Jozwicki J if (lap->device == dev->device && 697dcbc1f2SJakub W. Jozwicki J lap->subvendor == dev->subsystem_vendor && 707dcbc1f2SJakub W. Jozwicki J lap->subdevice == dev->subsystem_device) 717dcbc1f2SJakub W. Jozwicki J return 1; 727dcbc1f2SJakub W. Jozwicki J lap++; 737dcbc1f2SJakub W. Jozwicki J } 747dcbc1f2SJakub W. Jozwicki J 757dcbc1f2SJakub W. Jozwicki J return 0; 767dcbc1f2SJakub W. Jozwicki J } 777dcbc1f2SJakub W. Jozwicki J 78669a5db4SJeff Garzik /** 79dd668d15SAlan Cox * sis_old_port_base - return PCI configuration base for dev 80669a5db4SJeff Garzik * @adev: device 81669a5db4SJeff Garzik * 82669a5db4SJeff Garzik * Returns the base of the PCI configuration registers for this port 83669a5db4SJeff Garzik * number. 84669a5db4SJeff Garzik */ 85669a5db4SJeff Garzik 86dd668d15SAlan Cox static int sis_old_port_base(struct ata_device *adev) 87669a5db4SJeff Garzik { 889af5c9c9STejun Heo return 0x40 + (4 * adev->link->ap->port_no) + (2 * adev->devno); 89669a5db4SJeff Garzik } 90669a5db4SJeff Garzik 91669a5db4SJeff Garzik /** 92023a0175SDan McGee * sis_port_base - return PCI configuration base for dev 93023a0175SDan McGee * @adev: device 94023a0175SDan McGee * 95023a0175SDan McGee * Returns the base of the PCI configuration registers for this port 96023a0175SDan McGee * number. 97023a0175SDan McGee */ 98023a0175SDan McGee 99023a0175SDan McGee static int sis_port_base(struct ata_device *adev) 100023a0175SDan McGee { 101023a0175SDan McGee struct ata_port *ap = adev->link->ap; 102023a0175SDan McGee struct pci_dev *pdev = to_pci_dev(ap->host->dev); 103023a0175SDan McGee int port = 0x40; 104023a0175SDan McGee u32 reg54; 105023a0175SDan McGee 106023a0175SDan McGee /* If bit 30 is set then the registers are mapped at 0x70 not 0x40 */ 107023a0175SDan McGee pci_read_config_dword(pdev, 0x54, ®54); 108023a0175SDan McGee if (reg54 & 0x40000000) 109023a0175SDan McGee port = 0x70; 110023a0175SDan McGee 111023a0175SDan McGee return port + (8 * ap->port_no) + (4 * adev->devno); 112023a0175SDan McGee } 113023a0175SDan McGee 114023a0175SDan McGee /** 1152e413f51SAlan Cox * sis_133_cable_detect - check for 40/80 pin 116669a5db4SJeff Garzik * @ap: Port 117d4b2bab4STejun Heo * @deadline: deadline jiffies for the operation 118669a5db4SJeff Garzik * 119669a5db4SJeff Garzik * Perform cable detection for the later UDMA133 capable 120669a5db4SJeff Garzik * SiS chipset. 121669a5db4SJeff Garzik */ 122669a5db4SJeff Garzik 1232e413f51SAlan Cox static int sis_133_cable_detect(struct ata_port *ap) 1242e413f51SAlan Cox { 1252e413f51SAlan Cox struct pci_dev *pdev = to_pci_dev(ap->host->dev); 1262e413f51SAlan Cox u16 tmp; 1272e413f51SAlan Cox 1282e413f51SAlan Cox /* The top bit of this register is the cable detect bit */ 1292e413f51SAlan Cox pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp); 1302e413f51SAlan Cox if ((tmp & 0x8000) && !sis_short_ata40(pdev)) 1312e413f51SAlan Cox return ATA_CBL_PATA40; 1322e413f51SAlan Cox return ATA_CBL_PATA80; 1332e413f51SAlan Cox } 1342e413f51SAlan Cox 1352e413f51SAlan Cox /** 1362e413f51SAlan Cox * sis_66_cable_detect - check for 40/80 pin 1372e413f51SAlan Cox * @ap: Port 1382e413f51SAlan Cox * 1392e413f51SAlan Cox * Perform cable detection on the UDMA66, UDMA100 and early UDMA133 1402e413f51SAlan Cox * SiS IDE controllers. 1412e413f51SAlan Cox */ 1422e413f51SAlan Cox 1432e413f51SAlan Cox static int sis_66_cable_detect(struct ata_port *ap) 1442e413f51SAlan Cox { 1452e413f51SAlan Cox struct pci_dev *pdev = to_pci_dev(ap->host->dev); 1462e413f51SAlan Cox u8 tmp; 1472e413f51SAlan Cox 1482e413f51SAlan Cox /* Older chips keep cable detect in bits 4/5 of reg 0x48 */ 1492e413f51SAlan Cox pci_read_config_byte(pdev, 0x48, &tmp); 1502e413f51SAlan Cox tmp >>= ap->port_no; 1512e413f51SAlan Cox if ((tmp & 0x10) && !sis_short_ata40(pdev)) 1522e413f51SAlan Cox return ATA_CBL_PATA40; 1532e413f51SAlan Cox return ATA_CBL_PATA80; 1542e413f51SAlan Cox } 1552e413f51SAlan Cox 1562e413f51SAlan Cox 1572e413f51SAlan Cox /** 1582e413f51SAlan Cox * sis_pre_reset - probe begin 159cc0680a5STejun Heo * @link: ATA link 160d4b2bab4STejun Heo * @deadline: deadline jiffies for the operation 1612e413f51SAlan Cox * 1622e413f51SAlan Cox * Set up cable type and use generic probe init 1632e413f51SAlan Cox */ 1642e413f51SAlan Cox 165cc0680a5STejun Heo static int sis_pre_reset(struct ata_link *link, unsigned long deadline) 166669a5db4SJeff Garzik { 167669a5db4SJeff Garzik static const struct pci_bits sis_enable_bits[] = { 168669a5db4SJeff Garzik { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ 169669a5db4SJeff Garzik { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ 170669a5db4SJeff Garzik }; 171669a5db4SJeff Garzik 172cc0680a5STejun Heo struct ata_port *ap = link->ap; 173669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 174669a5db4SJeff Garzik 175c961922bSAlan Cox if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) 176c961922bSAlan Cox return -ENOENT; 177d4b2bab4STejun Heo 17815ce0943SAlan Cox /* Clear the FIFO settings. We can't enable the FIFO until 17915ce0943SAlan Cox we know we are poking at a disk */ 18015ce0943SAlan Cox pci_write_config_byte(pdev, 0x4B, 0); 1819363c382STejun Heo return ata_sff_prereset(link, deadline); 182669a5db4SJeff Garzik } 183669a5db4SJeff Garzik 1842e413f51SAlan Cox 185669a5db4SJeff Garzik /** 186669a5db4SJeff Garzik * sis_set_fifo - Set RWP fifo bits for this device 187669a5db4SJeff Garzik * @ap: Port 188669a5db4SJeff Garzik * @adev: Device 189669a5db4SJeff Garzik * 190669a5db4SJeff Garzik * SIS chipsets implement prefetch/postwrite bits for each device 191669a5db4SJeff Garzik * on both channels. This functionality is not ATAPI compatible and 192669a5db4SJeff Garzik * must be configured according to the class of device present 193669a5db4SJeff Garzik */ 194669a5db4SJeff Garzik 195669a5db4SJeff Garzik static void sis_set_fifo(struct ata_port *ap, struct ata_device *adev) 196669a5db4SJeff Garzik { 197669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 198669a5db4SJeff Garzik u8 fifoctrl; 199669a5db4SJeff Garzik u8 mask = 0x11; 200669a5db4SJeff Garzik 201669a5db4SJeff Garzik mask <<= (2 * ap->port_no); 202669a5db4SJeff Garzik mask <<= adev->devno; 203669a5db4SJeff Garzik 204669a5db4SJeff Garzik /* This holds various bits including the FIFO control */ 205669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x4B, &fifoctrl); 206669a5db4SJeff Garzik fifoctrl &= ~mask; 207669a5db4SJeff Garzik 208669a5db4SJeff Garzik /* Enable for ATA (disk) only */ 209669a5db4SJeff Garzik if (adev->class == ATA_DEV_ATA) 210669a5db4SJeff Garzik fifoctrl |= mask; 211669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4B, fifoctrl); 212669a5db4SJeff Garzik } 213669a5db4SJeff Garzik 214669a5db4SJeff Garzik /** 215669a5db4SJeff Garzik * sis_old_set_piomode - Initialize host controller PATA PIO timings 216669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 217669a5db4SJeff Garzik * @adev: Device we are configuring for. 218669a5db4SJeff Garzik * 219669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 220669a5db4SJeff Garzik * function handles PIO set up for all chips that are pre ATA100 and 221669a5db4SJeff Garzik * also early ATA100 devices. 222669a5db4SJeff Garzik * 223669a5db4SJeff Garzik * LOCKING: 224669a5db4SJeff Garzik * None (inherited from caller). 225669a5db4SJeff Garzik */ 226669a5db4SJeff Garzik 227669a5db4SJeff Garzik static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev) 228669a5db4SJeff Garzik { 229669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 230dd668d15SAlan Cox int port = sis_old_port_base(adev); 231669a5db4SJeff Garzik u8 t1, t2; 232669a5db4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 233669a5db4SJeff Garzik 234669a5db4SJeff Garzik const u8 active[] = { 0x00, 0x07, 0x04, 0x03, 0x01 }; 235669a5db4SJeff Garzik const u8 recovery[] = { 0x00, 0x06, 0x04, 0x03, 0x03 }; 236669a5db4SJeff Garzik 237669a5db4SJeff Garzik sis_set_fifo(ap, adev); 238669a5db4SJeff Garzik 239669a5db4SJeff Garzik pci_read_config_byte(pdev, port, &t1); 240669a5db4SJeff Garzik pci_read_config_byte(pdev, port + 1, &t2); 241669a5db4SJeff Garzik 242669a5db4SJeff Garzik t1 &= ~0x0F; /* Clear active/recovery timings */ 243669a5db4SJeff Garzik t2 &= ~0x07; 244669a5db4SJeff Garzik 245669a5db4SJeff Garzik t1 |= active[speed]; 246669a5db4SJeff Garzik t2 |= recovery[speed]; 247669a5db4SJeff Garzik 248669a5db4SJeff Garzik pci_write_config_byte(pdev, port, t1); 249669a5db4SJeff Garzik pci_write_config_byte(pdev, port + 1, t2); 250669a5db4SJeff Garzik } 251669a5db4SJeff Garzik 252669a5db4SJeff Garzik /** 2534761c06cSBartlomiej Zolnierkiewicz * sis_100_set_piomode - Initialize host controller PATA PIO timings 254669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 255669a5db4SJeff Garzik * @adev: Device we are configuring for. 256669a5db4SJeff Garzik * 257669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 258669a5db4SJeff Garzik * function handles PIO set up for ATA100 devices and early ATA133. 259669a5db4SJeff Garzik * 260669a5db4SJeff Garzik * LOCKING: 261669a5db4SJeff Garzik * None (inherited from caller). 262669a5db4SJeff Garzik */ 263669a5db4SJeff Garzik 264669a5db4SJeff Garzik static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev) 265669a5db4SJeff Garzik { 266669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 267dd668d15SAlan Cox int port = sis_old_port_base(adev); 268669a5db4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 269669a5db4SJeff Garzik 270669a5db4SJeff Garzik const u8 actrec[] = { 0x00, 0x67, 0x44, 0x33, 0x31 }; 271669a5db4SJeff Garzik 272669a5db4SJeff Garzik sis_set_fifo(ap, adev); 273669a5db4SJeff Garzik 274669a5db4SJeff Garzik pci_write_config_byte(pdev, port, actrec[speed]); 275669a5db4SJeff Garzik } 276669a5db4SJeff Garzik 277669a5db4SJeff Garzik /** 2781b52f2a4SJeff Garzik * sis_133_set_piomode - Initialize host controller PATA PIO timings 279669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 280669a5db4SJeff Garzik * @adev: Device we are configuring for. 281669a5db4SJeff Garzik * 282669a5db4SJeff Garzik * Set PIO mode for device, in host controller PCI config space. This 2831b52f2a4SJeff Garzik * function handles PIO set up for the later ATA133 devices. 284669a5db4SJeff Garzik * 285669a5db4SJeff Garzik * LOCKING: 286669a5db4SJeff Garzik * None (inherited from caller). 287669a5db4SJeff Garzik */ 288669a5db4SJeff Garzik 2891b52f2a4SJeff Garzik static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev) 290669a5db4SJeff Garzik { 291669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 292023a0175SDan McGee int port; 293669a5db4SJeff Garzik u32 t1; 2941b52f2a4SJeff Garzik int speed = adev->pio_mode - XFER_PIO_0; 295669a5db4SJeff Garzik 296669a5db4SJeff Garzik const u32 timing133[] = { 297669a5db4SJeff Garzik 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */ 298669a5db4SJeff Garzik 0x0C266000, 299669a5db4SJeff Garzik 0x04263000, 300669a5db4SJeff Garzik 0x0C0A3000, 301669a5db4SJeff Garzik 0x05093000 302669a5db4SJeff Garzik }; 303669a5db4SJeff Garzik const u32 timing100[] = { 304669a5db4SJeff Garzik 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */ 305669a5db4SJeff Garzik 0x091C4000, 306669a5db4SJeff Garzik 0x031C2000, 307669a5db4SJeff Garzik 0x09072000, 308669a5db4SJeff Garzik 0x04062000 309669a5db4SJeff Garzik }; 310669a5db4SJeff Garzik 311669a5db4SJeff Garzik sis_set_fifo(ap, adev); 312669a5db4SJeff Garzik 313023a0175SDan McGee port = sis_port_base(adev); 314669a5db4SJeff Garzik pci_read_config_dword(pdev, port, &t1); 315669a5db4SJeff Garzik t1 &= 0xC0C00FFF; /* Mask out timing */ 316669a5db4SJeff Garzik 317669a5db4SJeff Garzik if (t1 & 0x08) /* 100 or 133 ? */ 318669a5db4SJeff Garzik t1 |= timing133[speed]; 319669a5db4SJeff Garzik else 320669a5db4SJeff Garzik t1 |= timing100[speed]; 321669a5db4SJeff Garzik pci_write_config_byte(pdev, port, t1); 322669a5db4SJeff Garzik } 323669a5db4SJeff Garzik 324669a5db4SJeff Garzik /** 325669a5db4SJeff Garzik * sis_old_set_dmamode - Initialize host controller PATA DMA timings 326669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 327669a5db4SJeff Garzik * @adev: Device to program 328669a5db4SJeff Garzik * 329669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 330669a5db4SJeff Garzik * Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike 331669a5db4SJeff Garzik * the old ide/pci driver. 332669a5db4SJeff Garzik * 333669a5db4SJeff Garzik * LOCKING: 334669a5db4SJeff Garzik * None (inherited from caller). 335669a5db4SJeff Garzik */ 336669a5db4SJeff Garzik 337669a5db4SJeff Garzik static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev) 338669a5db4SJeff Garzik { 339669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 340669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 341dd668d15SAlan Cox int drive_pci = sis_old_port_base(adev); 342669a5db4SJeff Garzik u16 timing; 343669a5db4SJeff Garzik 3444761c06cSBartlomiej Zolnierkiewicz const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 }; 345669a5db4SJeff Garzik const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 }; 346669a5db4SJeff Garzik 347669a5db4SJeff Garzik pci_read_config_word(pdev, drive_pci, &timing); 348669a5db4SJeff Garzik 349669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 350669a5db4SJeff Garzik /* bits 3-0 hold recovery timing bits 8-10 active timing and 35125985edcSLucas De Marchi the higher bits are dependent on the device */ 352669a5db4SJeff Garzik timing &= ~0x870F; 353669a5db4SJeff Garzik timing |= mwdma_bits[speed]; 354669a5db4SJeff Garzik } else { 355669a5db4SJeff Garzik /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */ 356669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 357669a5db4SJeff Garzik timing &= ~0x6000; 358669a5db4SJeff Garzik timing |= udma_bits[speed]; 359669a5db4SJeff Garzik } 3604761c06cSBartlomiej Zolnierkiewicz pci_write_config_word(pdev, drive_pci, timing); 361669a5db4SJeff Garzik } 362669a5db4SJeff Garzik 363669a5db4SJeff Garzik /** 364669a5db4SJeff Garzik * sis_66_set_dmamode - Initialize host controller PATA DMA timings 365669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 366669a5db4SJeff Garzik * @adev: Device to program 367669a5db4SJeff Garzik * 368669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 369669a5db4SJeff Garzik * Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike 370669a5db4SJeff Garzik * the old ide/pci driver. 371669a5db4SJeff Garzik * 372669a5db4SJeff Garzik * LOCKING: 373669a5db4SJeff Garzik * None (inherited from caller). 374669a5db4SJeff Garzik */ 375669a5db4SJeff Garzik 376669a5db4SJeff Garzik static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev) 377669a5db4SJeff Garzik { 378669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 379669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 380dd668d15SAlan Cox int drive_pci = sis_old_port_base(adev); 381669a5db4SJeff Garzik u16 timing; 382669a5db4SJeff Garzik 383edeb614cSTejun Heo /* MWDMA 0-2 and UDMA 0-5 */ 3844761c06cSBartlomiej Zolnierkiewicz const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 }; 385edeb614cSTejun Heo const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000, 0x8000 }; 386669a5db4SJeff Garzik 387669a5db4SJeff Garzik pci_read_config_word(pdev, drive_pci, &timing); 388669a5db4SJeff Garzik 389669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 390669a5db4SJeff Garzik /* bits 3-0 hold recovery timing bits 8-10 active timing and 39125985edcSLucas De Marchi the higher bits are dependent on the device, bit 15 udma */ 392669a5db4SJeff Garzik timing &= ~0x870F; 393669a5db4SJeff Garzik timing |= mwdma_bits[speed]; 394669a5db4SJeff Garzik } else { 395669a5db4SJeff Garzik /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ 396669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 397dd668d15SAlan Cox timing &= ~0xF000; 398669a5db4SJeff Garzik timing |= udma_bits[speed]; 399669a5db4SJeff Garzik } 400669a5db4SJeff Garzik pci_write_config_word(pdev, drive_pci, timing); 401669a5db4SJeff Garzik } 402669a5db4SJeff Garzik 403669a5db4SJeff Garzik /** 404669a5db4SJeff Garzik * sis_100_set_dmamode - Initialize host controller PATA DMA timings 405669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 406669a5db4SJeff Garzik * @adev: Device to program 407669a5db4SJeff Garzik * 408669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 4091b52f2a4SJeff Garzik * Handles UDMA66 and early UDMA100 devices. 410669a5db4SJeff Garzik * 411669a5db4SJeff Garzik * LOCKING: 412669a5db4SJeff Garzik * None (inherited from caller). 413669a5db4SJeff Garzik */ 414669a5db4SJeff Garzik 415669a5db4SJeff Garzik static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev) 416669a5db4SJeff Garzik { 417669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 418669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 419dd668d15SAlan Cox int drive_pci = sis_old_port_base(adev); 4201b52f2a4SJeff Garzik u8 timing; 421669a5db4SJeff Garzik 4221b52f2a4SJeff Garzik const u8 udma_bits[] = { 0x8B, 0x87, 0x85, 0x83, 0x82, 0x81}; 423669a5db4SJeff Garzik 4241b52f2a4SJeff Garzik pci_read_config_byte(pdev, drive_pci + 1, &timing); 425669a5db4SJeff Garzik 426669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 4271b52f2a4SJeff Garzik /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */ 428669a5db4SJeff Garzik } else { 429dd668d15SAlan Cox /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */ 430669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 4311b52f2a4SJeff Garzik timing &= ~0x8F; 432669a5db4SJeff Garzik timing |= udma_bits[speed]; 433669a5db4SJeff Garzik } 4341b52f2a4SJeff Garzik pci_write_config_byte(pdev, drive_pci + 1, timing); 435669a5db4SJeff Garzik } 436669a5db4SJeff Garzik 437669a5db4SJeff Garzik /** 438669a5db4SJeff Garzik * sis_133_early_set_dmamode - Initialize host controller PATA DMA timings 439669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 440669a5db4SJeff Garzik * @adev: Device to program 441669a5db4SJeff Garzik * 442669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 4434761c06cSBartlomiej Zolnierkiewicz * Handles early SiS 961 bridges. 444669a5db4SJeff Garzik * 445669a5db4SJeff Garzik * LOCKING: 446669a5db4SJeff Garzik * None (inherited from caller). 447669a5db4SJeff Garzik */ 448669a5db4SJeff Garzik 449669a5db4SJeff Garzik static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *adev) 450669a5db4SJeff Garzik { 451669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 452669a5db4SJeff Garzik int speed = adev->dma_mode - XFER_MW_DMA_0; 453dd668d15SAlan Cox int drive_pci = sis_old_port_base(adev); 4541b52f2a4SJeff Garzik u8 timing; 4551b52f2a4SJeff Garzik /* Low 4 bits are timing */ 4561b52f2a4SJeff Garzik static const u8 udma_bits[] = { 0x8F, 0x8A, 0x87, 0x85, 0x83, 0x82, 0x81}; 457669a5db4SJeff Garzik 4581b52f2a4SJeff Garzik pci_read_config_byte(pdev, drive_pci + 1, &timing); 459669a5db4SJeff Garzik 460669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 4611b52f2a4SJeff Garzik /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */ 462669a5db4SJeff Garzik } else { 463dd668d15SAlan Cox /* Bit 7 is UDMA on/off, bit 0-3 are cycle time */ 464669a5db4SJeff Garzik speed = adev->dma_mode - XFER_UDMA_0; 4651b52f2a4SJeff Garzik timing &= ~0x8F; 466669a5db4SJeff Garzik timing |= udma_bits[speed]; 467669a5db4SJeff Garzik } 4681b52f2a4SJeff Garzik pci_write_config_byte(pdev, drive_pci + 1, timing); 469669a5db4SJeff Garzik } 470669a5db4SJeff Garzik 471669a5db4SJeff Garzik /** 472669a5db4SJeff Garzik * sis_133_set_dmamode - Initialize host controller PATA DMA timings 473669a5db4SJeff Garzik * @ap: Port whose timings we are configuring 474669a5db4SJeff Garzik * @adev: Device to program 475669a5db4SJeff Garzik * 476669a5db4SJeff Garzik * Set UDMA/MWDMA mode for device, in host controller PCI config space. 477669a5db4SJeff Garzik * 478669a5db4SJeff Garzik * LOCKING: 479669a5db4SJeff Garzik * None (inherited from caller). 480669a5db4SJeff Garzik */ 481669a5db4SJeff Garzik 482669a5db4SJeff Garzik static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev) 483669a5db4SJeff Garzik { 484669a5db4SJeff Garzik struct pci_dev *pdev = to_pci_dev(ap->host->dev); 485023a0175SDan McGee int port; 486669a5db4SJeff Garzik u32 t1; 487669a5db4SJeff Garzik 488669a5db4SJeff Garzik /* bits 4- cycle time 8 - cvs time */ 4892e413f51SAlan Cox static const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 }; 4902e413f51SAlan Cox static const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 }; 491669a5db4SJeff Garzik 492023a0175SDan McGee port = sis_port_base(adev); 493669a5db4SJeff Garzik pci_read_config_dword(pdev, port, &t1); 494669a5db4SJeff Garzik 495669a5db4SJeff Garzik if (adev->dma_mode < XFER_UDMA_0) { 4961b52f2a4SJeff Garzik t1 &= ~0x00000004; 4971b52f2a4SJeff Garzik /* FIXME: need data sheet to add MWDMA here. Also lacking on 4981b52f2a4SJeff Garzik ide/pci driver */ 499669a5db4SJeff Garzik } else { 500023a0175SDan McGee int speed = adev->dma_mode - XFER_UDMA_0; 501669a5db4SJeff Garzik /* if & 8 no UDMA133 - need info for ... */ 502669a5db4SJeff Garzik t1 &= ~0x00000FF0; 503669a5db4SJeff Garzik t1 |= 0x00000004; 504669a5db4SJeff Garzik if (t1 & 0x08) 505669a5db4SJeff Garzik t1 |= timing_u133[speed]; 506669a5db4SJeff Garzik else 507669a5db4SJeff Garzik t1 |= timing_u100[speed]; 508669a5db4SJeff Garzik } 509669a5db4SJeff Garzik pci_write_config_dword(pdev, port, t1); 510669a5db4SJeff Garzik } 511669a5db4SJeff Garzik 512669a5db4SJeff Garzik static struct scsi_host_template sis_sht = { 51368d1d07bSTejun Heo ATA_BMDMA_SHT(DRV_NAME), 514669a5db4SJeff Garzik }; 515669a5db4SJeff Garzik 516029cfd6bSTejun Heo static struct ata_port_operations sis_133_for_sata_ops = { 517029cfd6bSTejun Heo .inherits = &ata_bmdma_port_ops, 518669a5db4SJeff Garzik .set_piomode = sis_133_set_piomode, 519669a5db4SJeff Garzik .set_dmamode = sis_133_set_dmamode, 520029cfd6bSTejun Heo .cable_detect = sis_133_cable_detect, 521029cfd6bSTejun Heo }; 522669a5db4SJeff Garzik 523029cfd6bSTejun Heo static struct ata_port_operations sis_base_ops = { 524029cfd6bSTejun Heo .inherits = &ata_bmdma_port_ops, 525a1efdabaSTejun Heo .prereset = sis_pre_reset, 526669a5db4SJeff Garzik }; 527669a5db4SJeff Garzik 528029cfd6bSTejun Heo static struct ata_port_operations sis_133_ops = { 529029cfd6bSTejun Heo .inherits = &sis_base_ops, 530a3cabb27SUwe Koziolek .set_piomode = sis_133_set_piomode, 531a3cabb27SUwe Koziolek .set_dmamode = sis_133_set_dmamode, 532a3cabb27SUwe Koziolek .cable_detect = sis_133_cable_detect, 533a3cabb27SUwe Koziolek }; 534a3cabb27SUwe Koziolek 535029cfd6bSTejun Heo static struct ata_port_operations sis_133_early_ops = { 536029cfd6bSTejun Heo .inherits = &sis_base_ops, 537669a5db4SJeff Garzik .set_piomode = sis_100_set_piomode, 538669a5db4SJeff Garzik .set_dmamode = sis_133_early_set_dmamode, 5392e413f51SAlan Cox .cable_detect = sis_66_cable_detect, 540669a5db4SJeff Garzik }; 541669a5db4SJeff Garzik 542029cfd6bSTejun Heo static struct ata_port_operations sis_100_ops = { 543029cfd6bSTejun Heo .inherits = &sis_base_ops, 544669a5db4SJeff Garzik .set_piomode = sis_100_set_piomode, 545669a5db4SJeff Garzik .set_dmamode = sis_100_set_dmamode, 5462e413f51SAlan Cox .cable_detect = sis_66_cable_detect, 547669a5db4SJeff Garzik }; 548669a5db4SJeff Garzik 549029cfd6bSTejun Heo static struct ata_port_operations sis_66_ops = { 550029cfd6bSTejun Heo .inherits = &sis_base_ops, 551669a5db4SJeff Garzik .set_piomode = sis_old_set_piomode, 552669a5db4SJeff Garzik .set_dmamode = sis_66_set_dmamode, 5532e413f51SAlan Cox .cable_detect = sis_66_cable_detect, 554669a5db4SJeff Garzik }; 555669a5db4SJeff Garzik 556029cfd6bSTejun Heo static struct ata_port_operations sis_old_ops = { 557029cfd6bSTejun Heo .inherits = &sis_base_ops, 558669a5db4SJeff Garzik .set_piomode = sis_old_set_piomode, 559669a5db4SJeff Garzik .set_dmamode = sis_old_set_dmamode, 5602e413f51SAlan Cox .cable_detect = ata_cable_40wire, 561669a5db4SJeff Garzik }; 562669a5db4SJeff Garzik 5631626aeb8STejun Heo static const struct ata_port_info sis_info = { 5641d2808fdSJeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 56514bdef98SErik Inge Bolsø .pio_mask = ATA_PIO4, 56614bdef98SErik Inge Bolsø .mwdma_mask = ATA_MWDMA2, 56714bdef98SErik Inge Bolsø /* No UDMA */ 568669a5db4SJeff Garzik .port_ops = &sis_old_ops, 569669a5db4SJeff Garzik }; 5701626aeb8STejun Heo static const struct ata_port_info sis_info33 = { 5711d2808fdSJeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 57214bdef98SErik Inge Bolsø .pio_mask = ATA_PIO4, 57314bdef98SErik Inge Bolsø .mwdma_mask = ATA_MWDMA2, 57414bdef98SErik Inge Bolsø .udma_mask = ATA_UDMA2, 575669a5db4SJeff Garzik .port_ops = &sis_old_ops, 576669a5db4SJeff Garzik }; 5771626aeb8STejun Heo static const struct ata_port_info sis_info66 = { 5781d2808fdSJeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 57914bdef98SErik Inge Bolsø .pio_mask = ATA_PIO4, 58014bdef98SErik Inge Bolsø /* No MWDMA */ 58114bdef98SErik Inge Bolsø .udma_mask = ATA_UDMA4, 582669a5db4SJeff Garzik .port_ops = &sis_66_ops, 583669a5db4SJeff Garzik }; 5841626aeb8STejun Heo static const struct ata_port_info sis_info100 = { 5851d2808fdSJeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 58614bdef98SErik Inge Bolsø .pio_mask = ATA_PIO4, 58714bdef98SErik Inge Bolsø /* No MWDMA */ 588669a5db4SJeff Garzik .udma_mask = ATA_UDMA5, 589669a5db4SJeff Garzik .port_ops = &sis_100_ops, 590669a5db4SJeff Garzik }; 5911626aeb8STejun Heo static const struct ata_port_info sis_info100_early = { 5921d2808fdSJeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 59314bdef98SErik Inge Bolsø .pio_mask = ATA_PIO4, 59414bdef98SErik Inge Bolsø /* No MWDMA */ 595669a5db4SJeff Garzik .udma_mask = ATA_UDMA5, 596669a5db4SJeff Garzik .port_ops = &sis_66_ops, 597669a5db4SJeff Garzik }; 598a3cabb27SUwe Koziolek static const struct ata_port_info sis_info133 = { 5991d2808fdSJeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 60014bdef98SErik Inge Bolsø .pio_mask = ATA_PIO4, 60114bdef98SErik Inge Bolsø /* No MWDMA */ 602669a5db4SJeff Garzik .udma_mask = ATA_UDMA6, 603669a5db4SJeff Garzik .port_ops = &sis_133_ops, 604669a5db4SJeff Garzik }; 605a3cabb27SUwe Koziolek const struct ata_port_info sis_info133_for_sata = { 606c10f97b9SSergei Shtylyov .flags = ATA_FLAG_SLAVE_POSS, 60714bdef98SErik Inge Bolsø .pio_mask = ATA_PIO4, 60814bdef98SErik Inge Bolsø /* No MWDMA */ 609a3cabb27SUwe Koziolek .udma_mask = ATA_UDMA6, 610a3cabb27SUwe Koziolek .port_ops = &sis_133_for_sata_ops, 611a3cabb27SUwe Koziolek }; 6121626aeb8STejun Heo static const struct ata_port_info sis_info133_early = { 6131d2808fdSJeff Garzik .flags = ATA_FLAG_SLAVE_POSS, 61414bdef98SErik Inge Bolsø .pio_mask = ATA_PIO4, 61514bdef98SErik Inge Bolsø /* No MWDMA */ 616669a5db4SJeff Garzik .udma_mask = ATA_UDMA6, 617669a5db4SJeff Garzik .port_ops = &sis_133_early_ops, 618669a5db4SJeff Garzik }; 619669a5db4SJeff Garzik 6209b14dec5SAlan /* Privately shared with the SiS180 SATA driver, not for use elsewhere */ 621a3cabb27SUwe Koziolek EXPORT_SYMBOL_GPL(sis_info133_for_sata); 622669a5db4SJeff Garzik 623669a5db4SJeff Garzik static void sis_fixup(struct pci_dev *pdev, struct sis_chipset *sis) 624669a5db4SJeff Garzik { 625669a5db4SJeff Garzik u16 regw; 626669a5db4SJeff Garzik u8 reg; 627669a5db4SJeff Garzik 628669a5db4SJeff Garzik if (sis->info == &sis_info133) { 629669a5db4SJeff Garzik pci_read_config_word(pdev, 0x50, ®w); 630669a5db4SJeff Garzik if (regw & 0x08) 631669a5db4SJeff Garzik pci_write_config_word(pdev, 0x50, regw & ~0x08); 632669a5db4SJeff Garzik pci_read_config_word(pdev, 0x52, ®w); 633669a5db4SJeff Garzik if (regw & 0x08) 634669a5db4SJeff Garzik pci_write_config_word(pdev, 0x52, regw & ~0x08); 635669a5db4SJeff Garzik return; 636669a5db4SJeff Garzik } 637669a5db4SJeff Garzik 638669a5db4SJeff Garzik if (sis->info == &sis_info133_early || sis->info == &sis_info100) { 639669a5db4SJeff Garzik /* Fix up latency */ 640669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80); 641669a5db4SJeff Garzik /* Set compatibility bit */ 642669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x49, ®); 643669a5db4SJeff Garzik if (!(reg & 0x01)) 644669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x49, reg | 0x01); 645669a5db4SJeff Garzik return; 646669a5db4SJeff Garzik } 647669a5db4SJeff Garzik 648669a5db4SJeff Garzik if (sis->info == &sis_info66 || sis->info == &sis_info100_early) { 649669a5db4SJeff Garzik /* Fix up latency */ 650669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80); 651669a5db4SJeff Garzik /* Set compatibility bit */ 652669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x52, ®); 653669a5db4SJeff Garzik if (!(reg & 0x04)) 654669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x52, reg | 0x04); 655669a5db4SJeff Garzik return; 656669a5db4SJeff Garzik } 657669a5db4SJeff Garzik 658669a5db4SJeff Garzik if (sis->info == &sis_info33) { 659669a5db4SJeff Garzik pci_read_config_byte(pdev, PCI_CLASS_PROG, ®); 660669a5db4SJeff Garzik if (( reg & 0x0F ) != 0x00) 661669a5db4SJeff Garzik pci_write_config_byte(pdev, PCI_CLASS_PROG, reg & 0xF0); 662669a5db4SJeff Garzik /* Fall through to ATA16 fixup below */ 663669a5db4SJeff Garzik } 664669a5db4SJeff Garzik 665669a5db4SJeff Garzik if (sis->info == &sis_info || sis->info == &sis_info33) { 666669a5db4SJeff Garzik /* force per drive recovery and active timings 667669a5db4SJeff Garzik needed on ATA_33 and below chips */ 668669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x52, ®); 669669a5db4SJeff Garzik if (!(reg & 0x08)) 670669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x52, reg|0x08); 671669a5db4SJeff Garzik return; 672669a5db4SJeff Garzik } 673669a5db4SJeff Garzik 674669a5db4SJeff Garzik BUG(); 675669a5db4SJeff Garzik } 676669a5db4SJeff Garzik 677669a5db4SJeff Garzik /** 678669a5db4SJeff Garzik * sis_init_one - Register SiS ATA PCI device with kernel services 679669a5db4SJeff Garzik * @pdev: PCI device to register 680669a5db4SJeff Garzik * @ent: Entry in sis_pci_tbl matching with @pdev 681669a5db4SJeff Garzik * 682669a5db4SJeff Garzik * Called from kernel PCI layer. We probe for combined mode (sigh), 683669a5db4SJeff Garzik * and then hand over control to libata, for it to do the rest. 684669a5db4SJeff Garzik * 685669a5db4SJeff Garzik * LOCKING: 686669a5db4SJeff Garzik * Inherited from PCI layer (may sleep). 687669a5db4SJeff Garzik * 688669a5db4SJeff Garzik * RETURNS: 689669a5db4SJeff Garzik * Zero on success, or -ERRNO value. 690669a5db4SJeff Garzik */ 691669a5db4SJeff Garzik 692669a5db4SJeff Garzik static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 693669a5db4SJeff Garzik { 694887125e3STejun Heo const struct ata_port_info *ppi[] = { NULL, NULL }; 695669a5db4SJeff Garzik struct pci_dev *host = NULL; 696669a5db4SJeff Garzik struct sis_chipset *chipset = NULL; 697f3769e9dSAlan Cox struct sis_chipset *sets; 698f08048e9STejun Heo int rc; 699669a5db4SJeff Garzik 700669a5db4SJeff Garzik static struct sis_chipset sis_chipsets[] = { 701af323a2fSAlan Cox 702af323a2fSAlan Cox { 0x0968, &sis_info133 }, 703af323a2fSAlan Cox { 0x0966, &sis_info133 }, 704af323a2fSAlan Cox { 0x0965, &sis_info133 }, 705669a5db4SJeff Garzik { 0x0745, &sis_info100 }, 706669a5db4SJeff Garzik { 0x0735, &sis_info100 }, 707669a5db4SJeff Garzik { 0x0733, &sis_info100 }, 708669a5db4SJeff Garzik { 0x0635, &sis_info100 }, 709669a5db4SJeff Garzik { 0x0633, &sis_info100 }, 710669a5db4SJeff Garzik 711669a5db4SJeff Garzik { 0x0730, &sis_info100_early }, /* 100 with ATA 66 layout */ 712669a5db4SJeff Garzik { 0x0550, &sis_info100_early }, /* 100 with ATA 66 layout */ 713669a5db4SJeff Garzik 714669a5db4SJeff Garzik { 0x0640, &sis_info66 }, 715669a5db4SJeff Garzik { 0x0630, &sis_info66 }, 716669a5db4SJeff Garzik { 0x0620, &sis_info66 }, 717669a5db4SJeff Garzik { 0x0540, &sis_info66 }, 718669a5db4SJeff Garzik { 0x0530, &sis_info66 }, 719669a5db4SJeff Garzik 720669a5db4SJeff Garzik { 0x5600, &sis_info33 }, 721669a5db4SJeff Garzik { 0x5598, &sis_info33 }, 722669a5db4SJeff Garzik { 0x5597, &sis_info33 }, 723669a5db4SJeff Garzik { 0x5591, &sis_info33 }, 724669a5db4SJeff Garzik { 0x5582, &sis_info33 }, 725669a5db4SJeff Garzik { 0x5581, &sis_info33 }, 726669a5db4SJeff Garzik 727669a5db4SJeff Garzik { 0x5596, &sis_info }, 728669a5db4SJeff Garzik { 0x5571, &sis_info }, 729669a5db4SJeff Garzik { 0x5517, &sis_info }, 730669a5db4SJeff Garzik { 0x5511, &sis_info }, 731669a5db4SJeff Garzik 732669a5db4SJeff Garzik {0} 733669a5db4SJeff Garzik }; 734669a5db4SJeff Garzik static struct sis_chipset sis133_early = { 735669a5db4SJeff Garzik 0x0, &sis_info133_early 736669a5db4SJeff Garzik }; 737669a5db4SJeff Garzik static struct sis_chipset sis133 = { 738669a5db4SJeff Garzik 0x0, &sis_info133 739669a5db4SJeff Garzik }; 740669a5db4SJeff Garzik static struct sis_chipset sis100_early = { 741669a5db4SJeff Garzik 0x0, &sis_info100_early 742669a5db4SJeff Garzik }; 743669a5db4SJeff Garzik static struct sis_chipset sis100 = { 744669a5db4SJeff Garzik 0x0, &sis_info100 745669a5db4SJeff Garzik }; 746669a5db4SJeff Garzik 74706296a1eSJoe Perches ata_print_version_once(&pdev->dev, DRV_VERSION); 748669a5db4SJeff Garzik 749f08048e9STejun Heo rc = pcim_enable_device(pdev); 750f08048e9STejun Heo if (rc) 751f08048e9STejun Heo return rc; 752669a5db4SJeff Garzik 753f08048e9STejun Heo /* We have to find the bridge first */ 754f3769e9dSAlan Cox for (sets = &sis_chipsets[0]; sets->device; sets++) { 755f3769e9dSAlan Cox host = pci_get_device(PCI_VENDOR_ID_SI, sets->device, NULL); 756669a5db4SJeff Garzik if (host != NULL) { 757f3769e9dSAlan Cox chipset = sets; /* Match found */ 758f3769e9dSAlan Cox if (sets->device == 0x630) { /* SIS630 */ 75944c10138SAuke Kok if (host->revision >= 0x30) /* 630 ET */ 760669a5db4SJeff Garzik chipset = &sis100_early; 761669a5db4SJeff Garzik } 762669a5db4SJeff Garzik break; 763669a5db4SJeff Garzik } 764669a5db4SJeff Garzik } 765669a5db4SJeff Garzik 766669a5db4SJeff Garzik /* Look for concealed bridges */ 767f3769e9dSAlan Cox if (chipset == NULL) { 768669a5db4SJeff Garzik /* Second check */ 769669a5db4SJeff Garzik u32 idemisc; 770669a5db4SJeff Garzik u16 trueid; 771669a5db4SJeff Garzik 772669a5db4SJeff Garzik /* Disable ID masking and register remapping then 773669a5db4SJeff Garzik see what the real ID is */ 774669a5db4SJeff Garzik 775669a5db4SJeff Garzik pci_read_config_dword(pdev, 0x54, &idemisc); 776669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc & 0x7fffffff); 777669a5db4SJeff Garzik pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid); 778669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc); 779669a5db4SJeff Garzik 780669a5db4SJeff Garzik switch(trueid) { 781669a5db4SJeff Garzik case 0x5518: /* SIS 962/963 */ 782669a5db4SJeff Garzik chipset = &sis133; 783669a5db4SJeff Garzik if ((idemisc & 0x40000000) == 0) { 784669a5db4SJeff Garzik pci_write_config_dword(pdev, 0x54, idemisc | 0x40000000); 785669a5db4SJeff Garzik printk(KERN_INFO "SIS5513: Switching to 5513 register mapping\n"); 786669a5db4SJeff Garzik } 787669a5db4SJeff Garzik break; 788669a5db4SJeff Garzik case 0x0180: /* SIS 965/965L */ 789669a5db4SJeff Garzik chipset = &sis133; 790669a5db4SJeff Garzik break; 791669a5db4SJeff Garzik case 0x1180: /* SIS 966/966L */ 792669a5db4SJeff Garzik chipset = &sis133; 793669a5db4SJeff Garzik break; 794669a5db4SJeff Garzik } 795669a5db4SJeff Garzik } 796669a5db4SJeff Garzik 797669a5db4SJeff Garzik /* Further check */ 798669a5db4SJeff Garzik if (chipset == NULL) { 799669a5db4SJeff Garzik struct pci_dev *lpc_bridge; 800669a5db4SJeff Garzik u16 trueid; 801669a5db4SJeff Garzik u8 prefctl; 802669a5db4SJeff Garzik u8 idecfg; 803669a5db4SJeff Garzik 804669a5db4SJeff Garzik /* Try the second unmasking technique */ 805669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x4a, &idecfg); 806669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4a, idecfg | 0x10); 807669a5db4SJeff Garzik pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid); 808669a5db4SJeff Garzik pci_write_config_byte(pdev, 0x4a, idecfg); 809669a5db4SJeff Garzik 810669a5db4SJeff Garzik switch(trueid) { 811669a5db4SJeff Garzik case 0x5517: 812669a5db4SJeff Garzik lpc_bridge = pci_get_slot(pdev->bus, 0x10); /* Bus 0 Dev 2 Fn 0 */ 813669a5db4SJeff Garzik if (lpc_bridge == NULL) 814669a5db4SJeff Garzik break; 815669a5db4SJeff Garzik pci_read_config_byte(pdev, 0x49, &prefctl); 816669a5db4SJeff Garzik pci_dev_put(lpc_bridge); 817669a5db4SJeff Garzik 81844c10138SAuke Kok if (lpc_bridge->revision == 0x10 && (prefctl & 0x80)) { 819669a5db4SJeff Garzik chipset = &sis133_early; 820669a5db4SJeff Garzik break; 821669a5db4SJeff Garzik } 822669a5db4SJeff Garzik chipset = &sis100; 823669a5db4SJeff Garzik break; 824669a5db4SJeff Garzik } 825669a5db4SJeff Garzik } 826669a5db4SJeff Garzik pci_dev_put(host); 827669a5db4SJeff Garzik 828669a5db4SJeff Garzik /* No chipset info, no support */ 829669a5db4SJeff Garzik if (chipset == NULL) 830669a5db4SJeff Garzik return -ENODEV; 831669a5db4SJeff Garzik 832887125e3STejun Heo ppi[0] = chipset->info; 833669a5db4SJeff Garzik 834669a5db4SJeff Garzik sis_fixup(pdev, chipset); 835669a5db4SJeff Garzik 8361c5afdf7STejun Heo return ata_pci_bmdma_init_one(pdev, ppi, &sis_sht, chipset, 0); 837669a5db4SJeff Garzik } 838669a5db4SJeff Garzik 839750c7136SBartlomiej Zolnierkiewicz #ifdef CONFIG_PM 840750c7136SBartlomiej Zolnierkiewicz static int sis_reinit_one(struct pci_dev *pdev) 841750c7136SBartlomiej Zolnierkiewicz { 842750c7136SBartlomiej Zolnierkiewicz struct ata_host *host = dev_get_drvdata(&pdev->dev); 843750c7136SBartlomiej Zolnierkiewicz int rc; 844750c7136SBartlomiej Zolnierkiewicz 845750c7136SBartlomiej Zolnierkiewicz rc = ata_pci_device_do_resume(pdev); 846750c7136SBartlomiej Zolnierkiewicz if (rc) 847750c7136SBartlomiej Zolnierkiewicz return rc; 848750c7136SBartlomiej Zolnierkiewicz 849750c7136SBartlomiej Zolnierkiewicz sis_fixup(pdev, host->private_data); 850750c7136SBartlomiej Zolnierkiewicz 851750c7136SBartlomiej Zolnierkiewicz ata_host_resume(host); 852750c7136SBartlomiej Zolnierkiewicz return 0; 853750c7136SBartlomiej Zolnierkiewicz } 854750c7136SBartlomiej Zolnierkiewicz #endif 855750c7136SBartlomiej Zolnierkiewicz 856669a5db4SJeff Garzik static const struct pci_device_id sis_pci_tbl[] = { 8572d2744fcSJeff Garzik { PCI_VDEVICE(SI, 0x5513), }, /* SiS 5513 */ 8582d2744fcSJeff Garzik { PCI_VDEVICE(SI, 0x5518), }, /* SiS 5518 */ 859a3cabb27SUwe Koziolek { PCI_VDEVICE(SI, 0x1180), }, /* SiS 1180 */ 8602d2744fcSJeff Garzik 861669a5db4SJeff Garzik { } 862669a5db4SJeff Garzik }; 863669a5db4SJeff Garzik 864669a5db4SJeff Garzik static struct pci_driver sis_pci_driver = { 865669a5db4SJeff Garzik .name = DRV_NAME, 866669a5db4SJeff Garzik .id_table = sis_pci_tbl, 867669a5db4SJeff Garzik .probe = sis_init_one, 868669a5db4SJeff Garzik .remove = ata_pci_remove_one, 869438ac6d5STejun Heo #ifdef CONFIG_PM 87062d64ae0SAlan .suspend = ata_pci_device_suspend, 871750c7136SBartlomiej Zolnierkiewicz .resume = sis_reinit_one, 872438ac6d5STejun Heo #endif 873669a5db4SJeff Garzik }; 874669a5db4SJeff Garzik 875669a5db4SJeff Garzik static int __init sis_init(void) 876669a5db4SJeff Garzik { 877669a5db4SJeff Garzik return pci_register_driver(&sis_pci_driver); 878669a5db4SJeff Garzik } 879669a5db4SJeff Garzik 880669a5db4SJeff Garzik static void __exit sis_exit(void) 881669a5db4SJeff Garzik { 882669a5db4SJeff Garzik pci_unregister_driver(&sis_pci_driver); 883669a5db4SJeff Garzik } 884669a5db4SJeff Garzik 885669a5db4SJeff Garzik module_init(sis_init); 886669a5db4SJeff Garzik module_exit(sis_exit); 887669a5db4SJeff Garzik 888669a5db4SJeff Garzik MODULE_AUTHOR("Alan Cox"); 889669a5db4SJeff Garzik MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA"); 890669a5db4SJeff Garzik MODULE_LICENSE("GPL"); 891669a5db4SJeff Garzik MODULE_DEVICE_TABLE(pci, sis_pci_tbl); 892669a5db4SJeff Garzik MODULE_VERSION(DRV_VERSION); 893669a5db4SJeff Garzik 894