1 /* 2 * New ATA layer SC1200 driver Alan Cox <alan@lxorguk.ukuu.org.uk> 3 * 4 * TODO: Mode selection filtering 5 * TODO: Needs custom DMA cleanup code 6 * 7 * Based very heavily on 8 * 9 * linux/drivers/ide/pci/sc1200.c Version 0.91 28-Jan-2003 10 * 11 * Copyright (C) 2000-2002 Mark Lord <mlord@pobox.com> 12 * May be copied or modified under the terms of the GNU General Public License 13 * 14 * Development of this chipset driver was funded 15 * by the nice folks at National Semiconductor. 16 * 17 * This program is free software; you can redistribute it and/or modify 18 * it under the terms of the GNU General Public License version 2 as 19 * published by the Free Software Foundation. 20 * 21 * This program is distributed in the hope that it will be useful, 22 * but WITHOUT ANY WARRANTY; without even the implied warranty of 23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 24 * GNU General Public License for more details. 25 * 26 * You should have received a copy of the GNU General Public License 27 * along with this program; if not, write to the Free Software 28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 29 * 30 */ 31 32 #include <linux/kernel.h> 33 #include <linux/module.h> 34 #include <linux/pci.h> 35 #include <linux/init.h> 36 #include <linux/blkdev.h> 37 #include <linux/delay.h> 38 #include <scsi/scsi_host.h> 39 #include <linux/libata.h> 40 41 #define DRV_NAME "sc1200" 42 #define DRV_VERSION "0.2.6" 43 44 #define SC1200_REV_A 0x00 45 #define SC1200_REV_B1 0x01 46 #define SC1200_REV_B3 0x02 47 #define SC1200_REV_C1 0x03 48 #define SC1200_REV_D1 0x04 49 50 /** 51 * sc1200_clock - PCI clock 52 * 53 * Return the PCI bus clocking for the SC1200 chipset configuration 54 * in use. We return 0 for 33MHz 1 for 48MHz and 2 for 66Mhz 55 */ 56 57 static int sc1200_clock(void) 58 { 59 /* Magic registers that give us the chipset data */ 60 u8 chip_id = inb(0x903C); 61 u8 silicon_rev = inb(0x903D); 62 u16 pci_clock; 63 64 if (chip_id == 0x04 && silicon_rev < SC1200_REV_B1) 65 return 0; /* 33 MHz mode */ 66 67 /* Clock generator configuration 0x901E its 8/9 are the PCI clocking 68 0/3 is 33Mhz 1 is 48 2 is 66 */ 69 70 pci_clock = inw(0x901E); 71 pci_clock >>= 8; 72 pci_clock &= 0x03; 73 if (pci_clock == 3) 74 pci_clock = 0; 75 return pci_clock; 76 } 77 78 /** 79 * sc1200_set_piomode - PIO setup 80 * @ap: ATA interface 81 * @adev: device on the interface 82 * 83 * Set our PIO requirements. This is fairly simple on the SC1200 84 */ 85 86 static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev) 87 { 88 static const u32 pio_timings[4][5] = { 89 {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010}, // format0 33Mhz 90 {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}, // format1, 33Mhz 91 {0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021}, // format1, 48Mhz 92 {0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131} // format1, 66Mhz 93 }; 94 95 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 96 u32 format; 97 unsigned int reg = 0x40 + 0x10 * ap->port_no; 98 int mode = adev->pio_mode - XFER_PIO_0; 99 100 pci_read_config_dword(pdev, reg + 4, &format); 101 format >>= 31; 102 format += sc1200_clock(); 103 pci_write_config_dword(pdev, reg + 8 * adev->devno, 104 pio_timings[format][mode]); 105 } 106 107 /** 108 * sc1200_set_dmamode - DMA timing setup 109 * @ap: ATA interface 110 * @adev: Device being configured 111 * 112 * We cannot mix MWDMA and UDMA without reloading timings each switch 113 * master to slave. 114 */ 115 116 static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev) 117 { 118 static const u32 udma_timing[3][3] = { 119 { 0x00921250, 0x00911140, 0x00911030 }, 120 { 0x00932470, 0x00922260, 0x00922140 }, 121 { 0x009436A1, 0x00933481, 0x00923261 } 122 }; 123 124 static const u32 mwdma_timing[3][3] = { 125 { 0x00077771, 0x00012121, 0x00002020 }, 126 { 0x000BBBB2, 0x00024241, 0x00013131 }, 127 { 0x000FFFF3, 0x00035352, 0x00015151 } 128 }; 129 130 int clock = sc1200_clock(); 131 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 132 unsigned int reg = 0x40 + 0x10 * ap->port_no; 133 int mode = adev->dma_mode; 134 u32 format; 135 136 if (mode >= XFER_UDMA_0) 137 format = udma_timing[clock][mode - XFER_UDMA_0]; 138 else 139 format = mwdma_timing[clock][mode - XFER_MW_DMA_0]; 140 141 if (adev->devno == 0) { 142 u32 timings; 143 144 pci_read_config_dword(pdev, reg + 4, &timings); 145 timings &= 0x80000000UL; 146 timings |= format; 147 pci_write_config_dword(pdev, reg + 4, timings); 148 } else 149 pci_write_config_dword(pdev, reg + 12, format); 150 } 151 152 /** 153 * sc1200_qc_issue - command issue 154 * @qc: command pending 155 * 156 * Called when the libata layer is about to issue a command. We wrap 157 * this interface so that we can load the correct ATA timings if 158 * necessary. Specifically we have a problem that there is only 159 * one MWDMA/UDMA bit. 160 */ 161 162 static unsigned int sc1200_qc_issue(struct ata_queued_cmd *qc) 163 { 164 struct ata_port *ap = qc->ap; 165 struct ata_device *adev = qc->dev; 166 struct ata_device *prev = ap->private_data; 167 168 /* See if the DMA settings could be wrong */ 169 if (ata_dma_enabled(adev) && adev != prev && prev != NULL) { 170 /* Maybe, but do the channels match MWDMA/UDMA ? */ 171 if ((ata_using_udma(adev) && !ata_using_udma(prev)) || 172 (ata_using_udma(prev) && !ata_using_udma(adev))) 173 /* Switch the mode bits */ 174 sc1200_set_dmamode(ap, adev); 175 } 176 177 return ata_bmdma_qc_issue(qc); 178 } 179 180 /** 181 * sc1200_qc_defer - implement serialization 182 * @qc: command 183 * 184 * Serialize command issue on this controller. 185 */ 186 187 static int sc1200_qc_defer(struct ata_queued_cmd *qc) 188 { 189 struct ata_host *host = qc->ap->host; 190 struct ata_port *alt = host->ports[1 ^ qc->ap->port_no]; 191 int rc; 192 193 /* First apply the usual rules */ 194 rc = ata_std_qc_defer(qc); 195 if (rc != 0) 196 return rc; 197 198 /* Now apply serialization rules. Only allow a command if the 199 other channel state machine is idle */ 200 if (alt && alt->qc_active) 201 return ATA_DEFER_PORT; 202 return 0; 203 } 204 205 static struct scsi_host_template sc1200_sht = { 206 ATA_BMDMA_SHT(DRV_NAME), 207 .sg_tablesize = LIBATA_DUMB_MAX_PRD, 208 }; 209 210 static struct ata_port_operations sc1200_port_ops = { 211 .inherits = &ata_bmdma_port_ops, 212 .qc_prep = ata_bmdma_dumb_qc_prep, 213 .qc_issue = sc1200_qc_issue, 214 .qc_defer = sc1200_qc_defer, 215 .cable_detect = ata_cable_40wire, 216 .set_piomode = sc1200_set_piomode, 217 .set_dmamode = sc1200_set_dmamode, 218 }; 219 220 /** 221 * sc1200_init_one - Initialise an SC1200 222 * @dev: PCI device 223 * @id: Entry in match table 224 * 225 * Just throw the needed data at the libata helper and it does all 226 * our work. 227 */ 228 229 static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id) 230 { 231 static const struct ata_port_info info = { 232 .flags = ATA_FLAG_SLAVE_POSS, 233 .pio_mask = ATA_PIO4, 234 .mwdma_mask = ATA_MWDMA2, 235 .udma_mask = ATA_UDMA2, 236 .port_ops = &sc1200_port_ops 237 }; 238 const struct ata_port_info *ppi[] = { &info, NULL }; 239 240 return ata_pci_bmdma_init_one(dev, ppi, &sc1200_sht, NULL, 0); 241 } 242 243 static const struct pci_device_id sc1200[] = { 244 { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SCx200_IDE), }, 245 246 { }, 247 }; 248 249 static struct pci_driver sc1200_pci_driver = { 250 .name = DRV_NAME, 251 .id_table = sc1200, 252 .probe = sc1200_init_one, 253 .remove = ata_pci_remove_one, 254 #ifdef CONFIG_PM 255 .suspend = ata_pci_device_suspend, 256 .resume = ata_pci_device_resume, 257 #endif 258 }; 259 260 static int __init sc1200_init(void) 261 { 262 return pci_register_driver(&sc1200_pci_driver); 263 } 264 265 static void __exit sc1200_exit(void) 266 { 267 pci_unregister_driver(&sc1200_pci_driver); 268 } 269 270 MODULE_AUTHOR("Alan Cox, Mark Lord"); 271 MODULE_DESCRIPTION("low-level driver for the NS/AMD SC1200"); 272 MODULE_LICENSE("GPL"); 273 MODULE_DEVICE_TABLE(pci, sc1200); 274 MODULE_VERSION(DRV_VERSION); 275 276 module_init(sc1200_init); 277 module_exit(sc1200_exit); 278