1 /* 2 * Generic PXA PATA driver 3 * 4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2, or (at your option) 9 * any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; see the file COPYING. If not, write to 18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 19 */ 20 21 #include <linux/kernel.h> 22 #include <linux/module.h> 23 #include <linux/blkdev.h> 24 #include <linux/ata.h> 25 #include <linux/libata.h> 26 #include <linux/platform_device.h> 27 #include <linux/dmaengine.h> 28 #include <linux/gpio.h> 29 #include <linux/slab.h> 30 #include <linux/completion.h> 31 32 #include <scsi/scsi_host.h> 33 34 #include <linux/platform_data/ata-pxa.h> 35 36 #define DRV_NAME "pata_pxa" 37 #define DRV_VERSION "0.1" 38 39 struct pata_pxa_data { 40 struct dma_chan *dma_chan; 41 dma_cookie_t dma_cookie; 42 struct completion dma_done; 43 }; 44 45 /* 46 * DMA interrupt handler. 47 */ 48 static void pxa_ata_dma_irq(void *d) 49 { 50 struct pata_pxa_data *pd = d; 51 enum dma_status status; 52 53 status = dmaengine_tx_status(pd->dma_chan, pd->dma_cookie, NULL); 54 if (status == DMA_ERROR || status == DMA_COMPLETE) 55 complete(&pd->dma_done); 56 } 57 58 /* 59 * Prepare taskfile for submission. 60 */ 61 static void pxa_qc_prep(struct ata_queued_cmd *qc) 62 { 63 struct pata_pxa_data *pd = qc->ap->private_data; 64 struct dma_async_tx_descriptor *tx; 65 enum dma_transfer_direction dir; 66 67 if (!(qc->flags & ATA_QCFLAG_DMAMAP)) 68 return; 69 70 dir = (qc->dma_dir == DMA_TO_DEVICE ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM); 71 tx = dmaengine_prep_slave_sg(pd->dma_chan, qc->sg, qc->n_elem, dir, 72 DMA_PREP_INTERRUPT); 73 if (!tx) { 74 ata_dev_err(qc->dev, "prep_slave_sg() failed\n"); 75 return; 76 } 77 tx->callback = pxa_ata_dma_irq; 78 tx->callback_param = pd; 79 pd->dma_cookie = dmaengine_submit(tx); 80 } 81 82 /* 83 * Configure the DMA controller, load the DMA descriptors, but don't start the 84 * DMA controller yet. Only issue the ATA command. 85 */ 86 static void pxa_bmdma_setup(struct ata_queued_cmd *qc) 87 { 88 qc->ap->ops->sff_exec_command(qc->ap, &qc->tf); 89 } 90 91 /* 92 * Execute the DMA transfer. 93 */ 94 static void pxa_bmdma_start(struct ata_queued_cmd *qc) 95 { 96 struct pata_pxa_data *pd = qc->ap->private_data; 97 init_completion(&pd->dma_done); 98 dma_async_issue_pending(pd->dma_chan); 99 } 100 101 /* 102 * Wait until the DMA transfer completes, then stop the DMA controller. 103 */ 104 static void pxa_bmdma_stop(struct ata_queued_cmd *qc) 105 { 106 struct pata_pxa_data *pd = qc->ap->private_data; 107 enum dma_status status; 108 109 status = dmaengine_tx_status(pd->dma_chan, pd->dma_cookie, NULL); 110 if (status != DMA_ERROR && status != DMA_COMPLETE && 111 wait_for_completion_timeout(&pd->dma_done, HZ)) 112 ata_dev_err(qc->dev, "Timeout waiting for DMA completion!"); 113 114 dmaengine_terminate_all(pd->dma_chan); 115 } 116 117 /* 118 * Read DMA status. The bmdma_stop() will take care of properly finishing the 119 * DMA transfer so we always have DMA-complete interrupt here. 120 */ 121 static unsigned char pxa_bmdma_status(struct ata_port *ap) 122 { 123 struct pata_pxa_data *pd = ap->private_data; 124 unsigned char ret = ATA_DMA_INTR; 125 struct dma_tx_state state; 126 enum dma_status status; 127 128 status = dmaengine_tx_status(pd->dma_chan, pd->dma_cookie, &state); 129 if (status != DMA_COMPLETE) 130 ret |= ATA_DMA_ERR; 131 132 return ret; 133 } 134 135 /* 136 * No IRQ register present so we do nothing. 137 */ 138 static void pxa_irq_clear(struct ata_port *ap) 139 { 140 } 141 142 /* 143 * Check for ATAPI DMA. ATAPI DMA is unsupported by this driver. It's still 144 * unclear why ATAPI has DMA issues. 145 */ 146 static int pxa_check_atapi_dma(struct ata_queued_cmd *qc) 147 { 148 return -EOPNOTSUPP; 149 } 150 151 static struct scsi_host_template pxa_ata_sht = { 152 ATA_BMDMA_SHT(DRV_NAME), 153 }; 154 155 static struct ata_port_operations pxa_ata_port_ops = { 156 .inherits = &ata_bmdma_port_ops, 157 .cable_detect = ata_cable_40wire, 158 159 .bmdma_setup = pxa_bmdma_setup, 160 .bmdma_start = pxa_bmdma_start, 161 .bmdma_stop = pxa_bmdma_stop, 162 .bmdma_status = pxa_bmdma_status, 163 164 .check_atapi_dma = pxa_check_atapi_dma, 165 166 .sff_irq_clear = pxa_irq_clear, 167 168 .qc_prep = pxa_qc_prep, 169 }; 170 171 static int pxa_ata_probe(struct platform_device *pdev) 172 { 173 struct ata_host *host; 174 struct ata_port *ap; 175 struct pata_pxa_data *data; 176 struct resource *cmd_res; 177 struct resource *ctl_res; 178 struct resource *dma_res; 179 struct resource *irq_res; 180 struct pata_pxa_pdata *pdata = dev_get_platdata(&pdev->dev); 181 struct dma_slave_config config; 182 int ret = 0; 183 184 /* 185 * Resource validation, three resources are needed: 186 * - CMD port base address 187 * - CTL port base address 188 * - DMA port base address 189 * - IRQ pin 190 */ 191 if (pdev->num_resources != 4) { 192 dev_err(&pdev->dev, "invalid number of resources\n"); 193 return -EINVAL; 194 } 195 196 /* 197 * CMD port base address 198 */ 199 cmd_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 200 if (unlikely(cmd_res == NULL)) 201 return -EINVAL; 202 203 /* 204 * CTL port base address 205 */ 206 ctl_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 207 if (unlikely(ctl_res == NULL)) 208 return -EINVAL; 209 210 /* 211 * DMA port base address 212 */ 213 dma_res = platform_get_resource(pdev, IORESOURCE_DMA, 0); 214 if (unlikely(dma_res == NULL)) 215 return -EINVAL; 216 217 /* 218 * IRQ pin 219 */ 220 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 221 if (unlikely(irq_res == NULL)) 222 return -EINVAL; 223 224 /* 225 * Allocate the host 226 */ 227 host = ata_host_alloc(&pdev->dev, 1); 228 if (!host) 229 return -ENOMEM; 230 231 ap = host->ports[0]; 232 ap->ops = &pxa_ata_port_ops; 233 ap->pio_mask = ATA_PIO4; 234 ap->mwdma_mask = ATA_MWDMA2; 235 236 ap->ioaddr.cmd_addr = devm_ioremap(&pdev->dev, cmd_res->start, 237 resource_size(cmd_res)); 238 ap->ioaddr.ctl_addr = devm_ioremap(&pdev->dev, ctl_res->start, 239 resource_size(ctl_res)); 240 ap->ioaddr.bmdma_addr = devm_ioremap(&pdev->dev, dma_res->start, 241 resource_size(dma_res)); 242 243 /* 244 * Adjust register offsets 245 */ 246 ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr; 247 ap->ioaddr.data_addr = ap->ioaddr.cmd_addr + 248 (ATA_REG_DATA << pdata->reg_shift); 249 ap->ioaddr.error_addr = ap->ioaddr.cmd_addr + 250 (ATA_REG_ERR << pdata->reg_shift); 251 ap->ioaddr.feature_addr = ap->ioaddr.cmd_addr + 252 (ATA_REG_FEATURE << pdata->reg_shift); 253 ap->ioaddr.nsect_addr = ap->ioaddr.cmd_addr + 254 (ATA_REG_NSECT << pdata->reg_shift); 255 ap->ioaddr.lbal_addr = ap->ioaddr.cmd_addr + 256 (ATA_REG_LBAL << pdata->reg_shift); 257 ap->ioaddr.lbam_addr = ap->ioaddr.cmd_addr + 258 (ATA_REG_LBAM << pdata->reg_shift); 259 ap->ioaddr.lbah_addr = ap->ioaddr.cmd_addr + 260 (ATA_REG_LBAH << pdata->reg_shift); 261 ap->ioaddr.device_addr = ap->ioaddr.cmd_addr + 262 (ATA_REG_DEVICE << pdata->reg_shift); 263 ap->ioaddr.status_addr = ap->ioaddr.cmd_addr + 264 (ATA_REG_STATUS << pdata->reg_shift); 265 ap->ioaddr.command_addr = ap->ioaddr.cmd_addr + 266 (ATA_REG_CMD << pdata->reg_shift); 267 268 /* 269 * Allocate and load driver's internal data structure 270 */ 271 data = devm_kzalloc(&pdev->dev, sizeof(struct pata_pxa_data), 272 GFP_KERNEL); 273 if (!data) 274 return -ENOMEM; 275 276 ap->private_data = data; 277 278 memset(&config, 0, sizeof(config)); 279 config.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 280 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 281 config.src_addr = dma_res->start; 282 config.dst_addr = dma_res->start; 283 config.src_maxburst = 32; 284 config.dst_maxburst = 32; 285 286 /* 287 * Request the DMA channel 288 */ 289 data->dma_chan = 290 dma_request_slave_channel(&pdev->dev, "data"); 291 if (!data->dma_chan) 292 return -EBUSY; 293 ret = dmaengine_slave_config(data->dma_chan, &config); 294 if (ret < 0) { 295 dev_err(&pdev->dev, "dma configuration failed: %d\n", ret); 296 return ret; 297 } 298 299 /* 300 * Activate the ATA host 301 */ 302 ret = ata_host_activate(host, irq_res->start, ata_sff_interrupt, 303 pdata->irq_flags, &pxa_ata_sht); 304 if (ret) 305 dma_release_channel(data->dma_chan); 306 307 return ret; 308 } 309 310 static int pxa_ata_remove(struct platform_device *pdev) 311 { 312 struct ata_host *host = platform_get_drvdata(pdev); 313 struct pata_pxa_data *data = host->ports[0]->private_data; 314 315 dma_release_channel(data->dma_chan); 316 317 ata_host_detach(host); 318 319 return 0; 320 } 321 322 static struct platform_driver pxa_ata_driver = { 323 .probe = pxa_ata_probe, 324 .remove = pxa_ata_remove, 325 .driver = { 326 .name = DRV_NAME, 327 }, 328 }; 329 330 module_platform_driver(pxa_ata_driver); 331 332 MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>"); 333 MODULE_DESCRIPTION("DMA-capable driver for PATA on PXA CPU"); 334 MODULE_LICENSE("GPL"); 335 MODULE_VERSION(DRV_VERSION); 336 MODULE_ALIAS("platform:" DRV_NAME); 337