xref: /openbmc/linux/drivers/ata/pata_opti.c (revision 643d1f7f)
1 /*
2  * pata_opti.c 	- ATI PATA for new ATA layer
3  *			  (C) 2005 Red Hat Inc
4  *			  Alan Cox <alan@redhat.com>
5  *
6  * Based on
7  *  linux/drivers/ide/pci/opti621.c		Version 0.7	Sept 10, 2002
8  *
9  *  Copyright (C) 1996-1998  Linus Torvalds & authors (see below)
10  *
11  * Authors:
12  * Jaromir Koutek <miri@punknet.cz>,
13  * Jan Harkes <jaharkes@cwi.nl>,
14  * Mark Lord <mlord@pobox.com>
15  * Some parts of code are from ali14xx.c and from rz1000.c.
16  *
17  * Also consulted the FreeBSD prototype driver by Kevin Day to try
18  * and resolve some confusions. Further documentation can be found in
19  * Ralf Brown's interrupt list
20  *
21  * If you have other variants of the Opti range (Viper/Vendetta) please
22  * try this driver with those PCI idents and report back. For the later
23  * chips see the pata_optidma driver
24  *
25  */
26 
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
30 #include <linux/init.h>
31 #include <linux/blkdev.h>
32 #include <linux/delay.h>
33 #include <scsi/scsi_host.h>
34 #include <linux/libata.h>
35 
36 #define DRV_NAME "pata_opti"
37 #define DRV_VERSION "0.2.9"
38 
39 enum {
40 	READ_REG	= 0,	/* index of Read cycle timing register */
41 	WRITE_REG 	= 1,	/* index of Write cycle timing register */
42 	CNTRL_REG 	= 3,	/* index of Control register */
43 	STRAP_REG 	= 5,	/* index of Strap register */
44 	MISC_REG 	= 6	/* index of Miscellaneous register */
45 };
46 
47 /**
48  *	opti_pre_reset		-	probe begin
49  *	@link: ATA link
50  *	@deadline: deadline jiffies for the operation
51  *
52  *	Set up cable type and use generic probe init
53  */
54 
55 static int opti_pre_reset(struct ata_link *link, unsigned long deadline)
56 {
57 	struct ata_port *ap = link->ap;
58 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
59 	static const struct pci_bits opti_enable_bits[] = {
60 		{ 0x45, 1, 0x80, 0x00 },
61 		{ 0x40, 1, 0x08, 0x00 }
62 	};
63 
64 	if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no]))
65 		return -ENOENT;
66 
67 	return ata_std_prereset(link, deadline);
68 }
69 
70 /**
71  *	opti_probe_reset		-	probe reset
72  *	@ap: ATA port
73  *
74  *	Perform the ATA probe and bus reset sequence plus specific handling
75  *	for this hardware. The Opti needs little handling - we have no UDMA66
76  *	capability that needs cable detection. All we must do is check the port
77  *	is enabled.
78  */
79 
80 static void opti_error_handler(struct ata_port *ap)
81 {
82 	ata_bmdma_drive_eh(ap, opti_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
83 }
84 
85 /**
86  *	opti_write_reg		-	control register setup
87  *	@ap: ATA port
88  *	@value: value
89  *	@reg: control register number
90  *
91  *	The Opti uses magic 'trapdoor' register accesses to do configuration
92  *	rather than using PCI space as other controllers do. The double inw
93  *	on the error register activates configuration mode. We can then write
94  *	the control register
95  */
96 
97 static void opti_write_reg(struct ata_port *ap, u8 val, int reg)
98 {
99 	void __iomem *regio = ap->ioaddr.cmd_addr;
100 
101 	/* These 3 unlock the control register access */
102 	ioread16(regio + 1);
103 	ioread16(regio + 1);
104 	iowrite8(3, regio + 2);
105 
106 	/* Do the I/O */
107 	iowrite8(val, regio + reg);
108 
109 	/* Relock */
110 	iowrite8(0x83, regio + 2);
111 }
112 
113 /**
114  *	opti_set_piomode	-	set initial PIO mode data
115  *	@ap: ATA interface
116  *	@adev: ATA device
117  *
118  *	Called to do the PIO mode setup. Timing numbers are taken from
119  *	the FreeBSD driver then pre computed to keep the code clean. There
120  *	are two tables depending on the hardware clock speed.
121  */
122 
123 static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev)
124 {
125 	struct ata_device *pair = ata_dev_pair(adev);
126 	int clock;
127 	int pio = adev->pio_mode - XFER_PIO_0;
128 	void __iomem *regio = ap->ioaddr.cmd_addr;
129 	u8 addr;
130 
131 	/* Address table precomputed with prefetch off and a DCLK of 2 */
132 	static const u8 addr_timing[2][5] = {
133 		{ 0x30, 0x20, 0x20, 0x10, 0x10 },
134 		{ 0x20, 0x20, 0x10, 0x10, 0x10 }
135 	};
136 	static const u8 data_rec_timing[2][5] = {
137 		{ 0x6B, 0x56, 0x42, 0x32, 0x31 },
138 		{ 0x58, 0x44, 0x32, 0x22, 0x21 }
139 	};
140 
141 	iowrite8(0xff, regio + 5);
142 	clock = ioread16(regio + 5) & 1;
143 
144 	/*
145  	 *	As with many controllers the address setup time is shared
146  	 *	and must suit both devices if present.
147 	 */
148 
149 	addr = addr_timing[clock][pio];
150 	if (pair) {
151 		/* Hardware constraint */
152 		u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0];
153 		if (pair_addr > addr)
154 			addr = pair_addr;
155 	}
156 
157 	/* Commence primary programming sequence */
158 	opti_write_reg(ap, adev->devno, MISC_REG);
159 	opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG);
160 	opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG);
161 	opti_write_reg(ap, addr, MISC_REG);
162 
163 	/* Programming sequence complete, override strapping */
164 	opti_write_reg(ap, 0x85, CNTRL_REG);
165 }
166 
167 static struct scsi_host_template opti_sht = {
168 	.module			= THIS_MODULE,
169 	.name			= DRV_NAME,
170 	.ioctl			= ata_scsi_ioctl,
171 	.queuecommand		= ata_scsi_queuecmd,
172 	.can_queue		= ATA_DEF_QUEUE,
173 	.this_id		= ATA_SHT_THIS_ID,
174 	.sg_tablesize		= LIBATA_MAX_PRD,
175 	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
176 	.emulated		= ATA_SHT_EMULATED,
177 	.use_clustering		= ATA_SHT_USE_CLUSTERING,
178 	.proc_name		= DRV_NAME,
179 	.dma_boundary		= ATA_DMA_BOUNDARY,
180 	.slave_configure	= ata_scsi_slave_config,
181 	.slave_destroy		= ata_scsi_slave_destroy,
182 	.bios_param		= ata_std_bios_param,
183 };
184 
185 static struct ata_port_operations opti_port_ops = {
186 	.set_piomode	= opti_set_piomode,
187 	.tf_load	= ata_tf_load,
188 	.tf_read	= ata_tf_read,
189 	.check_status 	= ata_check_status,
190 	.exec_command	= ata_exec_command,
191 	.dev_select 	= ata_std_dev_select,
192 
193 	.freeze		= ata_bmdma_freeze,
194 	.thaw		= ata_bmdma_thaw,
195 	.error_handler	= opti_error_handler,
196 	.post_internal_cmd = ata_bmdma_post_internal_cmd,
197 	.cable_detect	= ata_cable_40wire,
198 
199 	.bmdma_setup 	= ata_bmdma_setup,
200 	.bmdma_start 	= ata_bmdma_start,
201 	.bmdma_stop	= ata_bmdma_stop,
202 	.bmdma_status 	= ata_bmdma_status,
203 
204 	.qc_prep 	= ata_qc_prep,
205 	.qc_issue	= ata_qc_issue_prot,
206 
207 	.data_xfer	= ata_data_xfer,
208 
209 	.irq_handler	= ata_interrupt,
210 	.irq_clear	= ata_bmdma_irq_clear,
211 	.irq_on		= ata_irq_on,
212 
213 	.port_start	= ata_sff_port_start,
214 };
215 
216 static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id)
217 {
218 	static const struct ata_port_info info = {
219 		.sht = &opti_sht,
220 		.flags = ATA_FLAG_SLAVE_POSS,
221 		.pio_mask = 0x1f,
222 		.port_ops = &opti_port_ops
223 	};
224 	const struct ata_port_info *ppi[] = { &info, NULL };
225 	static int printed_version;
226 
227 	if (!printed_version++)
228 		dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
229 
230 	return ata_pci_init_one(dev, ppi);
231 }
232 
233 static const struct pci_device_id opti[] = {
234 	{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
235 	{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 },
236 
237 	{ },
238 };
239 
240 static struct pci_driver opti_pci_driver = {
241 	.name 		= DRV_NAME,
242 	.id_table	= opti,
243 	.probe 		= opti_init_one,
244 	.remove		= ata_pci_remove_one,
245 #ifdef CONFIG_PM
246 	.suspend	= ata_pci_device_suspend,
247 	.resume		= ata_pci_device_resume,
248 #endif
249 };
250 
251 static int __init opti_init(void)
252 {
253 	return pci_register_driver(&opti_pci_driver);
254 }
255 
256 static void __exit opti_exit(void)
257 {
258 	pci_unregister_driver(&opti_pci_driver);
259 }
260 
261 
262 MODULE_AUTHOR("Alan Cox");
263 MODULE_DESCRIPTION("low-level driver for Opti 621/621X");
264 MODULE_LICENSE("GPL");
265 MODULE_DEVICE_TABLE(pci, opti);
266 MODULE_VERSION(DRV_VERSION);
267 
268 module_init(opti_init);
269 module_exit(opti_exit);
270