xref: /openbmc/linux/drivers/ata/pata_opti.c (revision 545e4006)
1 /*
2  * pata_opti.c 	- ATI PATA for new ATA layer
3  *			  (C) 2005 Red Hat Inc
4  *			  Alan Cox <alan@redhat.com>
5  *
6  * Based on
7  *  linux/drivers/ide/pci/opti621.c		Version 0.7	Sept 10, 2002
8  *
9  *  Copyright (C) 1996-1998  Linus Torvalds & authors (see below)
10  *
11  * Authors:
12  * Jaromir Koutek <miri@punknet.cz>,
13  * Jan Harkes <jaharkes@cwi.nl>,
14  * Mark Lord <mlord@pobox.com>
15  * Some parts of code are from ali14xx.c and from rz1000.c.
16  *
17  * Also consulted the FreeBSD prototype driver by Kevin Day to try
18  * and resolve some confusions. Further documentation can be found in
19  * Ralf Brown's interrupt list
20  *
21  * If you have other variants of the Opti range (Viper/Vendetta) please
22  * try this driver with those PCI idents and report back. For the later
23  * chips see the pata_optidma driver
24  *
25  */
26 
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
30 #include <linux/init.h>
31 #include <linux/blkdev.h>
32 #include <linux/delay.h>
33 #include <scsi/scsi_host.h>
34 #include <linux/libata.h>
35 
36 #define DRV_NAME "pata_opti"
37 #define DRV_VERSION "0.2.9"
38 
39 enum {
40 	READ_REG	= 0,	/* index of Read cycle timing register */
41 	WRITE_REG 	= 1,	/* index of Write cycle timing register */
42 	CNTRL_REG 	= 3,	/* index of Control register */
43 	STRAP_REG 	= 5,	/* index of Strap register */
44 	MISC_REG 	= 6	/* index of Miscellaneous register */
45 };
46 
47 /**
48  *	opti_pre_reset		-	probe begin
49  *	@link: ATA link
50  *	@deadline: deadline jiffies for the operation
51  *
52  *	Set up cable type and use generic probe init
53  */
54 
55 static int opti_pre_reset(struct ata_link *link, unsigned long deadline)
56 {
57 	struct ata_port *ap = link->ap;
58 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
59 	static const struct pci_bits opti_enable_bits[] = {
60 		{ 0x45, 1, 0x80, 0x00 },
61 		{ 0x40, 1, 0x08, 0x00 }
62 	};
63 
64 	if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no]))
65 		return -ENOENT;
66 
67 	return ata_sff_prereset(link, deadline);
68 }
69 
70 /**
71  *	opti_write_reg		-	control register setup
72  *	@ap: ATA port
73  *	@value: value
74  *	@reg: control register number
75  *
76  *	The Opti uses magic 'trapdoor' register accesses to do configuration
77  *	rather than using PCI space as other controllers do. The double inw
78  *	on the error register activates configuration mode. We can then write
79  *	the control register
80  */
81 
82 static void opti_write_reg(struct ata_port *ap, u8 val, int reg)
83 {
84 	void __iomem *regio = ap->ioaddr.cmd_addr;
85 
86 	/* These 3 unlock the control register access */
87 	ioread16(regio + 1);
88 	ioread16(regio + 1);
89 	iowrite8(3, regio + 2);
90 
91 	/* Do the I/O */
92 	iowrite8(val, regio + reg);
93 
94 	/* Relock */
95 	iowrite8(0x83, regio + 2);
96 }
97 
98 /**
99  *	opti_set_piomode	-	set initial PIO mode data
100  *	@ap: ATA interface
101  *	@adev: ATA device
102  *
103  *	Called to do the PIO mode setup. Timing numbers are taken from
104  *	the FreeBSD driver then pre computed to keep the code clean. There
105  *	are two tables depending on the hardware clock speed.
106  */
107 
108 static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev)
109 {
110 	struct ata_device *pair = ata_dev_pair(adev);
111 	int clock;
112 	int pio = adev->pio_mode - XFER_PIO_0;
113 	void __iomem *regio = ap->ioaddr.cmd_addr;
114 	u8 addr;
115 
116 	/* Address table precomputed with prefetch off and a DCLK of 2 */
117 	static const u8 addr_timing[2][5] = {
118 		{ 0x30, 0x20, 0x20, 0x10, 0x10 },
119 		{ 0x20, 0x20, 0x10, 0x10, 0x10 }
120 	};
121 	static const u8 data_rec_timing[2][5] = {
122 		{ 0x6B, 0x56, 0x42, 0x32, 0x31 },
123 		{ 0x58, 0x44, 0x32, 0x22, 0x21 }
124 	};
125 
126 	iowrite8(0xff, regio + 5);
127 	clock = ioread16(regio + 5) & 1;
128 
129 	/*
130  	 *	As with many controllers the address setup time is shared
131  	 *	and must suit both devices if present.
132 	 */
133 
134 	addr = addr_timing[clock][pio];
135 	if (pair) {
136 		/* Hardware constraint */
137 		u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0];
138 		if (pair_addr > addr)
139 			addr = pair_addr;
140 	}
141 
142 	/* Commence primary programming sequence */
143 	opti_write_reg(ap, adev->devno, MISC_REG);
144 	opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG);
145 	opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG);
146 	opti_write_reg(ap, addr, MISC_REG);
147 
148 	/* Programming sequence complete, override strapping */
149 	opti_write_reg(ap, 0x85, CNTRL_REG);
150 }
151 
152 static struct scsi_host_template opti_sht = {
153 	ATA_PIO_SHT(DRV_NAME),
154 };
155 
156 static struct ata_port_operations opti_port_ops = {
157 	.inherits	= &ata_sff_port_ops,
158 	.cable_detect	= ata_cable_40wire,
159 	.set_piomode	= opti_set_piomode,
160 	.prereset	= opti_pre_reset,
161 };
162 
163 static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id)
164 {
165 	static const struct ata_port_info info = {
166 		.flags = ATA_FLAG_SLAVE_POSS,
167 		.pio_mask = 0x1f,
168 		.port_ops = &opti_port_ops
169 	};
170 	const struct ata_port_info *ppi[] = { &info, NULL };
171 	static int printed_version;
172 
173 	if (!printed_version++)
174 		dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
175 
176 	return ata_pci_sff_init_one(dev, ppi, &opti_sht, NULL);
177 }
178 
179 static const struct pci_device_id opti[] = {
180 	{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
181 	{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 },
182 
183 	{ },
184 };
185 
186 static struct pci_driver opti_pci_driver = {
187 	.name 		= DRV_NAME,
188 	.id_table	= opti,
189 	.probe 		= opti_init_one,
190 	.remove		= ata_pci_remove_one,
191 #ifdef CONFIG_PM
192 	.suspend	= ata_pci_device_suspend,
193 	.resume		= ata_pci_device_resume,
194 #endif
195 };
196 
197 static int __init opti_init(void)
198 {
199 	return pci_register_driver(&opti_pci_driver);
200 }
201 
202 static void __exit opti_exit(void)
203 {
204 	pci_unregister_driver(&opti_pci_driver);
205 }
206 
207 
208 MODULE_AUTHOR("Alan Cox");
209 MODULE_DESCRIPTION("low-level driver for Opti 621/621X");
210 MODULE_LICENSE("GPL");
211 MODULE_DEVICE_TABLE(pci, opti);
212 MODULE_VERSION(DRV_VERSION);
213 
214 module_init(opti_init);
215 module_exit(opti_exit);
216