1 /* 2 * pata_opti.c - ATI PATA for new ATA layer 3 * (C) 2005 Red Hat Inc 4 * 5 * Based on 6 * linux/drivers/ide/pci/opti621.c Version 0.7 Sept 10, 2002 7 * 8 * Copyright (C) 1996-1998 Linus Torvalds & authors (see below) 9 * 10 * Authors: 11 * Jaromir Koutek <miri@punknet.cz>, 12 * Jan Harkes <jaharkes@cwi.nl>, 13 * Mark Lord <mlord@pobox.com> 14 * Some parts of code are from ali14xx.c and from rz1000.c. 15 * 16 * Also consulted the FreeBSD prototype driver by Kevin Day to try 17 * and resolve some confusions. Further documentation can be found in 18 * Ralf Brown's interrupt list 19 * 20 * If you have other variants of the Opti range (Viper/Vendetta) please 21 * try this driver with those PCI idents and report back. For the later 22 * chips see the pata_optidma driver 23 * 24 */ 25 26 #include <linux/kernel.h> 27 #include <linux/module.h> 28 #include <linux/pci.h> 29 #include <linux/blkdev.h> 30 #include <linux/delay.h> 31 #include <scsi/scsi_host.h> 32 #include <linux/libata.h> 33 34 #define DRV_NAME "pata_opti" 35 #define DRV_VERSION "0.2.9" 36 37 enum { 38 READ_REG = 0, /* index of Read cycle timing register */ 39 WRITE_REG = 1, /* index of Write cycle timing register */ 40 CNTRL_REG = 3, /* index of Control register */ 41 STRAP_REG = 5, /* index of Strap register */ 42 MISC_REG = 6 /* index of Miscellaneous register */ 43 }; 44 45 /** 46 * opti_pre_reset - probe begin 47 * @link: ATA link 48 * @deadline: deadline jiffies for the operation 49 * 50 * Set up cable type and use generic probe init 51 */ 52 53 static int opti_pre_reset(struct ata_link *link, unsigned long deadline) 54 { 55 struct ata_port *ap = link->ap; 56 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 57 static const struct pci_bits opti_enable_bits[] = { 58 { 0x45, 1, 0x80, 0x00 }, 59 { 0x40, 1, 0x08, 0x00 } 60 }; 61 62 if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no])) 63 return -ENOENT; 64 65 return ata_sff_prereset(link, deadline); 66 } 67 68 /** 69 * opti_write_reg - control register setup 70 * @ap: ATA port 71 * @value: value 72 * @reg: control register number 73 * 74 * The Opti uses magic 'trapdoor' register accesses to do configuration 75 * rather than using PCI space as other controllers do. The double inw 76 * on the error register activates configuration mode. We can then write 77 * the control register 78 */ 79 80 static void opti_write_reg(struct ata_port *ap, u8 val, int reg) 81 { 82 void __iomem *regio = ap->ioaddr.cmd_addr; 83 84 /* These 3 unlock the control register access */ 85 ioread16(regio + 1); 86 ioread16(regio + 1); 87 iowrite8(3, regio + 2); 88 89 /* Do the I/O */ 90 iowrite8(val, regio + reg); 91 92 /* Relock */ 93 iowrite8(0x83, regio + 2); 94 } 95 96 /** 97 * opti_set_piomode - set initial PIO mode data 98 * @ap: ATA interface 99 * @adev: ATA device 100 * 101 * Called to do the PIO mode setup. Timing numbers are taken from 102 * the FreeBSD driver then pre computed to keep the code clean. There 103 * are two tables depending on the hardware clock speed. 104 */ 105 106 static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev) 107 { 108 struct ata_device *pair = ata_dev_pair(adev); 109 int clock; 110 int pio = adev->pio_mode - XFER_PIO_0; 111 void __iomem *regio = ap->ioaddr.cmd_addr; 112 u8 addr; 113 114 /* Address table precomputed with prefetch off and a DCLK of 2 */ 115 static const u8 addr_timing[2][5] = { 116 { 0x30, 0x20, 0x20, 0x10, 0x10 }, 117 { 0x20, 0x20, 0x10, 0x10, 0x10 } 118 }; 119 static const u8 data_rec_timing[2][5] = { 120 { 0x6B, 0x56, 0x42, 0x32, 0x31 }, 121 { 0x58, 0x44, 0x32, 0x22, 0x21 } 122 }; 123 124 iowrite8(0xff, regio + 5); 125 clock = ioread16(regio + 5) & 1; 126 127 /* 128 * As with many controllers the address setup time is shared 129 * and must suit both devices if present. 130 */ 131 132 addr = addr_timing[clock][pio]; 133 if (pair) { 134 /* Hardware constraint */ 135 u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0]; 136 if (pair_addr > addr) 137 addr = pair_addr; 138 } 139 140 /* Commence primary programming sequence */ 141 opti_write_reg(ap, adev->devno, MISC_REG); 142 opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG); 143 opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG); 144 opti_write_reg(ap, addr, MISC_REG); 145 146 /* Programming sequence complete, override strapping */ 147 opti_write_reg(ap, 0x85, CNTRL_REG); 148 } 149 150 static struct scsi_host_template opti_sht = { 151 ATA_PIO_SHT(DRV_NAME), 152 }; 153 154 static struct ata_port_operations opti_port_ops = { 155 .inherits = &ata_sff_port_ops, 156 .cable_detect = ata_cable_40wire, 157 .set_piomode = opti_set_piomode, 158 .prereset = opti_pre_reset, 159 }; 160 161 static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id) 162 { 163 static const struct ata_port_info info = { 164 .flags = ATA_FLAG_SLAVE_POSS, 165 .pio_mask = ATA_PIO4, 166 .port_ops = &opti_port_ops 167 }; 168 const struct ata_port_info *ppi[] = { &info, NULL }; 169 170 ata_print_version_once(&dev->dev, DRV_VERSION); 171 172 return ata_pci_sff_init_one(dev, ppi, &opti_sht, NULL, 0); 173 } 174 175 static const struct pci_device_id opti[] = { 176 { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 }, 177 { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 }, 178 179 { }, 180 }; 181 182 static struct pci_driver opti_pci_driver = { 183 .name = DRV_NAME, 184 .id_table = opti, 185 .probe = opti_init_one, 186 .remove = ata_pci_remove_one, 187 #ifdef CONFIG_PM_SLEEP 188 .suspend = ata_pci_device_suspend, 189 .resume = ata_pci_device_resume, 190 #endif 191 }; 192 193 module_pci_driver(opti_pci_driver); 194 195 MODULE_AUTHOR("Alan Cox"); 196 MODULE_DESCRIPTION("low-level driver for Opti 621/621X"); 197 MODULE_LICENSE("GPL"); 198 MODULE_DEVICE_TABLE(pci, opti); 199 MODULE_VERSION(DRV_VERSION); 200