1 /* 2 * pata_oldpiix.c - Intel PATA/SATA controllers 3 * 4 * (C) 2005 Red Hat <alan@redhat.com> 5 * 6 * Some parts based on ata_piix.c by Jeff Garzik and others. 7 * 8 * Early PIIX differs significantly from the later PIIX as it lacks 9 * SITRE and the slave timing registers. This means that you have to 10 * set timing per channel, or be clever. Libata tells us whenever it 11 * does drive selection and we use this to reload the timings. 12 * 13 * Because of these behaviour differences PIIX gets its own driver module. 14 */ 15 16 #include <linux/kernel.h> 17 #include <linux/module.h> 18 #include <linux/pci.h> 19 #include <linux/init.h> 20 #include <linux/blkdev.h> 21 #include <linux/delay.h> 22 #include <linux/device.h> 23 #include <scsi/scsi_host.h> 24 #include <linux/libata.h> 25 #include <linux/ata.h> 26 27 #define DRV_NAME "pata_oldpiix" 28 #define DRV_VERSION "0.5.5" 29 30 /** 31 * oldpiix_pre_reset - probe begin 32 * @link: ATA link 33 * @deadline: deadline jiffies for the operation 34 * 35 * Set up cable type and use generic probe init 36 */ 37 38 static int oldpiix_pre_reset(struct ata_link *link, unsigned long deadline) 39 { 40 struct ata_port *ap = link->ap; 41 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 42 static const struct pci_bits oldpiix_enable_bits[] = { 43 { 0x41U, 1U, 0x80UL, 0x80UL }, /* port 0 */ 44 { 0x43U, 1U, 0x80UL, 0x80UL }, /* port 1 */ 45 }; 46 47 if (!pci_test_config_bits(pdev, &oldpiix_enable_bits[ap->port_no])) 48 return -ENOENT; 49 50 return ata_sff_prereset(link, deadline); 51 } 52 53 /** 54 * oldpiix_set_piomode - Initialize host controller PATA PIO timings 55 * @ap: Port whose timings we are configuring 56 * @adev: Device whose timings we are configuring 57 * 58 * Set PIO mode for device, in host controller PCI config space. 59 * 60 * LOCKING: 61 * None (inherited from caller). 62 */ 63 64 static void oldpiix_set_piomode (struct ata_port *ap, struct ata_device *adev) 65 { 66 unsigned int pio = adev->pio_mode - XFER_PIO_0; 67 struct pci_dev *dev = to_pci_dev(ap->host->dev); 68 unsigned int idetm_port= ap->port_no ? 0x42 : 0x40; 69 u16 idetm_data; 70 int control = 0; 71 72 /* 73 * See Intel Document 298600-004 for the timing programing rules 74 * for PIIX/ICH. Note that the early PIIX does not have the slave 75 * timing port at 0x44. 76 */ 77 78 static const /* ISP RTC */ 79 u8 timings[][2] = { { 0, 0 }, 80 { 0, 0 }, 81 { 1, 0 }, 82 { 2, 1 }, 83 { 2, 3 }, }; 84 85 if (pio > 1) 86 control |= 1; /* TIME */ 87 if (ata_pio_need_iordy(adev)) 88 control |= 2; /* IE */ 89 90 /* Intel specifies that the prefetch/posting is for disk only */ 91 if (adev->class == ATA_DEV_ATA) 92 control |= 4; /* PPE */ 93 94 pci_read_config_word(dev, idetm_port, &idetm_data); 95 96 /* 97 * Set PPE, IE and TIME as appropriate. 98 * Clear the other drive's timing bits. 99 */ 100 if (adev->devno == 0) { 101 idetm_data &= 0xCCE0; 102 idetm_data |= control; 103 } else { 104 idetm_data &= 0xCC0E; 105 idetm_data |= (control << 4); 106 } 107 idetm_data |= (timings[pio][0] << 12) | 108 (timings[pio][1] << 8); 109 pci_write_config_word(dev, idetm_port, idetm_data); 110 111 /* Track which port is configured */ 112 ap->private_data = adev; 113 } 114 115 /** 116 * oldpiix_set_dmamode - Initialize host controller PATA DMA timings 117 * @ap: Port whose timings we are configuring 118 * @adev: Device to program 119 * @isich: True if the device is an ICH and has IOCFG registers 120 * 121 * Set MWDMA mode for device, in host controller PCI config space. 122 * 123 * LOCKING: 124 * None (inherited from caller). 125 */ 126 127 static void oldpiix_set_dmamode (struct ata_port *ap, struct ata_device *adev) 128 { 129 struct pci_dev *dev = to_pci_dev(ap->host->dev); 130 u8 idetm_port = ap->port_no ? 0x42 : 0x40; 131 u16 idetm_data; 132 133 static const /* ISP RTC */ 134 u8 timings[][2] = { { 0, 0 }, 135 { 0, 0 }, 136 { 1, 0 }, 137 { 2, 1 }, 138 { 2, 3 }, }; 139 140 /* 141 * MWDMA is driven by the PIO timings. We must also enable 142 * IORDY unconditionally along with TIME1. PPE has already 143 * been set when the PIO timing was set. 144 */ 145 146 unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0; 147 unsigned int control; 148 const unsigned int needed_pio[3] = { 149 XFER_PIO_0, XFER_PIO_3, XFER_PIO_4 150 }; 151 int pio = needed_pio[mwdma] - XFER_PIO_0; 152 153 pci_read_config_word(dev, idetm_port, &idetm_data); 154 155 control = 3; /* IORDY|TIME0 */ 156 /* Intel specifies that the PPE functionality is for disk only */ 157 if (adev->class == ATA_DEV_ATA) 158 control |= 4; /* PPE enable */ 159 160 /* If the drive MWDMA is faster than it can do PIO then 161 we must force PIO into PIO0 */ 162 163 if (adev->pio_mode < needed_pio[mwdma]) 164 /* Enable DMA timing only */ 165 control |= 8; /* PIO cycles in PIO0 */ 166 167 /* Mask out the relevant control and timing bits we will load. Also 168 clear the other drive TIME register as a precaution */ 169 if (adev->devno == 0) { 170 idetm_data &= 0xCCE0; 171 idetm_data |= control; 172 } else { 173 idetm_data &= 0xCC0E; 174 idetm_data |= (control << 4); 175 } 176 idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8); 177 pci_write_config_word(dev, idetm_port, idetm_data); 178 179 /* Track which port is configured */ 180 ap->private_data = adev; 181 } 182 183 /** 184 * oldpiix_qc_issue - command issue 185 * @qc: command pending 186 * 187 * Called when the libata layer is about to issue a command. We wrap 188 * this interface so that we can load the correct ATA timings if 189 * necessary. Our logic also clears TIME0/TIME1 for the other device so 190 * that, even if we get this wrong, cycles to the other device will 191 * be made PIO0. 192 */ 193 194 static unsigned int oldpiix_qc_issue(struct ata_queued_cmd *qc) 195 { 196 struct ata_port *ap = qc->ap; 197 struct ata_device *adev = qc->dev; 198 199 if (adev != ap->private_data) { 200 oldpiix_set_piomode(ap, adev); 201 if (adev->dma_mode) 202 oldpiix_set_dmamode(ap, adev); 203 } 204 return ata_sff_qc_issue(qc); 205 } 206 207 208 static struct scsi_host_template oldpiix_sht = { 209 ATA_BMDMA_SHT(DRV_NAME), 210 }; 211 212 static struct ata_port_operations oldpiix_pata_ops = { 213 .inherits = &ata_bmdma_port_ops, 214 .qc_issue = oldpiix_qc_issue, 215 .cable_detect = ata_cable_40wire, 216 .set_piomode = oldpiix_set_piomode, 217 .set_dmamode = oldpiix_set_dmamode, 218 .prereset = oldpiix_pre_reset, 219 }; 220 221 222 /** 223 * oldpiix_init_one - Register PIIX ATA PCI device with kernel services 224 * @pdev: PCI device to register 225 * @ent: Entry in oldpiix_pci_tbl matching with @pdev 226 * 227 * Called from kernel PCI layer. We probe for combined mode (sigh), 228 * and then hand over control to libata, for it to do the rest. 229 * 230 * LOCKING: 231 * Inherited from PCI layer (may sleep). 232 * 233 * RETURNS: 234 * Zero on success, or -ERRNO value. 235 */ 236 237 static int oldpiix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 238 { 239 static int printed_version; 240 static const struct ata_port_info info = { 241 .flags = ATA_FLAG_SLAVE_POSS, 242 .pio_mask = 0x1f, /* pio0-4 */ 243 .mwdma_mask = 0x07, /* mwdma1-2 */ 244 .port_ops = &oldpiix_pata_ops, 245 }; 246 const struct ata_port_info *ppi[] = { &info, NULL }; 247 248 if (!printed_version++) 249 dev_printk(KERN_DEBUG, &pdev->dev, 250 "version " DRV_VERSION "\n"); 251 252 return ata_pci_sff_init_one(pdev, ppi, &oldpiix_sht, NULL); 253 } 254 255 static const struct pci_device_id oldpiix_pci_tbl[] = { 256 { PCI_VDEVICE(INTEL, 0x1230), }, 257 258 { } /* terminate list */ 259 }; 260 261 static struct pci_driver oldpiix_pci_driver = { 262 .name = DRV_NAME, 263 .id_table = oldpiix_pci_tbl, 264 .probe = oldpiix_init_one, 265 .remove = ata_pci_remove_one, 266 #ifdef CONFIG_PM 267 .suspend = ata_pci_device_suspend, 268 .resume = ata_pci_device_resume, 269 #endif 270 }; 271 272 static int __init oldpiix_init(void) 273 { 274 return pci_register_driver(&oldpiix_pci_driver); 275 } 276 277 static void __exit oldpiix_exit(void) 278 { 279 pci_unregister_driver(&oldpiix_pci_driver); 280 } 281 282 module_init(oldpiix_init); 283 module_exit(oldpiix_exit); 284 285 MODULE_AUTHOR("Alan Cox"); 286 MODULE_DESCRIPTION("SCSI low-level driver for early PIIX series controllers"); 287 MODULE_LICENSE("GPL"); 288 MODULE_DEVICE_TABLE(pci, oldpiix_pci_tbl); 289 MODULE_VERSION(DRV_VERSION); 290 291