1 /* 2 * pata_it8213.c - iTE Tech. Inc. IT8213 PATA driver 3 * 4 * The IT8213 is a very Intel ICH like device for timing purposes, having 5 * a similar register layout and the same split clock arrangement. Cable 6 * detection is different, and it does not have slave channels or all the 7 * clutter of later ICH/SATA setups. 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/pci.h> 13 #include <linux/init.h> 14 #include <linux/blkdev.h> 15 #include <linux/delay.h> 16 #include <linux/device.h> 17 #include <scsi/scsi_host.h> 18 #include <linux/libata.h> 19 #include <linux/ata.h> 20 21 #define DRV_NAME "pata_it8213" 22 #define DRV_VERSION "0.0.3" 23 24 /** 25 * it8213_pre_reset - check for 40/80 pin 26 * @link: link 27 * @deadline: deadline jiffies for the operation 28 * 29 * Filter out ports by the enable bits before doing the normal reset 30 * and probe. 31 */ 32 33 static int it8213_pre_reset(struct ata_link *link, unsigned long deadline) 34 { 35 static const struct pci_bits it8213_enable_bits[] = { 36 { 0x41U, 1U, 0x80UL, 0x80UL }, /* port 0 */ 37 }; 38 struct ata_port *ap = link->ap; 39 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 40 if (!pci_test_config_bits(pdev, &it8213_enable_bits[ap->port_no])) 41 return -ENOENT; 42 43 return ata_sff_prereset(link, deadline); 44 } 45 46 /** 47 * it8213_cable_detect - check for 40/80 pin 48 * @ap: Port 49 * 50 * Perform cable detection for the 8213 ATA interface. This is 51 * different to the PIIX arrangement 52 */ 53 54 static int it8213_cable_detect(struct ata_port *ap) 55 { 56 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 57 u8 tmp; 58 pci_read_config_byte(pdev, 0x42, &tmp); 59 if (tmp & 2) /* The initial docs are incorrect */ 60 return ATA_CBL_PATA40; 61 return ATA_CBL_PATA80; 62 } 63 64 /** 65 * it8213_set_piomode - Initialize host controller PATA PIO timings 66 * @ap: Port whose timings we are configuring 67 * @adev: Device whose timings we are configuring 68 * 69 * Set PIO mode for device, in host controller PCI config space. 70 * 71 * LOCKING: 72 * None (inherited from caller). 73 */ 74 75 static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev) 76 { 77 unsigned int pio = adev->pio_mode - XFER_PIO_0; 78 struct pci_dev *dev = to_pci_dev(ap->host->dev); 79 unsigned int idetm_port= ap->port_no ? 0x42 : 0x40; 80 u16 idetm_data; 81 int control = 0; 82 83 /* 84 * See Intel Document 298600-004 for the timing programing rules 85 * for PIIX/ICH. The 8213 is a clone so very similar 86 */ 87 88 static const /* ISP RTC */ 89 u8 timings[][2] = { { 0, 0 }, 90 { 0, 0 }, 91 { 1, 0 }, 92 { 2, 1 }, 93 { 2, 3 }, }; 94 95 if (pio > 2) 96 control |= 1; /* TIME1 enable */ 97 if (ata_pio_need_iordy(adev)) /* PIO 3/4 require IORDY */ 98 control |= 2; /* IORDY enable */ 99 /* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */ 100 if (adev->class != ATA_DEV_ATA) 101 control |= 4; 102 103 pci_read_config_word(dev, idetm_port, &idetm_data); 104 105 /* Enable PPE, IE and TIME as appropriate */ 106 107 if (adev->devno == 0) { 108 idetm_data &= 0xCCF0; 109 idetm_data |= control; 110 idetm_data |= (timings[pio][0] << 12) | 111 (timings[pio][1] << 8); 112 } else { 113 u8 slave_data; 114 115 idetm_data &= 0xCC0F; 116 idetm_data |= (control << 4); 117 118 /* Slave timing in separate register */ 119 pci_read_config_byte(dev, 0x44, &slave_data); 120 slave_data &= 0xF0; 121 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << 4; 122 pci_write_config_byte(dev, 0x44, slave_data); 123 } 124 125 idetm_data |= 0x4000; /* Ensure SITRE is enabled */ 126 pci_write_config_word(dev, idetm_port, idetm_data); 127 } 128 129 /** 130 * it8213_set_dmamode - Initialize host controller PATA DMA timings 131 * @ap: Port whose timings we are configuring 132 * @adev: Device to program 133 * 134 * Set UDMA/MWDMA mode for device, in host controller PCI config space. 135 * This device is basically an ICH alike. 136 * 137 * LOCKING: 138 * None (inherited from caller). 139 */ 140 141 static void it8213_set_dmamode (struct ata_port *ap, struct ata_device *adev) 142 { 143 struct pci_dev *dev = to_pci_dev(ap->host->dev); 144 u16 master_data; 145 u8 speed = adev->dma_mode; 146 int devid = adev->devno; 147 u8 udma_enable; 148 149 static const /* ISP RTC */ 150 u8 timings[][2] = { { 0, 0 }, 151 { 0, 0 }, 152 { 1, 0 }, 153 { 2, 1 }, 154 { 2, 3 }, }; 155 156 pci_read_config_word(dev, 0x40, &master_data); 157 pci_read_config_byte(dev, 0x48, &udma_enable); 158 159 if (speed >= XFER_UDMA_0) { 160 unsigned int udma = adev->dma_mode - XFER_UDMA_0; 161 u16 udma_timing; 162 u16 ideconf; 163 int u_clock, u_speed; 164 165 /* Clocks follow the PIIX style */ 166 u_speed = min(2 - (udma & 1), udma); 167 if (udma == 5) 168 u_clock = 0x1000; /* 100Mhz */ 169 else if (udma > 2) 170 u_clock = 1; /* 66Mhz */ 171 else 172 u_clock = 0; /* 33Mhz */ 173 174 udma_enable |= (1 << devid); 175 176 /* Load the UDMA mode number */ 177 pci_read_config_word(dev, 0x4A, &udma_timing); 178 udma_timing &= ~(3 << (4 * devid)); 179 udma_timing |= (udma & 3) << (4 * devid); 180 pci_write_config_word(dev, 0x4A, udma_timing); 181 182 /* Load the clock selection */ 183 pci_read_config_word(dev, 0x54, &ideconf); 184 ideconf &= ~(0x1001 << devid); 185 ideconf |= u_clock << devid; 186 pci_write_config_word(dev, 0x54, ideconf); 187 } else { 188 /* 189 * MWDMA is driven by the PIO timings. We must also enable 190 * IORDY unconditionally along with TIME1. PPE has already 191 * been set when the PIO timing was set. 192 */ 193 unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0; 194 unsigned int control; 195 u8 slave_data; 196 static const unsigned int needed_pio[3] = { 197 XFER_PIO_0, XFER_PIO_3, XFER_PIO_4 198 }; 199 int pio = needed_pio[mwdma] - XFER_PIO_0; 200 201 control = 3; /* IORDY|TIME1 */ 202 203 /* If the drive MWDMA is faster than it can do PIO then 204 we must force PIO into PIO0 */ 205 206 if (adev->pio_mode < needed_pio[mwdma]) 207 /* Enable DMA timing only */ 208 control |= 8; /* PIO cycles in PIO0 */ 209 210 if (devid) { /* Slave */ 211 master_data &= 0xFF4F; /* Mask out IORDY|TIME1|DMAONLY */ 212 master_data |= control << 4; 213 pci_read_config_byte(dev, 0x44, &slave_data); 214 slave_data &= (0x0F + 0xE1 * ap->port_no); 215 /* Load the matching timing */ 216 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); 217 pci_write_config_byte(dev, 0x44, slave_data); 218 } else { /* Master */ 219 master_data &= 0xCCF4; /* Mask out IORDY|TIME1|DMAONLY 220 and master timing bits */ 221 master_data |= control; 222 master_data |= 223 (timings[pio][0] << 12) | 224 (timings[pio][1] << 8); 225 } 226 udma_enable &= ~(1 << devid); 227 pci_write_config_word(dev, 0x40, master_data); 228 } 229 pci_write_config_byte(dev, 0x48, udma_enable); 230 } 231 232 static struct scsi_host_template it8213_sht = { 233 ATA_BMDMA_SHT(DRV_NAME), 234 }; 235 236 237 static struct ata_port_operations it8213_ops = { 238 .inherits = &ata_bmdma_port_ops, 239 .cable_detect = it8213_cable_detect, 240 .set_piomode = it8213_set_piomode, 241 .set_dmamode = it8213_set_dmamode, 242 .prereset = it8213_pre_reset, 243 }; 244 245 246 /** 247 * it8213_init_one - Register 8213 ATA PCI device with kernel services 248 * @pdev: PCI device to register 249 * @ent: Entry in it8213_pci_tbl matching with @pdev 250 * 251 * Called from kernel PCI layer. 252 * 253 * LOCKING: 254 * Inherited from PCI layer (may sleep). 255 * 256 * RETURNS: 257 * Zero on success, or -ERRNO value. 258 */ 259 260 static int it8213_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 261 { 262 static int printed_version; 263 static const struct ata_port_info info = { 264 .flags = ATA_FLAG_SLAVE_POSS, 265 .pio_mask = 0x1f, /* pio0-4 */ 266 .mwdma_mask = 0x07, /* mwdma0-2 */ 267 .udma_mask = ATA_UDMA4, /* FIXME: want UDMA 100? */ 268 .port_ops = &it8213_ops, 269 }; 270 /* Current IT8213 stuff is single port */ 271 const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info }; 272 273 if (!printed_version++) 274 dev_printk(KERN_DEBUG, &pdev->dev, 275 "version " DRV_VERSION "\n"); 276 277 return ata_pci_sff_init_one(pdev, ppi, &it8213_sht, NULL); 278 } 279 280 static const struct pci_device_id it8213_pci_tbl[] = { 281 { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8213), }, 282 283 { } /* terminate list */ 284 }; 285 286 static struct pci_driver it8213_pci_driver = { 287 .name = DRV_NAME, 288 .id_table = it8213_pci_tbl, 289 .probe = it8213_init_one, 290 .remove = ata_pci_remove_one, 291 #ifdef CONFIG_PM 292 .suspend = ata_pci_device_suspend, 293 .resume = ata_pci_device_resume, 294 #endif 295 }; 296 297 static int __init it8213_init(void) 298 { 299 return pci_register_driver(&it8213_pci_driver); 300 } 301 302 static void __exit it8213_exit(void) 303 { 304 pci_unregister_driver(&it8213_pci_driver); 305 } 306 307 module_init(it8213_init); 308 module_exit(it8213_exit); 309 310 MODULE_AUTHOR("Alan Cox"); 311 MODULE_DESCRIPTION("SCSI low-level driver for the ITE 8213"); 312 MODULE_LICENSE("GPL"); 313 MODULE_DEVICE_TABLE(pci, it8213_pci_tbl); 314 MODULE_VERSION(DRV_VERSION); 315