xref: /openbmc/linux/drivers/ata/pata_it8213.c (revision ca55b2fe)
1 /*
2  *    pata_it8213.c - iTE Tech. Inc.  IT8213 PATA driver
3  *
4  *    The IT8213 is a very Intel ICH like device for timing purposes, having
5  *    a similar register layout and the same split clock arrangement. Cable
6  *    detection is different, and it does not have slave channels or all the
7  *    clutter of later ICH/SATA setups.
8  */
9 
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/blkdev.h>
14 #include <linux/delay.h>
15 #include <linux/device.h>
16 #include <scsi/scsi_host.h>
17 #include <linux/libata.h>
18 #include <linux/ata.h>
19 
20 #define DRV_NAME	"pata_it8213"
21 #define DRV_VERSION	"0.0.3"
22 
23 /**
24  *	it8213_pre_reset	-	probe begin
25  *	@link: link
26  *	@deadline: deadline jiffies for the operation
27  *
28  *	Filter out ports by the enable bits before doing the normal reset
29  *	and probe.
30  */
31 
32 static int it8213_pre_reset(struct ata_link *link, unsigned long deadline)
33 {
34 	static const struct pci_bits it8213_enable_bits[] = {
35 		{ 0x41U, 1U, 0x80UL, 0x80UL },	/* port 0 */
36 	};
37 	struct ata_port *ap = link->ap;
38 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
39 	if (!pci_test_config_bits(pdev, &it8213_enable_bits[ap->port_no]))
40 		return -ENOENT;
41 
42 	return ata_sff_prereset(link, deadline);
43 }
44 
45 /**
46  *	it8213_cable_detect	-	check for 40/80 pin
47  *	@ap: Port
48  *
49  *	Perform cable detection for the 8213 ATA interface. This is
50  *	different to the PIIX arrangement
51  */
52 
53 static int it8213_cable_detect(struct ata_port *ap)
54 {
55 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
56 	u8 tmp;
57 	pci_read_config_byte(pdev, 0x42, &tmp);
58 	if (tmp & 2)	/* The initial docs are incorrect */
59 		return ATA_CBL_PATA40;
60 	return ATA_CBL_PATA80;
61 }
62 
63 /**
64  *	it8213_set_piomode - Initialize host controller PATA PIO timings
65  *	@ap: Port whose timings we are configuring
66  *	@adev: Device whose timings we are configuring
67  *
68  *	Set PIO mode for device, in host controller PCI config space.
69  *
70  *	LOCKING:
71  *	None (inherited from caller).
72  */
73 
74 static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev)
75 {
76 	unsigned int pio	= adev->pio_mode - XFER_PIO_0;
77 	struct pci_dev *dev	= to_pci_dev(ap->host->dev);
78 	unsigned int master_port = ap->port_no ? 0x42 : 0x40;
79 	u16 master_data;
80 	int control = 0;
81 
82 	/*
83 	 *	See Intel Document 298600-004 for the timing programing rules
84 	 *	for PIIX/ICH. The 8213 is a clone so very similar
85 	 */
86 
87 	static const	 /* ISP  RTC */
88 	u8 timings[][2]	= { { 0, 0 },
89 			    { 0, 0 },
90 			    { 1, 0 },
91 			    { 2, 1 },
92 			    { 2, 3 }, };
93 
94 	if (pio > 1)
95 		control |= 1;	/* TIME */
96 	if (ata_pio_need_iordy(adev))	/* PIO 3/4 require IORDY */
97 		control |= 2;	/* IE */
98 	/* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */
99 	if (adev->class != ATA_DEV_ATA)
100 		control |= 4;	/* PPE */
101 
102 	pci_read_config_word(dev, master_port, &master_data);
103 
104 	/* Set PPE, IE, and TIME as appropriate */
105 	if (adev->devno == 0) {
106 		master_data &= 0xCCF0;
107 		master_data |= control;
108 		master_data |= (timings[pio][0] << 12) |
109 			(timings[pio][1] << 8);
110 	} else {
111 		u8 slave_data;
112 
113 		master_data &= 0xFF0F;
114 		master_data |= (control << 4);
115 
116 		/* Slave timing in separate register */
117 		pci_read_config_byte(dev, 0x44, &slave_data);
118 		slave_data &= 0xF0;
119 		slave_data |= (timings[pio][0] << 2) | timings[pio][1];
120 		pci_write_config_byte(dev, 0x44, slave_data);
121 	}
122 
123 	master_data |= 0x4000;	/* Ensure SITRE is set */
124 	pci_write_config_word(dev, master_port, master_data);
125 }
126 
127 /**
128  *	it8213_set_dmamode - Initialize host controller PATA DMA timings
129  *	@ap: Port whose timings we are configuring
130  *	@adev: Device to program
131  *
132  *	Set UDMA/MWDMA mode for device, in host controller PCI config space.
133  *	This device is basically an ICH alike.
134  *
135  *	LOCKING:
136  *	None (inherited from caller).
137  */
138 
139 static void it8213_set_dmamode (struct ata_port *ap, struct ata_device *adev)
140 {
141 	struct pci_dev *dev	= to_pci_dev(ap->host->dev);
142 	u16 master_data;
143 	u8 speed		= adev->dma_mode;
144 	int devid		= adev->devno;
145 	u8 udma_enable;
146 
147 	static const	 /* ISP  RTC */
148 	u8 timings[][2]	= { { 0, 0 },
149 			    { 0, 0 },
150 			    { 1, 0 },
151 			    { 2, 1 },
152 			    { 2, 3 }, };
153 
154 	pci_read_config_word(dev, 0x40, &master_data);
155 	pci_read_config_byte(dev, 0x48, &udma_enable);
156 
157 	if (speed >= XFER_UDMA_0) {
158 		unsigned int udma = adev->dma_mode - XFER_UDMA_0;
159 		u16 udma_timing;
160 		u16 ideconf;
161 		int u_clock, u_speed;
162 
163 		/* Clocks follow the PIIX style */
164 		u_speed = min(2 - (udma & 1), udma);
165 		if (udma > 4)
166 			u_clock = 0x1000;	/* 100Mhz */
167 		else if (udma > 2)
168 			u_clock = 1;		/* 66Mhz */
169 		else
170 			u_clock = 0;		/* 33Mhz */
171 
172 		udma_enable |= (1 << devid);
173 
174 		/* Load the UDMA cycle time */
175 		pci_read_config_word(dev, 0x4A, &udma_timing);
176 		udma_timing &= ~(3 << (4 * devid));
177 		udma_timing |= u_speed << (4 * devid);
178 		pci_write_config_word(dev, 0x4A, udma_timing);
179 
180 		/* Load the clock selection */
181 		pci_read_config_word(dev, 0x54, &ideconf);
182 		ideconf &= ~(0x1001 << devid);
183 		ideconf |= u_clock << devid;
184 		pci_write_config_word(dev, 0x54, ideconf);
185 	} else {
186 		/*
187 		 * MWDMA is driven by the PIO timings. We must also enable
188 		 * IORDY unconditionally along with TIME1. PPE has already
189 		 * been set when the PIO timing was set.
190 		 */
191 		unsigned int mwdma	= adev->dma_mode - XFER_MW_DMA_0;
192 		unsigned int control;
193 		u8 slave_data;
194 		static const unsigned int needed_pio[3] = {
195 			XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
196 		};
197 		int pio = needed_pio[mwdma] - XFER_PIO_0;
198 
199 		control = 3;	/* IORDY|TIME1 */
200 
201 		/* If the drive MWDMA is faster than it can do PIO then
202 		   we must force PIO into PIO0 */
203 
204 		if (adev->pio_mode < needed_pio[mwdma])
205 			/* Enable DMA timing only */
206 			control |= 8;	/* PIO cycles in PIO0 */
207 
208 		if (devid) {	/* Slave */
209 			master_data &= 0xFF4F;  /* Mask out IORDY|TIME1|DMAONLY */
210 			master_data |= control << 4;
211 			pci_read_config_byte(dev, 0x44, &slave_data);
212 			slave_data &= 0xF0;
213 			/* Load the matching timing */
214 			slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0);
215 			pci_write_config_byte(dev, 0x44, slave_data);
216 		} else { 	/* Master */
217 			master_data &= 0xCCF4;	/* Mask out IORDY|TIME1|DMAONLY
218 						   and master timing bits */
219 			master_data |= control;
220 			master_data |=
221 				(timings[pio][0] << 12) |
222 				(timings[pio][1] << 8);
223 		}
224 		udma_enable &= ~(1 << devid);
225 		pci_write_config_word(dev, 0x40, master_data);
226 	}
227 	pci_write_config_byte(dev, 0x48, udma_enable);
228 }
229 
230 static struct scsi_host_template it8213_sht = {
231 	ATA_BMDMA_SHT(DRV_NAME),
232 };
233 
234 
235 static struct ata_port_operations it8213_ops = {
236 	.inherits		= &ata_bmdma_port_ops,
237 	.cable_detect		= it8213_cable_detect,
238 	.set_piomode		= it8213_set_piomode,
239 	.set_dmamode		= it8213_set_dmamode,
240 	.prereset		= it8213_pre_reset,
241 };
242 
243 
244 /**
245  *	it8213_init_one - Register 8213 ATA PCI device with kernel services
246  *	@pdev: PCI device to register
247  *	@ent: Entry in it8213_pci_tbl matching with @pdev
248  *
249  *	Called from kernel PCI layer.
250  *
251  *	LOCKING:
252  *	Inherited from PCI layer (may sleep).
253  *
254  *	RETURNS:
255  *	Zero on success, or -ERRNO value.
256  */
257 
258 static int it8213_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
259 {
260 	static const struct ata_port_info info = {
261 		.flags		= ATA_FLAG_SLAVE_POSS,
262 		.pio_mask	= ATA_PIO4,
263 		.mwdma_mask	= ATA_MWDMA12_ONLY,
264 		.udma_mask	= ATA_UDMA6,
265 		.port_ops	= &it8213_ops,
266 	};
267 	/* Current IT8213 stuff is single port */
268 	const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
269 
270 	ata_print_version_once(&pdev->dev, DRV_VERSION);
271 
272 	return ata_pci_bmdma_init_one(pdev, ppi, &it8213_sht, NULL, 0);
273 }
274 
275 static const struct pci_device_id it8213_pci_tbl[] = {
276 	{ PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8213), },
277 
278 	{ }	/* terminate list */
279 };
280 
281 static struct pci_driver it8213_pci_driver = {
282 	.name			= DRV_NAME,
283 	.id_table		= it8213_pci_tbl,
284 	.probe			= it8213_init_one,
285 	.remove			= ata_pci_remove_one,
286 #ifdef CONFIG_PM_SLEEP
287 	.suspend		= ata_pci_device_suspend,
288 	.resume			= ata_pci_device_resume,
289 #endif
290 };
291 
292 module_pci_driver(it8213_pci_driver);
293 
294 MODULE_AUTHOR("Alan Cox");
295 MODULE_DESCRIPTION("SCSI low-level driver for the ITE 8213");
296 MODULE_LICENSE("GPL");
297 MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);
298 MODULE_VERSION(DRV_VERSION);
299