xref: /openbmc/linux/drivers/ata/pata_cs5530.c (revision 600a711c)
1 /*
2  * pata-cs5530.c 	- CS5530 PATA for new ATA layer
3  *			  (C) 2005 Red Hat Inc
4  *
5  * based upon cs5530.c by Mark Lord.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  *
20  * Loosely based on the piix & svwks drivers.
21  *
22  * Documentation:
23  *	Available from AMD web site.
24  */
25 
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/init.h>
30 #include <linux/blkdev.h>
31 #include <linux/delay.h>
32 #include <scsi/scsi_host.h>
33 #include <linux/libata.h>
34 #include <linux/dmi.h>
35 
36 #define DRV_NAME	"pata_cs5530"
37 #define DRV_VERSION	"0.7.4"
38 
39 static void __iomem *cs5530_port_base(struct ata_port *ap)
40 {
41 	unsigned long bmdma = (unsigned long)ap->ioaddr.bmdma_addr;
42 
43 	return (void __iomem *)((bmdma & ~0x0F) + 0x20 + 0x10 * ap->port_no);
44 }
45 
46 /**
47  *	cs5530_set_piomode		-	PIO setup
48  *	@ap: ATA interface
49  *	@adev: device on the interface
50  *
51  *	Set our PIO requirements. This is fairly simple on the CS5530
52  *	chips.
53  */
54 
55 static void cs5530_set_piomode(struct ata_port *ap, struct ata_device *adev)
56 {
57 	static const unsigned int cs5530_pio_timings[2][5] = {
58 		{0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010},
59 		{0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}
60 	};
61 	void __iomem *base = cs5530_port_base(ap);
62 	u32 tuning;
63 	int format;
64 
65 	/* Find out which table to use */
66 	tuning = ioread32(base + 0x04);
67 	format = (tuning & 0x80000000UL) ? 1 : 0;
68 
69 	/* Now load the right timing register */
70 	if (adev->devno)
71 		base += 0x08;
72 
73 	iowrite32(cs5530_pio_timings[format][adev->pio_mode - XFER_PIO_0], base);
74 }
75 
76 /**
77  *	cs5530_set_dmamode		-	DMA timing setup
78  *	@ap: ATA interface
79  *	@adev: Device being configured
80  *
81  *	We cannot mix MWDMA and UDMA without reloading timings each switch
82  *	master to slave. We track the last DMA setup in order to minimise
83  *	reloads.
84  */
85 
86 static void cs5530_set_dmamode(struct ata_port *ap, struct ata_device *adev)
87 {
88 	void __iomem *base = cs5530_port_base(ap);
89 	u32 tuning, timing = 0;
90 	u8 reg;
91 
92 	/* Find out which table to use */
93 	tuning = ioread32(base + 0x04);
94 
95 	switch(adev->dma_mode) {
96 		case XFER_UDMA_0:
97 			timing  = 0x00921250;break;
98 		case XFER_UDMA_1:
99 			timing  = 0x00911140;break;
100 		case XFER_UDMA_2:
101 			timing  = 0x00911030;break;
102 		case XFER_MW_DMA_0:
103 			timing  = 0x00077771;break;
104 		case XFER_MW_DMA_1:
105 			timing  = 0x00012121;break;
106 		case XFER_MW_DMA_2:
107 			timing  = 0x00002020;break;
108 		default:
109 			BUG();
110 	}
111 	/* Merge in the PIO format bit */
112 	timing |= (tuning & 0x80000000UL);
113 	if (adev->devno == 0) /* Master */
114 		iowrite32(timing, base + 0x04);
115 	else {
116 		if (timing & 0x00100000)
117 			tuning |= 0x00100000;	/* UDMA for both */
118 		else
119 			tuning &= ~0x00100000;	/* MWDMA for both */
120 		iowrite32(tuning, base + 0x04);
121 		iowrite32(timing, base + 0x0C);
122 	}
123 
124 	/* Set the DMA capable bit in the BMDMA area */
125 	reg = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
126 	reg |= (1 << (5 + adev->devno));
127 	iowrite8(reg, ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
128 
129 	/* Remember the last DMA setup we did */
130 
131 	ap->private_data = adev;
132 }
133 
134 /**
135  *	cs5530_qc_issue		-	command issue
136  *	@qc: command pending
137  *
138  *	Called when the libata layer is about to issue a command. We wrap
139  *	this interface so that we can load the correct ATA timings if
140  *	necessary.  Specifically we have a problem that there is only
141  *	one MWDMA/UDMA bit.
142  */
143 
144 static unsigned int cs5530_qc_issue(struct ata_queued_cmd *qc)
145 {
146 	struct ata_port *ap = qc->ap;
147 	struct ata_device *adev = qc->dev;
148 	struct ata_device *prev = ap->private_data;
149 
150 	/* See if the DMA settings could be wrong */
151 	if (ata_dma_enabled(adev) && adev != prev && prev != NULL) {
152 		/* Maybe, but do the channels match MWDMA/UDMA ? */
153 		if ((ata_using_udma(adev) && !ata_using_udma(prev)) ||
154 		    (ata_using_udma(prev) && !ata_using_udma(adev)))
155 		    	/* Switch the mode bits */
156 		    	cs5530_set_dmamode(ap, adev);
157 	}
158 
159 	return ata_bmdma_qc_issue(qc);
160 }
161 
162 static struct scsi_host_template cs5530_sht = {
163 	ATA_BMDMA_SHT(DRV_NAME),
164 	.sg_tablesize	= LIBATA_DUMB_MAX_PRD,
165 };
166 
167 static struct ata_port_operations cs5530_port_ops = {
168 	.inherits	= &ata_bmdma_port_ops,
169 
170 	.qc_prep 	= ata_bmdma_dumb_qc_prep,
171 	.qc_issue	= cs5530_qc_issue,
172 
173 	.cable_detect	= ata_cable_40wire,
174 	.set_piomode	= cs5530_set_piomode,
175 	.set_dmamode	= cs5530_set_dmamode,
176 };
177 
178 static const struct dmi_system_id palmax_dmi_table[] = {
179 	{
180 		.ident = "Palmax PD1100",
181 		.matches = {
182 			DMI_MATCH(DMI_SYS_VENDOR, "Cyrix"),
183 			DMI_MATCH(DMI_PRODUCT_NAME, "Caddis"),
184 		},
185 	},
186 	{ }
187 };
188 
189 static int cs5530_is_palmax(void)
190 {
191 	if (dmi_check_system(palmax_dmi_table)) {
192 		printk(KERN_INFO "Palmax PD1100: Disabling DMA on docking port.\n");
193 		return 1;
194 	}
195 	return 0;
196 }
197 
198 
199 /**
200  *	cs5530_init_chip	-	Chipset init
201  *
202  *	Perform the chip initialisation work that is shared between both
203  *	setup and resume paths
204  */
205 
206 static int cs5530_init_chip(void)
207 {
208 	struct pci_dev *master_0 = NULL, *cs5530_0 = NULL, *dev = NULL;
209 
210 	while ((dev = pci_get_device(PCI_VENDOR_ID_CYRIX, PCI_ANY_ID, dev)) != NULL) {
211 		switch (dev->device) {
212 			case PCI_DEVICE_ID_CYRIX_PCI_MASTER:
213 				master_0 = pci_dev_get(dev);
214 				break;
215 			case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
216 				cs5530_0 = pci_dev_get(dev);
217 				break;
218 		}
219 	}
220 	if (!master_0) {
221 		printk(KERN_ERR DRV_NAME ": unable to locate PCI MASTER function\n");
222 		goto fail_put;
223 	}
224 	if (!cs5530_0) {
225 		printk(KERN_ERR DRV_NAME ": unable to locate CS5530 LEGACY function\n");
226 		goto fail_put;
227 	}
228 
229 	pci_set_master(cs5530_0);
230 	pci_try_set_mwi(cs5530_0);
231 
232 	/*
233 	 * Set PCI CacheLineSize to 16-bytes:
234 	 * --> Write 0x04 into 8-bit PCI CACHELINESIZE reg of function 0 of the cs5530
235 	 *
236 	 * Note: This value is constant because the 5530 is only a Geode companion
237 	 */
238 
239 	pci_write_config_byte(cs5530_0, PCI_CACHE_LINE_SIZE, 0x04);
240 
241 	/*
242 	 * Disable trapping of UDMA register accesses (Win98 hack):
243 	 * --> Write 0x5006 into 16-bit reg at offset 0xd0 of function 0 of the cs5530
244 	 */
245 
246 	pci_write_config_word(cs5530_0, 0xd0, 0x5006);
247 
248 	/*
249 	 * Bit-1 at 0x40 enables MemoryWriteAndInvalidate on internal X-bus:
250 	 * The other settings are what is necessary to get the register
251 	 * into a sane state for IDE DMA operation.
252 	 */
253 
254 	pci_write_config_byte(master_0, 0x40, 0x1e);
255 
256 	/*
257 	 * Set max PCI burst size (16-bytes seems to work best):
258 	 *	   16bytes: set bit-1 at 0x41 (reg value of 0x16)
259 	 *	all others: clear bit-1 at 0x41, and do:
260 	 *	  128bytes: OR 0x00 at 0x41
261 	 *	  256bytes: OR 0x04 at 0x41
262 	 *	  512bytes: OR 0x08 at 0x41
263 	 *	 1024bytes: OR 0x0c at 0x41
264 	 */
265 
266 	pci_write_config_byte(master_0, 0x41, 0x14);
267 
268 	/*
269 	 * These settings are necessary to get the chip
270 	 * into a sane state for IDE DMA operation.
271 	 */
272 
273 	pci_write_config_byte(master_0, 0x42, 0x00);
274 	pci_write_config_byte(master_0, 0x43, 0xc1);
275 
276 	pci_dev_put(master_0);
277 	pci_dev_put(cs5530_0);
278 	return 0;
279 fail_put:
280 	if (master_0)
281 		pci_dev_put(master_0);
282 	if (cs5530_0)
283 		pci_dev_put(cs5530_0);
284 	return -ENODEV;
285 }
286 
287 /**
288  *	cs5530_init_one		-	Initialise a CS5530
289  *	@dev: PCI device
290  *	@id: Entry in match table
291  *
292  *	Install a driver for the newly found CS5530 companion chip. Most of
293  *	this is just housekeeping. We have to set the chip up correctly and
294  *	turn off various bits of emulation magic.
295  */
296 
297 static int cs5530_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
298 {
299 	static const struct ata_port_info info = {
300 		.flags = ATA_FLAG_SLAVE_POSS,
301 		.pio_mask = ATA_PIO4,
302 		.mwdma_mask = ATA_MWDMA2,
303 		.udma_mask = ATA_UDMA2,
304 		.port_ops = &cs5530_port_ops
305 	};
306 	/* The docking connector doesn't do UDMA, and it seems not MWDMA */
307 	static const struct ata_port_info info_palmax_secondary = {
308 		.flags = ATA_FLAG_SLAVE_POSS,
309 		.pio_mask = ATA_PIO4,
310 		.port_ops = &cs5530_port_ops
311 	};
312 	const struct ata_port_info *ppi[] = { &info, NULL };
313 	int rc;
314 
315 	rc = pcim_enable_device(pdev);
316 	if (rc)
317 		return rc;
318 
319 	/* Chip initialisation */
320 	if (cs5530_init_chip())
321 		return -ENODEV;
322 
323 	if (cs5530_is_palmax())
324 		ppi[1] = &info_palmax_secondary;
325 
326 	/* Now kick off ATA set up */
327 	return ata_pci_bmdma_init_one(pdev, ppi, &cs5530_sht, NULL, 0);
328 }
329 
330 #ifdef CONFIG_PM
331 static int cs5530_reinit_one(struct pci_dev *pdev)
332 {
333 	struct ata_host *host = dev_get_drvdata(&pdev->dev);
334 	int rc;
335 
336 	rc = ata_pci_device_do_resume(pdev);
337 	if (rc)
338 		return rc;
339 
340 	/* If we fail on resume we are doomed */
341 	if (cs5530_init_chip())
342 		return -EIO;
343 
344 	ata_host_resume(host);
345 	return 0;
346 }
347 #endif /* CONFIG_PM */
348 
349 static const struct pci_device_id cs5530[] = {
350 	{ PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_IDE), },
351 
352 	{ },
353 };
354 
355 static struct pci_driver cs5530_pci_driver = {
356 	.name 		= DRV_NAME,
357 	.id_table	= cs5530,
358 	.probe 		= cs5530_init_one,
359 	.remove		= ata_pci_remove_one,
360 #ifdef CONFIG_PM
361 	.suspend	= ata_pci_device_suspend,
362 	.resume		= cs5530_reinit_one,
363 #endif
364 };
365 
366 module_pci_driver(cs5530_pci_driver);
367 
368 MODULE_AUTHOR("Alan Cox");
369 MODULE_DESCRIPTION("low-level driver for the Cyrix/NS/AMD 5530");
370 MODULE_LICENSE("GPL");
371 MODULE_DEVICE_TABLE(pci, cs5530);
372 MODULE_VERSION(DRV_VERSION);
373