xref: /openbmc/linux/drivers/ata/pata_ali.c (revision c21b37f6)
1 /*
2  * pata_ali.c 	- ALI 15x3 PATA for new ATA layer
3  *			  (C) 2005 Red Hat Inc
4  *			  Alan Cox <alan@redhat.com>
5  *
6  * based in part upon
7  * linux/drivers/ide/pci/alim15x3.c		Version 0.17	2003/01/02
8  *
9  *  Copyright (C) 1998-2000 Michel Aubry, Maintainer
10  *  Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
11  *  Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
12  *
13  *  Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
14  *  May be copied or modified under the terms of the GNU General Public License
15  *  Copyright (C) 2002 Alan Cox <alan@redhat.com>
16  *  ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
17  *
18  *  Documentation
19  *	Chipset documentation available under NDA only
20  *
21  *  TODO/CHECK
22  *	Cannot have ATAPI on both master & slave for rev < c2 (???) but
23  *	otherwise should do atapi DMA.
24  */
25 
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/init.h>
30 #include <linux/blkdev.h>
31 #include <linux/delay.h>
32 #include <scsi/scsi_host.h>
33 #include <linux/libata.h>
34 #include <linux/dmi.h>
35 
36 #define DRV_NAME "pata_ali"
37 #define DRV_VERSION "0.7.4"
38 
39 /*
40  *	Cable special cases
41  */
42 
43 static struct dmi_system_id cable_dmi_table[] = {
44 	{
45 		.ident = "HP Pavilion N5430",
46 		.matches = {
47 			DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
48 			DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
49 		},
50 	},
51 	{ }
52 };
53 
54 static int ali_cable_override(struct pci_dev *pdev)
55 {
56 	/* Fujitsu P2000 */
57 	if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
58 	   	return 1;
59 	/* Systems by DMI */
60 	if (dmi_check_system(cable_dmi_table))
61 		return 1;
62 	return 0;
63 }
64 
65 /**
66  *	ali_c2_cable_detect	-	cable detection
67  *	@ap: ATA port
68  *
69  *	Perform cable detection for C2 and later revisions
70  */
71 
72 static int ali_c2_cable_detect(struct ata_port *ap)
73 {
74 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
75 	u8 ata66;
76 
77 	/* Certain laptops use short but suitable cables and don't
78 	   implement the detect logic */
79 
80 	if (ali_cable_override(pdev))
81 		return ATA_CBL_PATA40_SHORT;
82 
83 	/* Host view cable detect 0x4A bit 0 primary bit 1 secondary
84 	   Bit set for 40 pin */
85 	pci_read_config_byte(pdev, 0x4A, &ata66);
86 	if (ata66 & (1 << ap->port_no))
87 		return ATA_CBL_PATA40;
88 	else
89 		return ATA_CBL_PATA80;
90 }
91 
92 /**
93  *	ali_20_filter		-	filter for earlier ALI DMA
94  *	@ap: ALi ATA port
95  *	@adev: attached device
96  *
97  *	Ensure that we do not do DMA on CD devices. We may be able to
98  *	fix that later on. Also ensure we do not do UDMA on WDC drives
99  */
100 
101 static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask)
102 {
103 	char model_num[ATA_ID_PROD_LEN + 1];
104 	/* No DMA on anything but a disk for now */
105 	if (adev->class != ATA_DEV_ATA)
106 		mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
107 	ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
108 	if (strstr(model_num, "WDC"))
109 		return mask &= ~ATA_MASK_UDMA;
110 	return ata_pci_default_filter(adev, mask);
111 }
112 
113 /**
114  *	ali_fifo_control	-	FIFO manager
115  *	@ap: ALi channel to control
116  *	@adev: device for FIFO control
117  *	@on: 0 for off 1 for on
118  *
119  *	Enable or disable the FIFO on a given device. Because of the way the
120  *	ALi FIFO works it provides a boost on ATA disk but can be confused by
121  *	ATAPI and we must therefore manage it.
122  */
123 
124 static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on)
125 {
126 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
127 	int pio_fifo = 0x54 + ap->port_no;
128 	u8 fifo;
129 	int shift = 4 * adev->devno;
130 
131 	/* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
132 	   0x00. Not all the docs agree but the behaviour we now use is the
133 	   one stated in the BIOS Programming Guide */
134 
135 	pci_read_config_byte(pdev, pio_fifo, &fifo);
136 	fifo &= ~(0x0F << shift);
137 	if (on)
138 		fifo |= (on << shift);
139 	pci_write_config_byte(pdev, pio_fifo, fifo);
140 }
141 
142 /**
143  *	ali_program_modes	-	load mode registers
144  *	@ap: ALi channel to load
145  *	@adev: Device the timing is for
146  *	@cmd: Command timing
147  *	@data: Data timing
148  *	@ultra: UDMA timing or zero for off
149  *
150  *	Loads the timing registers for cmd/data and disable UDMA if
151  *	ultra is zero. If ultra is set then load and enable the UDMA
152  *	timing but do not touch the command/data timing.
153  */
154 
155 static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra)
156 {
157 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
158 	int cas = 0x58 + 4 * ap->port_no;	/* Command timing */
159 	int cbt = 0x59 + 4 * ap->port_no;	/* Command timing */
160 	int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
161 	int udmat = 0x56 + ap->port_no;	/* UDMA timing */
162 	int shift = 4 * adev->devno;
163 	u8 udma;
164 
165 	if (t != NULL) {
166 		t->setup = FIT(t->setup, 1, 8) & 7;
167 		t->act8b = FIT(t->act8b, 1, 8) & 7;
168 		t->rec8b = FIT(t->rec8b, 1, 16) & 15;
169 		t->active = FIT(t->active, 1, 8) & 7;
170 		t->recover = FIT(t->recover, 1, 16) & 15;
171 
172 		pci_write_config_byte(pdev, cas, t->setup);
173 		pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b);
174 		pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover);
175 	}
176 
177 	/* Set up the UDMA enable */
178 	pci_read_config_byte(pdev, udmat, &udma);
179 	udma &= ~(0x0F << shift);
180 	udma |= ultra << shift;
181 	pci_write_config_byte(pdev, udmat, udma);
182 }
183 
184 /**
185  *	ali_set_piomode	-	set initial PIO mode data
186  *	@ap: ATA interface
187  *	@adev: ATA device
188  *
189  *	Program the ALi registers for PIO mode. FIXME: add timings for
190  *	PIO5.
191  */
192 
193 static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
194 {
195 	struct ata_device *pair = ata_dev_pair(adev);
196 	struct ata_timing t;
197 	unsigned long T =  1000000000 / 33333;	/* PCI clock based */
198 
199 	ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
200 	if (pair) {
201 		struct ata_timing p;
202 		ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
203 		ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
204 		if (pair->dma_mode) {
205 			ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
206 			ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
207 		}
208 	}
209 
210 	/* PIO FIFO is only permitted on ATA disk */
211 	if (adev->class != ATA_DEV_ATA)
212 		ali_fifo_control(ap, adev, 0x00);
213 	ali_program_modes(ap, adev, &t, 0);
214 	if (adev->class == ATA_DEV_ATA)
215 		ali_fifo_control(ap, adev, 0x05);
216 
217 }
218 
219 /**
220  *	ali_set_dmamode	-	set initial DMA mode data
221  *	@ap: ATA interface
222  *	@adev: ATA device
223  *
224  *	FIXME: MWDMA timings
225  */
226 
227 static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
228 {
229 	static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
230 	struct ata_device *pair = ata_dev_pair(adev);
231 	struct ata_timing t;
232 	unsigned long T =  1000000000 / 33333;	/* PCI clock based */
233 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
234 
235 
236 	if (adev->class == ATA_DEV_ATA)
237 		ali_fifo_control(ap, adev, 0x08);
238 
239 	if (adev->dma_mode >= XFER_UDMA_0) {
240 		ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
241 		if (adev->dma_mode >= XFER_UDMA_3) {
242 			u8 reg4b;
243 			pci_read_config_byte(pdev, 0x4B, &reg4b);
244 			reg4b |= 1;
245 			pci_write_config_byte(pdev, 0x4B, reg4b);
246 		}
247 	} else {
248 		ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
249 		if (pair) {
250 			struct ata_timing p;
251 			ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
252 			ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
253 			if (pair->dma_mode) {
254 				ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
255 				ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
256 			}
257 		}
258 		ali_program_modes(ap, adev, &t, 0);
259 	}
260 }
261 
262 /**
263  *	ali_lock_sectors	-	Keep older devices to 255 sector mode
264  *	@adev: Device
265  *
266  *	Called during the bus probe for each device that is found. We use
267  *	this call to lock the sector count of the device to 255 or less on
268  *	older ALi controllers. If we didn't do this then large I/O's would
269  *	require LBA48 commands which the older ALi requires are issued by
270  *	slower PIO methods
271  */
272 
273 static void ali_lock_sectors(struct ata_device *adev)
274 {
275 	adev->max_sectors = 255;
276 }
277 
278 static struct scsi_host_template ali_sht = {
279 	.module			= THIS_MODULE,
280 	.name			= DRV_NAME,
281 	.ioctl			= ata_scsi_ioctl,
282 	.queuecommand		= ata_scsi_queuecmd,
283 	.can_queue		= ATA_DEF_QUEUE,
284 	.this_id		= ATA_SHT_THIS_ID,
285 	.sg_tablesize		= LIBATA_MAX_PRD,
286 	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
287 	.emulated		= ATA_SHT_EMULATED,
288 	.use_clustering		= ATA_SHT_USE_CLUSTERING,
289 	.proc_name		= DRV_NAME,
290 	.dma_boundary		= ATA_DMA_BOUNDARY,
291 	.slave_configure	= ata_scsi_slave_config,
292 	.slave_destroy		= ata_scsi_slave_destroy,
293 	.bios_param		= ata_std_bios_param,
294 };
295 
296 /*
297  *	Port operations for PIO only ALi
298  */
299 
300 static struct ata_port_operations ali_early_port_ops = {
301 	.port_disable	= ata_port_disable,
302 	.set_piomode	= ali_set_piomode,
303 	.tf_load	= ata_tf_load,
304 	.tf_read	= ata_tf_read,
305 	.check_status 	= ata_check_status,
306 	.exec_command	= ata_exec_command,
307 	.dev_select 	= ata_std_dev_select,
308 
309 	.freeze		= ata_bmdma_freeze,
310 	.thaw		= ata_bmdma_thaw,
311 	.error_handler	= ata_bmdma_error_handler,
312 	.post_internal_cmd = ata_bmdma_post_internal_cmd,
313 	.cable_detect	= ata_cable_40wire,
314 
315 	.qc_prep 	= ata_qc_prep,
316 	.qc_issue	= ata_qc_issue_prot,
317 
318 	.data_xfer	= ata_data_xfer,
319 
320 	.irq_handler	= ata_interrupt,
321 	.irq_clear	= ata_bmdma_irq_clear,
322 	.irq_on		= ata_irq_on,
323 	.irq_ack	= ata_irq_ack,
324 
325 	.port_start	= ata_port_start,
326 };
327 
328 /*
329  *	Port operations for DMA capable ALi without cable
330  *	detect
331  */
332 static struct ata_port_operations ali_20_port_ops = {
333 	.port_disable	= ata_port_disable,
334 
335 	.set_piomode	= ali_set_piomode,
336 	.set_dmamode	= ali_set_dmamode,
337 	.mode_filter	= ali_20_filter,
338 
339 	.tf_load	= ata_tf_load,
340 	.tf_read	= ata_tf_read,
341 	.check_status 	= ata_check_status,
342 	.exec_command	= ata_exec_command,
343 	.dev_select 	= ata_std_dev_select,
344 	.dev_config	= ali_lock_sectors,
345 
346 	.freeze		= ata_bmdma_freeze,
347 	.thaw		= ata_bmdma_thaw,
348 	.error_handler	= ata_bmdma_error_handler,
349 	.post_internal_cmd = ata_bmdma_post_internal_cmd,
350 	.cable_detect	= ata_cable_40wire,
351 
352 	.bmdma_setup 	= ata_bmdma_setup,
353 	.bmdma_start 	= ata_bmdma_start,
354 	.bmdma_stop	= ata_bmdma_stop,
355 	.bmdma_status 	= ata_bmdma_status,
356 
357 	.qc_prep 	= ata_qc_prep,
358 	.qc_issue	= ata_qc_issue_prot,
359 
360 	.data_xfer	= ata_data_xfer,
361 
362 	.irq_handler	= ata_interrupt,
363 	.irq_clear	= ata_bmdma_irq_clear,
364 	.irq_on		= ata_irq_on,
365 	.irq_ack	= ata_irq_ack,
366 
367 	.port_start	= ata_port_start,
368 };
369 
370 /*
371  *	Port operations for DMA capable ALi with cable detect
372  */
373 static struct ata_port_operations ali_c2_port_ops = {
374 	.port_disable	= ata_port_disable,
375 	.set_piomode	= ali_set_piomode,
376 	.set_dmamode	= ali_set_dmamode,
377 	.mode_filter	= ata_pci_default_filter,
378 	.tf_load	= ata_tf_load,
379 	.tf_read	= ata_tf_read,
380 	.check_status 	= ata_check_status,
381 	.exec_command	= ata_exec_command,
382 	.dev_select 	= ata_std_dev_select,
383 	.dev_config	= ali_lock_sectors,
384 
385 	.freeze		= ata_bmdma_freeze,
386 	.thaw		= ata_bmdma_thaw,
387 	.error_handler	= ata_bmdma_error_handler,
388 	.post_internal_cmd = ata_bmdma_post_internal_cmd,
389 	.cable_detect	= ali_c2_cable_detect,
390 
391 	.bmdma_setup 	= ata_bmdma_setup,
392 	.bmdma_start 	= ata_bmdma_start,
393 	.bmdma_stop	= ata_bmdma_stop,
394 	.bmdma_status 	= ata_bmdma_status,
395 
396 	.qc_prep 	= ata_qc_prep,
397 	.qc_issue	= ata_qc_issue_prot,
398 
399 	.data_xfer	= ata_data_xfer,
400 
401 	.irq_handler	= ata_interrupt,
402 	.irq_clear	= ata_bmdma_irq_clear,
403 	.irq_on		= ata_irq_on,
404 	.irq_ack	= ata_irq_ack,
405 
406 	.port_start	= ata_port_start,
407 };
408 
409 /*
410  *	Port operations for DMA capable ALi with cable detect and LBA48
411  */
412 static struct ata_port_operations ali_c5_port_ops = {
413 	.port_disable	= ata_port_disable,
414 	.set_piomode	= ali_set_piomode,
415 	.set_dmamode	= ali_set_dmamode,
416 	.mode_filter	= ata_pci_default_filter,
417 	.tf_load	= ata_tf_load,
418 	.tf_read	= ata_tf_read,
419 	.check_status 	= ata_check_status,
420 	.exec_command	= ata_exec_command,
421 	.dev_select 	= ata_std_dev_select,
422 
423 	.freeze		= ata_bmdma_freeze,
424 	.thaw		= ata_bmdma_thaw,
425 	.error_handler	= ata_bmdma_error_handler,
426 	.post_internal_cmd = ata_bmdma_post_internal_cmd,
427 	.cable_detect	= ali_c2_cable_detect,
428 
429 	.bmdma_setup 	= ata_bmdma_setup,
430 	.bmdma_start 	= ata_bmdma_start,
431 	.bmdma_stop	= ata_bmdma_stop,
432 	.bmdma_status 	= ata_bmdma_status,
433 
434 	.qc_prep 	= ata_qc_prep,
435 	.qc_issue	= ata_qc_issue_prot,
436 
437 	.data_xfer	= ata_data_xfer,
438 
439 	.irq_handler	= ata_interrupt,
440 	.irq_clear	= ata_bmdma_irq_clear,
441 	.irq_on		= ata_irq_on,
442 	.irq_ack	= ata_irq_ack,
443 
444 	.port_start	= ata_port_start,
445 };
446 
447 
448 /**
449  *	ali_init_chipset	-	chip setup function
450  *	@pdev: PCI device of ATA controller
451  *
452  *	Perform the setup on the device that must be done both at boot
453  *	and at resume time.
454  */
455 
456 static void ali_init_chipset(struct pci_dev *pdev)
457 {
458 	u8 tmp;
459 	struct pci_dev *north, *isa_bridge;
460 
461 	/*
462 	 * The chipset revision selects the driver operations and
463 	 * mode data.
464 	 */
465 
466 	if (pdev->revision >= 0x20 && pdev->revision < 0xC2) {
467 		/* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
468 		pci_read_config_byte(pdev, 0x4B, &tmp);
469 		/* Clear CD-ROM DMA write bit */
470 		tmp &= 0x7F;
471 		pci_write_config_byte(pdev, 0x4B, tmp);
472 	} else if (pdev->revision >= 0xC2) {
473 		/* Enable cable detection logic */
474 		pci_read_config_byte(pdev, 0x4B, &tmp);
475 		pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
476 	}
477 	north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
478 	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
479 
480 	if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) {
481 		/* Configure the ALi bridge logic. For non ALi rely on BIOS.
482 		   Set the south bridge enable bit */
483 		pci_read_config_byte(isa_bridge, 0x79, &tmp);
484 		if (pdev->revision == 0xC2)
485 			pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04);
486 		else if (pdev->revision > 0xC2 && pdev->revision < 0xC5)
487 			pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02);
488 	}
489 	if (pdev->revision >= 0x20) {
490 		/*
491 		 * CD_ROM DMA on (0x53 bit 0). Enable this even if we want
492 		 * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
493 		 * via 0x54/55.
494 		 */
495 		pci_read_config_byte(pdev, 0x53, &tmp);
496 		if (pdev->revision <= 0x20)
497 			tmp &= ~0x02;
498 		if (pdev->revision >= 0xc7)
499 			tmp |= 0x03;
500 		else
501 			tmp |= 0x01;	/* CD_ROM enable for DMA */
502 		pci_write_config_byte(pdev, 0x53, tmp);
503 	}
504 	pci_dev_put(isa_bridge);
505 	pci_dev_put(north);
506 	ata_pci_clear_simplex(pdev);
507 }
508 /**
509  *	ali_init_one		-	discovery callback
510  *	@pdev: PCI device ID
511  *	@id: PCI table info
512  *
513  *	An ALi IDE interface has been discovered. Figure out what revision
514  *	and perform configuration work before handing it to the ATA layer
515  */
516 
517 static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
518 {
519 	static const struct ata_port_info info_early = {
520 		.sht = &ali_sht,
521 		.flags = ATA_FLAG_SLAVE_POSS,
522 		.pio_mask = 0x1f,
523 		.port_ops = &ali_early_port_ops
524 	};
525 	/* Revision 0x20 added DMA */
526 	static const struct ata_port_info info_20 = {
527 		.sht = &ali_sht,
528 		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
529 		.pio_mask = 0x1f,
530 		.mwdma_mask = 0x07,
531 		.port_ops = &ali_20_port_ops
532 	};
533 	/* Revision 0x20 with support logic added UDMA */
534 	static const struct ata_port_info info_20_udma = {
535 		.sht = &ali_sht,
536 		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
537 		.pio_mask = 0x1f,
538 		.mwdma_mask = 0x07,
539 		.udma_mask = 0x07,	/* UDMA33 */
540 		.port_ops = &ali_20_port_ops
541 	};
542 	/* Revision 0xC2 adds UDMA66 */
543 	static const struct ata_port_info info_c2 = {
544 		.sht = &ali_sht,
545 		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
546 		.pio_mask = 0x1f,
547 		.mwdma_mask = 0x07,
548 		.udma_mask = ATA_UDMA4,
549 		.port_ops = &ali_c2_port_ops
550 	};
551 	/* Revision 0xC3 is UDMA66 for now */
552 	static const struct ata_port_info info_c3 = {
553 		.sht = &ali_sht,
554 		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
555 		.pio_mask = 0x1f,
556 		.mwdma_mask = 0x07,
557 		.udma_mask = ATA_UDMA4,
558 		.port_ops = &ali_c2_port_ops
559 	};
560 	/* Revision 0xC4 is UDMA100 */
561 	static const struct ata_port_info info_c4 = {
562 		.sht = &ali_sht,
563 		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48,
564 		.pio_mask = 0x1f,
565 		.mwdma_mask = 0x07,
566 		.udma_mask = ATA_UDMA5,
567 		.port_ops = &ali_c2_port_ops
568 	};
569 	/* Revision 0xC5 is UDMA133 with LBA48 DMA */
570 	static const struct ata_port_info info_c5 = {
571 		.sht = &ali_sht,
572 		.flags = ATA_FLAG_SLAVE_POSS,
573 		.pio_mask = 0x1f,
574 		.mwdma_mask = 0x07,
575 		.udma_mask = ATA_UDMA6,
576 		.port_ops = &ali_c5_port_ops
577 	};
578 
579 	const struct ata_port_info *ppi[] = { NULL, NULL };
580 	u8 tmp;
581 	struct pci_dev *isa_bridge;
582 
583 	/*
584 	 * The chipset revision selects the driver operations and
585 	 * mode data.
586 	 */
587 
588 	if (pdev->revision < 0x20) {
589 		ppi[0] = &info_early;
590 	} else if (pdev->revision < 0xC2) {
591         	ppi[0] = &info_20;
592 	} else if (pdev->revision == 0xC2) {
593         	ppi[0] = &info_c2;
594 	} else if (pdev->revision == 0xC3) {
595         	ppi[0] = &info_c3;
596 	} else if (pdev->revision == 0xC4) {
597         	ppi[0] = &info_c4;
598 	} else
599         	ppi[0] = &info_c5;
600 
601 	ali_init_chipset(pdev);
602 
603 	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
604 	if (isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) {
605 		/* Are we paired with a UDMA capable chip */
606 		pci_read_config_byte(isa_bridge, 0x5E, &tmp);
607 		if ((tmp & 0x1E) == 0x12)
608 	        	ppi[0] = &info_20_udma;
609 		pci_dev_put(isa_bridge);
610 	}
611 	return ata_pci_init_one(pdev, ppi);
612 }
613 
614 #ifdef CONFIG_PM
615 static int ali_reinit_one(struct pci_dev *pdev)
616 {
617 	ali_init_chipset(pdev);
618 	return ata_pci_device_resume(pdev);
619 }
620 #endif
621 
622 static const struct pci_device_id ali[] = {
623 	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
624 	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },
625 
626 	{ },
627 };
628 
629 static struct pci_driver ali_pci_driver = {
630 	.name 		= DRV_NAME,
631 	.id_table	= ali,
632 	.probe 		= ali_init_one,
633 	.remove		= ata_pci_remove_one,
634 #ifdef CONFIG_PM
635 	.suspend	= ata_pci_device_suspend,
636 	.resume		= ali_reinit_one,
637 #endif
638 };
639 
640 static int __init ali_init(void)
641 {
642 	return pci_register_driver(&ali_pci_driver);
643 }
644 
645 
646 static void __exit ali_exit(void)
647 {
648 	pci_unregister_driver(&ali_pci_driver);
649 }
650 
651 
652 MODULE_AUTHOR("Alan Cox");
653 MODULE_DESCRIPTION("low-level driver for ALi PATA");
654 MODULE_LICENSE("GPL");
655 MODULE_DEVICE_TABLE(pci, ali);
656 MODULE_VERSION(DRV_VERSION);
657 
658 module_init(ali_init);
659 module_exit(ali_exit);
660