1 /* 2 * pata_ali.c - ALI 15x3 PATA for new ATA layer 3 * (C) 2005 Red Hat Inc 4 * 5 * based in part upon 6 * linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02 7 * 8 * Copyright (C) 1998-2000 Michel Aubry, Maintainer 9 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer 10 * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer 11 * 12 * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) 13 * May be copied or modified under the terms of the GNU General Public License 14 * Copyright (C) 2002 Alan Cox <alan@redhat.com> 15 * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> 16 * 17 * Documentation 18 * Chipset documentation available under NDA only 19 * 20 * TODO/CHECK 21 * Cannot have ATAPI on both master & slave for rev < c2 (???) but 22 * otherwise should do atapi DMA. 23 */ 24 25 #include <linux/kernel.h> 26 #include <linux/module.h> 27 #include <linux/pci.h> 28 #include <linux/init.h> 29 #include <linux/blkdev.h> 30 #include <linux/delay.h> 31 #include <scsi/scsi_host.h> 32 #include <linux/libata.h> 33 #include <linux/dmi.h> 34 35 #define DRV_NAME "pata_ali" 36 #define DRV_VERSION "0.7.5" 37 38 static int ali_atapi_dma = 0; 39 module_param_named(atapi_dma, ali_atapi_dma, int, 0644); 40 MODULE_PARM_DESC(atapi_dma, "Enable ATAPI DMA (0=disable, 1=enable)"); 41 42 /* 43 * Cable special cases 44 */ 45 46 static const struct dmi_system_id cable_dmi_table[] = { 47 { 48 .ident = "HP Pavilion N5430", 49 .matches = { 50 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 51 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), 52 }, 53 }, 54 { 55 .ident = "Toshiba Satelite S1800-814", 56 .matches = { 57 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 58 DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), 59 }, 60 }, 61 { } 62 }; 63 64 static int ali_cable_override(struct pci_dev *pdev) 65 { 66 /* Fujitsu P2000 */ 67 if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF) 68 return 1; 69 /* Mitac 8317 (Winbook-A) and relatives */ 70 if (pdev->subsystem_vendor == 0x1071 && pdev->subsystem_device == 0x8317) 71 return 1; 72 /* Systems by DMI */ 73 if (dmi_check_system(cable_dmi_table)) 74 return 1; 75 return 0; 76 } 77 78 /** 79 * ali_c2_cable_detect - cable detection 80 * @ap: ATA port 81 * 82 * Perform cable detection for C2 and later revisions 83 */ 84 85 static int ali_c2_cable_detect(struct ata_port *ap) 86 { 87 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 88 u8 ata66; 89 90 /* Certain laptops use short but suitable cables and don't 91 implement the detect logic */ 92 93 if (ali_cable_override(pdev)) 94 return ATA_CBL_PATA40_SHORT; 95 96 /* Host view cable detect 0x4A bit 0 primary bit 1 secondary 97 Bit set for 40 pin */ 98 pci_read_config_byte(pdev, 0x4A, &ata66); 99 if (ata66 & (1 << ap->port_no)) 100 return ATA_CBL_PATA40; 101 else 102 return ATA_CBL_PATA80; 103 } 104 105 /** 106 * ali_20_filter - filter for earlier ALI DMA 107 * @ap: ALi ATA port 108 * @adev: attached device 109 * 110 * Ensure that we do not do DMA on CD devices. We may be able to 111 * fix that later on. Also ensure we do not do UDMA on WDC drives 112 */ 113 114 static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask) 115 { 116 char model_num[ATA_ID_PROD_LEN + 1]; 117 /* No DMA on anything but a disk for now */ 118 if (adev->class != ATA_DEV_ATA) 119 mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 120 ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); 121 if (strstr(model_num, "WDC")) 122 return mask &= ~ATA_MASK_UDMA; 123 return ata_bmdma_mode_filter(adev, mask); 124 } 125 126 /** 127 * ali_fifo_control - FIFO manager 128 * @ap: ALi channel to control 129 * @adev: device for FIFO control 130 * @on: 0 for off 1 for on 131 * 132 * Enable or disable the FIFO on a given device. Because of the way the 133 * ALi FIFO works it provides a boost on ATA disk but can be confused by 134 * ATAPI and we must therefore manage it. 135 */ 136 137 static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on) 138 { 139 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 140 int pio_fifo = 0x54 + ap->port_no; 141 u8 fifo; 142 int shift = 4 * adev->devno; 143 144 /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to 145 0x00. Not all the docs agree but the behaviour we now use is the 146 one stated in the BIOS Programming Guide */ 147 148 pci_read_config_byte(pdev, pio_fifo, &fifo); 149 fifo &= ~(0x0F << shift); 150 if (on) 151 fifo |= (on << shift); 152 pci_write_config_byte(pdev, pio_fifo, fifo); 153 } 154 155 /** 156 * ali_program_modes - load mode registers 157 * @ap: ALi channel to load 158 * @adev: Device the timing is for 159 * @cmd: Command timing 160 * @data: Data timing 161 * @ultra: UDMA timing or zero for off 162 * 163 * Loads the timing registers for cmd/data and disable UDMA if 164 * ultra is zero. If ultra is set then load and enable the UDMA 165 * timing but do not touch the command/data timing. 166 */ 167 168 static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra) 169 { 170 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 171 int cas = 0x58 + 4 * ap->port_no; /* Command timing */ 172 int cbt = 0x59 + 4 * ap->port_no; /* Command timing */ 173 int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */ 174 int udmat = 0x56 + ap->port_no; /* UDMA timing */ 175 int shift = 4 * adev->devno; 176 u8 udma; 177 178 if (t != NULL) { 179 t->setup = clamp_val(t->setup, 1, 8) & 7; 180 t->act8b = clamp_val(t->act8b, 1, 8) & 7; 181 t->rec8b = clamp_val(t->rec8b, 1, 16) & 15; 182 t->active = clamp_val(t->active, 1, 8) & 7; 183 t->recover = clamp_val(t->recover, 1, 16) & 15; 184 185 pci_write_config_byte(pdev, cas, t->setup); 186 pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b); 187 pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover); 188 } 189 190 /* Set up the UDMA enable */ 191 pci_read_config_byte(pdev, udmat, &udma); 192 udma &= ~(0x0F << shift); 193 udma |= ultra << shift; 194 pci_write_config_byte(pdev, udmat, udma); 195 } 196 197 /** 198 * ali_set_piomode - set initial PIO mode data 199 * @ap: ATA interface 200 * @adev: ATA device 201 * 202 * Program the ALi registers for PIO mode. FIXME: add timings for 203 * PIO5. 204 */ 205 206 static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev) 207 { 208 struct ata_device *pair = ata_dev_pair(adev); 209 struct ata_timing t; 210 unsigned long T = 1000000000 / 33333; /* PCI clock based */ 211 212 ata_timing_compute(adev, adev->pio_mode, &t, T, 1); 213 if (pair) { 214 struct ata_timing p; 215 ata_timing_compute(pair, pair->pio_mode, &p, T, 1); 216 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); 217 if (pair->dma_mode) { 218 ata_timing_compute(pair, pair->dma_mode, &p, T, 1); 219 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); 220 } 221 } 222 223 /* PIO FIFO is only permitted on ATA disk */ 224 if (adev->class != ATA_DEV_ATA) 225 ali_fifo_control(ap, adev, 0x00); 226 ali_program_modes(ap, adev, &t, 0); 227 if (adev->class == ATA_DEV_ATA) 228 ali_fifo_control(ap, adev, 0x05); 229 230 } 231 232 /** 233 * ali_set_dmamode - set initial DMA mode data 234 * @ap: ATA interface 235 * @adev: ATA device 236 * 237 * FIXME: MWDMA timings 238 */ 239 240 static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev) 241 { 242 static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD }; 243 struct ata_device *pair = ata_dev_pair(adev); 244 struct ata_timing t; 245 unsigned long T = 1000000000 / 33333; /* PCI clock based */ 246 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 247 248 249 if (adev->class == ATA_DEV_ATA) 250 ali_fifo_control(ap, adev, 0x08); 251 252 if (adev->dma_mode >= XFER_UDMA_0) { 253 ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]); 254 if (adev->dma_mode >= XFER_UDMA_3) { 255 u8 reg4b; 256 pci_read_config_byte(pdev, 0x4B, ®4b); 257 reg4b |= 1; 258 pci_write_config_byte(pdev, 0x4B, reg4b); 259 } 260 } else { 261 ata_timing_compute(adev, adev->dma_mode, &t, T, 1); 262 if (pair) { 263 struct ata_timing p; 264 ata_timing_compute(pair, pair->pio_mode, &p, T, 1); 265 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); 266 if (pair->dma_mode) { 267 ata_timing_compute(pair, pair->dma_mode, &p, T, 1); 268 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); 269 } 270 } 271 ali_program_modes(ap, adev, &t, 0); 272 } 273 } 274 275 /** 276 * ali_warn_atapi_dma - Warn about ATAPI DMA disablement 277 * @adev: Device 278 * 279 * Whine about ATAPI DMA disablement if @adev is an ATAPI device. 280 * Can be used as ->dev_config. 281 */ 282 283 static void ali_warn_atapi_dma(struct ata_device *adev) 284 { 285 struct ata_eh_context *ehc = &adev->link->eh_context; 286 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; 287 288 if (print_info && adev->class == ATA_DEV_ATAPI && !ali_atapi_dma) { 289 ata_dev_printk(adev, KERN_WARNING, 290 "WARNING: ATAPI DMA disabled for reliablity issues. It can be enabled\n"); 291 ata_dev_printk(adev, KERN_WARNING, 292 "WARNING: via pata_ali.atapi_dma modparam or corresponding sysfs node.\n"); 293 } 294 } 295 296 /** 297 * ali_lock_sectors - Keep older devices to 255 sector mode 298 * @adev: Device 299 * 300 * Called during the bus probe for each device that is found. We use 301 * this call to lock the sector count of the device to 255 or less on 302 * older ALi controllers. If we didn't do this then large I/O's would 303 * require LBA48 commands which the older ALi requires are issued by 304 * slower PIO methods 305 */ 306 307 static void ali_lock_sectors(struct ata_device *adev) 308 { 309 adev->max_sectors = 255; 310 ali_warn_atapi_dma(adev); 311 } 312 313 /** 314 * ali_check_atapi_dma - DMA check for most ALi controllers 315 * @adev: Device 316 * 317 * Called to decide whether commands should be sent by DMA or PIO 318 */ 319 320 static int ali_check_atapi_dma(struct ata_queued_cmd *qc) 321 { 322 if (!ali_atapi_dma) { 323 /* FIXME: pata_ali can't do ATAPI DMA reliably but the 324 * IDE alim15x3 driver can. I tried lots of things 325 * but couldn't find what the actual difference was. 326 * If you got an idea, please write it to 327 * linux-ide@vger.kernel.org and cc htejun@gmail.com. 328 * 329 * Disable ATAPI DMA for now. 330 */ 331 return -EOPNOTSUPP; 332 } 333 334 /* If its not a media command, its not worth it */ 335 if (atapi_cmd_type(qc->cdb[0]) == ATAPI_MISC) 336 return -EOPNOTSUPP; 337 return 0; 338 } 339 340 static struct scsi_host_template ali_sht = { 341 ATA_BMDMA_SHT(DRV_NAME), 342 }; 343 344 /* 345 * Port operations for PIO only ALi 346 */ 347 348 static struct ata_port_operations ali_early_port_ops = { 349 .inherits = &ata_sff_port_ops, 350 .cable_detect = ata_cable_40wire, 351 .set_piomode = ali_set_piomode, 352 }; 353 354 static const struct ata_port_operations ali_dma_base_ops = { 355 .inherits = &ata_bmdma_port_ops, 356 .set_piomode = ali_set_piomode, 357 .set_dmamode = ali_set_dmamode, 358 }; 359 360 /* 361 * Port operations for DMA capable ALi without cable 362 * detect 363 */ 364 static struct ata_port_operations ali_20_port_ops = { 365 .inherits = &ali_dma_base_ops, 366 .cable_detect = ata_cable_40wire, 367 .mode_filter = ali_20_filter, 368 .check_atapi_dma = ali_check_atapi_dma, 369 .dev_config = ali_lock_sectors, 370 }; 371 372 /* 373 * Port operations for DMA capable ALi with cable detect 374 */ 375 static struct ata_port_operations ali_c2_port_ops = { 376 .inherits = &ali_dma_base_ops, 377 .check_atapi_dma = ali_check_atapi_dma, 378 .cable_detect = ali_c2_cable_detect, 379 .dev_config = ali_lock_sectors, 380 }; 381 382 /* 383 * Port operations for DMA capable ALi with cable detect and LBA48 384 */ 385 static struct ata_port_operations ali_c5_port_ops = { 386 .inherits = &ali_dma_base_ops, 387 .check_atapi_dma = ali_check_atapi_dma, 388 .dev_config = ali_warn_atapi_dma, 389 .cable_detect = ali_c2_cable_detect, 390 }; 391 392 393 /** 394 * ali_init_chipset - chip setup function 395 * @pdev: PCI device of ATA controller 396 * 397 * Perform the setup on the device that must be done both at boot 398 * and at resume time. 399 */ 400 401 static void ali_init_chipset(struct pci_dev *pdev) 402 { 403 u8 tmp; 404 struct pci_dev *north, *isa_bridge; 405 406 /* 407 * The chipset revision selects the driver operations and 408 * mode data. 409 */ 410 411 if (pdev->revision >= 0x20 && pdev->revision < 0xC2) { 412 /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */ 413 pci_read_config_byte(pdev, 0x4B, &tmp); 414 /* Clear CD-ROM DMA write bit */ 415 tmp &= 0x7F; 416 pci_write_config_byte(pdev, 0x4B, tmp); 417 } else if (pdev->revision >= 0xC2) { 418 /* Enable cable detection logic */ 419 pci_read_config_byte(pdev, 0x4B, &tmp); 420 pci_write_config_byte(pdev, 0x4B, tmp | 0x08); 421 } 422 north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0)); 423 isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); 424 425 if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) { 426 /* Configure the ALi bridge logic. For non ALi rely on BIOS. 427 Set the south bridge enable bit */ 428 pci_read_config_byte(isa_bridge, 0x79, &tmp); 429 if (pdev->revision == 0xC2) 430 pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04); 431 else if (pdev->revision > 0xC2 && pdev->revision < 0xC5) 432 pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02); 433 } 434 if (pdev->revision >= 0x20) { 435 /* 436 * CD_ROM DMA on (0x53 bit 0). Enable this even if we want 437 * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control 438 * via 0x54/55. 439 */ 440 pci_read_config_byte(pdev, 0x53, &tmp); 441 if (pdev->revision <= 0x20) 442 tmp &= ~0x02; 443 if (pdev->revision >= 0xc7) 444 tmp |= 0x03; 445 else 446 tmp |= 0x01; /* CD_ROM enable for DMA */ 447 pci_write_config_byte(pdev, 0x53, tmp); 448 } 449 pci_dev_put(isa_bridge); 450 pci_dev_put(north); 451 ata_pci_bmdma_clear_simplex(pdev); 452 } 453 /** 454 * ali_init_one - discovery callback 455 * @pdev: PCI device ID 456 * @id: PCI table info 457 * 458 * An ALi IDE interface has been discovered. Figure out what revision 459 * and perform configuration work before handing it to the ATA layer 460 */ 461 462 static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 463 { 464 static const struct ata_port_info info_early = { 465 .flags = ATA_FLAG_SLAVE_POSS, 466 .pio_mask = 0x1f, 467 .port_ops = &ali_early_port_ops 468 }; 469 /* Revision 0x20 added DMA */ 470 static const struct ata_port_info info_20 = { 471 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 472 .pio_mask = 0x1f, 473 .mwdma_mask = 0x07, 474 .port_ops = &ali_20_port_ops 475 }; 476 /* Revision 0x20 with support logic added UDMA */ 477 static const struct ata_port_info info_20_udma = { 478 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 479 .pio_mask = 0x1f, 480 .mwdma_mask = 0x07, 481 .udma_mask = 0x07, /* UDMA33 */ 482 .port_ops = &ali_20_port_ops 483 }; 484 /* Revision 0xC2 adds UDMA66 */ 485 static const struct ata_port_info info_c2 = { 486 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 487 .pio_mask = 0x1f, 488 .mwdma_mask = 0x07, 489 .udma_mask = ATA_UDMA4, 490 .port_ops = &ali_c2_port_ops 491 }; 492 /* Revision 0xC3 is UDMA66 for now */ 493 static const struct ata_port_info info_c3 = { 494 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 495 .pio_mask = 0x1f, 496 .mwdma_mask = 0x07, 497 .udma_mask = ATA_UDMA4, 498 .port_ops = &ali_c2_port_ops 499 }; 500 /* Revision 0xC4 is UDMA100 */ 501 static const struct ata_port_info info_c4 = { 502 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 503 .pio_mask = 0x1f, 504 .mwdma_mask = 0x07, 505 .udma_mask = ATA_UDMA5, 506 .port_ops = &ali_c2_port_ops 507 }; 508 /* Revision 0xC5 is UDMA133 with LBA48 DMA */ 509 static const struct ata_port_info info_c5 = { 510 .flags = ATA_FLAG_SLAVE_POSS, 511 .pio_mask = 0x1f, 512 .mwdma_mask = 0x07, 513 .udma_mask = ATA_UDMA6, 514 .port_ops = &ali_c5_port_ops 515 }; 516 517 const struct ata_port_info *ppi[] = { NULL, NULL }; 518 u8 tmp; 519 struct pci_dev *isa_bridge; 520 int rc; 521 522 rc = pcim_enable_device(pdev); 523 if (rc) 524 return rc; 525 526 /* 527 * The chipset revision selects the driver operations and 528 * mode data. 529 */ 530 531 if (pdev->revision < 0x20) { 532 ppi[0] = &info_early; 533 } else if (pdev->revision < 0xC2) { 534 ppi[0] = &info_20; 535 } else if (pdev->revision == 0xC2) { 536 ppi[0] = &info_c2; 537 } else if (pdev->revision == 0xC3) { 538 ppi[0] = &info_c3; 539 } else if (pdev->revision == 0xC4) { 540 ppi[0] = &info_c4; 541 } else 542 ppi[0] = &info_c5; 543 544 ali_init_chipset(pdev); 545 546 isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); 547 if (isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) { 548 /* Are we paired with a UDMA capable chip */ 549 pci_read_config_byte(isa_bridge, 0x5E, &tmp); 550 if ((tmp & 0x1E) == 0x12) 551 ppi[0] = &info_20_udma; 552 } 553 pci_dev_put(isa_bridge); 554 555 return ata_pci_sff_init_one(pdev, ppi, &ali_sht, NULL); 556 } 557 558 #ifdef CONFIG_PM 559 static int ali_reinit_one(struct pci_dev *pdev) 560 { 561 struct ata_host *host = dev_get_drvdata(&pdev->dev); 562 int rc; 563 564 rc = ata_pci_device_do_resume(pdev); 565 if (rc) 566 return rc; 567 ali_init_chipset(pdev); 568 ata_host_resume(host); 569 return 0; 570 } 571 #endif 572 573 static const struct pci_device_id ali[] = { 574 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), }, 575 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), }, 576 577 { }, 578 }; 579 580 static struct pci_driver ali_pci_driver = { 581 .name = DRV_NAME, 582 .id_table = ali, 583 .probe = ali_init_one, 584 .remove = ata_pci_remove_one, 585 #ifdef CONFIG_PM 586 .suspend = ata_pci_device_suspend, 587 .resume = ali_reinit_one, 588 #endif 589 }; 590 591 static int __init ali_init(void) 592 { 593 return pci_register_driver(&ali_pci_driver); 594 } 595 596 597 static void __exit ali_exit(void) 598 { 599 pci_unregister_driver(&ali_pci_driver); 600 } 601 602 603 MODULE_AUTHOR("Alan Cox"); 604 MODULE_DESCRIPTION("low-level driver for ALi PATA"); 605 MODULE_LICENSE("GPL"); 606 MODULE_DEVICE_TABLE(pci, ali); 607 MODULE_VERSION(DRV_VERSION); 608 609 module_init(ali_init); 610 module_exit(ali_exit); 611