1 /* 2 * pata_ali.c - ALI 15x3 PATA for new ATA layer 3 * (C) 2005 Red Hat Inc 4 * Alan Cox <alan@redhat.com> 5 * 6 * based in part upon 7 * linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02 8 * 9 * Copyright (C) 1998-2000 Michel Aubry, Maintainer 10 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer 11 * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer 12 * 13 * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) 14 * May be copied or modified under the terms of the GNU General Public License 15 * Copyright (C) 2002 Alan Cox <alan@redhat.com> 16 * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> 17 * 18 * Documentation 19 * Chipset documentation available under NDA only 20 * 21 * TODO/CHECK 22 * Cannot have ATAPI on both master & slave for rev < c2 (???) but 23 * otherwise should do atapi DMA. 24 */ 25 26 #include <linux/kernel.h> 27 #include <linux/module.h> 28 #include <linux/pci.h> 29 #include <linux/init.h> 30 #include <linux/blkdev.h> 31 #include <linux/delay.h> 32 #include <scsi/scsi_host.h> 33 #include <linux/libata.h> 34 #include <linux/dmi.h> 35 36 #define DRV_NAME "pata_ali" 37 #define DRV_VERSION "0.7.5" 38 39 static int ali_atapi_dma = 0; 40 module_param_named(atapi_dma, ali_atapi_dma, int, 0644); 41 MODULE_PARM_DESC(atapi_dma, "Enable ATAPI DMA (0=disable, 1=enable)"); 42 43 /* 44 * Cable special cases 45 */ 46 47 static const struct dmi_system_id cable_dmi_table[] = { 48 { 49 .ident = "HP Pavilion N5430", 50 .matches = { 51 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 52 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), 53 }, 54 }, 55 { 56 .ident = "Toshiba Satelite S1800-814", 57 .matches = { 58 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 59 DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), 60 }, 61 }, 62 { } 63 }; 64 65 static int ali_cable_override(struct pci_dev *pdev) 66 { 67 /* Fujitsu P2000 */ 68 if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF) 69 return 1; 70 /* Mitac 8317 (Winbook-A) and relatives */ 71 if (pdev->subsystem_vendor == 0x1071 && pdev->subsystem_device == 0x8317) 72 return 1; 73 /* Systems by DMI */ 74 if (dmi_check_system(cable_dmi_table)) 75 return 1; 76 return 0; 77 } 78 79 /** 80 * ali_c2_cable_detect - cable detection 81 * @ap: ATA port 82 * 83 * Perform cable detection for C2 and later revisions 84 */ 85 86 static int ali_c2_cable_detect(struct ata_port *ap) 87 { 88 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 89 u8 ata66; 90 91 /* Certain laptops use short but suitable cables and don't 92 implement the detect logic */ 93 94 if (ali_cable_override(pdev)) 95 return ATA_CBL_PATA40_SHORT; 96 97 /* Host view cable detect 0x4A bit 0 primary bit 1 secondary 98 Bit set for 40 pin */ 99 pci_read_config_byte(pdev, 0x4A, &ata66); 100 if (ata66 & (1 << ap->port_no)) 101 return ATA_CBL_PATA40; 102 else 103 return ATA_CBL_PATA80; 104 } 105 106 /** 107 * ali_20_filter - filter for earlier ALI DMA 108 * @ap: ALi ATA port 109 * @adev: attached device 110 * 111 * Ensure that we do not do DMA on CD devices. We may be able to 112 * fix that later on. Also ensure we do not do UDMA on WDC drives 113 */ 114 115 static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask) 116 { 117 char model_num[ATA_ID_PROD_LEN + 1]; 118 /* No DMA on anything but a disk for now */ 119 if (adev->class != ATA_DEV_ATA) 120 mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 121 ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); 122 if (strstr(model_num, "WDC")) 123 return mask &= ~ATA_MASK_UDMA; 124 return ata_bmdma_mode_filter(adev, mask); 125 } 126 127 /** 128 * ali_fifo_control - FIFO manager 129 * @ap: ALi channel to control 130 * @adev: device for FIFO control 131 * @on: 0 for off 1 for on 132 * 133 * Enable or disable the FIFO on a given device. Because of the way the 134 * ALi FIFO works it provides a boost on ATA disk but can be confused by 135 * ATAPI and we must therefore manage it. 136 */ 137 138 static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on) 139 { 140 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 141 int pio_fifo = 0x54 + ap->port_no; 142 u8 fifo; 143 int shift = 4 * adev->devno; 144 145 /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to 146 0x00. Not all the docs agree but the behaviour we now use is the 147 one stated in the BIOS Programming Guide */ 148 149 pci_read_config_byte(pdev, pio_fifo, &fifo); 150 fifo &= ~(0x0F << shift); 151 if (on) 152 fifo |= (on << shift); 153 pci_write_config_byte(pdev, pio_fifo, fifo); 154 } 155 156 /** 157 * ali_program_modes - load mode registers 158 * @ap: ALi channel to load 159 * @adev: Device the timing is for 160 * @cmd: Command timing 161 * @data: Data timing 162 * @ultra: UDMA timing or zero for off 163 * 164 * Loads the timing registers for cmd/data and disable UDMA if 165 * ultra is zero. If ultra is set then load and enable the UDMA 166 * timing but do not touch the command/data timing. 167 */ 168 169 static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra) 170 { 171 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 172 int cas = 0x58 + 4 * ap->port_no; /* Command timing */ 173 int cbt = 0x59 + 4 * ap->port_no; /* Command timing */ 174 int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */ 175 int udmat = 0x56 + ap->port_no; /* UDMA timing */ 176 int shift = 4 * adev->devno; 177 u8 udma; 178 179 if (t != NULL) { 180 t->setup = clamp_val(t->setup, 1, 8) & 7; 181 t->act8b = clamp_val(t->act8b, 1, 8) & 7; 182 t->rec8b = clamp_val(t->rec8b, 1, 16) & 15; 183 t->active = clamp_val(t->active, 1, 8) & 7; 184 t->recover = clamp_val(t->recover, 1, 16) & 15; 185 186 pci_write_config_byte(pdev, cas, t->setup); 187 pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b); 188 pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover); 189 } 190 191 /* Set up the UDMA enable */ 192 pci_read_config_byte(pdev, udmat, &udma); 193 udma &= ~(0x0F << shift); 194 udma |= ultra << shift; 195 pci_write_config_byte(pdev, udmat, udma); 196 } 197 198 /** 199 * ali_set_piomode - set initial PIO mode data 200 * @ap: ATA interface 201 * @adev: ATA device 202 * 203 * Program the ALi registers for PIO mode. FIXME: add timings for 204 * PIO5. 205 */ 206 207 static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev) 208 { 209 struct ata_device *pair = ata_dev_pair(adev); 210 struct ata_timing t; 211 unsigned long T = 1000000000 / 33333; /* PCI clock based */ 212 213 ata_timing_compute(adev, adev->pio_mode, &t, T, 1); 214 if (pair) { 215 struct ata_timing p; 216 ata_timing_compute(pair, pair->pio_mode, &p, T, 1); 217 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); 218 if (pair->dma_mode) { 219 ata_timing_compute(pair, pair->dma_mode, &p, T, 1); 220 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); 221 } 222 } 223 224 /* PIO FIFO is only permitted on ATA disk */ 225 if (adev->class != ATA_DEV_ATA) 226 ali_fifo_control(ap, adev, 0x00); 227 ali_program_modes(ap, adev, &t, 0); 228 if (adev->class == ATA_DEV_ATA) 229 ali_fifo_control(ap, adev, 0x05); 230 231 } 232 233 /** 234 * ali_set_dmamode - set initial DMA mode data 235 * @ap: ATA interface 236 * @adev: ATA device 237 * 238 * FIXME: MWDMA timings 239 */ 240 241 static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev) 242 { 243 static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD }; 244 struct ata_device *pair = ata_dev_pair(adev); 245 struct ata_timing t; 246 unsigned long T = 1000000000 / 33333; /* PCI clock based */ 247 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 248 249 250 if (adev->class == ATA_DEV_ATA) 251 ali_fifo_control(ap, adev, 0x08); 252 253 if (adev->dma_mode >= XFER_UDMA_0) { 254 ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]); 255 if (adev->dma_mode >= XFER_UDMA_3) { 256 u8 reg4b; 257 pci_read_config_byte(pdev, 0x4B, ®4b); 258 reg4b |= 1; 259 pci_write_config_byte(pdev, 0x4B, reg4b); 260 } 261 } else { 262 ata_timing_compute(adev, adev->dma_mode, &t, T, 1); 263 if (pair) { 264 struct ata_timing p; 265 ata_timing_compute(pair, pair->pio_mode, &p, T, 1); 266 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); 267 if (pair->dma_mode) { 268 ata_timing_compute(pair, pair->dma_mode, &p, T, 1); 269 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); 270 } 271 } 272 ali_program_modes(ap, adev, &t, 0); 273 } 274 } 275 276 /** 277 * ali_warn_atapi_dma - Warn about ATAPI DMA disablement 278 * @adev: Device 279 * 280 * Whine about ATAPI DMA disablement if @adev is an ATAPI device. 281 * Can be used as ->dev_config. 282 */ 283 284 static void ali_warn_atapi_dma(struct ata_device *adev) 285 { 286 struct ata_eh_context *ehc = &adev->link->eh_context; 287 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; 288 289 if (print_info && adev->class == ATA_DEV_ATAPI && !ali_atapi_dma) { 290 ata_dev_printk(adev, KERN_WARNING, 291 "WARNING: ATAPI DMA disabled for reliablity issues. It can be enabled\n"); 292 ata_dev_printk(adev, KERN_WARNING, 293 "WARNING: via pata_ali.atapi_dma modparam or corresponding sysfs node.\n"); 294 } 295 } 296 297 /** 298 * ali_lock_sectors - Keep older devices to 255 sector mode 299 * @adev: Device 300 * 301 * Called during the bus probe for each device that is found. We use 302 * this call to lock the sector count of the device to 255 or less on 303 * older ALi controllers. If we didn't do this then large I/O's would 304 * require LBA48 commands which the older ALi requires are issued by 305 * slower PIO methods 306 */ 307 308 static void ali_lock_sectors(struct ata_device *adev) 309 { 310 adev->max_sectors = 255; 311 ali_warn_atapi_dma(adev); 312 } 313 314 /** 315 * ali_check_atapi_dma - DMA check for most ALi controllers 316 * @adev: Device 317 * 318 * Called to decide whether commands should be sent by DMA or PIO 319 */ 320 321 static int ali_check_atapi_dma(struct ata_queued_cmd *qc) 322 { 323 if (!ali_atapi_dma) { 324 /* FIXME: pata_ali can't do ATAPI DMA reliably but the 325 * IDE alim15x3 driver can. I tried lots of things 326 * but couldn't find what the actual difference was. 327 * If you got an idea, please write it to 328 * linux-ide@vger.kernel.org and cc htejun@gmail.com. 329 * 330 * Disable ATAPI DMA for now. 331 */ 332 return -EOPNOTSUPP; 333 } 334 335 /* If its not a media command, its not worth it */ 336 if (atapi_cmd_type(qc->cdb[0]) == ATAPI_MISC) 337 return -EOPNOTSUPP; 338 return 0; 339 } 340 341 static struct scsi_host_template ali_sht = { 342 ATA_BMDMA_SHT(DRV_NAME), 343 }; 344 345 /* 346 * Port operations for PIO only ALi 347 */ 348 349 static struct ata_port_operations ali_early_port_ops = { 350 .inherits = &ata_sff_port_ops, 351 .cable_detect = ata_cable_40wire, 352 .set_piomode = ali_set_piomode, 353 }; 354 355 static const struct ata_port_operations ali_dma_base_ops = { 356 .inherits = &ata_bmdma_port_ops, 357 .set_piomode = ali_set_piomode, 358 .set_dmamode = ali_set_dmamode, 359 }; 360 361 /* 362 * Port operations for DMA capable ALi without cable 363 * detect 364 */ 365 static struct ata_port_operations ali_20_port_ops = { 366 .inherits = &ali_dma_base_ops, 367 .cable_detect = ata_cable_40wire, 368 .mode_filter = ali_20_filter, 369 .check_atapi_dma = ali_check_atapi_dma, 370 .dev_config = ali_lock_sectors, 371 }; 372 373 /* 374 * Port operations for DMA capable ALi with cable detect 375 */ 376 static struct ata_port_operations ali_c2_port_ops = { 377 .inherits = &ali_dma_base_ops, 378 .check_atapi_dma = ali_check_atapi_dma, 379 .cable_detect = ali_c2_cable_detect, 380 .dev_config = ali_lock_sectors, 381 }; 382 383 /* 384 * Port operations for DMA capable ALi with cable detect and LBA48 385 */ 386 static struct ata_port_operations ali_c5_port_ops = { 387 .inherits = &ali_dma_base_ops, 388 .check_atapi_dma = ali_check_atapi_dma, 389 .dev_config = ali_warn_atapi_dma, 390 .cable_detect = ali_c2_cable_detect, 391 }; 392 393 394 /** 395 * ali_init_chipset - chip setup function 396 * @pdev: PCI device of ATA controller 397 * 398 * Perform the setup on the device that must be done both at boot 399 * and at resume time. 400 */ 401 402 static void ali_init_chipset(struct pci_dev *pdev) 403 { 404 u8 tmp; 405 struct pci_dev *north, *isa_bridge; 406 407 /* 408 * The chipset revision selects the driver operations and 409 * mode data. 410 */ 411 412 if (pdev->revision >= 0x20 && pdev->revision < 0xC2) { 413 /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */ 414 pci_read_config_byte(pdev, 0x4B, &tmp); 415 /* Clear CD-ROM DMA write bit */ 416 tmp &= 0x7F; 417 pci_write_config_byte(pdev, 0x4B, tmp); 418 } else if (pdev->revision >= 0xC2) { 419 /* Enable cable detection logic */ 420 pci_read_config_byte(pdev, 0x4B, &tmp); 421 pci_write_config_byte(pdev, 0x4B, tmp | 0x08); 422 } 423 north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0)); 424 isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); 425 426 if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) { 427 /* Configure the ALi bridge logic. For non ALi rely on BIOS. 428 Set the south bridge enable bit */ 429 pci_read_config_byte(isa_bridge, 0x79, &tmp); 430 if (pdev->revision == 0xC2) 431 pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04); 432 else if (pdev->revision > 0xC2 && pdev->revision < 0xC5) 433 pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02); 434 } 435 if (pdev->revision >= 0x20) { 436 /* 437 * CD_ROM DMA on (0x53 bit 0). Enable this even if we want 438 * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control 439 * via 0x54/55. 440 */ 441 pci_read_config_byte(pdev, 0x53, &tmp); 442 if (pdev->revision <= 0x20) 443 tmp &= ~0x02; 444 if (pdev->revision >= 0xc7) 445 tmp |= 0x03; 446 else 447 tmp |= 0x01; /* CD_ROM enable for DMA */ 448 pci_write_config_byte(pdev, 0x53, tmp); 449 } 450 pci_dev_put(isa_bridge); 451 pci_dev_put(north); 452 ata_pci_bmdma_clear_simplex(pdev); 453 } 454 /** 455 * ali_init_one - discovery callback 456 * @pdev: PCI device ID 457 * @id: PCI table info 458 * 459 * An ALi IDE interface has been discovered. Figure out what revision 460 * and perform configuration work before handing it to the ATA layer 461 */ 462 463 static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 464 { 465 static const struct ata_port_info info_early = { 466 .flags = ATA_FLAG_SLAVE_POSS, 467 .pio_mask = 0x1f, 468 .port_ops = &ali_early_port_ops 469 }; 470 /* Revision 0x20 added DMA */ 471 static const struct ata_port_info info_20 = { 472 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 473 .pio_mask = 0x1f, 474 .mwdma_mask = 0x07, 475 .port_ops = &ali_20_port_ops 476 }; 477 /* Revision 0x20 with support logic added UDMA */ 478 static const struct ata_port_info info_20_udma = { 479 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 480 .pio_mask = 0x1f, 481 .mwdma_mask = 0x07, 482 .udma_mask = 0x07, /* UDMA33 */ 483 .port_ops = &ali_20_port_ops 484 }; 485 /* Revision 0xC2 adds UDMA66 */ 486 static const struct ata_port_info info_c2 = { 487 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 488 .pio_mask = 0x1f, 489 .mwdma_mask = 0x07, 490 .udma_mask = ATA_UDMA4, 491 .port_ops = &ali_c2_port_ops 492 }; 493 /* Revision 0xC3 is UDMA66 for now */ 494 static const struct ata_port_info info_c3 = { 495 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 496 .pio_mask = 0x1f, 497 .mwdma_mask = 0x07, 498 .udma_mask = ATA_UDMA4, 499 .port_ops = &ali_c2_port_ops 500 }; 501 /* Revision 0xC4 is UDMA100 */ 502 static const struct ata_port_info info_c4 = { 503 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, 504 .pio_mask = 0x1f, 505 .mwdma_mask = 0x07, 506 .udma_mask = ATA_UDMA5, 507 .port_ops = &ali_c2_port_ops 508 }; 509 /* Revision 0xC5 is UDMA133 with LBA48 DMA */ 510 static const struct ata_port_info info_c5 = { 511 .flags = ATA_FLAG_SLAVE_POSS, 512 .pio_mask = 0x1f, 513 .mwdma_mask = 0x07, 514 .udma_mask = ATA_UDMA6, 515 .port_ops = &ali_c5_port_ops 516 }; 517 518 const struct ata_port_info *ppi[] = { NULL, NULL }; 519 u8 tmp; 520 struct pci_dev *isa_bridge; 521 int rc; 522 523 rc = pcim_enable_device(pdev); 524 if (rc) 525 return rc; 526 527 /* 528 * The chipset revision selects the driver operations and 529 * mode data. 530 */ 531 532 if (pdev->revision < 0x20) { 533 ppi[0] = &info_early; 534 } else if (pdev->revision < 0xC2) { 535 ppi[0] = &info_20; 536 } else if (pdev->revision == 0xC2) { 537 ppi[0] = &info_c2; 538 } else if (pdev->revision == 0xC3) { 539 ppi[0] = &info_c3; 540 } else if (pdev->revision == 0xC4) { 541 ppi[0] = &info_c4; 542 } else 543 ppi[0] = &info_c5; 544 545 ali_init_chipset(pdev); 546 547 isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); 548 if (isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) { 549 /* Are we paired with a UDMA capable chip */ 550 pci_read_config_byte(isa_bridge, 0x5E, &tmp); 551 if ((tmp & 0x1E) == 0x12) 552 ppi[0] = &info_20_udma; 553 pci_dev_put(isa_bridge); 554 } 555 return ata_pci_sff_init_one(pdev, ppi, &ali_sht, NULL); 556 } 557 558 #ifdef CONFIG_PM 559 static int ali_reinit_one(struct pci_dev *pdev) 560 { 561 struct ata_host *host = dev_get_drvdata(&pdev->dev); 562 int rc; 563 564 rc = ata_pci_device_do_resume(pdev); 565 if (rc) 566 return rc; 567 ali_init_chipset(pdev); 568 ata_host_resume(host); 569 return 0; 570 } 571 #endif 572 573 static const struct pci_device_id ali[] = { 574 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), }, 575 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), }, 576 577 { }, 578 }; 579 580 static struct pci_driver ali_pci_driver = { 581 .name = DRV_NAME, 582 .id_table = ali, 583 .probe = ali_init_one, 584 .remove = ata_pci_remove_one, 585 #ifdef CONFIG_PM 586 .suspend = ata_pci_device_suspend, 587 .resume = ali_reinit_one, 588 #endif 589 }; 590 591 static int __init ali_init(void) 592 { 593 return pci_register_driver(&ali_pci_driver); 594 } 595 596 597 static void __exit ali_exit(void) 598 { 599 pci_unregister_driver(&ali_pci_driver); 600 } 601 602 603 MODULE_AUTHOR("Alan Cox"); 604 MODULE_DESCRIPTION("low-level driver for ALi PATA"); 605 MODULE_LICENSE("GPL"); 606 MODULE_DEVICE_TABLE(pci, ali); 607 MODULE_VERSION(DRV_VERSION); 608 609 module_init(ali_init); 610 module_exit(ali_exit); 611