xref: /openbmc/linux/drivers/ata/ata_generic.c (revision df2634f43f5106947f3735a0b61a6527a4b278cd)
1 /*
2  *  ata_generic.c - Generic PATA/SATA controller driver.
3  *  Copyright 2005 Red Hat Inc, all rights reserved.
4  *
5  *  Elements from ide/pci/generic.c
6  *	    Copyright (C) 2001-2002	Andre Hedrick <andre@linux-ide.org>
7  *	    Portions (C) Copyright 2002  Red Hat Inc <alan@redhat.com>
8  *
9  *  May be copied or modified under the terms of the GNU General Public License
10  *
11  *  Driver for PCI IDE interfaces implementing the standard bus mastering
12  *  interface functionality. This assumes the BIOS did the drive set up and
13  *  tuning for us. By default we do not grab all IDE class devices as they
14  *  may have other drivers or need fixups to avoid problems. Instead we keep
15  *  a default list of stuff without documentation/driver that appears to
16  *  work.
17  */
18 
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/pci.h>
22 #include <linux/init.h>
23 #include <linux/blkdev.h>
24 #include <linux/delay.h>
25 #include <scsi/scsi_host.h>
26 #include <linux/libata.h>
27 
28 #define DRV_NAME "ata_generic"
29 #define DRV_VERSION "0.2.15"
30 
31 /*
32  *	A generic parallel ATA driver using libata
33  */
34 
35 enum {
36 	ATA_GEN_CLASS_MATCH		= (1 << 0),
37 	ATA_GEN_FORCE_DMA		= (1 << 1),
38 	ATA_GEN_INTEL_IDER		= (1 << 2),
39 };
40 
41 /**
42  *	generic_set_mode	-	mode setting
43  *	@link: link to set up
44  *	@unused: returned device on error
45  *
46  *	Use a non standard set_mode function. We don't want to be tuned.
47  *	The BIOS configured everything. Our job is not to fiddle. We
48  *	read the dma enabled bits from the PCI configuration of the device
49  *	and respect them.
50  */
51 
52 static int generic_set_mode(struct ata_link *link, struct ata_device **unused)
53 {
54 	struct ata_port *ap = link->ap;
55 	const struct pci_device_id *id = ap->host->private_data;
56 	int dma_enabled = 0;
57 	struct ata_device *dev;
58 
59 	if (id->driver_data & ATA_GEN_FORCE_DMA) {
60 		dma_enabled = 0xff;
61 	} else if (ap->ioaddr.bmdma_addr) {
62 		/* Bits 5 and 6 indicate if DMA is active on master/slave */
63 		dma_enabled = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
64 	}
65 
66 	ata_for_each_dev(dev, link, ENABLED) {
67 		/* We don't really care */
68 		dev->pio_mode = XFER_PIO_0;
69 		dev->dma_mode = XFER_MW_DMA_0;
70 		/* We do need the right mode information for DMA or PIO
71 		   and this comes from the current configuration flags */
72 		if (dma_enabled & (1 << (5 + dev->devno))) {
73 			unsigned int xfer_mask = ata_id_xfermask(dev->id);
74 			const char *name;
75 
76 			if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
77 				name = ata_mode_string(xfer_mask);
78 			else {
79 				/* SWDMA perhaps? */
80 				name = "DMA";
81 				xfer_mask |= ata_xfer_mode2mask(XFER_MW_DMA_0);
82 			}
83 
84 			ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
85 				       name);
86 
87 			dev->xfer_mode = ata_xfer_mask2mode(xfer_mask);
88 			dev->xfer_shift = ata_xfer_mode2shift(dev->xfer_mode);
89 			dev->flags &= ~ATA_DFLAG_PIO;
90 		} else {
91 			ata_dev_printk(dev, KERN_INFO, "configured for PIO\n");
92 			dev->xfer_mode = XFER_PIO_0;
93 			dev->xfer_shift = ATA_SHIFT_PIO;
94 			dev->flags |= ATA_DFLAG_PIO;
95 		}
96 	}
97 	return 0;
98 }
99 
100 static struct scsi_host_template generic_sht = {
101 	ATA_BMDMA_SHT(DRV_NAME),
102 };
103 
104 static struct ata_port_operations generic_port_ops = {
105 	.inherits	= &ata_bmdma_port_ops,
106 	.cable_detect	= ata_cable_unknown,
107 	.set_mode	= generic_set_mode,
108 };
109 
110 static int all_generic_ide;		/* Set to claim all devices */
111 
112 /**
113  *	is_intel_ider		-	identify intel IDE-R devices
114  *	@dev: PCI device
115  *
116  *	Distinguish Intel IDE-R controller devices from other Intel IDE
117  *	devices. IDE-R devices have no timing registers and are in
118  *	most respects virtual. They should be driven by the ata_generic
119  *	driver.
120  *
121  *	IDE-R devices have PCI offset 0xF8.L as zero, later Intel ATA has
122  *	it non zero. All Intel ATA has 0x40 writable (timing), but it is
123  *	not writable on IDE-R devices (this is guaranteed).
124  */
125 
126 static int is_intel_ider(struct pci_dev *dev)
127 {
128 	/* For Intel IDE the value at 0xF8 is only zero on IDE-R
129 	   interfaces */
130 	u32 r;
131 	u16 t;
132 
133 	/* Check the manufacturing ID, it will be zero for IDE-R */
134 	pci_read_config_dword(dev, 0xF8, &r);
135 	/* Not IDE-R: punt so that ata_(old)piix gets it */
136 	if (r != 0)
137 		return 0;
138 	/* 0xF8 will also be zero on some early Intel IDE devices
139 	   but they will have a sane timing register */
140 	pci_read_config_word(dev, 0x40, &t);
141 	if (t != 0)
142 		return 0;
143 	/* Finally check if the timing register is writable so that
144 	   we eliminate any early devices hot-docked in a docking
145 	   station */
146 	pci_write_config_word(dev, 0x40, 1);
147 	pci_read_config_word(dev, 0x40, &t);
148 	if (t) {
149 		pci_write_config_word(dev, 0x40, 0);
150 		return 0;
151 	}
152 	return 1;
153 }
154 
155 /**
156  *	ata_generic_init		-	attach generic IDE
157  *	@dev: PCI device found
158  *	@id: match entry
159  *
160  *	Called each time a matching IDE interface is found. We check if the
161  *	interface is one we wish to claim and if so we perform any chip
162  *	specific hacks then let the ATA layer do the heavy lifting.
163  */
164 
165 static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id *id)
166 {
167 	u16 command;
168 	static const struct ata_port_info info = {
169 		.flags = ATA_FLAG_SLAVE_POSS,
170 		.pio_mask = ATA_PIO4,
171 		.mwdma_mask = ATA_MWDMA2,
172 		.udma_mask = ATA_UDMA5,
173 		.port_ops = &generic_port_ops
174 	};
175 	const struct ata_port_info *ppi[] = { &info, NULL };
176 
177 	/* Don't use the generic entry unless instructed to do so */
178 	if ((id->driver_data & ATA_GEN_CLASS_MATCH) && all_generic_ide == 0)
179 		return -ENODEV;
180 
181 	if (id->driver_data & ATA_GEN_INTEL_IDER)
182 		if (!is_intel_ider(dev))
183 			return -ENODEV;
184 
185 	/* Devices that need care */
186 	if (dev->vendor == PCI_VENDOR_ID_UMC &&
187 	    dev->device == PCI_DEVICE_ID_UMC_UM8886A &&
188 	    (!(PCI_FUNC(dev->devfn) & 1)))
189 		return -ENODEV;
190 
191 	if (dev->vendor == PCI_VENDOR_ID_OPTI &&
192 	    dev->device == PCI_DEVICE_ID_OPTI_82C558 &&
193 	    (!(PCI_FUNC(dev->devfn) & 1)))
194 		return -ENODEV;
195 
196 	/* Don't re-enable devices in generic mode or we will break some
197 	   motherboards with disabled and unused IDE controllers */
198 	pci_read_config_word(dev, PCI_COMMAND, &command);
199 	if (!(command & PCI_COMMAND_IO))
200 		return -ENODEV;
201 
202 	if (dev->vendor == PCI_VENDOR_ID_AL)
203 		ata_pci_bmdma_clear_simplex(dev);
204 
205 	if (dev->vendor == PCI_VENDOR_ID_ATI) {
206 		int rc = pcim_enable_device(dev);
207 		if (rc < 0)
208 			return rc;
209 		pcim_pin_device(dev);
210 	}
211 	return ata_pci_bmdma_init_one(dev, ppi, &generic_sht, (void *)id, 0);
212 }
213 
214 static struct pci_device_id ata_generic[] = {
215 	{ PCI_DEVICE(PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), },
216 	{ PCI_DEVICE(PCI_VENDOR_ID_HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), },
217 	{ PCI_DEVICE(PCI_VENDOR_ID_UMC,    PCI_DEVICE_ID_UMC_UM8673F), },
218 	{ PCI_DEVICE(PCI_VENDOR_ID_UMC,    PCI_DEVICE_ID_UMC_UM8886A), },
219 	{ PCI_DEVICE(PCI_VENDOR_ID_UMC,    PCI_DEVICE_ID_UMC_UM8886BF), },
220 	{ PCI_DEVICE(PCI_VENDOR_ID_HINT,   PCI_DEVICE_ID_HINT_VXPROII_IDE), },
221 	{ PCI_DEVICE(PCI_VENDOR_ID_VIA,    PCI_DEVICE_ID_VIA_82C561), },
222 	{ PCI_DEVICE(PCI_VENDOR_ID_OPTI,   PCI_DEVICE_ID_OPTI_82C558), },
223 	{ PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE),
224 	  .driver_data = ATA_GEN_FORCE_DMA },
225 	/*
226 	 * For some reason, MCP89 on MacBook 7,1 doesn't work with
227 	 * ahci, use ata_generic instead.
228 	 */
229 	{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA,
230 	  PCI_VENDOR_ID_APPLE, 0xcb89,
231 	  .driver_data = ATA_GEN_FORCE_DMA },
232 #if !defined(CONFIG_PATA_TOSHIBA) && !defined(CONFIG_PATA_TOSHIBA_MODULE)
233 	{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), },
234 	{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2),  },
235 	{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_3),  },
236 	{ PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_5),  },
237 #endif
238 	/* Intel, IDE class device */
239 	{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
240 	  PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL,
241 	  .driver_data = ATA_GEN_INTEL_IDER },
242 	/* Must come last. If you add entries adjust this table appropriately */
243 	{ PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL),
244 	  .driver_data = ATA_GEN_CLASS_MATCH },
245 	{ 0, },
246 };
247 
248 static struct pci_driver ata_generic_pci_driver = {
249 	.name 		= DRV_NAME,
250 	.id_table	= ata_generic,
251 	.probe 		= ata_generic_init_one,
252 	.remove		= ata_pci_remove_one,
253 #ifdef CONFIG_PM
254 	.suspend	= ata_pci_device_suspend,
255 	.resume		= ata_pci_device_resume,
256 #endif
257 };
258 
259 static int __init ata_generic_init(void)
260 {
261 	return pci_register_driver(&ata_generic_pci_driver);
262 }
263 
264 
265 static void __exit ata_generic_exit(void)
266 {
267 	pci_unregister_driver(&ata_generic_pci_driver);
268 }
269 
270 
271 MODULE_AUTHOR("Alan Cox");
272 MODULE_DESCRIPTION("low-level driver for generic ATA");
273 MODULE_LICENSE("GPL");
274 MODULE_DEVICE_TABLE(pci, ata_generic);
275 MODULE_VERSION(DRV_VERSION);
276 
277 module_init(ata_generic_init);
278 module_exit(ata_generic_exit);
279 
280 module_param(all_generic_ide, int, 0);
281