1 /* 2 * Copyright (c) 2012, Intel Corporation 3 * Copyright (c) 2015, Red Hat, Inc. 4 * Copyright (c) 2015, 2016 Linaro Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 */ 11 12 #define pr_fmt(fmt) "ACPI: SPCR: " fmt 13 14 #include <linux/acpi.h> 15 #include <linux/console.h> 16 #include <linux/kernel.h> 17 #include <linux/serial_core.h> 18 19 /* 20 * Erratum 44 for QDF2432v1 and QDF2400v1 SoCs describes the BUSY bit as 21 * occasionally getting stuck as 1. To avoid the potential for a hang, check 22 * TXFE == 0 instead of BUSY == 1. This may not be suitable for all UART 23 * implementations, so only do so if an affected platform is detected in 24 * parse_spcr(). 25 */ 26 bool qdf2400_e44_present; 27 EXPORT_SYMBOL(qdf2400_e44_present); 28 29 /* 30 * Some Qualcomm Datacenter Technologies SoCs have a defective UART BUSY bit. 31 * Detect them by examining the OEM fields in the SPCR header, similiar to PCI 32 * quirk detection in pci_mcfg.c. 33 */ 34 static bool qdf2400_erratum_44_present(struct acpi_table_header *h) 35 { 36 if (memcmp(h->oem_id, "QCOM ", ACPI_OEM_ID_SIZE)) 37 return false; 38 39 if (!memcmp(h->oem_table_id, "QDF2432 ", ACPI_OEM_TABLE_ID_SIZE)) 40 return true; 41 42 if (!memcmp(h->oem_table_id, "QDF2400 ", ACPI_OEM_TABLE_ID_SIZE) && 43 h->oem_revision == 1) 44 return true; 45 46 return false; 47 } 48 49 /* 50 * APM X-Gene v1 and v2 UART hardware is an 16550 like device but has its 51 * register aligned to 32-bit. In addition, the BIOS also encoded the 52 * access width to be 8 bits. This function detects this errata condition. 53 */ 54 static bool xgene_8250_erratum_present(struct acpi_table_spcr *tb) 55 { 56 if (tb->interface_type != ACPI_DBG2_16550_COMPATIBLE) 57 return false; 58 59 if (memcmp(tb->header.oem_id, "APMC0D", ACPI_OEM_ID_SIZE)) 60 return false; 61 62 if (!memcmp(tb->header.oem_table_id, "XGENESPC", 63 ACPI_OEM_TABLE_ID_SIZE) && tb->header.oem_revision == 0) 64 return true; 65 66 return false; 67 } 68 69 /** 70 * parse_spcr() - parse ACPI SPCR table and add preferred console 71 * 72 * @earlycon: set up earlycon for the console specified by the table 73 * 74 * For the architectures with support for ACPI, CONFIG_ACPI_SPCR_TABLE may be 75 * defined to parse ACPI SPCR table. As a result of the parsing preferred 76 * console is registered and if @earlycon is true, earlycon is set up. 77 * 78 * When CONFIG_ACPI_SPCR_TABLE is defined, this function should be called 79 * from arch initialization code as soon as the DT/ACPI decision is made. 80 * 81 */ 82 int __init parse_spcr(bool earlycon) 83 { 84 static char opts[64]; 85 struct acpi_table_spcr *table; 86 acpi_status status; 87 char *uart; 88 char *iotype; 89 int baud_rate; 90 int err; 91 92 if (acpi_disabled) 93 return -ENODEV; 94 95 status = acpi_get_table(ACPI_SIG_SPCR, 0, 96 (struct acpi_table_header **)&table); 97 98 if (ACPI_FAILURE(status)) 99 return -ENOENT; 100 101 if (table->header.revision < 2) { 102 err = -ENOENT; 103 pr_err("wrong table version\n"); 104 goto done; 105 } 106 107 if (table->serial_port.space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) { 108 switch (table->serial_port.access_width) { 109 default: 110 pr_err("Unexpected SPCR Access Width. Defaulting to byte size\n"); 111 case ACPI_ACCESS_SIZE_BYTE: 112 iotype = "mmio"; 113 break; 114 case ACPI_ACCESS_SIZE_WORD: 115 iotype = "mmio16"; 116 break; 117 case ACPI_ACCESS_SIZE_DWORD: 118 iotype = "mmio32"; 119 break; 120 } 121 } else 122 iotype = "io"; 123 124 switch (table->interface_type) { 125 case ACPI_DBG2_ARM_SBSA_32BIT: 126 iotype = "mmio32"; 127 /* fall through */ 128 case ACPI_DBG2_ARM_PL011: 129 case ACPI_DBG2_ARM_SBSA_GENERIC: 130 case ACPI_DBG2_BCM2835: 131 uart = "pl011"; 132 break; 133 case ACPI_DBG2_16550_COMPATIBLE: 134 case ACPI_DBG2_16550_SUBSET: 135 uart = "uart"; 136 break; 137 default: 138 err = -ENOENT; 139 goto done; 140 } 141 142 switch (table->baud_rate) { 143 case 3: 144 baud_rate = 9600; 145 break; 146 case 4: 147 baud_rate = 19200; 148 break; 149 case 6: 150 baud_rate = 57600; 151 break; 152 case 7: 153 baud_rate = 115200; 154 break; 155 default: 156 err = -ENOENT; 157 goto done; 158 } 159 160 /* 161 * If the E44 erratum is required, then we need to tell the pl011 162 * driver to implement the work-around. 163 * 164 * The global variable is used by the probe function when it 165 * creates the UARTs, whether or not they're used as a console. 166 * 167 * If the user specifies "traditional" earlycon, the qdf2400_e44 168 * console name matches the EARLYCON_DECLARE() statement, and 169 * SPCR is not used. Parameter "earlycon" is false. 170 * 171 * If the user specifies "SPCR" earlycon, then we need to update 172 * the console name so that it also says "qdf2400_e44". Parameter 173 * "earlycon" is true. 174 * 175 * For consistency, if we change the console name, then we do it 176 * for everyone, not just earlycon. 177 */ 178 if (qdf2400_erratum_44_present(&table->header)) { 179 qdf2400_e44_present = true; 180 if (earlycon) 181 uart = "qdf2400_e44"; 182 } 183 184 if (xgene_8250_erratum_present(table)) 185 iotype = "mmio32"; 186 187 snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d", uart, iotype, 188 table->serial_port.address, baud_rate); 189 190 pr_info("console: %s\n", opts); 191 192 if (earlycon) 193 setup_earlycon(opts); 194 195 err = add_preferred_console(uart, 0, opts + strlen(uart) + 1); 196 197 done: 198 acpi_put_table((struct acpi_table_header *)table); 199 return err; 200 } 201