xref: /openbmc/linux/drivers/acpi/processor_idle.c (revision dbf563ee)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * processor_idle - idle state submodule to the ACPI processor driver
4  *
5  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7  *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
8  *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
9  *  			- Added processor hotplug support
10  *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
11  *  			- Added support for C3 on SMP
12  */
13 #define pr_fmt(fmt) "ACPI: " fmt
14 
15 #include <linux/module.h>
16 #include <linux/acpi.h>
17 #include <linux/dmi.h>
18 #include <linux/sched.h>       /* need_resched() */
19 #include <linux/tick.h>
20 #include <linux/cpuidle.h>
21 #include <linux/cpu.h>
22 #include <acpi/processor.h>
23 
24 /*
25  * Include the apic definitions for x86 to have the APIC timer related defines
26  * available also for UP (on SMP it gets magically included via linux/smp.h).
27  * asm/acpi.h is not an option, as it would require more include magic. Also
28  * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
29  */
30 #ifdef CONFIG_X86
31 #include <asm/apic.h>
32 #endif
33 
34 #define ACPI_PROCESSOR_CLASS            "processor"
35 #define _COMPONENT              ACPI_PROCESSOR_COMPONENT
36 ACPI_MODULE_NAME("processor_idle");
37 
38 #define ACPI_IDLE_STATE_START	(IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0)
39 
40 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
41 module_param(max_cstate, uint, 0000);
42 static unsigned int nocst __read_mostly;
43 module_param(nocst, uint, 0000);
44 static int bm_check_disable __read_mostly;
45 module_param(bm_check_disable, uint, 0000);
46 
47 static unsigned int latency_factor __read_mostly = 2;
48 module_param(latency_factor, uint, 0644);
49 
50 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
51 
52 struct cpuidle_driver acpi_idle_driver = {
53 	.name =		"acpi_idle",
54 	.owner =	THIS_MODULE,
55 };
56 
57 #ifdef CONFIG_ACPI_PROCESSOR_CSTATE
58 static
59 DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate);
60 
61 static int disabled_by_idle_boot_param(void)
62 {
63 	return boot_option_idle_override == IDLE_POLL ||
64 		boot_option_idle_override == IDLE_HALT;
65 }
66 
67 /*
68  * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
69  * For now disable this. Probably a bug somewhere else.
70  *
71  * To skip this limit, boot/load with a large max_cstate limit.
72  */
73 static int set_max_cstate(const struct dmi_system_id *id)
74 {
75 	if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
76 		return 0;
77 
78 	pr_notice("%s detected - limiting to C%ld max_cstate."
79 		  " Override with \"processor.max_cstate=%d\"\n", id->ident,
80 		  (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
81 
82 	max_cstate = (long)id->driver_data;
83 
84 	return 0;
85 }
86 
87 static const struct dmi_system_id processor_power_dmi_table[] = {
88 	{ set_max_cstate, "Clevo 5600D", {
89 	  DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
90 	  DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
91 	 (void *)2},
92 	{ set_max_cstate, "Pavilion zv5000", {
93 	  DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
94 	  DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
95 	 (void *)1},
96 	{ set_max_cstate, "Asus L8400B", {
97 	  DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
98 	  DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
99 	 (void *)1},
100 	{},
101 };
102 
103 
104 /*
105  * Callers should disable interrupts before the call and enable
106  * interrupts after return.
107  */
108 static void __cpuidle acpi_safe_halt(void)
109 {
110 	if (!tif_need_resched()) {
111 		safe_halt();
112 		local_irq_disable();
113 	}
114 }
115 
116 #ifdef ARCH_APICTIMER_STOPS_ON_C3
117 
118 /*
119  * Some BIOS implementations switch to C3 in the published C2 state.
120  * This seems to be a common problem on AMD boxen, but other vendors
121  * are affected too. We pick the most conservative approach: we assume
122  * that the local APIC stops in both C2 and C3.
123  */
124 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
125 				   struct acpi_processor_cx *cx)
126 {
127 	struct acpi_processor_power *pwr = &pr->power;
128 	u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
129 
130 	if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
131 		return;
132 
133 	if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
134 		type = ACPI_STATE_C1;
135 
136 	/*
137 	 * Check, if one of the previous states already marked the lapic
138 	 * unstable
139 	 */
140 	if (pwr->timer_broadcast_on_state < state)
141 		return;
142 
143 	if (cx->type >= type)
144 		pr->power.timer_broadcast_on_state = state;
145 }
146 
147 static void __lapic_timer_propagate_broadcast(void *arg)
148 {
149 	struct acpi_processor *pr = (struct acpi_processor *) arg;
150 
151 	if (pr->power.timer_broadcast_on_state < INT_MAX)
152 		tick_broadcast_enable();
153 	else
154 		tick_broadcast_disable();
155 }
156 
157 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
158 {
159 	smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
160 				 (void *)pr, 1);
161 }
162 
163 /* Power(C) State timer broadcast control */
164 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
165 					struct acpi_processor_cx *cx)
166 {
167 	return cx - pr->power.states >= pr->power.timer_broadcast_on_state;
168 }
169 
170 #else
171 
172 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
173 				   struct acpi_processor_cx *cstate) { }
174 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
175 
176 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
177 					struct acpi_processor_cx *cx)
178 {
179 	return false;
180 }
181 
182 #endif
183 
184 #if defined(CONFIG_X86)
185 static void tsc_check_state(int state)
186 {
187 	switch (boot_cpu_data.x86_vendor) {
188 	case X86_VENDOR_HYGON:
189 	case X86_VENDOR_AMD:
190 	case X86_VENDOR_INTEL:
191 	case X86_VENDOR_CENTAUR:
192 	case X86_VENDOR_ZHAOXIN:
193 		/*
194 		 * AMD Fam10h TSC will tick in all
195 		 * C/P/S0/S1 states when this bit is set.
196 		 */
197 		if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
198 			return;
199 		fallthrough;
200 	default:
201 		/* TSC could halt in idle, so notify users */
202 		if (state > ACPI_STATE_C1)
203 			mark_tsc_unstable("TSC halts in idle");
204 	}
205 }
206 #else
207 static void tsc_check_state(int state) { return; }
208 #endif
209 
210 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
211 {
212 
213 	if (!pr->pblk)
214 		return -ENODEV;
215 
216 	/* if info is obtained from pblk/fadt, type equals state */
217 	pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
218 	pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
219 
220 #ifndef CONFIG_HOTPLUG_CPU
221 	/*
222 	 * Check for P_LVL2_UP flag before entering C2 and above on
223 	 * an SMP system.
224 	 */
225 	if ((num_online_cpus() > 1) &&
226 	    !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
227 		return -ENODEV;
228 #endif
229 
230 	/* determine C2 and C3 address from pblk */
231 	pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
232 	pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
233 
234 	/* determine latencies from FADT */
235 	pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
236 	pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
237 
238 	/*
239 	 * FADT specified C2 latency must be less than or equal to
240 	 * 100 microseconds.
241 	 */
242 	if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
243 		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
244 			"C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
245 		/* invalidate C2 */
246 		pr->power.states[ACPI_STATE_C2].address = 0;
247 	}
248 
249 	/*
250 	 * FADT supplied C3 latency must be less than or equal to
251 	 * 1000 microseconds.
252 	 */
253 	if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
254 		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
255 			"C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
256 		/* invalidate C3 */
257 		pr->power.states[ACPI_STATE_C3].address = 0;
258 	}
259 
260 	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
261 			  "lvl2[0x%08x] lvl3[0x%08x]\n",
262 			  pr->power.states[ACPI_STATE_C2].address,
263 			  pr->power.states[ACPI_STATE_C3].address));
264 
265 	snprintf(pr->power.states[ACPI_STATE_C2].desc,
266 			 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x",
267 			 pr->power.states[ACPI_STATE_C2].address);
268 	snprintf(pr->power.states[ACPI_STATE_C3].desc,
269 			 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x",
270 			 pr->power.states[ACPI_STATE_C3].address);
271 
272 	return 0;
273 }
274 
275 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
276 {
277 	if (!pr->power.states[ACPI_STATE_C1].valid) {
278 		/* set the first C-State to C1 */
279 		/* all processors need to support C1 */
280 		pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
281 		pr->power.states[ACPI_STATE_C1].valid = 1;
282 		pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
283 
284 		snprintf(pr->power.states[ACPI_STATE_C1].desc,
285 			 ACPI_CX_DESC_LEN, "ACPI HLT");
286 	}
287 	/* the C0 state only exists as a filler in our array */
288 	pr->power.states[ACPI_STATE_C0].valid = 1;
289 	return 0;
290 }
291 
292 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
293 {
294 	int ret;
295 
296 	if (nocst)
297 		return -ENODEV;
298 
299 	ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power);
300 	if (ret)
301 		return ret;
302 
303 	if (!pr->power.count)
304 		return -EFAULT;
305 
306 	pr->flags.has_cst = 1;
307 	return 0;
308 }
309 
310 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
311 					   struct acpi_processor_cx *cx)
312 {
313 	static int bm_check_flag = -1;
314 	static int bm_control_flag = -1;
315 
316 
317 	if (!cx->address)
318 		return;
319 
320 	/*
321 	 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
322 	 * DMA transfers are used by any ISA device to avoid livelock.
323 	 * Note that we could disable Type-F DMA (as recommended by
324 	 * the erratum), but this is known to disrupt certain ISA
325 	 * devices thus we take the conservative approach.
326 	 */
327 	else if (errata.piix4.fdma) {
328 		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
329 				  "C3 not supported on PIIX4 with Type-F DMA\n"));
330 		return;
331 	}
332 
333 	/* All the logic here assumes flags.bm_check is same across all CPUs */
334 	if (bm_check_flag == -1) {
335 		/* Determine whether bm_check is needed based on CPU  */
336 		acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
337 		bm_check_flag = pr->flags.bm_check;
338 		bm_control_flag = pr->flags.bm_control;
339 	} else {
340 		pr->flags.bm_check = bm_check_flag;
341 		pr->flags.bm_control = bm_control_flag;
342 	}
343 
344 	if (pr->flags.bm_check) {
345 		if (!pr->flags.bm_control) {
346 			if (pr->flags.has_cst != 1) {
347 				/* bus mastering control is necessary */
348 				ACPI_DEBUG_PRINT((ACPI_DB_INFO,
349 					"C3 support requires BM control\n"));
350 				return;
351 			} else {
352 				/* Here we enter C3 without bus mastering */
353 				ACPI_DEBUG_PRINT((ACPI_DB_INFO,
354 					"C3 support without BM control\n"));
355 			}
356 		}
357 	} else {
358 		/*
359 		 * WBINVD should be set in fadt, for C3 state to be
360 		 * supported on when bm_check is not required.
361 		 */
362 		if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
363 			ACPI_DEBUG_PRINT((ACPI_DB_INFO,
364 					  "Cache invalidation should work properly"
365 					  " for C3 to be enabled on SMP systems\n"));
366 			return;
367 		}
368 	}
369 
370 	/*
371 	 * Otherwise we've met all of our C3 requirements.
372 	 * Normalize the C3 latency to expidite policy.  Enable
373 	 * checking of bus mastering status (bm_check) so we can
374 	 * use this in our C3 policy
375 	 */
376 	cx->valid = 1;
377 
378 	/*
379 	 * On older chipsets, BM_RLD needs to be set
380 	 * in order for Bus Master activity to wake the
381 	 * system from C3.  Newer chipsets handle DMA
382 	 * during C3 automatically and BM_RLD is a NOP.
383 	 * In either case, the proper way to
384 	 * handle BM_RLD is to set it and leave it set.
385 	 */
386 	acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
387 
388 	return;
389 }
390 
391 static int acpi_processor_power_verify(struct acpi_processor *pr)
392 {
393 	unsigned int i;
394 	unsigned int working = 0;
395 
396 	pr->power.timer_broadcast_on_state = INT_MAX;
397 
398 	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
399 		struct acpi_processor_cx *cx = &pr->power.states[i];
400 
401 		switch (cx->type) {
402 		case ACPI_STATE_C1:
403 			cx->valid = 1;
404 			break;
405 
406 		case ACPI_STATE_C2:
407 			if (!cx->address)
408 				break;
409 			cx->valid = 1;
410 			break;
411 
412 		case ACPI_STATE_C3:
413 			acpi_processor_power_verify_c3(pr, cx);
414 			break;
415 		}
416 		if (!cx->valid)
417 			continue;
418 
419 		lapic_timer_check_state(i, pr, cx);
420 		tsc_check_state(cx->type);
421 		working++;
422 	}
423 
424 	lapic_timer_propagate_broadcast(pr);
425 
426 	return (working);
427 }
428 
429 static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
430 {
431 	unsigned int i;
432 	int result;
433 
434 
435 	/* NOTE: the idle thread may not be running while calling
436 	 * this function */
437 
438 	/* Zero initialize all the C-states info. */
439 	memset(pr->power.states, 0, sizeof(pr->power.states));
440 
441 	result = acpi_processor_get_power_info_cst(pr);
442 	if (result == -ENODEV)
443 		result = acpi_processor_get_power_info_fadt(pr);
444 
445 	if (result)
446 		return result;
447 
448 	acpi_processor_get_power_info_default(pr);
449 
450 	pr->power.count = acpi_processor_power_verify(pr);
451 
452 	/*
453 	 * if one state of type C2 or C3 is available, mark this
454 	 * CPU as being "idle manageable"
455 	 */
456 	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
457 		if (pr->power.states[i].valid) {
458 			pr->power.count = i;
459 			pr->flags.power = 1;
460 		}
461 	}
462 
463 	return 0;
464 }
465 
466 /**
467  * acpi_idle_bm_check - checks if bus master activity was detected
468  */
469 static int acpi_idle_bm_check(void)
470 {
471 	u32 bm_status = 0;
472 
473 	if (bm_check_disable)
474 		return 0;
475 
476 	acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
477 	if (bm_status)
478 		acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
479 	/*
480 	 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
481 	 * the true state of bus mastering activity; forcing us to
482 	 * manually check the BMIDEA bit of each IDE channel.
483 	 */
484 	else if (errata.piix4.bmisx) {
485 		if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
486 		    || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
487 			bm_status = 1;
488 	}
489 	return bm_status;
490 }
491 
492 static void wait_for_freeze(void)
493 {
494 #ifdef	CONFIG_X86
495 	/* No delay is needed if we are in guest */
496 	if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
497 		return;
498 #endif
499 	/* Dummy wait op - must do something useless after P_LVL2 read
500 	   because chipsets cannot guarantee that STPCLK# signal
501 	   gets asserted in time to freeze execution properly. */
502 	inl(acpi_gbl_FADT.xpm_timer_block.address);
503 }
504 
505 /**
506  * acpi_idle_do_entry - enter idle state using the appropriate method
507  * @cx: cstate data
508  *
509  * Caller disables interrupt before call and enables interrupt after return.
510  */
511 static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
512 {
513 	if (cx->entry_method == ACPI_CSTATE_FFH) {
514 		/* Call into architectural FFH based C-state */
515 		acpi_processor_ffh_cstate_enter(cx);
516 	} else if (cx->entry_method == ACPI_CSTATE_HALT) {
517 		acpi_safe_halt();
518 	} else {
519 		/* IO port based C-state */
520 		inb(cx->address);
521 		wait_for_freeze();
522 	}
523 }
524 
525 /**
526  * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
527  * @dev: the target CPU
528  * @index: the index of suggested state
529  */
530 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
531 {
532 	struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
533 
534 	ACPI_FLUSH_CPU_CACHE();
535 
536 	while (1) {
537 
538 		if (cx->entry_method == ACPI_CSTATE_HALT)
539 			safe_halt();
540 		else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
541 			inb(cx->address);
542 			wait_for_freeze();
543 		} else
544 			return -ENODEV;
545 	}
546 
547 	/* Never reached */
548 	return 0;
549 }
550 
551 static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
552 {
553 	return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
554 		!(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
555 }
556 
557 static int c3_cpu_count;
558 static DEFINE_RAW_SPINLOCK(c3_lock);
559 
560 /**
561  * acpi_idle_enter_bm - enters C3 with proper BM handling
562  * @drv: cpuidle driver
563  * @pr: Target processor
564  * @cx: Target state context
565  * @index: index of target state
566  */
567 static int acpi_idle_enter_bm(struct cpuidle_driver *drv,
568 			       struct acpi_processor *pr,
569 			       struct acpi_processor_cx *cx,
570 			       int index)
571 {
572 	static struct acpi_processor_cx safe_cx = {
573 		.entry_method = ACPI_CSTATE_HALT,
574 	};
575 
576 	/*
577 	 * disable bus master
578 	 * bm_check implies we need ARB_DIS
579 	 * bm_control implies whether we can do ARB_DIS
580 	 *
581 	 * That leaves a case where bm_check is set and bm_control is not set.
582 	 * In that case we cannot do much, we enter C3 without doing anything.
583 	 */
584 	bool dis_bm = pr->flags.bm_control;
585 
586 	/* If we can skip BM, demote to a safe state. */
587 	if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
588 		dis_bm = false;
589 		index = drv->safe_state_index;
590 		if (index >= 0) {
591 			cx = this_cpu_read(acpi_cstate[index]);
592 		} else {
593 			cx = &safe_cx;
594 			index = -EBUSY;
595 		}
596 	}
597 
598 	if (dis_bm) {
599 		raw_spin_lock(&c3_lock);
600 		c3_cpu_count++;
601 		/* Disable bus master arbitration when all CPUs are in C3 */
602 		if (c3_cpu_count == num_online_cpus())
603 			acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
604 		raw_spin_unlock(&c3_lock);
605 	}
606 
607 	rcu_idle_enter();
608 
609 	acpi_idle_do_entry(cx);
610 
611 	rcu_idle_exit();
612 
613 	/* Re-enable bus master arbitration */
614 	if (dis_bm) {
615 		raw_spin_lock(&c3_lock);
616 		acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
617 		c3_cpu_count--;
618 		raw_spin_unlock(&c3_lock);
619 	}
620 
621 	return index;
622 }
623 
624 static int acpi_idle_enter(struct cpuidle_device *dev,
625 			   struct cpuidle_driver *drv, int index)
626 {
627 	struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
628 	struct acpi_processor *pr;
629 
630 	pr = __this_cpu_read(processors);
631 	if (unlikely(!pr))
632 		return -EINVAL;
633 
634 	if (cx->type != ACPI_STATE_C1) {
635 		if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check)
636 			return acpi_idle_enter_bm(drv, pr, cx, index);
637 
638 		/* C2 to C1 demotion. */
639 		if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
640 			index = ACPI_IDLE_STATE_START;
641 			cx = per_cpu(acpi_cstate[index], dev->cpu);
642 		}
643 	}
644 
645 	if (cx->type == ACPI_STATE_C3)
646 		ACPI_FLUSH_CPU_CACHE();
647 
648 	acpi_idle_do_entry(cx);
649 
650 	return index;
651 }
652 
653 static int acpi_idle_enter_s2idle(struct cpuidle_device *dev,
654 				  struct cpuidle_driver *drv, int index)
655 {
656 	struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
657 
658 	if (cx->type == ACPI_STATE_C3) {
659 		struct acpi_processor *pr = __this_cpu_read(processors);
660 
661 		if (unlikely(!pr))
662 			return 0;
663 
664 		if (pr->flags.bm_check) {
665 			u8 bm_sts_skip = cx->bm_sts_skip;
666 
667 			/* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */
668 			cx->bm_sts_skip = 1;
669 			acpi_idle_enter_bm(drv, pr, cx, index);
670 			cx->bm_sts_skip = bm_sts_skip;
671 
672 			return 0;
673 		} else {
674 			ACPI_FLUSH_CPU_CACHE();
675 		}
676 	}
677 	acpi_idle_do_entry(cx);
678 
679 	return 0;
680 }
681 
682 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
683 					   struct cpuidle_device *dev)
684 {
685 	int i, count = ACPI_IDLE_STATE_START;
686 	struct acpi_processor_cx *cx;
687 	struct cpuidle_state *state;
688 
689 	if (max_cstate == 0)
690 		max_cstate = 1;
691 
692 	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
693 		state = &acpi_idle_driver.states[count];
694 		cx = &pr->power.states[i];
695 
696 		if (!cx->valid)
697 			continue;
698 
699 		per_cpu(acpi_cstate[count], dev->cpu) = cx;
700 
701 		if (lapic_timer_needs_broadcast(pr, cx))
702 			state->flags |= CPUIDLE_FLAG_TIMER_STOP;
703 
704 		if (cx->type == ACPI_STATE_C3) {
705 			state->flags |= CPUIDLE_FLAG_TLB_FLUSHED;
706 			if (pr->flags.bm_check)
707 				state->flags |= CPUIDLE_FLAG_RCU_IDLE;
708 		}
709 
710 		count++;
711 		if (count == CPUIDLE_STATE_MAX)
712 			break;
713 	}
714 
715 	if (!count)
716 		return -EINVAL;
717 
718 	return 0;
719 }
720 
721 static int acpi_processor_setup_cstates(struct acpi_processor *pr)
722 {
723 	int i, count;
724 	struct acpi_processor_cx *cx;
725 	struct cpuidle_state *state;
726 	struct cpuidle_driver *drv = &acpi_idle_driver;
727 
728 	if (max_cstate == 0)
729 		max_cstate = 1;
730 
731 	if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) {
732 		cpuidle_poll_state_init(drv);
733 		count = 1;
734 	} else {
735 		count = 0;
736 	}
737 
738 	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
739 		cx = &pr->power.states[i];
740 
741 		if (!cx->valid)
742 			continue;
743 
744 		state = &drv->states[count];
745 		snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
746 		strlcpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
747 		state->exit_latency = cx->latency;
748 		state->target_residency = cx->latency * latency_factor;
749 		state->enter = acpi_idle_enter;
750 
751 		state->flags = 0;
752 		if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) {
753 			state->enter_dead = acpi_idle_play_dead;
754 			drv->safe_state_index = count;
755 		}
756 		/*
757 		 * Halt-induced C1 is not good for ->enter_s2idle, because it
758 		 * re-enables interrupts on exit.  Moreover, C1 is generally not
759 		 * particularly interesting from the suspend-to-idle angle, so
760 		 * avoid C1 and the situations in which we may need to fall back
761 		 * to it altogether.
762 		 */
763 		if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
764 			state->enter_s2idle = acpi_idle_enter_s2idle;
765 
766 		count++;
767 		if (count == CPUIDLE_STATE_MAX)
768 			break;
769 	}
770 
771 	drv->state_count = count;
772 
773 	if (!count)
774 		return -EINVAL;
775 
776 	return 0;
777 }
778 
779 static inline void acpi_processor_cstate_first_run_checks(void)
780 {
781 	static int first_run;
782 
783 	if (first_run)
784 		return;
785 	dmi_check_system(processor_power_dmi_table);
786 	max_cstate = acpi_processor_cstate_check(max_cstate);
787 	if (max_cstate < ACPI_C_STATES_MAX)
788 		pr_notice("ACPI: processor limited to max C-state %d\n",
789 			  max_cstate);
790 	first_run++;
791 
792 	if (nocst)
793 		return;
794 
795 	acpi_processor_claim_cst_control();
796 }
797 #else
798 
799 static inline int disabled_by_idle_boot_param(void) { return 0; }
800 static inline void acpi_processor_cstate_first_run_checks(void) { }
801 static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
802 {
803 	return -ENODEV;
804 }
805 
806 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
807 					   struct cpuidle_device *dev)
808 {
809 	return -EINVAL;
810 }
811 
812 static int acpi_processor_setup_cstates(struct acpi_processor *pr)
813 {
814 	return -EINVAL;
815 }
816 
817 #endif /* CONFIG_ACPI_PROCESSOR_CSTATE */
818 
819 struct acpi_lpi_states_array {
820 	unsigned int size;
821 	unsigned int composite_states_size;
822 	struct acpi_lpi_state *entries;
823 	struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER];
824 };
825 
826 static int obj_get_integer(union acpi_object *obj, u32 *value)
827 {
828 	if (obj->type != ACPI_TYPE_INTEGER)
829 		return -EINVAL;
830 
831 	*value = obj->integer.value;
832 	return 0;
833 }
834 
835 static int acpi_processor_evaluate_lpi(acpi_handle handle,
836 				       struct acpi_lpi_states_array *info)
837 {
838 	acpi_status status;
839 	int ret = 0;
840 	int pkg_count, state_idx = 1, loop;
841 	struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
842 	union acpi_object *lpi_data;
843 	struct acpi_lpi_state *lpi_state;
844 
845 	status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer);
846 	if (ACPI_FAILURE(status)) {
847 		ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _LPI, giving up\n"));
848 		return -ENODEV;
849 	}
850 
851 	lpi_data = buffer.pointer;
852 
853 	/* There must be at least 4 elements = 3 elements + 1 package */
854 	if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE ||
855 	    lpi_data->package.count < 4) {
856 		pr_debug("not enough elements in _LPI\n");
857 		ret = -ENODATA;
858 		goto end;
859 	}
860 
861 	pkg_count = lpi_data->package.elements[2].integer.value;
862 
863 	/* Validate number of power states. */
864 	if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) {
865 		pr_debug("count given by _LPI is not valid\n");
866 		ret = -ENODATA;
867 		goto end;
868 	}
869 
870 	lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL);
871 	if (!lpi_state) {
872 		ret = -ENOMEM;
873 		goto end;
874 	}
875 
876 	info->size = pkg_count;
877 	info->entries = lpi_state;
878 
879 	/* LPI States start at index 3 */
880 	for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) {
881 		union acpi_object *element, *pkg_elem, *obj;
882 
883 		element = &lpi_data->package.elements[loop];
884 		if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7)
885 			continue;
886 
887 		pkg_elem = element->package.elements;
888 
889 		obj = pkg_elem + 6;
890 		if (obj->type == ACPI_TYPE_BUFFER) {
891 			struct acpi_power_register *reg;
892 
893 			reg = (struct acpi_power_register *)obj->buffer.pointer;
894 			if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
895 			    reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)
896 				continue;
897 
898 			lpi_state->address = reg->address;
899 			lpi_state->entry_method =
900 				reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ?
901 				ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO;
902 		} else if (obj->type == ACPI_TYPE_INTEGER) {
903 			lpi_state->entry_method = ACPI_CSTATE_INTEGER;
904 			lpi_state->address = obj->integer.value;
905 		} else {
906 			continue;
907 		}
908 
909 		/* elements[7,8] skipped for now i.e. Residency/Usage counter*/
910 
911 		obj = pkg_elem + 9;
912 		if (obj->type == ACPI_TYPE_STRING)
913 			strlcpy(lpi_state->desc, obj->string.pointer,
914 				ACPI_CX_DESC_LEN);
915 
916 		lpi_state->index = state_idx;
917 		if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) {
918 			pr_debug("No min. residency found, assuming 10 us\n");
919 			lpi_state->min_residency = 10;
920 		}
921 
922 		if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) {
923 			pr_debug("No wakeup residency found, assuming 10 us\n");
924 			lpi_state->wake_latency = 10;
925 		}
926 
927 		if (obj_get_integer(pkg_elem + 2, &lpi_state->flags))
928 			lpi_state->flags = 0;
929 
930 		if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags))
931 			lpi_state->arch_flags = 0;
932 
933 		if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq))
934 			lpi_state->res_cnt_freq = 1;
935 
936 		if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state))
937 			lpi_state->enable_parent_state = 0;
938 	}
939 
940 	acpi_handle_debug(handle, "Found %d power states\n", state_idx);
941 end:
942 	kfree(buffer.pointer);
943 	return ret;
944 }
945 
946 /*
947  * flat_state_cnt - the number of composite LPI states after the process of flattening
948  */
949 static int flat_state_cnt;
950 
951 /**
952  * combine_lpi_states - combine local and parent LPI states to form a composite LPI state
953  *
954  * @local: local LPI state
955  * @parent: parent LPI state
956  * @result: composite LPI state
957  */
958 static bool combine_lpi_states(struct acpi_lpi_state *local,
959 			       struct acpi_lpi_state *parent,
960 			       struct acpi_lpi_state *result)
961 {
962 	if (parent->entry_method == ACPI_CSTATE_INTEGER) {
963 		if (!parent->address) /* 0 means autopromotable */
964 			return false;
965 		result->address = local->address + parent->address;
966 	} else {
967 		result->address = parent->address;
968 	}
969 
970 	result->min_residency = max(local->min_residency, parent->min_residency);
971 	result->wake_latency = local->wake_latency + parent->wake_latency;
972 	result->enable_parent_state = parent->enable_parent_state;
973 	result->entry_method = local->entry_method;
974 
975 	result->flags = parent->flags;
976 	result->arch_flags = parent->arch_flags;
977 	result->index = parent->index;
978 
979 	strlcpy(result->desc, local->desc, ACPI_CX_DESC_LEN);
980 	strlcat(result->desc, "+", ACPI_CX_DESC_LEN);
981 	strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN);
982 	return true;
983 }
984 
985 #define ACPI_LPI_STATE_FLAGS_ENABLED			BIT(0)
986 
987 static void stash_composite_state(struct acpi_lpi_states_array *curr_level,
988 				  struct acpi_lpi_state *t)
989 {
990 	curr_level->composite_states[curr_level->composite_states_size++] = t;
991 }
992 
993 static int flatten_lpi_states(struct acpi_processor *pr,
994 			      struct acpi_lpi_states_array *curr_level,
995 			      struct acpi_lpi_states_array *prev_level)
996 {
997 	int i, j, state_count = curr_level->size;
998 	struct acpi_lpi_state *p, *t = curr_level->entries;
999 
1000 	curr_level->composite_states_size = 0;
1001 	for (j = 0; j < state_count; j++, t++) {
1002 		struct acpi_lpi_state *flpi;
1003 
1004 		if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED))
1005 			continue;
1006 
1007 		if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) {
1008 			pr_warn("Limiting number of LPI states to max (%d)\n",
1009 				ACPI_PROCESSOR_MAX_POWER);
1010 			pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
1011 			break;
1012 		}
1013 
1014 		flpi = &pr->power.lpi_states[flat_state_cnt];
1015 
1016 		if (!prev_level) { /* leaf/processor node */
1017 			memcpy(flpi, t, sizeof(*t));
1018 			stash_composite_state(curr_level, flpi);
1019 			flat_state_cnt++;
1020 			continue;
1021 		}
1022 
1023 		for (i = 0; i < prev_level->composite_states_size; i++) {
1024 			p = prev_level->composite_states[i];
1025 			if (t->index <= p->enable_parent_state &&
1026 			    combine_lpi_states(p, t, flpi)) {
1027 				stash_composite_state(curr_level, flpi);
1028 				flat_state_cnt++;
1029 				flpi++;
1030 			}
1031 		}
1032 	}
1033 
1034 	kfree(curr_level->entries);
1035 	return 0;
1036 }
1037 
1038 static int acpi_processor_get_lpi_info(struct acpi_processor *pr)
1039 {
1040 	int ret, i;
1041 	acpi_status status;
1042 	acpi_handle handle = pr->handle, pr_ahandle;
1043 	struct acpi_device *d = NULL;
1044 	struct acpi_lpi_states_array info[2], *tmp, *prev, *curr;
1045 
1046 	if (!osc_pc_lpi_support_confirmed)
1047 		return -EOPNOTSUPP;
1048 
1049 	if (!acpi_has_method(handle, "_LPI"))
1050 		return -EINVAL;
1051 
1052 	flat_state_cnt = 0;
1053 	prev = &info[0];
1054 	curr = &info[1];
1055 	handle = pr->handle;
1056 	ret = acpi_processor_evaluate_lpi(handle, prev);
1057 	if (ret)
1058 		return ret;
1059 	flatten_lpi_states(pr, prev, NULL);
1060 
1061 	status = acpi_get_parent(handle, &pr_ahandle);
1062 	while (ACPI_SUCCESS(status)) {
1063 		acpi_bus_get_device(pr_ahandle, &d);
1064 		handle = pr_ahandle;
1065 
1066 		if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID))
1067 			break;
1068 
1069 		/* can be optional ? */
1070 		if (!acpi_has_method(handle, "_LPI"))
1071 			break;
1072 
1073 		ret = acpi_processor_evaluate_lpi(handle, curr);
1074 		if (ret)
1075 			break;
1076 
1077 		/* flatten all the LPI states in this level of hierarchy */
1078 		flatten_lpi_states(pr, curr, prev);
1079 
1080 		tmp = prev, prev = curr, curr = tmp;
1081 
1082 		status = acpi_get_parent(handle, &pr_ahandle);
1083 	}
1084 
1085 	pr->power.count = flat_state_cnt;
1086 	/* reset the index after flattening */
1087 	for (i = 0; i < pr->power.count; i++)
1088 		pr->power.lpi_states[i].index = i;
1089 
1090 	/* Tell driver that _LPI is supported. */
1091 	pr->flags.has_lpi = 1;
1092 	pr->flags.power = 1;
1093 
1094 	return 0;
1095 }
1096 
1097 int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu)
1098 {
1099 	return -ENODEV;
1100 }
1101 
1102 int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
1103 {
1104 	return -ENODEV;
1105 }
1106 
1107 /**
1108  * acpi_idle_lpi_enter - enters an ACPI any LPI state
1109  * @dev: the target CPU
1110  * @drv: cpuidle driver containing cpuidle state info
1111  * @index: index of target state
1112  *
1113  * Return: 0 for success or negative value for error
1114  */
1115 static int acpi_idle_lpi_enter(struct cpuidle_device *dev,
1116 			       struct cpuidle_driver *drv, int index)
1117 {
1118 	struct acpi_processor *pr;
1119 	struct acpi_lpi_state *lpi;
1120 
1121 	pr = __this_cpu_read(processors);
1122 
1123 	if (unlikely(!pr))
1124 		return -EINVAL;
1125 
1126 	lpi = &pr->power.lpi_states[index];
1127 	if (lpi->entry_method == ACPI_CSTATE_FFH)
1128 		return acpi_processor_ffh_lpi_enter(lpi);
1129 
1130 	return -EINVAL;
1131 }
1132 
1133 static int acpi_processor_setup_lpi_states(struct acpi_processor *pr)
1134 {
1135 	int i;
1136 	struct acpi_lpi_state *lpi;
1137 	struct cpuidle_state *state;
1138 	struct cpuidle_driver *drv = &acpi_idle_driver;
1139 
1140 	if (!pr->flags.has_lpi)
1141 		return -EOPNOTSUPP;
1142 
1143 	for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) {
1144 		lpi = &pr->power.lpi_states[i];
1145 
1146 		state = &drv->states[i];
1147 		snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i);
1148 		strlcpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN);
1149 		state->exit_latency = lpi->wake_latency;
1150 		state->target_residency = lpi->min_residency;
1151 		if (lpi->arch_flags)
1152 			state->flags |= CPUIDLE_FLAG_TIMER_STOP;
1153 		state->enter = acpi_idle_lpi_enter;
1154 		drv->safe_state_index = i;
1155 	}
1156 
1157 	drv->state_count = i;
1158 
1159 	return 0;
1160 }
1161 
1162 /**
1163  * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle
1164  * global state data i.e. idle routines
1165  *
1166  * @pr: the ACPI processor
1167  */
1168 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1169 {
1170 	int i;
1171 	struct cpuidle_driver *drv = &acpi_idle_driver;
1172 
1173 	if (!pr->flags.power_setup_done || !pr->flags.power)
1174 		return -EINVAL;
1175 
1176 	drv->safe_state_index = -1;
1177 	for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
1178 		drv->states[i].name[0] = '\0';
1179 		drv->states[i].desc[0] = '\0';
1180 	}
1181 
1182 	if (pr->flags.has_lpi)
1183 		return acpi_processor_setup_lpi_states(pr);
1184 
1185 	return acpi_processor_setup_cstates(pr);
1186 }
1187 
1188 /**
1189  * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE
1190  * device i.e. per-cpu data
1191  *
1192  * @pr: the ACPI processor
1193  * @dev : the cpuidle device
1194  */
1195 static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr,
1196 					    struct cpuidle_device *dev)
1197 {
1198 	if (!pr->flags.power_setup_done || !pr->flags.power || !dev)
1199 		return -EINVAL;
1200 
1201 	dev->cpu = pr->id;
1202 	if (pr->flags.has_lpi)
1203 		return acpi_processor_ffh_lpi_probe(pr->id);
1204 
1205 	return acpi_processor_setup_cpuidle_cx(pr, dev);
1206 }
1207 
1208 static int acpi_processor_get_power_info(struct acpi_processor *pr)
1209 {
1210 	int ret;
1211 
1212 	ret = acpi_processor_get_lpi_info(pr);
1213 	if (ret)
1214 		ret = acpi_processor_get_cstate_info(pr);
1215 
1216 	return ret;
1217 }
1218 
1219 int acpi_processor_hotplug(struct acpi_processor *pr)
1220 {
1221 	int ret = 0;
1222 	struct cpuidle_device *dev;
1223 
1224 	if (disabled_by_idle_boot_param())
1225 		return 0;
1226 
1227 	if (!pr->flags.power_setup_done)
1228 		return -ENODEV;
1229 
1230 	dev = per_cpu(acpi_cpuidle_device, pr->id);
1231 	cpuidle_pause_and_lock();
1232 	cpuidle_disable_device(dev);
1233 	ret = acpi_processor_get_power_info(pr);
1234 	if (!ret && pr->flags.power) {
1235 		acpi_processor_setup_cpuidle_dev(pr, dev);
1236 		ret = cpuidle_enable_device(dev);
1237 	}
1238 	cpuidle_resume_and_unlock();
1239 
1240 	return ret;
1241 }
1242 
1243 int acpi_processor_power_state_has_changed(struct acpi_processor *pr)
1244 {
1245 	int cpu;
1246 	struct acpi_processor *_pr;
1247 	struct cpuidle_device *dev;
1248 
1249 	if (disabled_by_idle_boot_param())
1250 		return 0;
1251 
1252 	if (!pr->flags.power_setup_done)
1253 		return -ENODEV;
1254 
1255 	/*
1256 	 * FIXME:  Design the ACPI notification to make it once per
1257 	 * system instead of once per-cpu.  This condition is a hack
1258 	 * to make the code that updates C-States be called once.
1259 	 */
1260 
1261 	if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1262 
1263 		/* Protect against cpu-hotplug */
1264 		get_online_cpus();
1265 		cpuidle_pause_and_lock();
1266 
1267 		/* Disable all cpuidle devices */
1268 		for_each_online_cpu(cpu) {
1269 			_pr = per_cpu(processors, cpu);
1270 			if (!_pr || !_pr->flags.power_setup_done)
1271 				continue;
1272 			dev = per_cpu(acpi_cpuidle_device, cpu);
1273 			cpuidle_disable_device(dev);
1274 		}
1275 
1276 		/* Populate Updated C-state information */
1277 		acpi_processor_get_power_info(pr);
1278 		acpi_processor_setup_cpuidle_states(pr);
1279 
1280 		/* Enable all cpuidle devices */
1281 		for_each_online_cpu(cpu) {
1282 			_pr = per_cpu(processors, cpu);
1283 			if (!_pr || !_pr->flags.power_setup_done)
1284 				continue;
1285 			acpi_processor_get_power_info(_pr);
1286 			if (_pr->flags.power) {
1287 				dev = per_cpu(acpi_cpuidle_device, cpu);
1288 				acpi_processor_setup_cpuidle_dev(_pr, dev);
1289 				cpuidle_enable_device(dev);
1290 			}
1291 		}
1292 		cpuidle_resume_and_unlock();
1293 		put_online_cpus();
1294 	}
1295 
1296 	return 0;
1297 }
1298 
1299 static int acpi_processor_registered;
1300 
1301 int acpi_processor_power_init(struct acpi_processor *pr)
1302 {
1303 	int retval;
1304 	struct cpuidle_device *dev;
1305 
1306 	if (disabled_by_idle_boot_param())
1307 		return 0;
1308 
1309 	acpi_processor_cstate_first_run_checks();
1310 
1311 	if (!acpi_processor_get_power_info(pr))
1312 		pr->flags.power_setup_done = 1;
1313 
1314 	/*
1315 	 * Install the idle handler if processor power management is supported.
1316 	 * Note that we use previously set idle handler will be used on
1317 	 * platforms that only support C1.
1318 	 */
1319 	if (pr->flags.power) {
1320 		/* Register acpi_idle_driver if not already registered */
1321 		if (!acpi_processor_registered) {
1322 			acpi_processor_setup_cpuidle_states(pr);
1323 			retval = cpuidle_register_driver(&acpi_idle_driver);
1324 			if (retval)
1325 				return retval;
1326 			pr_debug("%s registered with cpuidle\n",
1327 				 acpi_idle_driver.name);
1328 		}
1329 
1330 		dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1331 		if (!dev)
1332 			return -ENOMEM;
1333 		per_cpu(acpi_cpuidle_device, pr->id) = dev;
1334 
1335 		acpi_processor_setup_cpuidle_dev(pr, dev);
1336 
1337 		/* Register per-cpu cpuidle_device. Cpuidle driver
1338 		 * must already be registered before registering device
1339 		 */
1340 		retval = cpuidle_register_device(dev);
1341 		if (retval) {
1342 			if (acpi_processor_registered == 0)
1343 				cpuidle_unregister_driver(&acpi_idle_driver);
1344 			return retval;
1345 		}
1346 		acpi_processor_registered++;
1347 	}
1348 	return 0;
1349 }
1350 
1351 int acpi_processor_power_exit(struct acpi_processor *pr)
1352 {
1353 	struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1354 
1355 	if (disabled_by_idle_boot_param())
1356 		return 0;
1357 
1358 	if (pr->flags.power) {
1359 		cpuidle_unregister_device(dev);
1360 		acpi_processor_registered--;
1361 		if (acpi_processor_registered == 0)
1362 			cpuidle_unregister_driver(&acpi_idle_driver);
1363 	}
1364 
1365 	pr->flags.power_setup_done = 0;
1366 	return 0;
1367 }
1368