1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * processor_idle - idle state submodule to the ACPI processor driver 4 * 5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 7 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> 8 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> 9 * - Added processor hotplug support 10 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> 11 * - Added support for C3 on SMP 12 */ 13 #define pr_fmt(fmt) "ACPI: " fmt 14 15 #include <linux/module.h> 16 #include <linux/acpi.h> 17 #include <linux/dmi.h> 18 #include <linux/sched.h> /* need_resched() */ 19 #include <linux/sort.h> 20 #include <linux/tick.h> 21 #include <linux/cpuidle.h> 22 #include <linux/cpu.h> 23 #include <acpi/processor.h> 24 25 /* 26 * Include the apic definitions for x86 to have the APIC timer related defines 27 * available also for UP (on SMP it gets magically included via linux/smp.h). 28 * asm/acpi.h is not an option, as it would require more include magic. Also 29 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. 30 */ 31 #ifdef CONFIG_X86 32 #include <asm/apic.h> 33 #include <asm/cpu.h> 34 #endif 35 36 #define ACPI_IDLE_STATE_START (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0) 37 38 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; 39 module_param(max_cstate, uint, 0000); 40 static unsigned int nocst __read_mostly; 41 module_param(nocst, uint, 0000); 42 static int bm_check_disable __read_mostly; 43 module_param(bm_check_disable, uint, 0000); 44 45 static unsigned int latency_factor __read_mostly = 2; 46 module_param(latency_factor, uint, 0644); 47 48 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); 49 50 struct cpuidle_driver acpi_idle_driver = { 51 .name = "acpi_idle", 52 .owner = THIS_MODULE, 53 }; 54 55 #ifdef CONFIG_ACPI_PROCESSOR_CSTATE 56 static 57 DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate); 58 59 static int disabled_by_idle_boot_param(void) 60 { 61 return boot_option_idle_override == IDLE_POLL || 62 boot_option_idle_override == IDLE_HALT; 63 } 64 65 /* 66 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. 67 * For now disable this. Probably a bug somewhere else. 68 * 69 * To skip this limit, boot/load with a large max_cstate limit. 70 */ 71 static int set_max_cstate(const struct dmi_system_id *id) 72 { 73 if (max_cstate > ACPI_PROCESSOR_MAX_POWER) 74 return 0; 75 76 pr_notice("%s detected - limiting to C%ld max_cstate." 77 " Override with \"processor.max_cstate=%d\"\n", id->ident, 78 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); 79 80 max_cstate = (long)id->driver_data; 81 82 return 0; 83 } 84 85 static const struct dmi_system_id processor_power_dmi_table[] = { 86 { set_max_cstate, "Clevo 5600D", { 87 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), 88 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, 89 (void *)2}, 90 { set_max_cstate, "Pavilion zv5000", { 91 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 92 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, 93 (void *)1}, 94 { set_max_cstate, "Asus L8400B", { 95 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), 96 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, 97 (void *)1}, 98 {}, 99 }; 100 101 102 /* 103 * Callers should disable interrupts before the call and enable 104 * interrupts after return. 105 */ 106 static void __cpuidle acpi_safe_halt(void) 107 { 108 if (!tif_need_resched()) { 109 safe_halt(); 110 local_irq_disable(); 111 } 112 } 113 114 #ifdef ARCH_APICTIMER_STOPS_ON_C3 115 116 /* 117 * Some BIOS implementations switch to C3 in the published C2 state. 118 * This seems to be a common problem on AMD boxen, but other vendors 119 * are affected too. We pick the most conservative approach: we assume 120 * that the local APIC stops in both C2 and C3. 121 */ 122 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 123 struct acpi_processor_cx *cx) 124 { 125 struct acpi_processor_power *pwr = &pr->power; 126 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; 127 128 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) 129 return; 130 131 if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E)) 132 type = ACPI_STATE_C1; 133 134 /* 135 * Check, if one of the previous states already marked the lapic 136 * unstable 137 */ 138 if (pwr->timer_broadcast_on_state < state) 139 return; 140 141 if (cx->type >= type) 142 pr->power.timer_broadcast_on_state = state; 143 } 144 145 static void __lapic_timer_propagate_broadcast(void *arg) 146 { 147 struct acpi_processor *pr = (struct acpi_processor *) arg; 148 149 if (pr->power.timer_broadcast_on_state < INT_MAX) 150 tick_broadcast_enable(); 151 else 152 tick_broadcast_disable(); 153 } 154 155 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) 156 { 157 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, 158 (void *)pr, 1); 159 } 160 161 /* Power(C) State timer broadcast control */ 162 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr, 163 struct acpi_processor_cx *cx) 164 { 165 return cx - pr->power.states >= pr->power.timer_broadcast_on_state; 166 } 167 168 #else 169 170 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 171 struct acpi_processor_cx *cstate) { } 172 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } 173 174 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr, 175 struct acpi_processor_cx *cx) 176 { 177 return false; 178 } 179 180 #endif 181 182 #if defined(CONFIG_X86) 183 static void tsc_check_state(int state) 184 { 185 switch (boot_cpu_data.x86_vendor) { 186 case X86_VENDOR_HYGON: 187 case X86_VENDOR_AMD: 188 case X86_VENDOR_INTEL: 189 case X86_VENDOR_CENTAUR: 190 case X86_VENDOR_ZHAOXIN: 191 /* 192 * AMD Fam10h TSC will tick in all 193 * C/P/S0/S1 states when this bit is set. 194 */ 195 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) 196 return; 197 fallthrough; 198 default: 199 /* TSC could halt in idle, so notify users */ 200 if (state > ACPI_STATE_C1) 201 mark_tsc_unstable("TSC halts in idle"); 202 } 203 } 204 #else 205 static void tsc_check_state(int state) { return; } 206 #endif 207 208 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) 209 { 210 211 if (!pr->pblk) 212 return -ENODEV; 213 214 /* if info is obtained from pblk/fadt, type equals state */ 215 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; 216 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; 217 218 #ifndef CONFIG_HOTPLUG_CPU 219 /* 220 * Check for P_LVL2_UP flag before entering C2 and above on 221 * an SMP system. 222 */ 223 if ((num_online_cpus() > 1) && 224 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 225 return -ENODEV; 226 #endif 227 228 /* determine C2 and C3 address from pblk */ 229 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; 230 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; 231 232 /* determine latencies from FADT */ 233 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; 234 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; 235 236 /* 237 * FADT specified C2 latency must be less than or equal to 238 * 100 microseconds. 239 */ 240 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { 241 acpi_handle_debug(pr->handle, "C2 latency too large [%d]\n", 242 acpi_gbl_FADT.c2_latency); 243 /* invalidate C2 */ 244 pr->power.states[ACPI_STATE_C2].address = 0; 245 } 246 247 /* 248 * FADT supplied C3 latency must be less than or equal to 249 * 1000 microseconds. 250 */ 251 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { 252 acpi_handle_debug(pr->handle, "C3 latency too large [%d]\n", 253 acpi_gbl_FADT.c3_latency); 254 /* invalidate C3 */ 255 pr->power.states[ACPI_STATE_C3].address = 0; 256 } 257 258 acpi_handle_debug(pr->handle, "lvl2[0x%08x] lvl3[0x%08x]\n", 259 pr->power.states[ACPI_STATE_C2].address, 260 pr->power.states[ACPI_STATE_C3].address); 261 262 snprintf(pr->power.states[ACPI_STATE_C2].desc, 263 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x", 264 pr->power.states[ACPI_STATE_C2].address); 265 snprintf(pr->power.states[ACPI_STATE_C3].desc, 266 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x", 267 pr->power.states[ACPI_STATE_C3].address); 268 269 return 0; 270 } 271 272 static int acpi_processor_get_power_info_default(struct acpi_processor *pr) 273 { 274 if (!pr->power.states[ACPI_STATE_C1].valid) { 275 /* set the first C-State to C1 */ 276 /* all processors need to support C1 */ 277 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; 278 pr->power.states[ACPI_STATE_C1].valid = 1; 279 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; 280 281 snprintf(pr->power.states[ACPI_STATE_C1].desc, 282 ACPI_CX_DESC_LEN, "ACPI HLT"); 283 } 284 /* the C0 state only exists as a filler in our array */ 285 pr->power.states[ACPI_STATE_C0].valid = 1; 286 return 0; 287 } 288 289 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) 290 { 291 int ret; 292 293 if (nocst) 294 return -ENODEV; 295 296 ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power); 297 if (ret) 298 return ret; 299 300 if (!pr->power.count) 301 return -EFAULT; 302 303 pr->flags.has_cst = 1; 304 return 0; 305 } 306 307 static void acpi_processor_power_verify_c3(struct acpi_processor *pr, 308 struct acpi_processor_cx *cx) 309 { 310 static int bm_check_flag = -1; 311 static int bm_control_flag = -1; 312 313 314 if (!cx->address) 315 return; 316 317 /* 318 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) 319 * DMA transfers are used by any ISA device to avoid livelock. 320 * Note that we could disable Type-F DMA (as recommended by 321 * the erratum), but this is known to disrupt certain ISA 322 * devices thus we take the conservative approach. 323 */ 324 else if (errata.piix4.fdma) { 325 acpi_handle_debug(pr->handle, 326 "C3 not supported on PIIX4 with Type-F DMA\n"); 327 return; 328 } 329 330 /* All the logic here assumes flags.bm_check is same across all CPUs */ 331 if (bm_check_flag == -1) { 332 /* Determine whether bm_check is needed based on CPU */ 333 acpi_processor_power_init_bm_check(&(pr->flags), pr->id); 334 bm_check_flag = pr->flags.bm_check; 335 bm_control_flag = pr->flags.bm_control; 336 } else { 337 pr->flags.bm_check = bm_check_flag; 338 pr->flags.bm_control = bm_control_flag; 339 } 340 341 if (pr->flags.bm_check) { 342 if (!pr->flags.bm_control) { 343 if (pr->flags.has_cst != 1) { 344 /* bus mastering control is necessary */ 345 acpi_handle_debug(pr->handle, 346 "C3 support requires BM control\n"); 347 return; 348 } else { 349 /* Here we enter C3 without bus mastering */ 350 acpi_handle_debug(pr->handle, 351 "C3 support without BM control\n"); 352 } 353 } 354 } else { 355 /* 356 * WBINVD should be set in fadt, for C3 state to be 357 * supported on when bm_check is not required. 358 */ 359 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { 360 acpi_handle_debug(pr->handle, 361 "Cache invalidation should work properly" 362 " for C3 to be enabled on SMP systems\n"); 363 return; 364 } 365 } 366 367 /* 368 * Otherwise we've met all of our C3 requirements. 369 * Normalize the C3 latency to expidite policy. Enable 370 * checking of bus mastering status (bm_check) so we can 371 * use this in our C3 policy 372 */ 373 cx->valid = 1; 374 375 /* 376 * On older chipsets, BM_RLD needs to be set 377 * in order for Bus Master activity to wake the 378 * system from C3. Newer chipsets handle DMA 379 * during C3 automatically and BM_RLD is a NOP. 380 * In either case, the proper way to 381 * handle BM_RLD is to set it and leave it set. 382 */ 383 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); 384 385 return; 386 } 387 388 static int acpi_cst_latency_cmp(const void *a, const void *b) 389 { 390 const struct acpi_processor_cx *x = a, *y = b; 391 392 if (!(x->valid && y->valid)) 393 return 0; 394 if (x->latency > y->latency) 395 return 1; 396 if (x->latency < y->latency) 397 return -1; 398 return 0; 399 } 400 static void acpi_cst_latency_swap(void *a, void *b, int n) 401 { 402 struct acpi_processor_cx *x = a, *y = b; 403 u32 tmp; 404 405 if (!(x->valid && y->valid)) 406 return; 407 tmp = x->latency; 408 x->latency = y->latency; 409 y->latency = tmp; 410 } 411 412 static int acpi_processor_power_verify(struct acpi_processor *pr) 413 { 414 unsigned int i; 415 unsigned int working = 0; 416 unsigned int last_latency = 0; 417 unsigned int last_type = 0; 418 bool buggy_latency = false; 419 420 pr->power.timer_broadcast_on_state = INT_MAX; 421 422 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 423 struct acpi_processor_cx *cx = &pr->power.states[i]; 424 425 switch (cx->type) { 426 case ACPI_STATE_C1: 427 cx->valid = 1; 428 break; 429 430 case ACPI_STATE_C2: 431 if (!cx->address) 432 break; 433 cx->valid = 1; 434 break; 435 436 case ACPI_STATE_C3: 437 acpi_processor_power_verify_c3(pr, cx); 438 break; 439 } 440 if (!cx->valid) 441 continue; 442 if (cx->type >= last_type && cx->latency < last_latency) 443 buggy_latency = true; 444 last_latency = cx->latency; 445 last_type = cx->type; 446 447 lapic_timer_check_state(i, pr, cx); 448 tsc_check_state(cx->type); 449 working++; 450 } 451 452 if (buggy_latency) { 453 pr_notice("FW issue: working around C-state latencies out of order\n"); 454 sort(&pr->power.states[1], max_cstate, 455 sizeof(struct acpi_processor_cx), 456 acpi_cst_latency_cmp, 457 acpi_cst_latency_swap); 458 } 459 460 lapic_timer_propagate_broadcast(pr); 461 462 return (working); 463 } 464 465 static int acpi_processor_get_cstate_info(struct acpi_processor *pr) 466 { 467 unsigned int i; 468 int result; 469 470 471 /* NOTE: the idle thread may not be running while calling 472 * this function */ 473 474 /* Zero initialize all the C-states info. */ 475 memset(pr->power.states, 0, sizeof(pr->power.states)); 476 477 result = acpi_processor_get_power_info_cst(pr); 478 if (result == -ENODEV) 479 result = acpi_processor_get_power_info_fadt(pr); 480 481 if (result) 482 return result; 483 484 acpi_processor_get_power_info_default(pr); 485 486 pr->power.count = acpi_processor_power_verify(pr); 487 488 /* 489 * if one state of type C2 or C3 is available, mark this 490 * CPU as being "idle manageable" 491 */ 492 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { 493 if (pr->power.states[i].valid) { 494 pr->power.count = i; 495 pr->flags.power = 1; 496 } 497 } 498 499 return 0; 500 } 501 502 /** 503 * acpi_idle_bm_check - checks if bus master activity was detected 504 */ 505 static int acpi_idle_bm_check(void) 506 { 507 u32 bm_status = 0; 508 509 if (bm_check_disable) 510 return 0; 511 512 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); 513 if (bm_status) 514 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); 515 /* 516 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect 517 * the true state of bus mastering activity; forcing us to 518 * manually check the BMIDEA bit of each IDE channel. 519 */ 520 else if (errata.piix4.bmisx) { 521 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) 522 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) 523 bm_status = 1; 524 } 525 return bm_status; 526 } 527 528 static void wait_for_freeze(void) 529 { 530 #ifdef CONFIG_X86 531 /* No delay is needed if we are in guest */ 532 if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) 533 return; 534 #endif 535 /* Dummy wait op - must do something useless after P_LVL2 read 536 because chipsets cannot guarantee that STPCLK# signal 537 gets asserted in time to freeze execution properly. */ 538 inl(acpi_gbl_FADT.xpm_timer_block.address); 539 } 540 541 /** 542 * acpi_idle_do_entry - enter idle state using the appropriate method 543 * @cx: cstate data 544 * 545 * Caller disables interrupt before call and enables interrupt after return. 546 */ 547 static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx) 548 { 549 if (cx->entry_method == ACPI_CSTATE_FFH) { 550 /* Call into architectural FFH based C-state */ 551 acpi_processor_ffh_cstate_enter(cx); 552 } else if (cx->entry_method == ACPI_CSTATE_HALT) { 553 acpi_safe_halt(); 554 } else { 555 /* IO port based C-state */ 556 inb(cx->address); 557 wait_for_freeze(); 558 } 559 } 560 561 /** 562 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) 563 * @dev: the target CPU 564 * @index: the index of suggested state 565 */ 566 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) 567 { 568 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 569 570 ACPI_FLUSH_CPU_CACHE(); 571 572 while (1) { 573 574 if (cx->entry_method == ACPI_CSTATE_HALT) 575 safe_halt(); 576 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { 577 inb(cx->address); 578 wait_for_freeze(); 579 } else 580 return -ENODEV; 581 582 #if defined(CONFIG_X86) && defined(CONFIG_HOTPLUG_CPU) 583 cond_wakeup_cpu0(); 584 #endif 585 } 586 587 /* Never reached */ 588 return 0; 589 } 590 591 static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr) 592 { 593 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst && 594 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED); 595 } 596 597 static int c3_cpu_count; 598 static DEFINE_RAW_SPINLOCK(c3_lock); 599 600 /** 601 * acpi_idle_enter_bm - enters C3 with proper BM handling 602 * @drv: cpuidle driver 603 * @pr: Target processor 604 * @cx: Target state context 605 * @index: index of target state 606 */ 607 static int acpi_idle_enter_bm(struct cpuidle_driver *drv, 608 struct acpi_processor *pr, 609 struct acpi_processor_cx *cx, 610 int index) 611 { 612 static struct acpi_processor_cx safe_cx = { 613 .entry_method = ACPI_CSTATE_HALT, 614 }; 615 616 /* 617 * disable bus master 618 * bm_check implies we need ARB_DIS 619 * bm_control implies whether we can do ARB_DIS 620 * 621 * That leaves a case where bm_check is set and bm_control is not set. 622 * In that case we cannot do much, we enter C3 without doing anything. 623 */ 624 bool dis_bm = pr->flags.bm_control; 625 626 /* If we can skip BM, demote to a safe state. */ 627 if (!cx->bm_sts_skip && acpi_idle_bm_check()) { 628 dis_bm = false; 629 index = drv->safe_state_index; 630 if (index >= 0) { 631 cx = this_cpu_read(acpi_cstate[index]); 632 } else { 633 cx = &safe_cx; 634 index = -EBUSY; 635 } 636 } 637 638 if (dis_bm) { 639 raw_spin_lock(&c3_lock); 640 c3_cpu_count++; 641 /* Disable bus master arbitration when all CPUs are in C3 */ 642 if (c3_cpu_count == num_online_cpus()) 643 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); 644 raw_spin_unlock(&c3_lock); 645 } 646 647 rcu_idle_enter(); 648 649 acpi_idle_do_entry(cx); 650 651 rcu_idle_exit(); 652 653 /* Re-enable bus master arbitration */ 654 if (dis_bm) { 655 raw_spin_lock(&c3_lock); 656 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); 657 c3_cpu_count--; 658 raw_spin_unlock(&c3_lock); 659 } 660 661 return index; 662 } 663 664 static int acpi_idle_enter(struct cpuidle_device *dev, 665 struct cpuidle_driver *drv, int index) 666 { 667 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 668 struct acpi_processor *pr; 669 670 pr = __this_cpu_read(processors); 671 if (unlikely(!pr)) 672 return -EINVAL; 673 674 if (cx->type != ACPI_STATE_C1) { 675 if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) 676 return acpi_idle_enter_bm(drv, pr, cx, index); 677 678 /* C2 to C1 demotion. */ 679 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) { 680 index = ACPI_IDLE_STATE_START; 681 cx = per_cpu(acpi_cstate[index], dev->cpu); 682 } 683 } 684 685 if (cx->type == ACPI_STATE_C3) 686 ACPI_FLUSH_CPU_CACHE(); 687 688 acpi_idle_do_entry(cx); 689 690 return index; 691 } 692 693 static int acpi_idle_enter_s2idle(struct cpuidle_device *dev, 694 struct cpuidle_driver *drv, int index) 695 { 696 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 697 698 if (cx->type == ACPI_STATE_C3) { 699 struct acpi_processor *pr = __this_cpu_read(processors); 700 701 if (unlikely(!pr)) 702 return 0; 703 704 if (pr->flags.bm_check) { 705 u8 bm_sts_skip = cx->bm_sts_skip; 706 707 /* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */ 708 cx->bm_sts_skip = 1; 709 acpi_idle_enter_bm(drv, pr, cx, index); 710 cx->bm_sts_skip = bm_sts_skip; 711 712 return 0; 713 } else { 714 ACPI_FLUSH_CPU_CACHE(); 715 } 716 } 717 acpi_idle_do_entry(cx); 718 719 return 0; 720 } 721 722 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, 723 struct cpuidle_device *dev) 724 { 725 int i, count = ACPI_IDLE_STATE_START; 726 struct acpi_processor_cx *cx; 727 struct cpuidle_state *state; 728 729 if (max_cstate == 0) 730 max_cstate = 1; 731 732 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 733 state = &acpi_idle_driver.states[count]; 734 cx = &pr->power.states[i]; 735 736 if (!cx->valid) 737 continue; 738 739 per_cpu(acpi_cstate[count], dev->cpu) = cx; 740 741 if (lapic_timer_needs_broadcast(pr, cx)) 742 state->flags |= CPUIDLE_FLAG_TIMER_STOP; 743 744 if (cx->type == ACPI_STATE_C3) { 745 state->flags |= CPUIDLE_FLAG_TLB_FLUSHED; 746 if (pr->flags.bm_check) 747 state->flags |= CPUIDLE_FLAG_RCU_IDLE; 748 } 749 750 count++; 751 if (count == CPUIDLE_STATE_MAX) 752 break; 753 } 754 755 if (!count) 756 return -EINVAL; 757 758 return 0; 759 } 760 761 static int acpi_processor_setup_cstates(struct acpi_processor *pr) 762 { 763 int i, count; 764 struct acpi_processor_cx *cx; 765 struct cpuidle_state *state; 766 struct cpuidle_driver *drv = &acpi_idle_driver; 767 768 if (max_cstate == 0) 769 max_cstate = 1; 770 771 if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) { 772 cpuidle_poll_state_init(drv); 773 count = 1; 774 } else { 775 count = 0; 776 } 777 778 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 779 cx = &pr->power.states[i]; 780 781 if (!cx->valid) 782 continue; 783 784 state = &drv->states[count]; 785 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); 786 strlcpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); 787 state->exit_latency = cx->latency; 788 state->target_residency = cx->latency * latency_factor; 789 state->enter = acpi_idle_enter; 790 791 state->flags = 0; 792 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2 || 793 cx->type == ACPI_STATE_C3) { 794 state->enter_dead = acpi_idle_play_dead; 795 drv->safe_state_index = count; 796 } 797 /* 798 * Halt-induced C1 is not good for ->enter_s2idle, because it 799 * re-enables interrupts on exit. Moreover, C1 is generally not 800 * particularly interesting from the suspend-to-idle angle, so 801 * avoid C1 and the situations in which we may need to fall back 802 * to it altogether. 803 */ 804 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr)) 805 state->enter_s2idle = acpi_idle_enter_s2idle; 806 807 count++; 808 if (count == CPUIDLE_STATE_MAX) 809 break; 810 } 811 812 drv->state_count = count; 813 814 if (!count) 815 return -EINVAL; 816 817 return 0; 818 } 819 820 static inline void acpi_processor_cstate_first_run_checks(void) 821 { 822 static int first_run; 823 824 if (first_run) 825 return; 826 dmi_check_system(processor_power_dmi_table); 827 max_cstate = acpi_processor_cstate_check(max_cstate); 828 if (max_cstate < ACPI_C_STATES_MAX) 829 pr_notice("processor limited to max C-state %d\n", max_cstate); 830 831 first_run++; 832 833 if (nocst) 834 return; 835 836 acpi_processor_claim_cst_control(); 837 } 838 #else 839 840 static inline int disabled_by_idle_boot_param(void) { return 0; } 841 static inline void acpi_processor_cstate_first_run_checks(void) { } 842 static int acpi_processor_get_cstate_info(struct acpi_processor *pr) 843 { 844 return -ENODEV; 845 } 846 847 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, 848 struct cpuidle_device *dev) 849 { 850 return -EINVAL; 851 } 852 853 static int acpi_processor_setup_cstates(struct acpi_processor *pr) 854 { 855 return -EINVAL; 856 } 857 858 #endif /* CONFIG_ACPI_PROCESSOR_CSTATE */ 859 860 struct acpi_lpi_states_array { 861 unsigned int size; 862 unsigned int composite_states_size; 863 struct acpi_lpi_state *entries; 864 struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER]; 865 }; 866 867 static int obj_get_integer(union acpi_object *obj, u32 *value) 868 { 869 if (obj->type != ACPI_TYPE_INTEGER) 870 return -EINVAL; 871 872 *value = obj->integer.value; 873 return 0; 874 } 875 876 static int acpi_processor_evaluate_lpi(acpi_handle handle, 877 struct acpi_lpi_states_array *info) 878 { 879 acpi_status status; 880 int ret = 0; 881 int pkg_count, state_idx = 1, loop; 882 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 883 union acpi_object *lpi_data; 884 struct acpi_lpi_state *lpi_state; 885 886 status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer); 887 if (ACPI_FAILURE(status)) { 888 acpi_handle_debug(handle, "No _LPI, giving up\n"); 889 return -ENODEV; 890 } 891 892 lpi_data = buffer.pointer; 893 894 /* There must be at least 4 elements = 3 elements + 1 package */ 895 if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE || 896 lpi_data->package.count < 4) { 897 pr_debug("not enough elements in _LPI\n"); 898 ret = -ENODATA; 899 goto end; 900 } 901 902 pkg_count = lpi_data->package.elements[2].integer.value; 903 904 /* Validate number of power states. */ 905 if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) { 906 pr_debug("count given by _LPI is not valid\n"); 907 ret = -ENODATA; 908 goto end; 909 } 910 911 lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL); 912 if (!lpi_state) { 913 ret = -ENOMEM; 914 goto end; 915 } 916 917 info->size = pkg_count; 918 info->entries = lpi_state; 919 920 /* LPI States start at index 3 */ 921 for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) { 922 union acpi_object *element, *pkg_elem, *obj; 923 924 element = &lpi_data->package.elements[loop]; 925 if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7) 926 continue; 927 928 pkg_elem = element->package.elements; 929 930 obj = pkg_elem + 6; 931 if (obj->type == ACPI_TYPE_BUFFER) { 932 struct acpi_power_register *reg; 933 934 reg = (struct acpi_power_register *)obj->buffer.pointer; 935 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && 936 reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) 937 continue; 938 939 lpi_state->address = reg->address; 940 lpi_state->entry_method = 941 reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ? 942 ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO; 943 } else if (obj->type == ACPI_TYPE_INTEGER) { 944 lpi_state->entry_method = ACPI_CSTATE_INTEGER; 945 lpi_state->address = obj->integer.value; 946 } else { 947 continue; 948 } 949 950 /* elements[7,8] skipped for now i.e. Residency/Usage counter*/ 951 952 obj = pkg_elem + 9; 953 if (obj->type == ACPI_TYPE_STRING) 954 strlcpy(lpi_state->desc, obj->string.pointer, 955 ACPI_CX_DESC_LEN); 956 957 lpi_state->index = state_idx; 958 if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) { 959 pr_debug("No min. residency found, assuming 10 us\n"); 960 lpi_state->min_residency = 10; 961 } 962 963 if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) { 964 pr_debug("No wakeup residency found, assuming 10 us\n"); 965 lpi_state->wake_latency = 10; 966 } 967 968 if (obj_get_integer(pkg_elem + 2, &lpi_state->flags)) 969 lpi_state->flags = 0; 970 971 if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags)) 972 lpi_state->arch_flags = 0; 973 974 if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq)) 975 lpi_state->res_cnt_freq = 1; 976 977 if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state)) 978 lpi_state->enable_parent_state = 0; 979 } 980 981 acpi_handle_debug(handle, "Found %d power states\n", state_idx); 982 end: 983 kfree(buffer.pointer); 984 return ret; 985 } 986 987 /* 988 * flat_state_cnt - the number of composite LPI states after the process of flattening 989 */ 990 static int flat_state_cnt; 991 992 /** 993 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state 994 * 995 * @local: local LPI state 996 * @parent: parent LPI state 997 * @result: composite LPI state 998 */ 999 static bool combine_lpi_states(struct acpi_lpi_state *local, 1000 struct acpi_lpi_state *parent, 1001 struct acpi_lpi_state *result) 1002 { 1003 if (parent->entry_method == ACPI_CSTATE_INTEGER) { 1004 if (!parent->address) /* 0 means autopromotable */ 1005 return false; 1006 result->address = local->address + parent->address; 1007 } else { 1008 result->address = parent->address; 1009 } 1010 1011 result->min_residency = max(local->min_residency, parent->min_residency); 1012 result->wake_latency = local->wake_latency + parent->wake_latency; 1013 result->enable_parent_state = parent->enable_parent_state; 1014 result->entry_method = local->entry_method; 1015 1016 result->flags = parent->flags; 1017 result->arch_flags = parent->arch_flags; 1018 result->index = parent->index; 1019 1020 strlcpy(result->desc, local->desc, ACPI_CX_DESC_LEN); 1021 strlcat(result->desc, "+", ACPI_CX_DESC_LEN); 1022 strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN); 1023 return true; 1024 } 1025 1026 #define ACPI_LPI_STATE_FLAGS_ENABLED BIT(0) 1027 1028 static void stash_composite_state(struct acpi_lpi_states_array *curr_level, 1029 struct acpi_lpi_state *t) 1030 { 1031 curr_level->composite_states[curr_level->composite_states_size++] = t; 1032 } 1033 1034 static int flatten_lpi_states(struct acpi_processor *pr, 1035 struct acpi_lpi_states_array *curr_level, 1036 struct acpi_lpi_states_array *prev_level) 1037 { 1038 int i, j, state_count = curr_level->size; 1039 struct acpi_lpi_state *p, *t = curr_level->entries; 1040 1041 curr_level->composite_states_size = 0; 1042 for (j = 0; j < state_count; j++, t++) { 1043 struct acpi_lpi_state *flpi; 1044 1045 if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED)) 1046 continue; 1047 1048 if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) { 1049 pr_warn("Limiting number of LPI states to max (%d)\n", 1050 ACPI_PROCESSOR_MAX_POWER); 1051 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); 1052 break; 1053 } 1054 1055 flpi = &pr->power.lpi_states[flat_state_cnt]; 1056 1057 if (!prev_level) { /* leaf/processor node */ 1058 memcpy(flpi, t, sizeof(*t)); 1059 stash_composite_state(curr_level, flpi); 1060 flat_state_cnt++; 1061 continue; 1062 } 1063 1064 for (i = 0; i < prev_level->composite_states_size; i++) { 1065 p = prev_level->composite_states[i]; 1066 if (t->index <= p->enable_parent_state && 1067 combine_lpi_states(p, t, flpi)) { 1068 stash_composite_state(curr_level, flpi); 1069 flat_state_cnt++; 1070 flpi++; 1071 } 1072 } 1073 } 1074 1075 kfree(curr_level->entries); 1076 return 0; 1077 } 1078 1079 static int acpi_processor_get_lpi_info(struct acpi_processor *pr) 1080 { 1081 int ret, i; 1082 acpi_status status; 1083 acpi_handle handle = pr->handle, pr_ahandle; 1084 struct acpi_device *d = NULL; 1085 struct acpi_lpi_states_array info[2], *tmp, *prev, *curr; 1086 1087 if (!osc_pc_lpi_support_confirmed) 1088 return -EOPNOTSUPP; 1089 1090 if (!acpi_has_method(handle, "_LPI")) 1091 return -EINVAL; 1092 1093 flat_state_cnt = 0; 1094 prev = &info[0]; 1095 curr = &info[1]; 1096 handle = pr->handle; 1097 ret = acpi_processor_evaluate_lpi(handle, prev); 1098 if (ret) 1099 return ret; 1100 flatten_lpi_states(pr, prev, NULL); 1101 1102 status = acpi_get_parent(handle, &pr_ahandle); 1103 while (ACPI_SUCCESS(status)) { 1104 acpi_bus_get_device(pr_ahandle, &d); 1105 handle = pr_ahandle; 1106 1107 if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID)) 1108 break; 1109 1110 /* can be optional ? */ 1111 if (!acpi_has_method(handle, "_LPI")) 1112 break; 1113 1114 ret = acpi_processor_evaluate_lpi(handle, curr); 1115 if (ret) 1116 break; 1117 1118 /* flatten all the LPI states in this level of hierarchy */ 1119 flatten_lpi_states(pr, curr, prev); 1120 1121 tmp = prev, prev = curr, curr = tmp; 1122 1123 status = acpi_get_parent(handle, &pr_ahandle); 1124 } 1125 1126 pr->power.count = flat_state_cnt; 1127 /* reset the index after flattening */ 1128 for (i = 0; i < pr->power.count; i++) 1129 pr->power.lpi_states[i].index = i; 1130 1131 /* Tell driver that _LPI is supported. */ 1132 pr->flags.has_lpi = 1; 1133 pr->flags.power = 1; 1134 1135 return 0; 1136 } 1137 1138 int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu) 1139 { 1140 return -ENODEV; 1141 } 1142 1143 int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) 1144 { 1145 return -ENODEV; 1146 } 1147 1148 /** 1149 * acpi_idle_lpi_enter - enters an ACPI any LPI state 1150 * @dev: the target CPU 1151 * @drv: cpuidle driver containing cpuidle state info 1152 * @index: index of target state 1153 * 1154 * Return: 0 for success or negative value for error 1155 */ 1156 static int acpi_idle_lpi_enter(struct cpuidle_device *dev, 1157 struct cpuidle_driver *drv, int index) 1158 { 1159 struct acpi_processor *pr; 1160 struct acpi_lpi_state *lpi; 1161 1162 pr = __this_cpu_read(processors); 1163 1164 if (unlikely(!pr)) 1165 return -EINVAL; 1166 1167 lpi = &pr->power.lpi_states[index]; 1168 if (lpi->entry_method == ACPI_CSTATE_FFH) 1169 return acpi_processor_ffh_lpi_enter(lpi); 1170 1171 return -EINVAL; 1172 } 1173 1174 static int acpi_processor_setup_lpi_states(struct acpi_processor *pr) 1175 { 1176 int i; 1177 struct acpi_lpi_state *lpi; 1178 struct cpuidle_state *state; 1179 struct cpuidle_driver *drv = &acpi_idle_driver; 1180 1181 if (!pr->flags.has_lpi) 1182 return -EOPNOTSUPP; 1183 1184 for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) { 1185 lpi = &pr->power.lpi_states[i]; 1186 1187 state = &drv->states[i]; 1188 snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i); 1189 strlcpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN); 1190 state->exit_latency = lpi->wake_latency; 1191 state->target_residency = lpi->min_residency; 1192 if (lpi->arch_flags) 1193 state->flags |= CPUIDLE_FLAG_TIMER_STOP; 1194 state->enter = acpi_idle_lpi_enter; 1195 drv->safe_state_index = i; 1196 } 1197 1198 drv->state_count = i; 1199 1200 return 0; 1201 } 1202 1203 /** 1204 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle 1205 * global state data i.e. idle routines 1206 * 1207 * @pr: the ACPI processor 1208 */ 1209 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) 1210 { 1211 int i; 1212 struct cpuidle_driver *drv = &acpi_idle_driver; 1213 1214 if (!pr->flags.power_setup_done || !pr->flags.power) 1215 return -EINVAL; 1216 1217 drv->safe_state_index = -1; 1218 for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) { 1219 drv->states[i].name[0] = '\0'; 1220 drv->states[i].desc[0] = '\0'; 1221 } 1222 1223 if (pr->flags.has_lpi) 1224 return acpi_processor_setup_lpi_states(pr); 1225 1226 return acpi_processor_setup_cstates(pr); 1227 } 1228 1229 /** 1230 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE 1231 * device i.e. per-cpu data 1232 * 1233 * @pr: the ACPI processor 1234 * @dev : the cpuidle device 1235 */ 1236 static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr, 1237 struct cpuidle_device *dev) 1238 { 1239 if (!pr->flags.power_setup_done || !pr->flags.power || !dev) 1240 return -EINVAL; 1241 1242 dev->cpu = pr->id; 1243 if (pr->flags.has_lpi) 1244 return acpi_processor_ffh_lpi_probe(pr->id); 1245 1246 return acpi_processor_setup_cpuidle_cx(pr, dev); 1247 } 1248 1249 static int acpi_processor_get_power_info(struct acpi_processor *pr) 1250 { 1251 int ret; 1252 1253 ret = acpi_processor_get_lpi_info(pr); 1254 if (ret) 1255 ret = acpi_processor_get_cstate_info(pr); 1256 1257 return ret; 1258 } 1259 1260 int acpi_processor_hotplug(struct acpi_processor *pr) 1261 { 1262 int ret = 0; 1263 struct cpuidle_device *dev; 1264 1265 if (disabled_by_idle_boot_param()) 1266 return 0; 1267 1268 if (!pr->flags.power_setup_done) 1269 return -ENODEV; 1270 1271 dev = per_cpu(acpi_cpuidle_device, pr->id); 1272 cpuidle_pause_and_lock(); 1273 cpuidle_disable_device(dev); 1274 ret = acpi_processor_get_power_info(pr); 1275 if (!ret && pr->flags.power) { 1276 acpi_processor_setup_cpuidle_dev(pr, dev); 1277 ret = cpuidle_enable_device(dev); 1278 } 1279 cpuidle_resume_and_unlock(); 1280 1281 return ret; 1282 } 1283 1284 int acpi_processor_power_state_has_changed(struct acpi_processor *pr) 1285 { 1286 int cpu; 1287 struct acpi_processor *_pr; 1288 struct cpuidle_device *dev; 1289 1290 if (disabled_by_idle_boot_param()) 1291 return 0; 1292 1293 if (!pr->flags.power_setup_done) 1294 return -ENODEV; 1295 1296 /* 1297 * FIXME: Design the ACPI notification to make it once per 1298 * system instead of once per-cpu. This condition is a hack 1299 * to make the code that updates C-States be called once. 1300 */ 1301 1302 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { 1303 1304 /* Protect against cpu-hotplug */ 1305 cpus_read_lock(); 1306 cpuidle_pause_and_lock(); 1307 1308 /* Disable all cpuidle devices */ 1309 for_each_online_cpu(cpu) { 1310 _pr = per_cpu(processors, cpu); 1311 if (!_pr || !_pr->flags.power_setup_done) 1312 continue; 1313 dev = per_cpu(acpi_cpuidle_device, cpu); 1314 cpuidle_disable_device(dev); 1315 } 1316 1317 /* Populate Updated C-state information */ 1318 acpi_processor_get_power_info(pr); 1319 acpi_processor_setup_cpuidle_states(pr); 1320 1321 /* Enable all cpuidle devices */ 1322 for_each_online_cpu(cpu) { 1323 _pr = per_cpu(processors, cpu); 1324 if (!_pr || !_pr->flags.power_setup_done) 1325 continue; 1326 acpi_processor_get_power_info(_pr); 1327 if (_pr->flags.power) { 1328 dev = per_cpu(acpi_cpuidle_device, cpu); 1329 acpi_processor_setup_cpuidle_dev(_pr, dev); 1330 cpuidle_enable_device(dev); 1331 } 1332 } 1333 cpuidle_resume_and_unlock(); 1334 cpus_read_unlock(); 1335 } 1336 1337 return 0; 1338 } 1339 1340 static int acpi_processor_registered; 1341 1342 int acpi_processor_power_init(struct acpi_processor *pr) 1343 { 1344 int retval; 1345 struct cpuidle_device *dev; 1346 1347 if (disabled_by_idle_boot_param()) 1348 return 0; 1349 1350 acpi_processor_cstate_first_run_checks(); 1351 1352 if (!acpi_processor_get_power_info(pr)) 1353 pr->flags.power_setup_done = 1; 1354 1355 /* 1356 * Install the idle handler if processor power management is supported. 1357 * Note that we use previously set idle handler will be used on 1358 * platforms that only support C1. 1359 */ 1360 if (pr->flags.power) { 1361 /* Register acpi_idle_driver if not already registered */ 1362 if (!acpi_processor_registered) { 1363 acpi_processor_setup_cpuidle_states(pr); 1364 retval = cpuidle_register_driver(&acpi_idle_driver); 1365 if (retval) 1366 return retval; 1367 pr_debug("%s registered with cpuidle\n", 1368 acpi_idle_driver.name); 1369 } 1370 1371 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1372 if (!dev) 1373 return -ENOMEM; 1374 per_cpu(acpi_cpuidle_device, pr->id) = dev; 1375 1376 acpi_processor_setup_cpuidle_dev(pr, dev); 1377 1378 /* Register per-cpu cpuidle_device. Cpuidle driver 1379 * must already be registered before registering device 1380 */ 1381 retval = cpuidle_register_device(dev); 1382 if (retval) { 1383 if (acpi_processor_registered == 0) 1384 cpuidle_unregister_driver(&acpi_idle_driver); 1385 return retval; 1386 } 1387 acpi_processor_registered++; 1388 } 1389 return 0; 1390 } 1391 1392 int acpi_processor_power_exit(struct acpi_processor *pr) 1393 { 1394 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); 1395 1396 if (disabled_by_idle_boot_param()) 1397 return 0; 1398 1399 if (pr->flags.power) { 1400 cpuidle_unregister_device(dev); 1401 acpi_processor_registered--; 1402 if (acpi_processor_registered == 0) 1403 cpuidle_unregister_driver(&acpi_idle_driver); 1404 } 1405 1406 pr->flags.power_setup_done = 0; 1407 return 0; 1408 } 1409