1 /* 2 * processor_idle - idle state submodule to the ACPI processor driver 3 * 4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> 7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> 8 * - Added processor hotplug support 9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> 10 * - Added support for C3 on SMP 11 * 12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License as published by 16 * the Free Software Foundation; either version 2 of the License, or (at 17 * your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, but 20 * WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 * General Public License for more details. 23 * 24 * You should have received a copy of the GNU General Public License along 25 * with this program; if not, write to the Free Software Foundation, Inc., 26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. 27 * 28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 29 */ 30 31 #include <linux/module.h> 32 #include <linux/acpi.h> 33 #include <linux/dmi.h> 34 #include <linux/sched.h> /* need_resched() */ 35 #include <linux/tick.h> 36 #include <linux/cpuidle.h> 37 #include <linux/syscore_ops.h> 38 #include <acpi/processor.h> 39 40 /* 41 * Include the apic definitions for x86 to have the APIC timer related defines 42 * available also for UP (on SMP it gets magically included via linux/smp.h). 43 * asm/acpi.h is not an option, as it would require more include magic. Also 44 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. 45 */ 46 #ifdef CONFIG_X86 47 #include <asm/apic.h> 48 #endif 49 50 #define PREFIX "ACPI: " 51 52 #define ACPI_PROCESSOR_CLASS "processor" 53 #define _COMPONENT ACPI_PROCESSOR_COMPONENT 54 ACPI_MODULE_NAME("processor_idle"); 55 56 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; 57 module_param(max_cstate, uint, 0000); 58 static unsigned int nocst __read_mostly; 59 module_param(nocst, uint, 0000); 60 static int bm_check_disable __read_mostly; 61 module_param(bm_check_disable, uint, 0000); 62 63 static unsigned int latency_factor __read_mostly = 2; 64 module_param(latency_factor, uint, 0644); 65 66 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); 67 68 static DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], 69 acpi_cstate); 70 71 static int disabled_by_idle_boot_param(void) 72 { 73 return boot_option_idle_override == IDLE_POLL || 74 boot_option_idle_override == IDLE_HALT; 75 } 76 77 /* 78 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. 79 * For now disable this. Probably a bug somewhere else. 80 * 81 * To skip this limit, boot/load with a large max_cstate limit. 82 */ 83 static int set_max_cstate(const struct dmi_system_id *id) 84 { 85 if (max_cstate > ACPI_PROCESSOR_MAX_POWER) 86 return 0; 87 88 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." 89 " Override with \"processor.max_cstate=%d\"\n", id->ident, 90 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); 91 92 max_cstate = (long)id->driver_data; 93 94 return 0; 95 } 96 97 static const struct dmi_system_id processor_power_dmi_table[] = { 98 { set_max_cstate, "Clevo 5600D", { 99 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), 100 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, 101 (void *)2}, 102 { set_max_cstate, "Pavilion zv5000", { 103 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 104 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, 105 (void *)1}, 106 { set_max_cstate, "Asus L8400B", { 107 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), 108 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, 109 (void *)1}, 110 {}, 111 }; 112 113 114 /* 115 * Callers should disable interrupts before the call and enable 116 * interrupts after return. 117 */ 118 static void acpi_safe_halt(void) 119 { 120 if (!tif_need_resched()) { 121 safe_halt(); 122 local_irq_disable(); 123 } 124 } 125 126 #ifdef ARCH_APICTIMER_STOPS_ON_C3 127 128 /* 129 * Some BIOS implementations switch to C3 in the published C2 state. 130 * This seems to be a common problem on AMD boxen, but other vendors 131 * are affected too. We pick the most conservative approach: we assume 132 * that the local APIC stops in both C2 and C3. 133 */ 134 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 135 struct acpi_processor_cx *cx) 136 { 137 struct acpi_processor_power *pwr = &pr->power; 138 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; 139 140 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) 141 return; 142 143 if (amd_e400_c1e_detected) 144 type = ACPI_STATE_C1; 145 146 /* 147 * Check, if one of the previous states already marked the lapic 148 * unstable 149 */ 150 if (pwr->timer_broadcast_on_state < state) 151 return; 152 153 if (cx->type >= type) 154 pr->power.timer_broadcast_on_state = state; 155 } 156 157 static void __lapic_timer_propagate_broadcast(void *arg) 158 { 159 struct acpi_processor *pr = (struct acpi_processor *) arg; 160 161 if (pr->power.timer_broadcast_on_state < INT_MAX) 162 tick_broadcast_enable(); 163 else 164 tick_broadcast_disable(); 165 } 166 167 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) 168 { 169 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, 170 (void *)pr, 1); 171 } 172 173 /* Power(C) State timer broadcast control */ 174 static void lapic_timer_state_broadcast(struct acpi_processor *pr, 175 struct acpi_processor_cx *cx, 176 int broadcast) 177 { 178 int state = cx - pr->power.states; 179 180 if (state >= pr->power.timer_broadcast_on_state) { 181 if (broadcast) 182 tick_broadcast_enter(); 183 else 184 tick_broadcast_exit(); 185 } 186 } 187 188 #else 189 190 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 191 struct acpi_processor_cx *cstate) { } 192 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } 193 static void lapic_timer_state_broadcast(struct acpi_processor *pr, 194 struct acpi_processor_cx *cx, 195 int broadcast) 196 { 197 } 198 199 #endif 200 201 #ifdef CONFIG_PM_SLEEP 202 static u32 saved_bm_rld; 203 204 static int acpi_processor_suspend(void) 205 { 206 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld); 207 return 0; 208 } 209 210 static void acpi_processor_resume(void) 211 { 212 u32 resumed_bm_rld = 0; 213 214 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld); 215 if (resumed_bm_rld == saved_bm_rld) 216 return; 217 218 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld); 219 } 220 221 static struct syscore_ops acpi_processor_syscore_ops = { 222 .suspend = acpi_processor_suspend, 223 .resume = acpi_processor_resume, 224 }; 225 226 void acpi_processor_syscore_init(void) 227 { 228 register_syscore_ops(&acpi_processor_syscore_ops); 229 } 230 231 void acpi_processor_syscore_exit(void) 232 { 233 unregister_syscore_ops(&acpi_processor_syscore_ops); 234 } 235 #endif /* CONFIG_PM_SLEEP */ 236 237 #if defined(CONFIG_X86) 238 static void tsc_check_state(int state) 239 { 240 switch (boot_cpu_data.x86_vendor) { 241 case X86_VENDOR_AMD: 242 case X86_VENDOR_INTEL: 243 /* 244 * AMD Fam10h TSC will tick in all 245 * C/P/S0/S1 states when this bit is set. 246 */ 247 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) 248 return; 249 250 /*FALL THROUGH*/ 251 default: 252 /* TSC could halt in idle, so notify users */ 253 if (state > ACPI_STATE_C1) 254 mark_tsc_unstable("TSC halts in idle"); 255 } 256 } 257 #else 258 static void tsc_check_state(int state) { return; } 259 #endif 260 261 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) 262 { 263 264 if (!pr->pblk) 265 return -ENODEV; 266 267 /* if info is obtained from pblk/fadt, type equals state */ 268 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; 269 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; 270 271 #ifndef CONFIG_HOTPLUG_CPU 272 /* 273 * Check for P_LVL2_UP flag before entering C2 and above on 274 * an SMP system. 275 */ 276 if ((num_online_cpus() > 1) && 277 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 278 return -ENODEV; 279 #endif 280 281 /* determine C2 and C3 address from pblk */ 282 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; 283 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; 284 285 /* determine latencies from FADT */ 286 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; 287 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; 288 289 /* 290 * FADT specified C2 latency must be less than or equal to 291 * 100 microseconds. 292 */ 293 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { 294 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 295 "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency)); 296 /* invalidate C2 */ 297 pr->power.states[ACPI_STATE_C2].address = 0; 298 } 299 300 /* 301 * FADT supplied C3 latency must be less than or equal to 302 * 1000 microseconds. 303 */ 304 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { 305 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 306 "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency)); 307 /* invalidate C3 */ 308 pr->power.states[ACPI_STATE_C3].address = 0; 309 } 310 311 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 312 "lvl2[0x%08x] lvl3[0x%08x]\n", 313 pr->power.states[ACPI_STATE_C2].address, 314 pr->power.states[ACPI_STATE_C3].address)); 315 316 return 0; 317 } 318 319 static int acpi_processor_get_power_info_default(struct acpi_processor *pr) 320 { 321 if (!pr->power.states[ACPI_STATE_C1].valid) { 322 /* set the first C-State to C1 */ 323 /* all processors need to support C1 */ 324 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; 325 pr->power.states[ACPI_STATE_C1].valid = 1; 326 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; 327 } 328 /* the C0 state only exists as a filler in our array */ 329 pr->power.states[ACPI_STATE_C0].valid = 1; 330 return 0; 331 } 332 333 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) 334 { 335 acpi_status status; 336 u64 count; 337 int current_count; 338 int i, ret = 0; 339 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 340 union acpi_object *cst; 341 342 343 if (nocst) 344 return -ENODEV; 345 346 current_count = 0; 347 348 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); 349 if (ACPI_FAILURE(status)) { 350 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); 351 return -ENODEV; 352 } 353 354 cst = buffer.pointer; 355 356 /* There must be at least 2 elements */ 357 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { 358 printk(KERN_ERR PREFIX "not enough elements in _CST\n"); 359 ret = -EFAULT; 360 goto end; 361 } 362 363 count = cst->package.elements[0].integer.value; 364 365 /* Validate number of power states. */ 366 if (count < 1 || count != cst->package.count - 1) { 367 printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); 368 ret = -EFAULT; 369 goto end; 370 } 371 372 /* Tell driver that at least _CST is supported. */ 373 pr->flags.has_cst = 1; 374 375 for (i = 1; i <= count; i++) { 376 union acpi_object *element; 377 union acpi_object *obj; 378 struct acpi_power_register *reg; 379 struct acpi_processor_cx cx; 380 381 memset(&cx, 0, sizeof(cx)); 382 383 element = &(cst->package.elements[i]); 384 if (element->type != ACPI_TYPE_PACKAGE) 385 continue; 386 387 if (element->package.count != 4) 388 continue; 389 390 obj = &(element->package.elements[0]); 391 392 if (obj->type != ACPI_TYPE_BUFFER) 393 continue; 394 395 reg = (struct acpi_power_register *)obj->buffer.pointer; 396 397 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && 398 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) 399 continue; 400 401 /* There should be an easy way to extract an integer... */ 402 obj = &(element->package.elements[1]); 403 if (obj->type != ACPI_TYPE_INTEGER) 404 continue; 405 406 cx.type = obj->integer.value; 407 /* 408 * Some buggy BIOSes won't list C1 in _CST - 409 * Let acpi_processor_get_power_info_default() handle them later 410 */ 411 if (i == 1 && cx.type != ACPI_STATE_C1) 412 current_count++; 413 414 cx.address = reg->address; 415 cx.index = current_count + 1; 416 417 cx.entry_method = ACPI_CSTATE_SYSTEMIO; 418 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { 419 if (acpi_processor_ffh_cstate_probe 420 (pr->id, &cx, reg) == 0) { 421 cx.entry_method = ACPI_CSTATE_FFH; 422 } else if (cx.type == ACPI_STATE_C1) { 423 /* 424 * C1 is a special case where FIXED_HARDWARE 425 * can be handled in non-MWAIT way as well. 426 * In that case, save this _CST entry info. 427 * Otherwise, ignore this info and continue. 428 */ 429 cx.entry_method = ACPI_CSTATE_HALT; 430 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); 431 } else { 432 continue; 433 } 434 if (cx.type == ACPI_STATE_C1 && 435 (boot_option_idle_override == IDLE_NOMWAIT)) { 436 /* 437 * In most cases the C1 space_id obtained from 438 * _CST object is FIXED_HARDWARE access mode. 439 * But when the option of idle=halt is added, 440 * the entry_method type should be changed from 441 * CSTATE_FFH to CSTATE_HALT. 442 * When the option of idle=nomwait is added, 443 * the C1 entry_method type should be 444 * CSTATE_HALT. 445 */ 446 cx.entry_method = ACPI_CSTATE_HALT; 447 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); 448 } 449 } else { 450 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x", 451 cx.address); 452 } 453 454 if (cx.type == ACPI_STATE_C1) { 455 cx.valid = 1; 456 } 457 458 obj = &(element->package.elements[2]); 459 if (obj->type != ACPI_TYPE_INTEGER) 460 continue; 461 462 cx.latency = obj->integer.value; 463 464 obj = &(element->package.elements[3]); 465 if (obj->type != ACPI_TYPE_INTEGER) 466 continue; 467 468 current_count++; 469 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); 470 471 /* 472 * We support total ACPI_PROCESSOR_MAX_POWER - 1 473 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) 474 */ 475 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { 476 printk(KERN_WARNING 477 "Limiting number of power states to max (%d)\n", 478 ACPI_PROCESSOR_MAX_POWER); 479 printk(KERN_WARNING 480 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); 481 break; 482 } 483 } 484 485 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", 486 current_count)); 487 488 /* Validate number of power states discovered */ 489 if (current_count < 2) 490 ret = -EFAULT; 491 492 end: 493 kfree(buffer.pointer); 494 495 return ret; 496 } 497 498 static void acpi_processor_power_verify_c3(struct acpi_processor *pr, 499 struct acpi_processor_cx *cx) 500 { 501 static int bm_check_flag = -1; 502 static int bm_control_flag = -1; 503 504 505 if (!cx->address) 506 return; 507 508 /* 509 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) 510 * DMA transfers are used by any ISA device to avoid livelock. 511 * Note that we could disable Type-F DMA (as recommended by 512 * the erratum), but this is known to disrupt certain ISA 513 * devices thus we take the conservative approach. 514 */ 515 else if (errata.piix4.fdma) { 516 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 517 "C3 not supported on PIIX4 with Type-F DMA\n")); 518 return; 519 } 520 521 /* All the logic here assumes flags.bm_check is same across all CPUs */ 522 if (bm_check_flag == -1) { 523 /* Determine whether bm_check is needed based on CPU */ 524 acpi_processor_power_init_bm_check(&(pr->flags), pr->id); 525 bm_check_flag = pr->flags.bm_check; 526 bm_control_flag = pr->flags.bm_control; 527 } else { 528 pr->flags.bm_check = bm_check_flag; 529 pr->flags.bm_control = bm_control_flag; 530 } 531 532 if (pr->flags.bm_check) { 533 if (!pr->flags.bm_control) { 534 if (pr->flags.has_cst != 1) { 535 /* bus mastering control is necessary */ 536 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 537 "C3 support requires BM control\n")); 538 return; 539 } else { 540 /* Here we enter C3 without bus mastering */ 541 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 542 "C3 support without BM control\n")); 543 } 544 } 545 } else { 546 /* 547 * WBINVD should be set in fadt, for C3 state to be 548 * supported on when bm_check is not required. 549 */ 550 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { 551 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 552 "Cache invalidation should work properly" 553 " for C3 to be enabled on SMP systems\n")); 554 return; 555 } 556 } 557 558 /* 559 * Otherwise we've met all of our C3 requirements. 560 * Normalize the C3 latency to expidite policy. Enable 561 * checking of bus mastering status (bm_check) so we can 562 * use this in our C3 policy 563 */ 564 cx->valid = 1; 565 566 /* 567 * On older chipsets, BM_RLD needs to be set 568 * in order for Bus Master activity to wake the 569 * system from C3. Newer chipsets handle DMA 570 * during C3 automatically and BM_RLD is a NOP. 571 * In either case, the proper way to 572 * handle BM_RLD is to set it and leave it set. 573 */ 574 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); 575 576 return; 577 } 578 579 static int acpi_processor_power_verify(struct acpi_processor *pr) 580 { 581 unsigned int i; 582 unsigned int working = 0; 583 584 pr->power.timer_broadcast_on_state = INT_MAX; 585 586 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 587 struct acpi_processor_cx *cx = &pr->power.states[i]; 588 589 switch (cx->type) { 590 case ACPI_STATE_C1: 591 cx->valid = 1; 592 break; 593 594 case ACPI_STATE_C2: 595 if (!cx->address) 596 break; 597 cx->valid = 1; 598 break; 599 600 case ACPI_STATE_C3: 601 acpi_processor_power_verify_c3(pr, cx); 602 break; 603 } 604 if (!cx->valid) 605 continue; 606 607 lapic_timer_check_state(i, pr, cx); 608 tsc_check_state(cx->type); 609 working++; 610 } 611 612 lapic_timer_propagate_broadcast(pr); 613 614 return (working); 615 } 616 617 static int acpi_processor_get_power_info(struct acpi_processor *pr) 618 { 619 unsigned int i; 620 int result; 621 622 623 /* NOTE: the idle thread may not be running while calling 624 * this function */ 625 626 /* Zero initialize all the C-states info. */ 627 memset(pr->power.states, 0, sizeof(pr->power.states)); 628 629 result = acpi_processor_get_power_info_cst(pr); 630 if (result == -ENODEV) 631 result = acpi_processor_get_power_info_fadt(pr); 632 633 if (result) 634 return result; 635 636 acpi_processor_get_power_info_default(pr); 637 638 pr->power.count = acpi_processor_power_verify(pr); 639 640 /* 641 * if one state of type C2 or C3 is available, mark this 642 * CPU as being "idle manageable" 643 */ 644 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { 645 if (pr->power.states[i].valid) { 646 pr->power.count = i; 647 if (pr->power.states[i].type >= ACPI_STATE_C2) 648 pr->flags.power = 1; 649 } 650 } 651 652 return 0; 653 } 654 655 /** 656 * acpi_idle_bm_check - checks if bus master activity was detected 657 */ 658 static int acpi_idle_bm_check(void) 659 { 660 u32 bm_status = 0; 661 662 if (bm_check_disable) 663 return 0; 664 665 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); 666 if (bm_status) 667 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); 668 /* 669 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect 670 * the true state of bus mastering activity; forcing us to 671 * manually check the BMIDEA bit of each IDE channel. 672 */ 673 else if (errata.piix4.bmisx) { 674 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) 675 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) 676 bm_status = 1; 677 } 678 return bm_status; 679 } 680 681 /** 682 * acpi_idle_do_entry - enter idle state using the appropriate method 683 * @cx: cstate data 684 * 685 * Caller disables interrupt before call and enables interrupt after return. 686 */ 687 static void acpi_idle_do_entry(struct acpi_processor_cx *cx) 688 { 689 if (cx->entry_method == ACPI_CSTATE_FFH) { 690 /* Call into architectural FFH based C-state */ 691 acpi_processor_ffh_cstate_enter(cx); 692 } else if (cx->entry_method == ACPI_CSTATE_HALT) { 693 acpi_safe_halt(); 694 } else { 695 /* IO port based C-state */ 696 inb(cx->address); 697 /* Dummy wait op - must do something useless after P_LVL2 read 698 because chipsets cannot guarantee that STPCLK# signal 699 gets asserted in time to freeze execution properly. */ 700 inl(acpi_gbl_FADT.xpm_timer_block.address); 701 } 702 } 703 704 /** 705 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) 706 * @dev: the target CPU 707 * @index: the index of suggested state 708 */ 709 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) 710 { 711 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 712 713 ACPI_FLUSH_CPU_CACHE(); 714 715 while (1) { 716 717 if (cx->entry_method == ACPI_CSTATE_HALT) 718 safe_halt(); 719 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { 720 inb(cx->address); 721 /* See comment in acpi_idle_do_entry() */ 722 inl(acpi_gbl_FADT.xpm_timer_block.address); 723 } else 724 return -ENODEV; 725 } 726 727 /* Never reached */ 728 return 0; 729 } 730 731 static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr) 732 { 733 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst && 734 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED); 735 } 736 737 static int c3_cpu_count; 738 static DEFINE_RAW_SPINLOCK(c3_lock); 739 740 /** 741 * acpi_idle_enter_bm - enters C3 with proper BM handling 742 * @pr: Target processor 743 * @cx: Target state context 744 * @timer_bc: Whether or not to change timer mode to broadcast 745 */ 746 static void acpi_idle_enter_bm(struct acpi_processor *pr, 747 struct acpi_processor_cx *cx, bool timer_bc) 748 { 749 acpi_unlazy_tlb(smp_processor_id()); 750 751 /* 752 * Must be done before busmaster disable as we might need to 753 * access HPET ! 754 */ 755 if (timer_bc) 756 lapic_timer_state_broadcast(pr, cx, 1); 757 758 /* 759 * disable bus master 760 * bm_check implies we need ARB_DIS 761 * bm_control implies whether we can do ARB_DIS 762 * 763 * That leaves a case where bm_check is set and bm_control is 764 * not set. In that case we cannot do much, we enter C3 765 * without doing anything. 766 */ 767 if (pr->flags.bm_control) { 768 raw_spin_lock(&c3_lock); 769 c3_cpu_count++; 770 /* Disable bus master arbitration when all CPUs are in C3 */ 771 if (c3_cpu_count == num_online_cpus()) 772 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); 773 raw_spin_unlock(&c3_lock); 774 } 775 776 acpi_idle_do_entry(cx); 777 778 /* Re-enable bus master arbitration */ 779 if (pr->flags.bm_control) { 780 raw_spin_lock(&c3_lock); 781 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); 782 c3_cpu_count--; 783 raw_spin_unlock(&c3_lock); 784 } 785 786 if (timer_bc) 787 lapic_timer_state_broadcast(pr, cx, 0); 788 } 789 790 static int acpi_idle_enter(struct cpuidle_device *dev, 791 struct cpuidle_driver *drv, int index) 792 { 793 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 794 struct acpi_processor *pr; 795 796 pr = __this_cpu_read(processors); 797 if (unlikely(!pr)) 798 return -EINVAL; 799 800 if (cx->type != ACPI_STATE_C1) { 801 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) { 802 index = CPUIDLE_DRIVER_STATE_START; 803 cx = per_cpu(acpi_cstate[index], dev->cpu); 804 } else if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) { 805 if (cx->bm_sts_skip || !acpi_idle_bm_check()) { 806 acpi_idle_enter_bm(pr, cx, true); 807 return index; 808 } else if (drv->safe_state_index >= 0) { 809 index = drv->safe_state_index; 810 cx = per_cpu(acpi_cstate[index], dev->cpu); 811 } else { 812 acpi_safe_halt(); 813 return -EBUSY; 814 } 815 } 816 } 817 818 lapic_timer_state_broadcast(pr, cx, 1); 819 820 if (cx->type == ACPI_STATE_C3) 821 ACPI_FLUSH_CPU_CACHE(); 822 823 acpi_idle_do_entry(cx); 824 825 lapic_timer_state_broadcast(pr, cx, 0); 826 827 return index; 828 } 829 830 static void acpi_idle_enter_freeze(struct cpuidle_device *dev, 831 struct cpuidle_driver *drv, int index) 832 { 833 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 834 835 if (cx->type == ACPI_STATE_C3) { 836 struct acpi_processor *pr = __this_cpu_read(processors); 837 838 if (unlikely(!pr)) 839 return; 840 841 if (pr->flags.bm_check) { 842 acpi_idle_enter_bm(pr, cx, false); 843 return; 844 } else { 845 ACPI_FLUSH_CPU_CACHE(); 846 } 847 } 848 acpi_idle_do_entry(cx); 849 } 850 851 struct cpuidle_driver acpi_idle_driver = { 852 .name = "acpi_idle", 853 .owner = THIS_MODULE, 854 }; 855 856 /** 857 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE 858 * device i.e. per-cpu data 859 * 860 * @pr: the ACPI processor 861 * @dev : the cpuidle device 862 */ 863 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, 864 struct cpuidle_device *dev) 865 { 866 int i, count = CPUIDLE_DRIVER_STATE_START; 867 struct acpi_processor_cx *cx; 868 869 if (!pr->flags.power_setup_done) 870 return -EINVAL; 871 872 if (pr->flags.power == 0) { 873 return -EINVAL; 874 } 875 876 if (!dev) 877 return -EINVAL; 878 879 dev->cpu = pr->id; 880 881 if (max_cstate == 0) 882 max_cstate = 1; 883 884 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 885 cx = &pr->power.states[i]; 886 887 if (!cx->valid) 888 continue; 889 890 per_cpu(acpi_cstate[count], dev->cpu) = cx; 891 892 count++; 893 if (count == CPUIDLE_STATE_MAX) 894 break; 895 } 896 897 if (!count) 898 return -EINVAL; 899 900 return 0; 901 } 902 903 /** 904 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle 905 * global state data i.e. idle routines 906 * 907 * @pr: the ACPI processor 908 */ 909 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) 910 { 911 int i, count = CPUIDLE_DRIVER_STATE_START; 912 struct acpi_processor_cx *cx; 913 struct cpuidle_state *state; 914 struct cpuidle_driver *drv = &acpi_idle_driver; 915 916 if (!pr->flags.power_setup_done) 917 return -EINVAL; 918 919 if (pr->flags.power == 0) 920 return -EINVAL; 921 922 drv->safe_state_index = -1; 923 for (i = CPUIDLE_DRIVER_STATE_START; i < CPUIDLE_STATE_MAX; i++) { 924 drv->states[i].name[0] = '\0'; 925 drv->states[i].desc[0] = '\0'; 926 } 927 928 if (max_cstate == 0) 929 max_cstate = 1; 930 931 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 932 cx = &pr->power.states[i]; 933 934 if (!cx->valid) 935 continue; 936 937 state = &drv->states[count]; 938 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); 939 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); 940 state->exit_latency = cx->latency; 941 state->target_residency = cx->latency * latency_factor; 942 state->enter = acpi_idle_enter; 943 944 state->flags = 0; 945 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) { 946 state->enter_dead = acpi_idle_play_dead; 947 drv->safe_state_index = count; 948 } 949 /* 950 * Halt-induced C1 is not good for ->enter_freeze, because it 951 * re-enables interrupts on exit. Moreover, C1 is generally not 952 * particularly interesting from the suspend-to-idle angle, so 953 * avoid C1 and the situations in which we may need to fall back 954 * to it altogether. 955 */ 956 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr)) 957 state->enter_freeze = acpi_idle_enter_freeze; 958 959 count++; 960 if (count == CPUIDLE_STATE_MAX) 961 break; 962 } 963 964 drv->state_count = count; 965 966 if (!count) 967 return -EINVAL; 968 969 return 0; 970 } 971 972 int acpi_processor_hotplug(struct acpi_processor *pr) 973 { 974 int ret = 0; 975 struct cpuidle_device *dev; 976 977 if (disabled_by_idle_boot_param()) 978 return 0; 979 980 if (nocst) 981 return -ENODEV; 982 983 if (!pr->flags.power_setup_done) 984 return -ENODEV; 985 986 dev = per_cpu(acpi_cpuidle_device, pr->id); 987 cpuidle_pause_and_lock(); 988 cpuidle_disable_device(dev); 989 acpi_processor_get_power_info(pr); 990 if (pr->flags.power) { 991 acpi_processor_setup_cpuidle_cx(pr, dev); 992 ret = cpuidle_enable_device(dev); 993 } 994 cpuidle_resume_and_unlock(); 995 996 return ret; 997 } 998 999 int acpi_processor_cst_has_changed(struct acpi_processor *pr) 1000 { 1001 int cpu; 1002 struct acpi_processor *_pr; 1003 struct cpuidle_device *dev; 1004 1005 if (disabled_by_idle_boot_param()) 1006 return 0; 1007 1008 if (nocst) 1009 return -ENODEV; 1010 1011 if (!pr->flags.power_setup_done) 1012 return -ENODEV; 1013 1014 /* 1015 * FIXME: Design the ACPI notification to make it once per 1016 * system instead of once per-cpu. This condition is a hack 1017 * to make the code that updates C-States be called once. 1018 */ 1019 1020 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { 1021 1022 /* Protect against cpu-hotplug */ 1023 get_online_cpus(); 1024 cpuidle_pause_and_lock(); 1025 1026 /* Disable all cpuidle devices */ 1027 for_each_online_cpu(cpu) { 1028 _pr = per_cpu(processors, cpu); 1029 if (!_pr || !_pr->flags.power_setup_done) 1030 continue; 1031 dev = per_cpu(acpi_cpuidle_device, cpu); 1032 cpuidle_disable_device(dev); 1033 } 1034 1035 /* Populate Updated C-state information */ 1036 acpi_processor_get_power_info(pr); 1037 acpi_processor_setup_cpuidle_states(pr); 1038 1039 /* Enable all cpuidle devices */ 1040 for_each_online_cpu(cpu) { 1041 _pr = per_cpu(processors, cpu); 1042 if (!_pr || !_pr->flags.power_setup_done) 1043 continue; 1044 acpi_processor_get_power_info(_pr); 1045 if (_pr->flags.power) { 1046 dev = per_cpu(acpi_cpuidle_device, cpu); 1047 acpi_processor_setup_cpuidle_cx(_pr, dev); 1048 cpuidle_enable_device(dev); 1049 } 1050 } 1051 cpuidle_resume_and_unlock(); 1052 put_online_cpus(); 1053 } 1054 1055 return 0; 1056 } 1057 1058 static int acpi_processor_registered; 1059 1060 int acpi_processor_power_init(struct acpi_processor *pr) 1061 { 1062 acpi_status status; 1063 int retval; 1064 struct cpuidle_device *dev; 1065 static int first_run; 1066 1067 if (disabled_by_idle_boot_param()) 1068 return 0; 1069 1070 if (!first_run) { 1071 dmi_check_system(processor_power_dmi_table); 1072 max_cstate = acpi_processor_cstate_check(max_cstate); 1073 if (max_cstate < ACPI_C_STATES_MAX) 1074 printk(KERN_NOTICE 1075 "ACPI: processor limited to max C-state %d\n", 1076 max_cstate); 1077 first_run++; 1078 } 1079 1080 if (acpi_gbl_FADT.cst_control && !nocst) { 1081 status = 1082 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8); 1083 if (ACPI_FAILURE(status)) { 1084 ACPI_EXCEPTION((AE_INFO, status, 1085 "Notifying BIOS of _CST ability failed")); 1086 } 1087 } 1088 1089 acpi_processor_get_power_info(pr); 1090 pr->flags.power_setup_done = 1; 1091 1092 /* 1093 * Install the idle handler if processor power management is supported. 1094 * Note that we use previously set idle handler will be used on 1095 * platforms that only support C1. 1096 */ 1097 if (pr->flags.power) { 1098 /* Register acpi_idle_driver if not already registered */ 1099 if (!acpi_processor_registered) { 1100 acpi_processor_setup_cpuidle_states(pr); 1101 retval = cpuidle_register_driver(&acpi_idle_driver); 1102 if (retval) 1103 return retval; 1104 printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n", 1105 acpi_idle_driver.name); 1106 } 1107 1108 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1109 if (!dev) 1110 return -ENOMEM; 1111 per_cpu(acpi_cpuidle_device, pr->id) = dev; 1112 1113 acpi_processor_setup_cpuidle_cx(pr, dev); 1114 1115 /* Register per-cpu cpuidle_device. Cpuidle driver 1116 * must already be registered before registering device 1117 */ 1118 retval = cpuidle_register_device(dev); 1119 if (retval) { 1120 if (acpi_processor_registered == 0) 1121 cpuidle_unregister_driver(&acpi_idle_driver); 1122 return retval; 1123 } 1124 acpi_processor_registered++; 1125 } 1126 return 0; 1127 } 1128 1129 int acpi_processor_power_exit(struct acpi_processor *pr) 1130 { 1131 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); 1132 1133 if (disabled_by_idle_boot_param()) 1134 return 0; 1135 1136 if (pr->flags.power) { 1137 cpuidle_unregister_device(dev); 1138 acpi_processor_registered--; 1139 if (acpi_processor_registered == 0) 1140 cpuidle_unregister_driver(&acpi_idle_driver); 1141 } 1142 1143 pr->flags.power_setup_done = 0; 1144 return 0; 1145 } 1146