1 /* 2 * processor_idle - idle state submodule to the ACPI processor driver 3 * 4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> 7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> 8 * - Added processor hotplug support 9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> 10 * - Added support for C3 on SMP 11 * 12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License as published by 16 * the Free Software Foundation; either version 2 of the License, or (at 17 * your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, but 20 * WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 * General Public License for more details. 23 * 24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 25 */ 26 27 #include <linux/module.h> 28 #include <linux/acpi.h> 29 #include <linux/dmi.h> 30 #include <linux/sched.h> /* need_resched() */ 31 #include <linux/tick.h> 32 #include <linux/cpuidle.h> 33 #include <linux/syscore_ops.h> 34 #include <acpi/processor.h> 35 36 /* 37 * Include the apic definitions for x86 to have the APIC timer related defines 38 * available also for UP (on SMP it gets magically included via linux/smp.h). 39 * asm/acpi.h is not an option, as it would require more include magic. Also 40 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. 41 */ 42 #ifdef CONFIG_X86 43 #include <asm/apic.h> 44 #endif 45 46 #define PREFIX "ACPI: " 47 48 #define ACPI_PROCESSOR_CLASS "processor" 49 #define _COMPONENT ACPI_PROCESSOR_COMPONENT 50 ACPI_MODULE_NAME("processor_idle"); 51 52 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; 53 module_param(max_cstate, uint, 0000); 54 static unsigned int nocst __read_mostly; 55 module_param(nocst, uint, 0000); 56 static int bm_check_disable __read_mostly; 57 module_param(bm_check_disable, uint, 0000); 58 59 static unsigned int latency_factor __read_mostly = 2; 60 module_param(latency_factor, uint, 0644); 61 62 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); 63 64 static DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], 65 acpi_cstate); 66 67 static int disabled_by_idle_boot_param(void) 68 { 69 return boot_option_idle_override == IDLE_POLL || 70 boot_option_idle_override == IDLE_HALT; 71 } 72 73 /* 74 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. 75 * For now disable this. Probably a bug somewhere else. 76 * 77 * To skip this limit, boot/load with a large max_cstate limit. 78 */ 79 static int set_max_cstate(const struct dmi_system_id *id) 80 { 81 if (max_cstate > ACPI_PROCESSOR_MAX_POWER) 82 return 0; 83 84 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." 85 " Override with \"processor.max_cstate=%d\"\n", id->ident, 86 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); 87 88 max_cstate = (long)id->driver_data; 89 90 return 0; 91 } 92 93 static const struct dmi_system_id processor_power_dmi_table[] = { 94 { set_max_cstate, "Clevo 5600D", { 95 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), 96 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, 97 (void *)2}, 98 { set_max_cstate, "Pavilion zv5000", { 99 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 100 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, 101 (void *)1}, 102 { set_max_cstate, "Asus L8400B", { 103 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), 104 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, 105 (void *)1}, 106 {}, 107 }; 108 109 110 /* 111 * Callers should disable interrupts before the call and enable 112 * interrupts after return. 113 */ 114 static void acpi_safe_halt(void) 115 { 116 if (!tif_need_resched()) { 117 safe_halt(); 118 local_irq_disable(); 119 } 120 } 121 122 #ifdef ARCH_APICTIMER_STOPS_ON_C3 123 124 /* 125 * Some BIOS implementations switch to C3 in the published C2 state. 126 * This seems to be a common problem on AMD boxen, but other vendors 127 * are affected too. We pick the most conservative approach: we assume 128 * that the local APIC stops in both C2 and C3. 129 */ 130 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 131 struct acpi_processor_cx *cx) 132 { 133 struct acpi_processor_power *pwr = &pr->power; 134 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; 135 136 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) 137 return; 138 139 if (amd_e400_c1e_detected) 140 type = ACPI_STATE_C1; 141 142 /* 143 * Check, if one of the previous states already marked the lapic 144 * unstable 145 */ 146 if (pwr->timer_broadcast_on_state < state) 147 return; 148 149 if (cx->type >= type) 150 pr->power.timer_broadcast_on_state = state; 151 } 152 153 static void __lapic_timer_propagate_broadcast(void *arg) 154 { 155 struct acpi_processor *pr = (struct acpi_processor *) arg; 156 157 if (pr->power.timer_broadcast_on_state < INT_MAX) 158 tick_broadcast_enable(); 159 else 160 tick_broadcast_disable(); 161 } 162 163 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) 164 { 165 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, 166 (void *)pr, 1); 167 } 168 169 /* Power(C) State timer broadcast control */ 170 static void lapic_timer_state_broadcast(struct acpi_processor *pr, 171 struct acpi_processor_cx *cx, 172 int broadcast) 173 { 174 int state = cx - pr->power.states; 175 176 if (state >= pr->power.timer_broadcast_on_state) { 177 if (broadcast) 178 tick_broadcast_enter(); 179 else 180 tick_broadcast_exit(); 181 } 182 } 183 184 #else 185 186 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 187 struct acpi_processor_cx *cstate) { } 188 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } 189 static void lapic_timer_state_broadcast(struct acpi_processor *pr, 190 struct acpi_processor_cx *cx, 191 int broadcast) 192 { 193 } 194 195 #endif 196 197 #ifdef CONFIG_PM_SLEEP 198 static u32 saved_bm_rld; 199 200 static int acpi_processor_suspend(void) 201 { 202 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld); 203 return 0; 204 } 205 206 static void acpi_processor_resume(void) 207 { 208 u32 resumed_bm_rld = 0; 209 210 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld); 211 if (resumed_bm_rld == saved_bm_rld) 212 return; 213 214 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld); 215 } 216 217 static struct syscore_ops acpi_processor_syscore_ops = { 218 .suspend = acpi_processor_suspend, 219 .resume = acpi_processor_resume, 220 }; 221 222 void acpi_processor_syscore_init(void) 223 { 224 register_syscore_ops(&acpi_processor_syscore_ops); 225 } 226 227 void acpi_processor_syscore_exit(void) 228 { 229 unregister_syscore_ops(&acpi_processor_syscore_ops); 230 } 231 #endif /* CONFIG_PM_SLEEP */ 232 233 #if defined(CONFIG_X86) 234 static void tsc_check_state(int state) 235 { 236 switch (boot_cpu_data.x86_vendor) { 237 case X86_VENDOR_AMD: 238 case X86_VENDOR_INTEL: 239 /* 240 * AMD Fam10h TSC will tick in all 241 * C/P/S0/S1 states when this bit is set. 242 */ 243 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) 244 return; 245 246 /*FALL THROUGH*/ 247 default: 248 /* TSC could halt in idle, so notify users */ 249 if (state > ACPI_STATE_C1) 250 mark_tsc_unstable("TSC halts in idle"); 251 } 252 } 253 #else 254 static void tsc_check_state(int state) { return; } 255 #endif 256 257 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) 258 { 259 260 if (!pr->pblk) 261 return -ENODEV; 262 263 /* if info is obtained from pblk/fadt, type equals state */ 264 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; 265 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; 266 267 #ifndef CONFIG_HOTPLUG_CPU 268 /* 269 * Check for P_LVL2_UP flag before entering C2 and above on 270 * an SMP system. 271 */ 272 if ((num_online_cpus() > 1) && 273 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 274 return -ENODEV; 275 #endif 276 277 /* determine C2 and C3 address from pblk */ 278 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; 279 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; 280 281 /* determine latencies from FADT */ 282 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; 283 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; 284 285 /* 286 * FADT specified C2 latency must be less than or equal to 287 * 100 microseconds. 288 */ 289 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { 290 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 291 "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency)); 292 /* invalidate C2 */ 293 pr->power.states[ACPI_STATE_C2].address = 0; 294 } 295 296 /* 297 * FADT supplied C3 latency must be less than or equal to 298 * 1000 microseconds. 299 */ 300 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { 301 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 302 "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency)); 303 /* invalidate C3 */ 304 pr->power.states[ACPI_STATE_C3].address = 0; 305 } 306 307 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 308 "lvl2[0x%08x] lvl3[0x%08x]\n", 309 pr->power.states[ACPI_STATE_C2].address, 310 pr->power.states[ACPI_STATE_C3].address)); 311 312 return 0; 313 } 314 315 static int acpi_processor_get_power_info_default(struct acpi_processor *pr) 316 { 317 if (!pr->power.states[ACPI_STATE_C1].valid) { 318 /* set the first C-State to C1 */ 319 /* all processors need to support C1 */ 320 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; 321 pr->power.states[ACPI_STATE_C1].valid = 1; 322 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; 323 } 324 /* the C0 state only exists as a filler in our array */ 325 pr->power.states[ACPI_STATE_C0].valid = 1; 326 return 0; 327 } 328 329 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) 330 { 331 acpi_status status; 332 u64 count; 333 int current_count; 334 int i, ret = 0; 335 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 336 union acpi_object *cst; 337 338 339 if (nocst) 340 return -ENODEV; 341 342 current_count = 0; 343 344 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); 345 if (ACPI_FAILURE(status)) { 346 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); 347 return -ENODEV; 348 } 349 350 cst = buffer.pointer; 351 352 /* There must be at least 2 elements */ 353 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { 354 printk(KERN_ERR PREFIX "not enough elements in _CST\n"); 355 ret = -EFAULT; 356 goto end; 357 } 358 359 count = cst->package.elements[0].integer.value; 360 361 /* Validate number of power states. */ 362 if (count < 1 || count != cst->package.count - 1) { 363 printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); 364 ret = -EFAULT; 365 goto end; 366 } 367 368 /* Tell driver that at least _CST is supported. */ 369 pr->flags.has_cst = 1; 370 371 for (i = 1; i <= count; i++) { 372 union acpi_object *element; 373 union acpi_object *obj; 374 struct acpi_power_register *reg; 375 struct acpi_processor_cx cx; 376 377 memset(&cx, 0, sizeof(cx)); 378 379 element = &(cst->package.elements[i]); 380 if (element->type != ACPI_TYPE_PACKAGE) 381 continue; 382 383 if (element->package.count != 4) 384 continue; 385 386 obj = &(element->package.elements[0]); 387 388 if (obj->type != ACPI_TYPE_BUFFER) 389 continue; 390 391 reg = (struct acpi_power_register *)obj->buffer.pointer; 392 393 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && 394 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) 395 continue; 396 397 /* There should be an easy way to extract an integer... */ 398 obj = &(element->package.elements[1]); 399 if (obj->type != ACPI_TYPE_INTEGER) 400 continue; 401 402 cx.type = obj->integer.value; 403 /* 404 * Some buggy BIOSes won't list C1 in _CST - 405 * Let acpi_processor_get_power_info_default() handle them later 406 */ 407 if (i == 1 && cx.type != ACPI_STATE_C1) 408 current_count++; 409 410 cx.address = reg->address; 411 cx.index = current_count + 1; 412 413 cx.entry_method = ACPI_CSTATE_SYSTEMIO; 414 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { 415 if (acpi_processor_ffh_cstate_probe 416 (pr->id, &cx, reg) == 0) { 417 cx.entry_method = ACPI_CSTATE_FFH; 418 } else if (cx.type == ACPI_STATE_C1) { 419 /* 420 * C1 is a special case where FIXED_HARDWARE 421 * can be handled in non-MWAIT way as well. 422 * In that case, save this _CST entry info. 423 * Otherwise, ignore this info and continue. 424 */ 425 cx.entry_method = ACPI_CSTATE_HALT; 426 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); 427 } else { 428 continue; 429 } 430 if (cx.type == ACPI_STATE_C1 && 431 (boot_option_idle_override == IDLE_NOMWAIT)) { 432 /* 433 * In most cases the C1 space_id obtained from 434 * _CST object is FIXED_HARDWARE access mode. 435 * But when the option of idle=halt is added, 436 * the entry_method type should be changed from 437 * CSTATE_FFH to CSTATE_HALT. 438 * When the option of idle=nomwait is added, 439 * the C1 entry_method type should be 440 * CSTATE_HALT. 441 */ 442 cx.entry_method = ACPI_CSTATE_HALT; 443 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); 444 } 445 } else { 446 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x", 447 cx.address); 448 } 449 450 if (cx.type == ACPI_STATE_C1) { 451 cx.valid = 1; 452 } 453 454 obj = &(element->package.elements[2]); 455 if (obj->type != ACPI_TYPE_INTEGER) 456 continue; 457 458 cx.latency = obj->integer.value; 459 460 obj = &(element->package.elements[3]); 461 if (obj->type != ACPI_TYPE_INTEGER) 462 continue; 463 464 current_count++; 465 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); 466 467 /* 468 * We support total ACPI_PROCESSOR_MAX_POWER - 1 469 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) 470 */ 471 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { 472 printk(KERN_WARNING 473 "Limiting number of power states to max (%d)\n", 474 ACPI_PROCESSOR_MAX_POWER); 475 printk(KERN_WARNING 476 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); 477 break; 478 } 479 } 480 481 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", 482 current_count)); 483 484 /* Validate number of power states discovered */ 485 if (current_count < 2) 486 ret = -EFAULT; 487 488 end: 489 kfree(buffer.pointer); 490 491 return ret; 492 } 493 494 static void acpi_processor_power_verify_c3(struct acpi_processor *pr, 495 struct acpi_processor_cx *cx) 496 { 497 static int bm_check_flag = -1; 498 static int bm_control_flag = -1; 499 500 501 if (!cx->address) 502 return; 503 504 /* 505 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) 506 * DMA transfers are used by any ISA device to avoid livelock. 507 * Note that we could disable Type-F DMA (as recommended by 508 * the erratum), but this is known to disrupt certain ISA 509 * devices thus we take the conservative approach. 510 */ 511 else if (errata.piix4.fdma) { 512 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 513 "C3 not supported on PIIX4 with Type-F DMA\n")); 514 return; 515 } 516 517 /* All the logic here assumes flags.bm_check is same across all CPUs */ 518 if (bm_check_flag == -1) { 519 /* Determine whether bm_check is needed based on CPU */ 520 acpi_processor_power_init_bm_check(&(pr->flags), pr->id); 521 bm_check_flag = pr->flags.bm_check; 522 bm_control_flag = pr->flags.bm_control; 523 } else { 524 pr->flags.bm_check = bm_check_flag; 525 pr->flags.bm_control = bm_control_flag; 526 } 527 528 if (pr->flags.bm_check) { 529 if (!pr->flags.bm_control) { 530 if (pr->flags.has_cst != 1) { 531 /* bus mastering control is necessary */ 532 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 533 "C3 support requires BM control\n")); 534 return; 535 } else { 536 /* Here we enter C3 without bus mastering */ 537 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 538 "C3 support without BM control\n")); 539 } 540 } 541 } else { 542 /* 543 * WBINVD should be set in fadt, for C3 state to be 544 * supported on when bm_check is not required. 545 */ 546 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { 547 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 548 "Cache invalidation should work properly" 549 " for C3 to be enabled on SMP systems\n")); 550 return; 551 } 552 } 553 554 /* 555 * Otherwise we've met all of our C3 requirements. 556 * Normalize the C3 latency to expidite policy. Enable 557 * checking of bus mastering status (bm_check) so we can 558 * use this in our C3 policy 559 */ 560 cx->valid = 1; 561 562 /* 563 * On older chipsets, BM_RLD needs to be set 564 * in order for Bus Master activity to wake the 565 * system from C3. Newer chipsets handle DMA 566 * during C3 automatically and BM_RLD is a NOP. 567 * In either case, the proper way to 568 * handle BM_RLD is to set it and leave it set. 569 */ 570 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); 571 572 return; 573 } 574 575 static int acpi_processor_power_verify(struct acpi_processor *pr) 576 { 577 unsigned int i; 578 unsigned int working = 0; 579 580 pr->power.timer_broadcast_on_state = INT_MAX; 581 582 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 583 struct acpi_processor_cx *cx = &pr->power.states[i]; 584 585 switch (cx->type) { 586 case ACPI_STATE_C1: 587 cx->valid = 1; 588 break; 589 590 case ACPI_STATE_C2: 591 if (!cx->address) 592 break; 593 cx->valid = 1; 594 break; 595 596 case ACPI_STATE_C3: 597 acpi_processor_power_verify_c3(pr, cx); 598 break; 599 } 600 if (!cx->valid) 601 continue; 602 603 lapic_timer_check_state(i, pr, cx); 604 tsc_check_state(cx->type); 605 working++; 606 } 607 608 lapic_timer_propagate_broadcast(pr); 609 610 return (working); 611 } 612 613 static int acpi_processor_get_power_info(struct acpi_processor *pr) 614 { 615 unsigned int i; 616 int result; 617 618 619 /* NOTE: the idle thread may not be running while calling 620 * this function */ 621 622 /* Zero initialize all the C-states info. */ 623 memset(pr->power.states, 0, sizeof(pr->power.states)); 624 625 result = acpi_processor_get_power_info_cst(pr); 626 if (result == -ENODEV) 627 result = acpi_processor_get_power_info_fadt(pr); 628 629 if (result) 630 return result; 631 632 acpi_processor_get_power_info_default(pr); 633 634 pr->power.count = acpi_processor_power_verify(pr); 635 636 /* 637 * if one state of type C2 or C3 is available, mark this 638 * CPU as being "idle manageable" 639 */ 640 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { 641 if (pr->power.states[i].valid) { 642 pr->power.count = i; 643 if (pr->power.states[i].type >= ACPI_STATE_C2) 644 pr->flags.power = 1; 645 } 646 } 647 648 return 0; 649 } 650 651 /** 652 * acpi_idle_bm_check - checks if bus master activity was detected 653 */ 654 static int acpi_idle_bm_check(void) 655 { 656 u32 bm_status = 0; 657 658 if (bm_check_disable) 659 return 0; 660 661 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); 662 if (bm_status) 663 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); 664 /* 665 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect 666 * the true state of bus mastering activity; forcing us to 667 * manually check the BMIDEA bit of each IDE channel. 668 */ 669 else if (errata.piix4.bmisx) { 670 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) 671 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) 672 bm_status = 1; 673 } 674 return bm_status; 675 } 676 677 /** 678 * acpi_idle_do_entry - enter idle state using the appropriate method 679 * @cx: cstate data 680 * 681 * Caller disables interrupt before call and enables interrupt after return. 682 */ 683 static void acpi_idle_do_entry(struct acpi_processor_cx *cx) 684 { 685 if (cx->entry_method == ACPI_CSTATE_FFH) { 686 /* Call into architectural FFH based C-state */ 687 acpi_processor_ffh_cstate_enter(cx); 688 } else if (cx->entry_method == ACPI_CSTATE_HALT) { 689 acpi_safe_halt(); 690 } else { 691 /* IO port based C-state */ 692 inb(cx->address); 693 /* Dummy wait op - must do something useless after P_LVL2 read 694 because chipsets cannot guarantee that STPCLK# signal 695 gets asserted in time to freeze execution properly. */ 696 inl(acpi_gbl_FADT.xpm_timer_block.address); 697 } 698 } 699 700 /** 701 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) 702 * @dev: the target CPU 703 * @index: the index of suggested state 704 */ 705 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) 706 { 707 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 708 709 ACPI_FLUSH_CPU_CACHE(); 710 711 while (1) { 712 713 if (cx->entry_method == ACPI_CSTATE_HALT) 714 safe_halt(); 715 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { 716 inb(cx->address); 717 /* See comment in acpi_idle_do_entry() */ 718 inl(acpi_gbl_FADT.xpm_timer_block.address); 719 } else 720 return -ENODEV; 721 } 722 723 /* Never reached */ 724 return 0; 725 } 726 727 static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr) 728 { 729 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst && 730 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED); 731 } 732 733 static int c3_cpu_count; 734 static DEFINE_RAW_SPINLOCK(c3_lock); 735 736 /** 737 * acpi_idle_enter_bm - enters C3 with proper BM handling 738 * @pr: Target processor 739 * @cx: Target state context 740 * @timer_bc: Whether or not to change timer mode to broadcast 741 */ 742 static void acpi_idle_enter_bm(struct acpi_processor *pr, 743 struct acpi_processor_cx *cx, bool timer_bc) 744 { 745 acpi_unlazy_tlb(smp_processor_id()); 746 747 /* 748 * Must be done before busmaster disable as we might need to 749 * access HPET ! 750 */ 751 if (timer_bc) 752 lapic_timer_state_broadcast(pr, cx, 1); 753 754 /* 755 * disable bus master 756 * bm_check implies we need ARB_DIS 757 * bm_control implies whether we can do ARB_DIS 758 * 759 * That leaves a case where bm_check is set and bm_control is 760 * not set. In that case we cannot do much, we enter C3 761 * without doing anything. 762 */ 763 if (pr->flags.bm_control) { 764 raw_spin_lock(&c3_lock); 765 c3_cpu_count++; 766 /* Disable bus master arbitration when all CPUs are in C3 */ 767 if (c3_cpu_count == num_online_cpus()) 768 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); 769 raw_spin_unlock(&c3_lock); 770 } 771 772 acpi_idle_do_entry(cx); 773 774 /* Re-enable bus master arbitration */ 775 if (pr->flags.bm_control) { 776 raw_spin_lock(&c3_lock); 777 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); 778 c3_cpu_count--; 779 raw_spin_unlock(&c3_lock); 780 } 781 782 if (timer_bc) 783 lapic_timer_state_broadcast(pr, cx, 0); 784 } 785 786 static int acpi_idle_enter(struct cpuidle_device *dev, 787 struct cpuidle_driver *drv, int index) 788 { 789 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 790 struct acpi_processor *pr; 791 792 pr = __this_cpu_read(processors); 793 if (unlikely(!pr)) 794 return -EINVAL; 795 796 if (cx->type != ACPI_STATE_C1) { 797 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) { 798 index = CPUIDLE_DRIVER_STATE_START; 799 cx = per_cpu(acpi_cstate[index], dev->cpu); 800 } else if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) { 801 if (cx->bm_sts_skip || !acpi_idle_bm_check()) { 802 acpi_idle_enter_bm(pr, cx, true); 803 return index; 804 } else if (drv->safe_state_index >= 0) { 805 index = drv->safe_state_index; 806 cx = per_cpu(acpi_cstate[index], dev->cpu); 807 } else { 808 acpi_safe_halt(); 809 return -EBUSY; 810 } 811 } 812 } 813 814 lapic_timer_state_broadcast(pr, cx, 1); 815 816 if (cx->type == ACPI_STATE_C3) 817 ACPI_FLUSH_CPU_CACHE(); 818 819 acpi_idle_do_entry(cx); 820 821 lapic_timer_state_broadcast(pr, cx, 0); 822 823 return index; 824 } 825 826 static void acpi_idle_enter_freeze(struct cpuidle_device *dev, 827 struct cpuidle_driver *drv, int index) 828 { 829 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 830 831 if (cx->type == ACPI_STATE_C3) { 832 struct acpi_processor *pr = __this_cpu_read(processors); 833 834 if (unlikely(!pr)) 835 return; 836 837 if (pr->flags.bm_check) { 838 acpi_idle_enter_bm(pr, cx, false); 839 return; 840 } else { 841 ACPI_FLUSH_CPU_CACHE(); 842 } 843 } 844 acpi_idle_do_entry(cx); 845 } 846 847 struct cpuidle_driver acpi_idle_driver = { 848 .name = "acpi_idle", 849 .owner = THIS_MODULE, 850 }; 851 852 /** 853 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE 854 * device i.e. per-cpu data 855 * 856 * @pr: the ACPI processor 857 * @dev : the cpuidle device 858 */ 859 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, 860 struct cpuidle_device *dev) 861 { 862 int i, count = CPUIDLE_DRIVER_STATE_START; 863 struct acpi_processor_cx *cx; 864 865 if (!pr->flags.power_setup_done) 866 return -EINVAL; 867 868 if (pr->flags.power == 0) { 869 return -EINVAL; 870 } 871 872 if (!dev) 873 return -EINVAL; 874 875 dev->cpu = pr->id; 876 877 if (max_cstate == 0) 878 max_cstate = 1; 879 880 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 881 cx = &pr->power.states[i]; 882 883 if (!cx->valid) 884 continue; 885 886 per_cpu(acpi_cstate[count], dev->cpu) = cx; 887 888 count++; 889 if (count == CPUIDLE_STATE_MAX) 890 break; 891 } 892 893 if (!count) 894 return -EINVAL; 895 896 return 0; 897 } 898 899 /** 900 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle 901 * global state data i.e. idle routines 902 * 903 * @pr: the ACPI processor 904 */ 905 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) 906 { 907 int i, count = CPUIDLE_DRIVER_STATE_START; 908 struct acpi_processor_cx *cx; 909 struct cpuidle_state *state; 910 struct cpuidle_driver *drv = &acpi_idle_driver; 911 912 if (!pr->flags.power_setup_done) 913 return -EINVAL; 914 915 if (pr->flags.power == 0) 916 return -EINVAL; 917 918 drv->safe_state_index = -1; 919 for (i = CPUIDLE_DRIVER_STATE_START; i < CPUIDLE_STATE_MAX; i++) { 920 drv->states[i].name[0] = '\0'; 921 drv->states[i].desc[0] = '\0'; 922 } 923 924 if (max_cstate == 0) 925 max_cstate = 1; 926 927 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 928 cx = &pr->power.states[i]; 929 930 if (!cx->valid) 931 continue; 932 933 state = &drv->states[count]; 934 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); 935 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); 936 state->exit_latency = cx->latency; 937 state->target_residency = cx->latency * latency_factor; 938 state->enter = acpi_idle_enter; 939 940 state->flags = 0; 941 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) { 942 state->enter_dead = acpi_idle_play_dead; 943 drv->safe_state_index = count; 944 } 945 /* 946 * Halt-induced C1 is not good for ->enter_freeze, because it 947 * re-enables interrupts on exit. Moreover, C1 is generally not 948 * particularly interesting from the suspend-to-idle angle, so 949 * avoid C1 and the situations in which we may need to fall back 950 * to it altogether. 951 */ 952 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr)) 953 state->enter_freeze = acpi_idle_enter_freeze; 954 955 count++; 956 if (count == CPUIDLE_STATE_MAX) 957 break; 958 } 959 960 drv->state_count = count; 961 962 if (!count) 963 return -EINVAL; 964 965 return 0; 966 } 967 968 int acpi_processor_hotplug(struct acpi_processor *pr) 969 { 970 int ret = 0; 971 struct cpuidle_device *dev; 972 973 if (disabled_by_idle_boot_param()) 974 return 0; 975 976 if (nocst) 977 return -ENODEV; 978 979 if (!pr->flags.power_setup_done) 980 return -ENODEV; 981 982 dev = per_cpu(acpi_cpuidle_device, pr->id); 983 cpuidle_pause_and_lock(); 984 cpuidle_disable_device(dev); 985 acpi_processor_get_power_info(pr); 986 if (pr->flags.power) { 987 acpi_processor_setup_cpuidle_cx(pr, dev); 988 ret = cpuidle_enable_device(dev); 989 } 990 cpuidle_resume_and_unlock(); 991 992 return ret; 993 } 994 995 int acpi_processor_cst_has_changed(struct acpi_processor *pr) 996 { 997 int cpu; 998 struct acpi_processor *_pr; 999 struct cpuidle_device *dev; 1000 1001 if (disabled_by_idle_boot_param()) 1002 return 0; 1003 1004 if (nocst) 1005 return -ENODEV; 1006 1007 if (!pr->flags.power_setup_done) 1008 return -ENODEV; 1009 1010 /* 1011 * FIXME: Design the ACPI notification to make it once per 1012 * system instead of once per-cpu. This condition is a hack 1013 * to make the code that updates C-States be called once. 1014 */ 1015 1016 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { 1017 1018 /* Protect against cpu-hotplug */ 1019 get_online_cpus(); 1020 cpuidle_pause_and_lock(); 1021 1022 /* Disable all cpuidle devices */ 1023 for_each_online_cpu(cpu) { 1024 _pr = per_cpu(processors, cpu); 1025 if (!_pr || !_pr->flags.power_setup_done) 1026 continue; 1027 dev = per_cpu(acpi_cpuidle_device, cpu); 1028 cpuidle_disable_device(dev); 1029 } 1030 1031 /* Populate Updated C-state information */ 1032 acpi_processor_get_power_info(pr); 1033 acpi_processor_setup_cpuidle_states(pr); 1034 1035 /* Enable all cpuidle devices */ 1036 for_each_online_cpu(cpu) { 1037 _pr = per_cpu(processors, cpu); 1038 if (!_pr || !_pr->flags.power_setup_done) 1039 continue; 1040 acpi_processor_get_power_info(_pr); 1041 if (_pr->flags.power) { 1042 dev = per_cpu(acpi_cpuidle_device, cpu); 1043 acpi_processor_setup_cpuidle_cx(_pr, dev); 1044 cpuidle_enable_device(dev); 1045 } 1046 } 1047 cpuidle_resume_and_unlock(); 1048 put_online_cpus(); 1049 } 1050 1051 return 0; 1052 } 1053 1054 static int acpi_processor_registered; 1055 1056 int acpi_processor_power_init(struct acpi_processor *pr) 1057 { 1058 acpi_status status; 1059 int retval; 1060 struct cpuidle_device *dev; 1061 static int first_run; 1062 1063 if (disabled_by_idle_boot_param()) 1064 return 0; 1065 1066 if (!first_run) { 1067 dmi_check_system(processor_power_dmi_table); 1068 max_cstate = acpi_processor_cstate_check(max_cstate); 1069 if (max_cstate < ACPI_C_STATES_MAX) 1070 printk(KERN_NOTICE 1071 "ACPI: processor limited to max C-state %d\n", 1072 max_cstate); 1073 first_run++; 1074 } 1075 1076 if (acpi_gbl_FADT.cst_control && !nocst) { 1077 status = 1078 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8); 1079 if (ACPI_FAILURE(status)) { 1080 ACPI_EXCEPTION((AE_INFO, status, 1081 "Notifying BIOS of _CST ability failed")); 1082 } 1083 } 1084 1085 acpi_processor_get_power_info(pr); 1086 pr->flags.power_setup_done = 1; 1087 1088 /* 1089 * Install the idle handler if processor power management is supported. 1090 * Note that we use previously set idle handler will be used on 1091 * platforms that only support C1. 1092 */ 1093 if (pr->flags.power) { 1094 /* Register acpi_idle_driver if not already registered */ 1095 if (!acpi_processor_registered) { 1096 acpi_processor_setup_cpuidle_states(pr); 1097 retval = cpuidle_register_driver(&acpi_idle_driver); 1098 if (retval) 1099 return retval; 1100 printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n", 1101 acpi_idle_driver.name); 1102 } 1103 1104 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1105 if (!dev) 1106 return -ENOMEM; 1107 per_cpu(acpi_cpuidle_device, pr->id) = dev; 1108 1109 acpi_processor_setup_cpuidle_cx(pr, dev); 1110 1111 /* Register per-cpu cpuidle_device. Cpuidle driver 1112 * must already be registered before registering device 1113 */ 1114 retval = cpuidle_register_device(dev); 1115 if (retval) { 1116 if (acpi_processor_registered == 0) 1117 cpuidle_unregister_driver(&acpi_idle_driver); 1118 return retval; 1119 } 1120 acpi_processor_registered++; 1121 } 1122 return 0; 1123 } 1124 1125 int acpi_processor_power_exit(struct acpi_processor *pr) 1126 { 1127 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); 1128 1129 if (disabled_by_idle_boot_param()) 1130 return 0; 1131 1132 if (pr->flags.power) { 1133 cpuidle_unregister_device(dev); 1134 acpi_processor_registered--; 1135 if (acpi_processor_registered == 0) 1136 cpuidle_unregister_driver(&acpi_idle_driver); 1137 } 1138 1139 pr->flags.power_setup_done = 0; 1140 return 0; 1141 } 1142