1 /* 2 * processor_idle - idle state submodule to the ACPI processor driver 3 * 4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> 7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> 8 * - Added processor hotplug support 9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> 10 * - Added support for C3 on SMP 11 * 12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License as published by 16 * the Free Software Foundation; either version 2 of the License, or (at 17 * your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, but 20 * WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 * General Public License for more details. 23 * 24 * You should have received a copy of the GNU General Public License along 25 * with this program; if not, write to the Free Software Foundation, Inc., 26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. 27 * 28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 29 */ 30 31 #include <linux/module.h> 32 #include <linux/acpi.h> 33 #include <linux/dmi.h> 34 #include <linux/sched.h> /* need_resched() */ 35 #include <linux/clockchips.h> 36 #include <linux/cpuidle.h> 37 #include <linux/syscore_ops.h> 38 39 /* 40 * Include the apic definitions for x86 to have the APIC timer related defines 41 * available also for UP (on SMP it gets magically included via linux/smp.h). 42 * asm/acpi.h is not an option, as it would require more include magic. Also 43 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. 44 */ 45 #ifdef CONFIG_X86 46 #include <asm/apic.h> 47 #endif 48 49 #include <acpi/acpi_bus.h> 50 #include <acpi/processor.h> 51 52 #define PREFIX "ACPI: " 53 54 #define ACPI_PROCESSOR_CLASS "processor" 55 #define _COMPONENT ACPI_PROCESSOR_COMPONENT 56 ACPI_MODULE_NAME("processor_idle"); 57 58 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; 59 module_param(max_cstate, uint, 0000); 60 static unsigned int nocst __read_mostly; 61 module_param(nocst, uint, 0000); 62 static int bm_check_disable __read_mostly; 63 module_param(bm_check_disable, uint, 0000); 64 65 static unsigned int latency_factor __read_mostly = 2; 66 module_param(latency_factor, uint, 0644); 67 68 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); 69 70 static DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], 71 acpi_cstate); 72 73 static int disabled_by_idle_boot_param(void) 74 { 75 return boot_option_idle_override == IDLE_POLL || 76 boot_option_idle_override == IDLE_HALT; 77 } 78 79 /* 80 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. 81 * For now disable this. Probably a bug somewhere else. 82 * 83 * To skip this limit, boot/load with a large max_cstate limit. 84 */ 85 static int set_max_cstate(const struct dmi_system_id *id) 86 { 87 if (max_cstate > ACPI_PROCESSOR_MAX_POWER) 88 return 0; 89 90 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." 91 " Override with \"processor.max_cstate=%d\"\n", id->ident, 92 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); 93 94 max_cstate = (long)id->driver_data; 95 96 return 0; 97 } 98 99 static struct dmi_system_id processor_power_dmi_table[] = { 100 { set_max_cstate, "Clevo 5600D", { 101 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), 102 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, 103 (void *)2}, 104 { set_max_cstate, "Pavilion zv5000", { 105 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 106 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, 107 (void *)1}, 108 { set_max_cstate, "Asus L8400B", { 109 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), 110 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, 111 (void *)1}, 112 {}, 113 }; 114 115 116 /* 117 * Callers should disable interrupts before the call and enable 118 * interrupts after return. 119 */ 120 static void acpi_safe_halt(void) 121 { 122 if (!tif_need_resched()) { 123 safe_halt(); 124 local_irq_disable(); 125 } 126 } 127 128 #ifdef ARCH_APICTIMER_STOPS_ON_C3 129 130 /* 131 * Some BIOS implementations switch to C3 in the published C2 state. 132 * This seems to be a common problem on AMD boxen, but other vendors 133 * are affected too. We pick the most conservative approach: we assume 134 * that the local APIC stops in both C2 and C3. 135 */ 136 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 137 struct acpi_processor_cx *cx) 138 { 139 struct acpi_processor_power *pwr = &pr->power; 140 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; 141 142 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) 143 return; 144 145 if (amd_e400_c1e_detected) 146 type = ACPI_STATE_C1; 147 148 /* 149 * Check, if one of the previous states already marked the lapic 150 * unstable 151 */ 152 if (pwr->timer_broadcast_on_state < state) 153 return; 154 155 if (cx->type >= type) 156 pr->power.timer_broadcast_on_state = state; 157 } 158 159 static void __lapic_timer_propagate_broadcast(void *arg) 160 { 161 struct acpi_processor *pr = (struct acpi_processor *) arg; 162 unsigned long reason; 163 164 reason = pr->power.timer_broadcast_on_state < INT_MAX ? 165 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF; 166 167 clockevents_notify(reason, &pr->id); 168 } 169 170 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) 171 { 172 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, 173 (void *)pr, 1); 174 } 175 176 /* Power(C) State timer broadcast control */ 177 static void lapic_timer_state_broadcast(struct acpi_processor *pr, 178 struct acpi_processor_cx *cx, 179 int broadcast) 180 { 181 int state = cx - pr->power.states; 182 183 if (state >= pr->power.timer_broadcast_on_state) { 184 unsigned long reason; 185 186 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER : 187 CLOCK_EVT_NOTIFY_BROADCAST_EXIT; 188 clockevents_notify(reason, &pr->id); 189 } 190 } 191 192 #else 193 194 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 195 struct acpi_processor_cx *cstate) { } 196 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } 197 static void lapic_timer_state_broadcast(struct acpi_processor *pr, 198 struct acpi_processor_cx *cx, 199 int broadcast) 200 { 201 } 202 203 #endif 204 205 #ifdef CONFIG_PM_SLEEP 206 static u32 saved_bm_rld; 207 208 static int acpi_processor_suspend(void) 209 { 210 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld); 211 return 0; 212 } 213 214 static void acpi_processor_resume(void) 215 { 216 u32 resumed_bm_rld; 217 218 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld); 219 if (resumed_bm_rld == saved_bm_rld) 220 return; 221 222 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld); 223 } 224 225 static struct syscore_ops acpi_processor_syscore_ops = { 226 .suspend = acpi_processor_suspend, 227 .resume = acpi_processor_resume, 228 }; 229 230 void acpi_processor_syscore_init(void) 231 { 232 register_syscore_ops(&acpi_processor_syscore_ops); 233 } 234 235 void acpi_processor_syscore_exit(void) 236 { 237 unregister_syscore_ops(&acpi_processor_syscore_ops); 238 } 239 #endif /* CONFIG_PM_SLEEP */ 240 241 #if defined(CONFIG_X86) 242 static void tsc_check_state(int state) 243 { 244 switch (boot_cpu_data.x86_vendor) { 245 case X86_VENDOR_AMD: 246 case X86_VENDOR_INTEL: 247 /* 248 * AMD Fam10h TSC will tick in all 249 * C/P/S0/S1 states when this bit is set. 250 */ 251 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) 252 return; 253 254 /*FALL THROUGH*/ 255 default: 256 /* TSC could halt in idle, so notify users */ 257 if (state > ACPI_STATE_C1) 258 mark_tsc_unstable("TSC halts in idle"); 259 } 260 } 261 #else 262 static void tsc_check_state(int state) { return; } 263 #endif 264 265 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) 266 { 267 268 if (!pr->pblk) 269 return -ENODEV; 270 271 /* if info is obtained from pblk/fadt, type equals state */ 272 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; 273 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; 274 275 #ifndef CONFIG_HOTPLUG_CPU 276 /* 277 * Check for P_LVL2_UP flag before entering C2 and above on 278 * an SMP system. 279 */ 280 if ((num_online_cpus() > 1) && 281 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 282 return -ENODEV; 283 #endif 284 285 /* determine C2 and C3 address from pblk */ 286 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; 287 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; 288 289 /* determine latencies from FADT */ 290 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; 291 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; 292 293 /* 294 * FADT specified C2 latency must be less than or equal to 295 * 100 microseconds. 296 */ 297 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { 298 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 299 "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency)); 300 /* invalidate C2 */ 301 pr->power.states[ACPI_STATE_C2].address = 0; 302 } 303 304 /* 305 * FADT supplied C3 latency must be less than or equal to 306 * 1000 microseconds. 307 */ 308 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { 309 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 310 "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency)); 311 /* invalidate C3 */ 312 pr->power.states[ACPI_STATE_C3].address = 0; 313 } 314 315 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 316 "lvl2[0x%08x] lvl3[0x%08x]\n", 317 pr->power.states[ACPI_STATE_C2].address, 318 pr->power.states[ACPI_STATE_C3].address)); 319 320 return 0; 321 } 322 323 static int acpi_processor_get_power_info_default(struct acpi_processor *pr) 324 { 325 if (!pr->power.states[ACPI_STATE_C1].valid) { 326 /* set the first C-State to C1 */ 327 /* all processors need to support C1 */ 328 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; 329 pr->power.states[ACPI_STATE_C1].valid = 1; 330 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; 331 } 332 /* the C0 state only exists as a filler in our array */ 333 pr->power.states[ACPI_STATE_C0].valid = 1; 334 return 0; 335 } 336 337 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) 338 { 339 acpi_status status = 0; 340 u64 count; 341 int current_count; 342 int i; 343 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 344 union acpi_object *cst; 345 346 347 if (nocst) 348 return -ENODEV; 349 350 current_count = 0; 351 352 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); 353 if (ACPI_FAILURE(status)) { 354 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); 355 return -ENODEV; 356 } 357 358 cst = buffer.pointer; 359 360 /* There must be at least 2 elements */ 361 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { 362 printk(KERN_ERR PREFIX "not enough elements in _CST\n"); 363 status = -EFAULT; 364 goto end; 365 } 366 367 count = cst->package.elements[0].integer.value; 368 369 /* Validate number of power states. */ 370 if (count < 1 || count != cst->package.count - 1) { 371 printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); 372 status = -EFAULT; 373 goto end; 374 } 375 376 /* Tell driver that at least _CST is supported. */ 377 pr->flags.has_cst = 1; 378 379 for (i = 1; i <= count; i++) { 380 union acpi_object *element; 381 union acpi_object *obj; 382 struct acpi_power_register *reg; 383 struct acpi_processor_cx cx; 384 385 memset(&cx, 0, sizeof(cx)); 386 387 element = &(cst->package.elements[i]); 388 if (element->type != ACPI_TYPE_PACKAGE) 389 continue; 390 391 if (element->package.count != 4) 392 continue; 393 394 obj = &(element->package.elements[0]); 395 396 if (obj->type != ACPI_TYPE_BUFFER) 397 continue; 398 399 reg = (struct acpi_power_register *)obj->buffer.pointer; 400 401 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && 402 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) 403 continue; 404 405 /* There should be an easy way to extract an integer... */ 406 obj = &(element->package.elements[1]); 407 if (obj->type != ACPI_TYPE_INTEGER) 408 continue; 409 410 cx.type = obj->integer.value; 411 /* 412 * Some buggy BIOSes won't list C1 in _CST - 413 * Let acpi_processor_get_power_info_default() handle them later 414 */ 415 if (i == 1 && cx.type != ACPI_STATE_C1) 416 current_count++; 417 418 cx.address = reg->address; 419 cx.index = current_count + 1; 420 421 cx.entry_method = ACPI_CSTATE_SYSTEMIO; 422 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { 423 if (acpi_processor_ffh_cstate_probe 424 (pr->id, &cx, reg) == 0) { 425 cx.entry_method = ACPI_CSTATE_FFH; 426 } else if (cx.type == ACPI_STATE_C1) { 427 /* 428 * C1 is a special case where FIXED_HARDWARE 429 * can be handled in non-MWAIT way as well. 430 * In that case, save this _CST entry info. 431 * Otherwise, ignore this info and continue. 432 */ 433 cx.entry_method = ACPI_CSTATE_HALT; 434 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); 435 } else { 436 continue; 437 } 438 if (cx.type == ACPI_STATE_C1 && 439 (boot_option_idle_override == IDLE_NOMWAIT)) { 440 /* 441 * In most cases the C1 space_id obtained from 442 * _CST object is FIXED_HARDWARE access mode. 443 * But when the option of idle=halt is added, 444 * the entry_method type should be changed from 445 * CSTATE_FFH to CSTATE_HALT. 446 * When the option of idle=nomwait is added, 447 * the C1 entry_method type should be 448 * CSTATE_HALT. 449 */ 450 cx.entry_method = ACPI_CSTATE_HALT; 451 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); 452 } 453 } else { 454 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x", 455 cx.address); 456 } 457 458 if (cx.type == ACPI_STATE_C1) { 459 cx.valid = 1; 460 } 461 462 obj = &(element->package.elements[2]); 463 if (obj->type != ACPI_TYPE_INTEGER) 464 continue; 465 466 cx.latency = obj->integer.value; 467 468 obj = &(element->package.elements[3]); 469 if (obj->type != ACPI_TYPE_INTEGER) 470 continue; 471 472 current_count++; 473 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); 474 475 /* 476 * We support total ACPI_PROCESSOR_MAX_POWER - 1 477 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) 478 */ 479 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { 480 printk(KERN_WARNING 481 "Limiting number of power states to max (%d)\n", 482 ACPI_PROCESSOR_MAX_POWER); 483 printk(KERN_WARNING 484 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); 485 break; 486 } 487 } 488 489 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", 490 current_count)); 491 492 /* Validate number of power states discovered */ 493 if (current_count < 2) 494 status = -EFAULT; 495 496 end: 497 kfree(buffer.pointer); 498 499 return status; 500 } 501 502 static void acpi_processor_power_verify_c3(struct acpi_processor *pr, 503 struct acpi_processor_cx *cx) 504 { 505 static int bm_check_flag = -1; 506 static int bm_control_flag = -1; 507 508 509 if (!cx->address) 510 return; 511 512 /* 513 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) 514 * DMA transfers are used by any ISA device to avoid livelock. 515 * Note that we could disable Type-F DMA (as recommended by 516 * the erratum), but this is known to disrupt certain ISA 517 * devices thus we take the conservative approach. 518 */ 519 else if (errata.piix4.fdma) { 520 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 521 "C3 not supported on PIIX4 with Type-F DMA\n")); 522 return; 523 } 524 525 /* All the logic here assumes flags.bm_check is same across all CPUs */ 526 if (bm_check_flag == -1) { 527 /* Determine whether bm_check is needed based on CPU */ 528 acpi_processor_power_init_bm_check(&(pr->flags), pr->id); 529 bm_check_flag = pr->flags.bm_check; 530 bm_control_flag = pr->flags.bm_control; 531 } else { 532 pr->flags.bm_check = bm_check_flag; 533 pr->flags.bm_control = bm_control_flag; 534 } 535 536 if (pr->flags.bm_check) { 537 if (!pr->flags.bm_control) { 538 if (pr->flags.has_cst != 1) { 539 /* bus mastering control is necessary */ 540 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 541 "C3 support requires BM control\n")); 542 return; 543 } else { 544 /* Here we enter C3 without bus mastering */ 545 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 546 "C3 support without BM control\n")); 547 } 548 } 549 } else { 550 /* 551 * WBINVD should be set in fadt, for C3 state to be 552 * supported on when bm_check is not required. 553 */ 554 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { 555 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 556 "Cache invalidation should work properly" 557 " for C3 to be enabled on SMP systems\n")); 558 return; 559 } 560 } 561 562 /* 563 * Otherwise we've met all of our C3 requirements. 564 * Normalize the C3 latency to expidite policy. Enable 565 * checking of bus mastering status (bm_check) so we can 566 * use this in our C3 policy 567 */ 568 cx->valid = 1; 569 570 /* 571 * On older chipsets, BM_RLD needs to be set 572 * in order for Bus Master activity to wake the 573 * system from C3. Newer chipsets handle DMA 574 * during C3 automatically and BM_RLD is a NOP. 575 * In either case, the proper way to 576 * handle BM_RLD is to set it and leave it set. 577 */ 578 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); 579 580 return; 581 } 582 583 static int acpi_processor_power_verify(struct acpi_processor *pr) 584 { 585 unsigned int i; 586 unsigned int working = 0; 587 588 pr->power.timer_broadcast_on_state = INT_MAX; 589 590 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 591 struct acpi_processor_cx *cx = &pr->power.states[i]; 592 593 switch (cx->type) { 594 case ACPI_STATE_C1: 595 cx->valid = 1; 596 break; 597 598 case ACPI_STATE_C2: 599 if (!cx->address) 600 break; 601 cx->valid = 1; 602 break; 603 604 case ACPI_STATE_C3: 605 acpi_processor_power_verify_c3(pr, cx); 606 break; 607 } 608 if (!cx->valid) 609 continue; 610 611 lapic_timer_check_state(i, pr, cx); 612 tsc_check_state(cx->type); 613 working++; 614 } 615 616 lapic_timer_propagate_broadcast(pr); 617 618 return (working); 619 } 620 621 static int acpi_processor_get_power_info(struct acpi_processor *pr) 622 { 623 unsigned int i; 624 int result; 625 626 627 /* NOTE: the idle thread may not be running while calling 628 * this function */ 629 630 /* Zero initialize all the C-states info. */ 631 memset(pr->power.states, 0, sizeof(pr->power.states)); 632 633 result = acpi_processor_get_power_info_cst(pr); 634 if (result == -ENODEV) 635 result = acpi_processor_get_power_info_fadt(pr); 636 637 if (result) 638 return result; 639 640 acpi_processor_get_power_info_default(pr); 641 642 pr->power.count = acpi_processor_power_verify(pr); 643 644 /* 645 * if one state of type C2 or C3 is available, mark this 646 * CPU as being "idle manageable" 647 */ 648 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { 649 if (pr->power.states[i].valid) { 650 pr->power.count = i; 651 if (pr->power.states[i].type >= ACPI_STATE_C2) 652 pr->flags.power = 1; 653 } 654 } 655 656 return 0; 657 } 658 659 /** 660 * acpi_idle_bm_check - checks if bus master activity was detected 661 */ 662 static int acpi_idle_bm_check(void) 663 { 664 u32 bm_status = 0; 665 666 if (bm_check_disable) 667 return 0; 668 669 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); 670 if (bm_status) 671 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); 672 /* 673 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect 674 * the true state of bus mastering activity; forcing us to 675 * manually check the BMIDEA bit of each IDE channel. 676 */ 677 else if (errata.piix4.bmisx) { 678 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) 679 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) 680 bm_status = 1; 681 } 682 return bm_status; 683 } 684 685 /** 686 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry 687 * @cx: cstate data 688 * 689 * Caller disables interrupt before call and enables interrupt after return. 690 */ 691 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx) 692 { 693 /* Don't trace irqs off for idle */ 694 stop_critical_timings(); 695 if (cx->entry_method == ACPI_CSTATE_FFH) { 696 /* Call into architectural FFH based C-state */ 697 acpi_processor_ffh_cstate_enter(cx); 698 } else if (cx->entry_method == ACPI_CSTATE_HALT) { 699 acpi_safe_halt(); 700 } else { 701 /* IO port based C-state */ 702 inb(cx->address); 703 /* Dummy wait op - must do something useless after P_LVL2 read 704 because chipsets cannot guarantee that STPCLK# signal 705 gets asserted in time to freeze execution properly. */ 706 inl(acpi_gbl_FADT.xpm_timer_block.address); 707 } 708 start_critical_timings(); 709 } 710 711 /** 712 * acpi_idle_enter_c1 - enters an ACPI C1 state-type 713 * @dev: the target CPU 714 * @drv: cpuidle driver containing cpuidle state info 715 * @index: index of target state 716 * 717 * This is equivalent to the HALT instruction. 718 */ 719 static int acpi_idle_enter_c1(struct cpuidle_device *dev, 720 struct cpuidle_driver *drv, int index) 721 { 722 struct acpi_processor *pr; 723 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 724 725 pr = __this_cpu_read(processors); 726 727 if (unlikely(!pr)) 728 return -EINVAL; 729 730 if (cx->entry_method == ACPI_CSTATE_FFH) { 731 if (current_set_polling_and_test()) 732 return -EINVAL; 733 } 734 735 lapic_timer_state_broadcast(pr, cx, 1); 736 acpi_idle_do_entry(cx); 737 738 lapic_timer_state_broadcast(pr, cx, 0); 739 740 return index; 741 } 742 743 744 /** 745 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) 746 * @dev: the target CPU 747 * @index: the index of suggested state 748 */ 749 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) 750 { 751 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 752 753 ACPI_FLUSH_CPU_CACHE(); 754 755 while (1) { 756 757 if (cx->entry_method == ACPI_CSTATE_HALT) 758 safe_halt(); 759 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { 760 inb(cx->address); 761 /* See comment in acpi_idle_do_entry() */ 762 inl(acpi_gbl_FADT.xpm_timer_block.address); 763 } else 764 return -ENODEV; 765 } 766 767 /* Never reached */ 768 return 0; 769 } 770 771 /** 772 * acpi_idle_enter_simple - enters an ACPI state without BM handling 773 * @dev: the target CPU 774 * @drv: cpuidle driver with cpuidle state information 775 * @index: the index of suggested state 776 */ 777 static int acpi_idle_enter_simple(struct cpuidle_device *dev, 778 struct cpuidle_driver *drv, int index) 779 { 780 struct acpi_processor *pr; 781 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 782 783 pr = __this_cpu_read(processors); 784 785 if (unlikely(!pr)) 786 return -EINVAL; 787 788 if (cx->entry_method == ACPI_CSTATE_FFH) { 789 if (current_set_polling_and_test()) 790 return -EINVAL; 791 } 792 793 /* 794 * Must be done before busmaster disable as we might need to 795 * access HPET ! 796 */ 797 lapic_timer_state_broadcast(pr, cx, 1); 798 799 if (cx->type == ACPI_STATE_C3) 800 ACPI_FLUSH_CPU_CACHE(); 801 802 /* Tell the scheduler that we are going deep-idle: */ 803 sched_clock_idle_sleep_event(); 804 acpi_idle_do_entry(cx); 805 806 sched_clock_idle_wakeup_event(0); 807 808 lapic_timer_state_broadcast(pr, cx, 0); 809 return index; 810 } 811 812 static int c3_cpu_count; 813 static DEFINE_RAW_SPINLOCK(c3_lock); 814 815 /** 816 * acpi_idle_enter_bm - enters C3 with proper BM handling 817 * @dev: the target CPU 818 * @drv: cpuidle driver containing state data 819 * @index: the index of suggested state 820 * 821 * If BM is detected, the deepest non-C3 idle state is entered instead. 822 */ 823 static int acpi_idle_enter_bm(struct cpuidle_device *dev, 824 struct cpuidle_driver *drv, int index) 825 { 826 struct acpi_processor *pr; 827 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 828 829 pr = __this_cpu_read(processors); 830 831 if (unlikely(!pr)) 832 return -EINVAL; 833 834 if (!cx->bm_sts_skip && acpi_idle_bm_check()) { 835 if (drv->safe_state_index >= 0) { 836 return drv->states[drv->safe_state_index].enter(dev, 837 drv, drv->safe_state_index); 838 } else { 839 acpi_safe_halt(); 840 return -EBUSY; 841 } 842 } 843 844 if (cx->entry_method == ACPI_CSTATE_FFH) { 845 if (current_set_polling_and_test()) 846 return -EINVAL; 847 } 848 849 acpi_unlazy_tlb(smp_processor_id()); 850 851 /* Tell the scheduler that we are going deep-idle: */ 852 sched_clock_idle_sleep_event(); 853 /* 854 * Must be done before busmaster disable as we might need to 855 * access HPET ! 856 */ 857 lapic_timer_state_broadcast(pr, cx, 1); 858 859 /* 860 * disable bus master 861 * bm_check implies we need ARB_DIS 862 * !bm_check implies we need cache flush 863 * bm_control implies whether we can do ARB_DIS 864 * 865 * That leaves a case where bm_check is set and bm_control is 866 * not set. In that case we cannot do much, we enter C3 867 * without doing anything. 868 */ 869 if (pr->flags.bm_check && pr->flags.bm_control) { 870 raw_spin_lock(&c3_lock); 871 c3_cpu_count++; 872 /* Disable bus master arbitration when all CPUs are in C3 */ 873 if (c3_cpu_count == num_online_cpus()) 874 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); 875 raw_spin_unlock(&c3_lock); 876 } else if (!pr->flags.bm_check) { 877 ACPI_FLUSH_CPU_CACHE(); 878 } 879 880 acpi_idle_do_entry(cx); 881 882 /* Re-enable bus master arbitration */ 883 if (pr->flags.bm_check && pr->flags.bm_control) { 884 raw_spin_lock(&c3_lock); 885 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); 886 c3_cpu_count--; 887 raw_spin_unlock(&c3_lock); 888 } 889 890 sched_clock_idle_wakeup_event(0); 891 892 lapic_timer_state_broadcast(pr, cx, 0); 893 return index; 894 } 895 896 struct cpuidle_driver acpi_idle_driver = { 897 .name = "acpi_idle", 898 .owner = THIS_MODULE, 899 }; 900 901 /** 902 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE 903 * device i.e. per-cpu data 904 * 905 * @pr: the ACPI processor 906 * @dev : the cpuidle device 907 */ 908 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, 909 struct cpuidle_device *dev) 910 { 911 int i, count = CPUIDLE_DRIVER_STATE_START; 912 struct acpi_processor_cx *cx; 913 914 if (!pr->flags.power_setup_done) 915 return -EINVAL; 916 917 if (pr->flags.power == 0) { 918 return -EINVAL; 919 } 920 921 if (!dev) 922 return -EINVAL; 923 924 dev->cpu = pr->id; 925 926 if (max_cstate == 0) 927 max_cstate = 1; 928 929 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 930 cx = &pr->power.states[i]; 931 932 if (!cx->valid) 933 continue; 934 935 #ifdef CONFIG_HOTPLUG_CPU 936 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && 937 !pr->flags.has_cst && 938 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 939 continue; 940 #endif 941 per_cpu(acpi_cstate[count], dev->cpu) = cx; 942 943 count++; 944 if (count == CPUIDLE_STATE_MAX) 945 break; 946 } 947 948 dev->state_count = count; 949 950 if (!count) 951 return -EINVAL; 952 953 return 0; 954 } 955 956 /** 957 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle 958 * global state data i.e. idle routines 959 * 960 * @pr: the ACPI processor 961 */ 962 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) 963 { 964 int i, count = CPUIDLE_DRIVER_STATE_START; 965 struct acpi_processor_cx *cx; 966 struct cpuidle_state *state; 967 struct cpuidle_driver *drv = &acpi_idle_driver; 968 969 if (!pr->flags.power_setup_done) 970 return -EINVAL; 971 972 if (pr->flags.power == 0) 973 return -EINVAL; 974 975 drv->safe_state_index = -1; 976 for (i = 0; i < CPUIDLE_STATE_MAX; i++) { 977 drv->states[i].name[0] = '\0'; 978 drv->states[i].desc[0] = '\0'; 979 } 980 981 if (max_cstate == 0) 982 max_cstate = 1; 983 984 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 985 cx = &pr->power.states[i]; 986 987 if (!cx->valid) 988 continue; 989 990 #ifdef CONFIG_HOTPLUG_CPU 991 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && 992 !pr->flags.has_cst && 993 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 994 continue; 995 #endif 996 997 state = &drv->states[count]; 998 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); 999 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); 1000 state->exit_latency = cx->latency; 1001 state->target_residency = cx->latency * latency_factor; 1002 1003 state->flags = 0; 1004 switch (cx->type) { 1005 case ACPI_STATE_C1: 1006 if (cx->entry_method == ACPI_CSTATE_FFH) 1007 state->flags |= CPUIDLE_FLAG_TIME_VALID; 1008 1009 state->enter = acpi_idle_enter_c1; 1010 state->enter_dead = acpi_idle_play_dead; 1011 drv->safe_state_index = count; 1012 break; 1013 1014 case ACPI_STATE_C2: 1015 state->flags |= CPUIDLE_FLAG_TIME_VALID; 1016 state->enter = acpi_idle_enter_simple; 1017 state->enter_dead = acpi_idle_play_dead; 1018 drv->safe_state_index = count; 1019 break; 1020 1021 case ACPI_STATE_C3: 1022 state->flags |= CPUIDLE_FLAG_TIME_VALID; 1023 state->enter = pr->flags.bm_check ? 1024 acpi_idle_enter_bm : 1025 acpi_idle_enter_simple; 1026 break; 1027 } 1028 1029 count++; 1030 if (count == CPUIDLE_STATE_MAX) 1031 break; 1032 } 1033 1034 drv->state_count = count; 1035 1036 if (!count) 1037 return -EINVAL; 1038 1039 return 0; 1040 } 1041 1042 int acpi_processor_hotplug(struct acpi_processor *pr) 1043 { 1044 int ret = 0; 1045 struct cpuidle_device *dev; 1046 1047 if (disabled_by_idle_boot_param()) 1048 return 0; 1049 1050 if (nocst) 1051 return -ENODEV; 1052 1053 if (!pr->flags.power_setup_done) 1054 return -ENODEV; 1055 1056 dev = per_cpu(acpi_cpuidle_device, pr->id); 1057 cpuidle_pause_and_lock(); 1058 cpuidle_disable_device(dev); 1059 acpi_processor_get_power_info(pr); 1060 if (pr->flags.power) { 1061 acpi_processor_setup_cpuidle_cx(pr, dev); 1062 ret = cpuidle_enable_device(dev); 1063 } 1064 cpuidle_resume_and_unlock(); 1065 1066 return ret; 1067 } 1068 1069 int acpi_processor_cst_has_changed(struct acpi_processor *pr) 1070 { 1071 int cpu; 1072 struct acpi_processor *_pr; 1073 struct cpuidle_device *dev; 1074 1075 if (disabled_by_idle_boot_param()) 1076 return 0; 1077 1078 if (nocst) 1079 return -ENODEV; 1080 1081 if (!pr->flags.power_setup_done) 1082 return -ENODEV; 1083 1084 /* 1085 * FIXME: Design the ACPI notification to make it once per 1086 * system instead of once per-cpu. This condition is a hack 1087 * to make the code that updates C-States be called once. 1088 */ 1089 1090 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { 1091 1092 cpuidle_pause_and_lock(); 1093 /* Protect against cpu-hotplug */ 1094 get_online_cpus(); 1095 1096 /* Disable all cpuidle devices */ 1097 for_each_online_cpu(cpu) { 1098 _pr = per_cpu(processors, cpu); 1099 if (!_pr || !_pr->flags.power_setup_done) 1100 continue; 1101 dev = per_cpu(acpi_cpuidle_device, cpu); 1102 cpuidle_disable_device(dev); 1103 } 1104 1105 /* Populate Updated C-state information */ 1106 acpi_processor_get_power_info(pr); 1107 acpi_processor_setup_cpuidle_states(pr); 1108 1109 /* Enable all cpuidle devices */ 1110 for_each_online_cpu(cpu) { 1111 _pr = per_cpu(processors, cpu); 1112 if (!_pr || !_pr->flags.power_setup_done) 1113 continue; 1114 acpi_processor_get_power_info(_pr); 1115 if (_pr->flags.power) { 1116 dev = per_cpu(acpi_cpuidle_device, cpu); 1117 acpi_processor_setup_cpuidle_cx(_pr, dev); 1118 cpuidle_enable_device(dev); 1119 } 1120 } 1121 put_online_cpus(); 1122 cpuidle_resume_and_unlock(); 1123 } 1124 1125 return 0; 1126 } 1127 1128 static int acpi_processor_registered; 1129 1130 int acpi_processor_power_init(struct acpi_processor *pr) 1131 { 1132 acpi_status status = 0; 1133 int retval; 1134 struct cpuidle_device *dev; 1135 static int first_run; 1136 1137 if (disabled_by_idle_boot_param()) 1138 return 0; 1139 1140 if (!first_run) { 1141 dmi_check_system(processor_power_dmi_table); 1142 max_cstate = acpi_processor_cstate_check(max_cstate); 1143 if (max_cstate < ACPI_C_STATES_MAX) 1144 printk(KERN_NOTICE 1145 "ACPI: processor limited to max C-state %d\n", 1146 max_cstate); 1147 first_run++; 1148 } 1149 1150 if (acpi_gbl_FADT.cst_control && !nocst) { 1151 status = 1152 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8); 1153 if (ACPI_FAILURE(status)) { 1154 ACPI_EXCEPTION((AE_INFO, status, 1155 "Notifying BIOS of _CST ability failed")); 1156 } 1157 } 1158 1159 acpi_processor_get_power_info(pr); 1160 pr->flags.power_setup_done = 1; 1161 1162 /* 1163 * Install the idle handler if processor power management is supported. 1164 * Note that we use previously set idle handler will be used on 1165 * platforms that only support C1. 1166 */ 1167 if (pr->flags.power) { 1168 /* Register acpi_idle_driver if not already registered */ 1169 if (!acpi_processor_registered) { 1170 acpi_processor_setup_cpuidle_states(pr); 1171 retval = cpuidle_register_driver(&acpi_idle_driver); 1172 if (retval) 1173 return retval; 1174 printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n", 1175 acpi_idle_driver.name); 1176 } 1177 1178 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1179 if (!dev) 1180 return -ENOMEM; 1181 per_cpu(acpi_cpuidle_device, pr->id) = dev; 1182 1183 acpi_processor_setup_cpuidle_cx(pr, dev); 1184 1185 /* Register per-cpu cpuidle_device. Cpuidle driver 1186 * must already be registered before registering device 1187 */ 1188 retval = cpuidle_register_device(dev); 1189 if (retval) { 1190 if (acpi_processor_registered == 0) 1191 cpuidle_unregister_driver(&acpi_idle_driver); 1192 return retval; 1193 } 1194 acpi_processor_registered++; 1195 } 1196 return 0; 1197 } 1198 1199 int acpi_processor_power_exit(struct acpi_processor *pr) 1200 { 1201 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); 1202 1203 if (disabled_by_idle_boot_param()) 1204 return 0; 1205 1206 if (pr->flags.power) { 1207 cpuidle_unregister_device(dev); 1208 acpi_processor_registered--; 1209 if (acpi_processor_registered == 0) 1210 cpuidle_unregister_driver(&acpi_idle_driver); 1211 } 1212 1213 pr->flags.power_setup_done = 0; 1214 return 0; 1215 } 1216