xref: /openbmc/linux/drivers/acpi/processor_idle.c (revision 911b8eac)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * processor_idle - idle state submodule to the ACPI processor driver
4  *
5  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7  *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
8  *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
9  *  			- Added processor hotplug support
10  *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
11  *  			- Added support for C3 on SMP
12  */
13 #define pr_fmt(fmt) "ACPI: " fmt
14 
15 #include <linux/module.h>
16 #include <linux/acpi.h>
17 #include <linux/dmi.h>
18 #include <linux/sched.h>       /* need_resched() */
19 #include <linux/tick.h>
20 #include <linux/cpuidle.h>
21 #include <linux/cpu.h>
22 #include <acpi/processor.h>
23 
24 /*
25  * Include the apic definitions for x86 to have the APIC timer related defines
26  * available also for UP (on SMP it gets magically included via linux/smp.h).
27  * asm/acpi.h is not an option, as it would require more include magic. Also
28  * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
29  */
30 #ifdef CONFIG_X86
31 #include <asm/apic.h>
32 #endif
33 
34 #define ACPI_PROCESSOR_CLASS            "processor"
35 #define _COMPONENT              ACPI_PROCESSOR_COMPONENT
36 ACPI_MODULE_NAME("processor_idle");
37 
38 #define ACPI_IDLE_STATE_START	(IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0)
39 
40 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
41 module_param(max_cstate, uint, 0000);
42 static unsigned int nocst __read_mostly;
43 module_param(nocst, uint, 0000);
44 static int bm_check_disable __read_mostly;
45 module_param(bm_check_disable, uint, 0000);
46 
47 static unsigned int latency_factor __read_mostly = 2;
48 module_param(latency_factor, uint, 0644);
49 
50 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
51 
52 struct cpuidle_driver acpi_idle_driver = {
53 	.name =		"acpi_idle",
54 	.owner =	THIS_MODULE,
55 };
56 
57 #ifdef CONFIG_ACPI_PROCESSOR_CSTATE
58 static
59 DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate);
60 
61 static int disabled_by_idle_boot_param(void)
62 {
63 	return boot_option_idle_override == IDLE_POLL ||
64 		boot_option_idle_override == IDLE_HALT;
65 }
66 
67 /*
68  * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
69  * For now disable this. Probably a bug somewhere else.
70  *
71  * To skip this limit, boot/load with a large max_cstate limit.
72  */
73 static int set_max_cstate(const struct dmi_system_id *id)
74 {
75 	if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
76 		return 0;
77 
78 	pr_notice("%s detected - limiting to C%ld max_cstate."
79 		  " Override with \"processor.max_cstate=%d\"\n", id->ident,
80 		  (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
81 
82 	max_cstate = (long)id->driver_data;
83 
84 	return 0;
85 }
86 
87 static const struct dmi_system_id processor_power_dmi_table[] = {
88 	{ set_max_cstate, "Clevo 5600D", {
89 	  DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
90 	  DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
91 	 (void *)2},
92 	{ set_max_cstate, "Pavilion zv5000", {
93 	  DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
94 	  DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
95 	 (void *)1},
96 	{ set_max_cstate, "Asus L8400B", {
97 	  DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
98 	  DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
99 	 (void *)1},
100 	{},
101 };
102 
103 
104 /*
105  * Callers should disable interrupts before the call and enable
106  * interrupts after return.
107  */
108 static void __cpuidle acpi_safe_halt(void)
109 {
110 	if (!tif_need_resched()) {
111 		safe_halt();
112 		local_irq_disable();
113 	}
114 }
115 
116 #ifdef ARCH_APICTIMER_STOPS_ON_C3
117 
118 /*
119  * Some BIOS implementations switch to C3 in the published C2 state.
120  * This seems to be a common problem on AMD boxen, but other vendors
121  * are affected too. We pick the most conservative approach: we assume
122  * that the local APIC stops in both C2 and C3.
123  */
124 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
125 				   struct acpi_processor_cx *cx)
126 {
127 	struct acpi_processor_power *pwr = &pr->power;
128 	u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
129 
130 	if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
131 		return;
132 
133 	if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
134 		type = ACPI_STATE_C1;
135 
136 	/*
137 	 * Check, if one of the previous states already marked the lapic
138 	 * unstable
139 	 */
140 	if (pwr->timer_broadcast_on_state < state)
141 		return;
142 
143 	if (cx->type >= type)
144 		pr->power.timer_broadcast_on_state = state;
145 }
146 
147 static void __lapic_timer_propagate_broadcast(void *arg)
148 {
149 	struct acpi_processor *pr = (struct acpi_processor *) arg;
150 
151 	if (pr->power.timer_broadcast_on_state < INT_MAX)
152 		tick_broadcast_enable();
153 	else
154 		tick_broadcast_disable();
155 }
156 
157 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
158 {
159 	smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
160 				 (void *)pr, 1);
161 }
162 
163 /* Power(C) State timer broadcast control */
164 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
165 					struct acpi_processor_cx *cx)
166 {
167 	return cx - pr->power.states >= pr->power.timer_broadcast_on_state;
168 }
169 
170 #else
171 
172 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
173 				   struct acpi_processor_cx *cstate) { }
174 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
175 
176 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
177 					struct acpi_processor_cx *cx)
178 {
179 }
180 
181 #endif
182 
183 #if defined(CONFIG_X86)
184 static void tsc_check_state(int state)
185 {
186 	switch (boot_cpu_data.x86_vendor) {
187 	case X86_VENDOR_HYGON:
188 	case X86_VENDOR_AMD:
189 	case X86_VENDOR_INTEL:
190 	case X86_VENDOR_CENTAUR:
191 	case X86_VENDOR_ZHAOXIN:
192 		/*
193 		 * AMD Fam10h TSC will tick in all
194 		 * C/P/S0/S1 states when this bit is set.
195 		 */
196 		if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
197 			return;
198 		fallthrough;
199 	default:
200 		/* TSC could halt in idle, so notify users */
201 		if (state > ACPI_STATE_C1)
202 			mark_tsc_unstable("TSC halts in idle");
203 	}
204 }
205 #else
206 static void tsc_check_state(int state) { return; }
207 #endif
208 
209 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
210 {
211 
212 	if (!pr->pblk)
213 		return -ENODEV;
214 
215 	/* if info is obtained from pblk/fadt, type equals state */
216 	pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
217 	pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
218 
219 #ifndef CONFIG_HOTPLUG_CPU
220 	/*
221 	 * Check for P_LVL2_UP flag before entering C2 and above on
222 	 * an SMP system.
223 	 */
224 	if ((num_online_cpus() > 1) &&
225 	    !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
226 		return -ENODEV;
227 #endif
228 
229 	/* determine C2 and C3 address from pblk */
230 	pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
231 	pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
232 
233 	/* determine latencies from FADT */
234 	pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
235 	pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
236 
237 	/*
238 	 * FADT specified C2 latency must be less than or equal to
239 	 * 100 microseconds.
240 	 */
241 	if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
242 		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
243 			"C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
244 		/* invalidate C2 */
245 		pr->power.states[ACPI_STATE_C2].address = 0;
246 	}
247 
248 	/*
249 	 * FADT supplied C3 latency must be less than or equal to
250 	 * 1000 microseconds.
251 	 */
252 	if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
253 		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
254 			"C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
255 		/* invalidate C3 */
256 		pr->power.states[ACPI_STATE_C3].address = 0;
257 	}
258 
259 	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
260 			  "lvl2[0x%08x] lvl3[0x%08x]\n",
261 			  pr->power.states[ACPI_STATE_C2].address,
262 			  pr->power.states[ACPI_STATE_C3].address));
263 
264 	snprintf(pr->power.states[ACPI_STATE_C2].desc,
265 			 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x",
266 			 pr->power.states[ACPI_STATE_C2].address);
267 	snprintf(pr->power.states[ACPI_STATE_C3].desc,
268 			 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x",
269 			 pr->power.states[ACPI_STATE_C3].address);
270 
271 	return 0;
272 }
273 
274 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
275 {
276 	if (!pr->power.states[ACPI_STATE_C1].valid) {
277 		/* set the first C-State to C1 */
278 		/* all processors need to support C1 */
279 		pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
280 		pr->power.states[ACPI_STATE_C1].valid = 1;
281 		pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
282 
283 		snprintf(pr->power.states[ACPI_STATE_C1].desc,
284 			 ACPI_CX_DESC_LEN, "ACPI HLT");
285 	}
286 	/* the C0 state only exists as a filler in our array */
287 	pr->power.states[ACPI_STATE_C0].valid = 1;
288 	return 0;
289 }
290 
291 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
292 {
293 	int ret;
294 
295 	if (nocst)
296 		return -ENODEV;
297 
298 	ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power);
299 	if (ret)
300 		return ret;
301 
302 	if (!pr->power.count)
303 		return -EFAULT;
304 
305 	pr->flags.has_cst = 1;
306 	return 0;
307 }
308 
309 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
310 					   struct acpi_processor_cx *cx)
311 {
312 	static int bm_check_flag = -1;
313 	static int bm_control_flag = -1;
314 
315 
316 	if (!cx->address)
317 		return;
318 
319 	/*
320 	 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
321 	 * DMA transfers are used by any ISA device to avoid livelock.
322 	 * Note that we could disable Type-F DMA (as recommended by
323 	 * the erratum), but this is known to disrupt certain ISA
324 	 * devices thus we take the conservative approach.
325 	 */
326 	else if (errata.piix4.fdma) {
327 		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
328 				  "C3 not supported on PIIX4 with Type-F DMA\n"));
329 		return;
330 	}
331 
332 	/* All the logic here assumes flags.bm_check is same across all CPUs */
333 	if (bm_check_flag == -1) {
334 		/* Determine whether bm_check is needed based on CPU  */
335 		acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
336 		bm_check_flag = pr->flags.bm_check;
337 		bm_control_flag = pr->flags.bm_control;
338 	} else {
339 		pr->flags.bm_check = bm_check_flag;
340 		pr->flags.bm_control = bm_control_flag;
341 	}
342 
343 	if (pr->flags.bm_check) {
344 		if (!pr->flags.bm_control) {
345 			if (pr->flags.has_cst != 1) {
346 				/* bus mastering control is necessary */
347 				ACPI_DEBUG_PRINT((ACPI_DB_INFO,
348 					"C3 support requires BM control\n"));
349 				return;
350 			} else {
351 				/* Here we enter C3 without bus mastering */
352 				ACPI_DEBUG_PRINT((ACPI_DB_INFO,
353 					"C3 support without BM control\n"));
354 			}
355 		}
356 	} else {
357 		/*
358 		 * WBINVD should be set in fadt, for C3 state to be
359 		 * supported on when bm_check is not required.
360 		 */
361 		if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
362 			ACPI_DEBUG_PRINT((ACPI_DB_INFO,
363 					  "Cache invalidation should work properly"
364 					  " for C3 to be enabled on SMP systems\n"));
365 			return;
366 		}
367 	}
368 
369 	/*
370 	 * Otherwise we've met all of our C3 requirements.
371 	 * Normalize the C3 latency to expidite policy.  Enable
372 	 * checking of bus mastering status (bm_check) so we can
373 	 * use this in our C3 policy
374 	 */
375 	cx->valid = 1;
376 
377 	/*
378 	 * On older chipsets, BM_RLD needs to be set
379 	 * in order for Bus Master activity to wake the
380 	 * system from C3.  Newer chipsets handle DMA
381 	 * during C3 automatically and BM_RLD is a NOP.
382 	 * In either case, the proper way to
383 	 * handle BM_RLD is to set it and leave it set.
384 	 */
385 	acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
386 
387 	return;
388 }
389 
390 static int acpi_processor_power_verify(struct acpi_processor *pr)
391 {
392 	unsigned int i;
393 	unsigned int working = 0;
394 
395 	pr->power.timer_broadcast_on_state = INT_MAX;
396 
397 	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
398 		struct acpi_processor_cx *cx = &pr->power.states[i];
399 
400 		switch (cx->type) {
401 		case ACPI_STATE_C1:
402 			cx->valid = 1;
403 			break;
404 
405 		case ACPI_STATE_C2:
406 			if (!cx->address)
407 				break;
408 			cx->valid = 1;
409 			break;
410 
411 		case ACPI_STATE_C3:
412 			acpi_processor_power_verify_c3(pr, cx);
413 			break;
414 		}
415 		if (!cx->valid)
416 			continue;
417 
418 		lapic_timer_check_state(i, pr, cx);
419 		tsc_check_state(cx->type);
420 		working++;
421 	}
422 
423 	lapic_timer_propagate_broadcast(pr);
424 
425 	return (working);
426 }
427 
428 static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
429 {
430 	unsigned int i;
431 	int result;
432 
433 
434 	/* NOTE: the idle thread may not be running while calling
435 	 * this function */
436 
437 	/* Zero initialize all the C-states info. */
438 	memset(pr->power.states, 0, sizeof(pr->power.states));
439 
440 	result = acpi_processor_get_power_info_cst(pr);
441 	if (result == -ENODEV)
442 		result = acpi_processor_get_power_info_fadt(pr);
443 
444 	if (result)
445 		return result;
446 
447 	acpi_processor_get_power_info_default(pr);
448 
449 	pr->power.count = acpi_processor_power_verify(pr);
450 
451 	/*
452 	 * if one state of type C2 or C3 is available, mark this
453 	 * CPU as being "idle manageable"
454 	 */
455 	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
456 		if (pr->power.states[i].valid) {
457 			pr->power.count = i;
458 			pr->flags.power = 1;
459 		}
460 	}
461 
462 	return 0;
463 }
464 
465 /**
466  * acpi_idle_bm_check - checks if bus master activity was detected
467  */
468 static int acpi_idle_bm_check(void)
469 {
470 	u32 bm_status = 0;
471 
472 	if (bm_check_disable)
473 		return 0;
474 
475 	acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
476 	if (bm_status)
477 		acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
478 	/*
479 	 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
480 	 * the true state of bus mastering activity; forcing us to
481 	 * manually check the BMIDEA bit of each IDE channel.
482 	 */
483 	else if (errata.piix4.bmisx) {
484 		if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
485 		    || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
486 			bm_status = 1;
487 	}
488 	return bm_status;
489 }
490 
491 static void wait_for_freeze(void)
492 {
493 #ifdef	CONFIG_X86
494 	/* No delay is needed if we are in guest */
495 	if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
496 		return;
497 #endif
498 	/* Dummy wait op - must do something useless after P_LVL2 read
499 	   because chipsets cannot guarantee that STPCLK# signal
500 	   gets asserted in time to freeze execution properly. */
501 	inl(acpi_gbl_FADT.xpm_timer_block.address);
502 }
503 
504 /**
505  * acpi_idle_do_entry - enter idle state using the appropriate method
506  * @cx: cstate data
507  *
508  * Caller disables interrupt before call and enables interrupt after return.
509  */
510 static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
511 {
512 	if (cx->entry_method == ACPI_CSTATE_FFH) {
513 		/* Call into architectural FFH based C-state */
514 		acpi_processor_ffh_cstate_enter(cx);
515 	} else if (cx->entry_method == ACPI_CSTATE_HALT) {
516 		acpi_safe_halt();
517 	} else {
518 		/* IO port based C-state */
519 		inb(cx->address);
520 		wait_for_freeze();
521 	}
522 }
523 
524 /**
525  * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
526  * @dev: the target CPU
527  * @index: the index of suggested state
528  */
529 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
530 {
531 	struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
532 
533 	ACPI_FLUSH_CPU_CACHE();
534 
535 	while (1) {
536 
537 		if (cx->entry_method == ACPI_CSTATE_HALT)
538 			safe_halt();
539 		else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
540 			inb(cx->address);
541 			wait_for_freeze();
542 		} else
543 			return -ENODEV;
544 	}
545 
546 	/* Never reached */
547 	return 0;
548 }
549 
550 static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
551 {
552 	return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
553 		!(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
554 }
555 
556 static int c3_cpu_count;
557 static DEFINE_RAW_SPINLOCK(c3_lock);
558 
559 /**
560  * acpi_idle_enter_bm - enters C3 with proper BM handling
561  * @drv: cpuidle driver
562  * @pr: Target processor
563  * @cx: Target state context
564  * @index: index of target state
565  */
566 static int acpi_idle_enter_bm(struct cpuidle_driver *drv,
567 			       struct acpi_processor *pr,
568 			       struct acpi_processor_cx *cx,
569 			       int index)
570 {
571 	static struct acpi_processor_cx safe_cx = {
572 		.entry_method = ACPI_CSTATE_HALT,
573 	};
574 
575 	/*
576 	 * disable bus master
577 	 * bm_check implies we need ARB_DIS
578 	 * bm_control implies whether we can do ARB_DIS
579 	 *
580 	 * That leaves a case where bm_check is set and bm_control is not set.
581 	 * In that case we cannot do much, we enter C3 without doing anything.
582 	 */
583 	bool dis_bm = pr->flags.bm_control;
584 
585 	/* If we can skip BM, demote to a safe state. */
586 	if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
587 		dis_bm = false;
588 		index = drv->safe_state_index;
589 		if (index >= 0) {
590 			cx = this_cpu_read(acpi_cstate[index]);
591 		} else {
592 			cx = &safe_cx;
593 			index = -EBUSY;
594 		}
595 	}
596 
597 	if (dis_bm) {
598 		raw_spin_lock(&c3_lock);
599 		c3_cpu_count++;
600 		/* Disable bus master arbitration when all CPUs are in C3 */
601 		if (c3_cpu_count == num_online_cpus())
602 			acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
603 		raw_spin_unlock(&c3_lock);
604 	}
605 
606 	rcu_idle_enter();
607 
608 	acpi_idle_do_entry(cx);
609 
610 	rcu_idle_exit();
611 
612 	/* Re-enable bus master arbitration */
613 	if (dis_bm) {
614 		raw_spin_lock(&c3_lock);
615 		acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
616 		c3_cpu_count--;
617 		raw_spin_unlock(&c3_lock);
618 	}
619 
620 	return index;
621 }
622 
623 static int acpi_idle_enter(struct cpuidle_device *dev,
624 			   struct cpuidle_driver *drv, int index)
625 {
626 	struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
627 	struct acpi_processor *pr;
628 
629 	pr = __this_cpu_read(processors);
630 	if (unlikely(!pr))
631 		return -EINVAL;
632 
633 	if (cx->type != ACPI_STATE_C1) {
634 		if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check)
635 			return acpi_idle_enter_bm(drv, pr, cx, index);
636 
637 		/* C2 to C1 demotion. */
638 		if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
639 			index = ACPI_IDLE_STATE_START;
640 			cx = per_cpu(acpi_cstate[index], dev->cpu);
641 		}
642 	}
643 
644 	if (cx->type == ACPI_STATE_C3)
645 		ACPI_FLUSH_CPU_CACHE();
646 
647 	acpi_idle_do_entry(cx);
648 
649 	return index;
650 }
651 
652 static int acpi_idle_enter_s2idle(struct cpuidle_device *dev,
653 				  struct cpuidle_driver *drv, int index)
654 {
655 	struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
656 
657 	if (cx->type == ACPI_STATE_C3) {
658 		struct acpi_processor *pr = __this_cpu_read(processors);
659 
660 		if (unlikely(!pr))
661 			return 0;
662 
663 		if (pr->flags.bm_check) {
664 			u8 bm_sts_skip = cx->bm_sts_skip;
665 
666 			/* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */
667 			cx->bm_sts_skip = 1;
668 			acpi_idle_enter_bm(drv, pr, cx, index);
669 			cx->bm_sts_skip = bm_sts_skip;
670 
671 			return 0;
672 		} else {
673 			ACPI_FLUSH_CPU_CACHE();
674 		}
675 	}
676 	acpi_idle_do_entry(cx);
677 
678 	return 0;
679 }
680 
681 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
682 					   struct cpuidle_device *dev)
683 {
684 	int i, count = ACPI_IDLE_STATE_START;
685 	struct acpi_processor_cx *cx;
686 	struct cpuidle_state *state;
687 
688 	if (max_cstate == 0)
689 		max_cstate = 1;
690 
691 	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
692 		state = &acpi_idle_driver.states[count];
693 		cx = &pr->power.states[i];
694 
695 		if (!cx->valid)
696 			continue;
697 
698 		per_cpu(acpi_cstate[count], dev->cpu) = cx;
699 
700 		if (lapic_timer_needs_broadcast(pr, cx))
701 			state->flags |= CPUIDLE_FLAG_TIMER_STOP;
702 
703 		if (cx->type == ACPI_STATE_C3) {
704 			state->flags |= CPUIDLE_FLAG_TLB_FLUSHED;
705 			if (pr->flags.bm_check)
706 				state->flags |= CPUIDLE_FLAG_RCU_IDLE;
707 		}
708 
709 		count++;
710 		if (count == CPUIDLE_STATE_MAX)
711 			break;
712 	}
713 
714 	if (!count)
715 		return -EINVAL;
716 
717 	return 0;
718 }
719 
720 static int acpi_processor_setup_cstates(struct acpi_processor *pr)
721 {
722 	int i, count;
723 	struct acpi_processor_cx *cx;
724 	struct cpuidle_state *state;
725 	struct cpuidle_driver *drv = &acpi_idle_driver;
726 
727 	if (max_cstate == 0)
728 		max_cstate = 1;
729 
730 	if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) {
731 		cpuidle_poll_state_init(drv);
732 		count = 1;
733 	} else {
734 		count = 0;
735 	}
736 
737 	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
738 		cx = &pr->power.states[i];
739 
740 		if (!cx->valid)
741 			continue;
742 
743 		state = &drv->states[count];
744 		snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
745 		strlcpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
746 		state->exit_latency = cx->latency;
747 		state->target_residency = cx->latency * latency_factor;
748 		state->enter = acpi_idle_enter;
749 
750 		state->flags = 0;
751 		if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) {
752 			state->enter_dead = acpi_idle_play_dead;
753 			drv->safe_state_index = count;
754 		}
755 		/*
756 		 * Halt-induced C1 is not good for ->enter_s2idle, because it
757 		 * re-enables interrupts on exit.  Moreover, C1 is generally not
758 		 * particularly interesting from the suspend-to-idle angle, so
759 		 * avoid C1 and the situations in which we may need to fall back
760 		 * to it altogether.
761 		 */
762 		if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
763 			state->enter_s2idle = acpi_idle_enter_s2idle;
764 
765 		count++;
766 		if (count == CPUIDLE_STATE_MAX)
767 			break;
768 	}
769 
770 	drv->state_count = count;
771 
772 	if (!count)
773 		return -EINVAL;
774 
775 	return 0;
776 }
777 
778 static inline void acpi_processor_cstate_first_run_checks(void)
779 {
780 	static int first_run;
781 
782 	if (first_run)
783 		return;
784 	dmi_check_system(processor_power_dmi_table);
785 	max_cstate = acpi_processor_cstate_check(max_cstate);
786 	if (max_cstate < ACPI_C_STATES_MAX)
787 		pr_notice("ACPI: processor limited to max C-state %d\n",
788 			  max_cstate);
789 	first_run++;
790 
791 	if (nocst)
792 		return;
793 
794 	acpi_processor_claim_cst_control();
795 }
796 #else
797 
798 static inline int disabled_by_idle_boot_param(void) { return 0; }
799 static inline void acpi_processor_cstate_first_run_checks(void) { }
800 static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
801 {
802 	return -ENODEV;
803 }
804 
805 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
806 					   struct cpuidle_device *dev)
807 {
808 	return -EINVAL;
809 }
810 
811 static int acpi_processor_setup_cstates(struct acpi_processor *pr)
812 {
813 	return -EINVAL;
814 }
815 
816 #endif /* CONFIG_ACPI_PROCESSOR_CSTATE */
817 
818 struct acpi_lpi_states_array {
819 	unsigned int size;
820 	unsigned int composite_states_size;
821 	struct acpi_lpi_state *entries;
822 	struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER];
823 };
824 
825 static int obj_get_integer(union acpi_object *obj, u32 *value)
826 {
827 	if (obj->type != ACPI_TYPE_INTEGER)
828 		return -EINVAL;
829 
830 	*value = obj->integer.value;
831 	return 0;
832 }
833 
834 static int acpi_processor_evaluate_lpi(acpi_handle handle,
835 				       struct acpi_lpi_states_array *info)
836 {
837 	acpi_status status;
838 	int ret = 0;
839 	int pkg_count, state_idx = 1, loop;
840 	struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
841 	union acpi_object *lpi_data;
842 	struct acpi_lpi_state *lpi_state;
843 
844 	status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer);
845 	if (ACPI_FAILURE(status)) {
846 		ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _LPI, giving up\n"));
847 		return -ENODEV;
848 	}
849 
850 	lpi_data = buffer.pointer;
851 
852 	/* There must be at least 4 elements = 3 elements + 1 package */
853 	if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE ||
854 	    lpi_data->package.count < 4) {
855 		pr_debug("not enough elements in _LPI\n");
856 		ret = -ENODATA;
857 		goto end;
858 	}
859 
860 	pkg_count = lpi_data->package.elements[2].integer.value;
861 
862 	/* Validate number of power states. */
863 	if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) {
864 		pr_debug("count given by _LPI is not valid\n");
865 		ret = -ENODATA;
866 		goto end;
867 	}
868 
869 	lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL);
870 	if (!lpi_state) {
871 		ret = -ENOMEM;
872 		goto end;
873 	}
874 
875 	info->size = pkg_count;
876 	info->entries = lpi_state;
877 
878 	/* LPI States start at index 3 */
879 	for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) {
880 		union acpi_object *element, *pkg_elem, *obj;
881 
882 		element = &lpi_data->package.elements[loop];
883 		if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7)
884 			continue;
885 
886 		pkg_elem = element->package.elements;
887 
888 		obj = pkg_elem + 6;
889 		if (obj->type == ACPI_TYPE_BUFFER) {
890 			struct acpi_power_register *reg;
891 
892 			reg = (struct acpi_power_register *)obj->buffer.pointer;
893 			if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
894 			    reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)
895 				continue;
896 
897 			lpi_state->address = reg->address;
898 			lpi_state->entry_method =
899 				reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ?
900 				ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO;
901 		} else if (obj->type == ACPI_TYPE_INTEGER) {
902 			lpi_state->entry_method = ACPI_CSTATE_INTEGER;
903 			lpi_state->address = obj->integer.value;
904 		} else {
905 			continue;
906 		}
907 
908 		/* elements[7,8] skipped for now i.e. Residency/Usage counter*/
909 
910 		obj = pkg_elem + 9;
911 		if (obj->type == ACPI_TYPE_STRING)
912 			strlcpy(lpi_state->desc, obj->string.pointer,
913 				ACPI_CX_DESC_LEN);
914 
915 		lpi_state->index = state_idx;
916 		if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) {
917 			pr_debug("No min. residency found, assuming 10 us\n");
918 			lpi_state->min_residency = 10;
919 		}
920 
921 		if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) {
922 			pr_debug("No wakeup residency found, assuming 10 us\n");
923 			lpi_state->wake_latency = 10;
924 		}
925 
926 		if (obj_get_integer(pkg_elem + 2, &lpi_state->flags))
927 			lpi_state->flags = 0;
928 
929 		if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags))
930 			lpi_state->arch_flags = 0;
931 
932 		if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq))
933 			lpi_state->res_cnt_freq = 1;
934 
935 		if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state))
936 			lpi_state->enable_parent_state = 0;
937 	}
938 
939 	acpi_handle_debug(handle, "Found %d power states\n", state_idx);
940 end:
941 	kfree(buffer.pointer);
942 	return ret;
943 }
944 
945 /*
946  * flat_state_cnt - the number of composite LPI states after the process of flattening
947  */
948 static int flat_state_cnt;
949 
950 /**
951  * combine_lpi_states - combine local and parent LPI states to form a composite LPI state
952  *
953  * @local: local LPI state
954  * @parent: parent LPI state
955  * @result: composite LPI state
956  */
957 static bool combine_lpi_states(struct acpi_lpi_state *local,
958 			       struct acpi_lpi_state *parent,
959 			       struct acpi_lpi_state *result)
960 {
961 	if (parent->entry_method == ACPI_CSTATE_INTEGER) {
962 		if (!parent->address) /* 0 means autopromotable */
963 			return false;
964 		result->address = local->address + parent->address;
965 	} else {
966 		result->address = parent->address;
967 	}
968 
969 	result->min_residency = max(local->min_residency, parent->min_residency);
970 	result->wake_latency = local->wake_latency + parent->wake_latency;
971 	result->enable_parent_state = parent->enable_parent_state;
972 	result->entry_method = local->entry_method;
973 
974 	result->flags = parent->flags;
975 	result->arch_flags = parent->arch_flags;
976 	result->index = parent->index;
977 
978 	strlcpy(result->desc, local->desc, ACPI_CX_DESC_LEN);
979 	strlcat(result->desc, "+", ACPI_CX_DESC_LEN);
980 	strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN);
981 	return true;
982 }
983 
984 #define ACPI_LPI_STATE_FLAGS_ENABLED			BIT(0)
985 
986 static void stash_composite_state(struct acpi_lpi_states_array *curr_level,
987 				  struct acpi_lpi_state *t)
988 {
989 	curr_level->composite_states[curr_level->composite_states_size++] = t;
990 }
991 
992 static int flatten_lpi_states(struct acpi_processor *pr,
993 			      struct acpi_lpi_states_array *curr_level,
994 			      struct acpi_lpi_states_array *prev_level)
995 {
996 	int i, j, state_count = curr_level->size;
997 	struct acpi_lpi_state *p, *t = curr_level->entries;
998 
999 	curr_level->composite_states_size = 0;
1000 	for (j = 0; j < state_count; j++, t++) {
1001 		struct acpi_lpi_state *flpi;
1002 
1003 		if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED))
1004 			continue;
1005 
1006 		if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) {
1007 			pr_warn("Limiting number of LPI states to max (%d)\n",
1008 				ACPI_PROCESSOR_MAX_POWER);
1009 			pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
1010 			break;
1011 		}
1012 
1013 		flpi = &pr->power.lpi_states[flat_state_cnt];
1014 
1015 		if (!prev_level) { /* leaf/processor node */
1016 			memcpy(flpi, t, sizeof(*t));
1017 			stash_composite_state(curr_level, flpi);
1018 			flat_state_cnt++;
1019 			continue;
1020 		}
1021 
1022 		for (i = 0; i < prev_level->composite_states_size; i++) {
1023 			p = prev_level->composite_states[i];
1024 			if (t->index <= p->enable_parent_state &&
1025 			    combine_lpi_states(p, t, flpi)) {
1026 				stash_composite_state(curr_level, flpi);
1027 				flat_state_cnt++;
1028 				flpi++;
1029 			}
1030 		}
1031 	}
1032 
1033 	kfree(curr_level->entries);
1034 	return 0;
1035 }
1036 
1037 static int acpi_processor_get_lpi_info(struct acpi_processor *pr)
1038 {
1039 	int ret, i;
1040 	acpi_status status;
1041 	acpi_handle handle = pr->handle, pr_ahandle;
1042 	struct acpi_device *d = NULL;
1043 	struct acpi_lpi_states_array info[2], *tmp, *prev, *curr;
1044 
1045 	if (!osc_pc_lpi_support_confirmed)
1046 		return -EOPNOTSUPP;
1047 
1048 	if (!acpi_has_method(handle, "_LPI"))
1049 		return -EINVAL;
1050 
1051 	flat_state_cnt = 0;
1052 	prev = &info[0];
1053 	curr = &info[1];
1054 	handle = pr->handle;
1055 	ret = acpi_processor_evaluate_lpi(handle, prev);
1056 	if (ret)
1057 		return ret;
1058 	flatten_lpi_states(pr, prev, NULL);
1059 
1060 	status = acpi_get_parent(handle, &pr_ahandle);
1061 	while (ACPI_SUCCESS(status)) {
1062 		acpi_bus_get_device(pr_ahandle, &d);
1063 		handle = pr_ahandle;
1064 
1065 		if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID))
1066 			break;
1067 
1068 		/* can be optional ? */
1069 		if (!acpi_has_method(handle, "_LPI"))
1070 			break;
1071 
1072 		ret = acpi_processor_evaluate_lpi(handle, curr);
1073 		if (ret)
1074 			break;
1075 
1076 		/* flatten all the LPI states in this level of hierarchy */
1077 		flatten_lpi_states(pr, curr, prev);
1078 
1079 		tmp = prev, prev = curr, curr = tmp;
1080 
1081 		status = acpi_get_parent(handle, &pr_ahandle);
1082 	}
1083 
1084 	pr->power.count = flat_state_cnt;
1085 	/* reset the index after flattening */
1086 	for (i = 0; i < pr->power.count; i++)
1087 		pr->power.lpi_states[i].index = i;
1088 
1089 	/* Tell driver that _LPI is supported. */
1090 	pr->flags.has_lpi = 1;
1091 	pr->flags.power = 1;
1092 
1093 	return 0;
1094 }
1095 
1096 int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu)
1097 {
1098 	return -ENODEV;
1099 }
1100 
1101 int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
1102 {
1103 	return -ENODEV;
1104 }
1105 
1106 /**
1107  * acpi_idle_lpi_enter - enters an ACPI any LPI state
1108  * @dev: the target CPU
1109  * @drv: cpuidle driver containing cpuidle state info
1110  * @index: index of target state
1111  *
1112  * Return: 0 for success or negative value for error
1113  */
1114 static int acpi_idle_lpi_enter(struct cpuidle_device *dev,
1115 			       struct cpuidle_driver *drv, int index)
1116 {
1117 	struct acpi_processor *pr;
1118 	struct acpi_lpi_state *lpi;
1119 
1120 	pr = __this_cpu_read(processors);
1121 
1122 	if (unlikely(!pr))
1123 		return -EINVAL;
1124 
1125 	lpi = &pr->power.lpi_states[index];
1126 	if (lpi->entry_method == ACPI_CSTATE_FFH)
1127 		return acpi_processor_ffh_lpi_enter(lpi);
1128 
1129 	return -EINVAL;
1130 }
1131 
1132 static int acpi_processor_setup_lpi_states(struct acpi_processor *pr)
1133 {
1134 	int i;
1135 	struct acpi_lpi_state *lpi;
1136 	struct cpuidle_state *state;
1137 	struct cpuidle_driver *drv = &acpi_idle_driver;
1138 
1139 	if (!pr->flags.has_lpi)
1140 		return -EOPNOTSUPP;
1141 
1142 	for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) {
1143 		lpi = &pr->power.lpi_states[i];
1144 
1145 		state = &drv->states[i];
1146 		snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i);
1147 		strlcpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN);
1148 		state->exit_latency = lpi->wake_latency;
1149 		state->target_residency = lpi->min_residency;
1150 		if (lpi->arch_flags)
1151 			state->flags |= CPUIDLE_FLAG_TIMER_STOP;
1152 		state->enter = acpi_idle_lpi_enter;
1153 		drv->safe_state_index = i;
1154 	}
1155 
1156 	drv->state_count = i;
1157 
1158 	return 0;
1159 }
1160 
1161 /**
1162  * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle
1163  * global state data i.e. idle routines
1164  *
1165  * @pr: the ACPI processor
1166  */
1167 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1168 {
1169 	int i;
1170 	struct cpuidle_driver *drv = &acpi_idle_driver;
1171 
1172 	if (!pr->flags.power_setup_done || !pr->flags.power)
1173 		return -EINVAL;
1174 
1175 	drv->safe_state_index = -1;
1176 	for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
1177 		drv->states[i].name[0] = '\0';
1178 		drv->states[i].desc[0] = '\0';
1179 	}
1180 
1181 	if (pr->flags.has_lpi)
1182 		return acpi_processor_setup_lpi_states(pr);
1183 
1184 	return acpi_processor_setup_cstates(pr);
1185 }
1186 
1187 /**
1188  * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE
1189  * device i.e. per-cpu data
1190  *
1191  * @pr: the ACPI processor
1192  * @dev : the cpuidle device
1193  */
1194 static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr,
1195 					    struct cpuidle_device *dev)
1196 {
1197 	if (!pr->flags.power_setup_done || !pr->flags.power || !dev)
1198 		return -EINVAL;
1199 
1200 	dev->cpu = pr->id;
1201 	if (pr->flags.has_lpi)
1202 		return acpi_processor_ffh_lpi_probe(pr->id);
1203 
1204 	return acpi_processor_setup_cpuidle_cx(pr, dev);
1205 }
1206 
1207 static int acpi_processor_get_power_info(struct acpi_processor *pr)
1208 {
1209 	int ret;
1210 
1211 	ret = acpi_processor_get_lpi_info(pr);
1212 	if (ret)
1213 		ret = acpi_processor_get_cstate_info(pr);
1214 
1215 	return ret;
1216 }
1217 
1218 int acpi_processor_hotplug(struct acpi_processor *pr)
1219 {
1220 	int ret = 0;
1221 	struct cpuidle_device *dev;
1222 
1223 	if (disabled_by_idle_boot_param())
1224 		return 0;
1225 
1226 	if (!pr->flags.power_setup_done)
1227 		return -ENODEV;
1228 
1229 	dev = per_cpu(acpi_cpuidle_device, pr->id);
1230 	cpuidle_pause_and_lock();
1231 	cpuidle_disable_device(dev);
1232 	ret = acpi_processor_get_power_info(pr);
1233 	if (!ret && pr->flags.power) {
1234 		acpi_processor_setup_cpuidle_dev(pr, dev);
1235 		ret = cpuidle_enable_device(dev);
1236 	}
1237 	cpuidle_resume_and_unlock();
1238 
1239 	return ret;
1240 }
1241 
1242 int acpi_processor_power_state_has_changed(struct acpi_processor *pr)
1243 {
1244 	int cpu;
1245 	struct acpi_processor *_pr;
1246 	struct cpuidle_device *dev;
1247 
1248 	if (disabled_by_idle_boot_param())
1249 		return 0;
1250 
1251 	if (!pr->flags.power_setup_done)
1252 		return -ENODEV;
1253 
1254 	/*
1255 	 * FIXME:  Design the ACPI notification to make it once per
1256 	 * system instead of once per-cpu.  This condition is a hack
1257 	 * to make the code that updates C-States be called once.
1258 	 */
1259 
1260 	if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1261 
1262 		/* Protect against cpu-hotplug */
1263 		get_online_cpus();
1264 		cpuidle_pause_and_lock();
1265 
1266 		/* Disable all cpuidle devices */
1267 		for_each_online_cpu(cpu) {
1268 			_pr = per_cpu(processors, cpu);
1269 			if (!_pr || !_pr->flags.power_setup_done)
1270 				continue;
1271 			dev = per_cpu(acpi_cpuidle_device, cpu);
1272 			cpuidle_disable_device(dev);
1273 		}
1274 
1275 		/* Populate Updated C-state information */
1276 		acpi_processor_get_power_info(pr);
1277 		acpi_processor_setup_cpuidle_states(pr);
1278 
1279 		/* Enable all cpuidle devices */
1280 		for_each_online_cpu(cpu) {
1281 			_pr = per_cpu(processors, cpu);
1282 			if (!_pr || !_pr->flags.power_setup_done)
1283 				continue;
1284 			acpi_processor_get_power_info(_pr);
1285 			if (_pr->flags.power) {
1286 				dev = per_cpu(acpi_cpuidle_device, cpu);
1287 				acpi_processor_setup_cpuidle_dev(_pr, dev);
1288 				cpuidle_enable_device(dev);
1289 			}
1290 		}
1291 		cpuidle_resume_and_unlock();
1292 		put_online_cpus();
1293 	}
1294 
1295 	return 0;
1296 }
1297 
1298 static int acpi_processor_registered;
1299 
1300 int acpi_processor_power_init(struct acpi_processor *pr)
1301 {
1302 	int retval;
1303 	struct cpuidle_device *dev;
1304 
1305 	if (disabled_by_idle_boot_param())
1306 		return 0;
1307 
1308 	acpi_processor_cstate_first_run_checks();
1309 
1310 	if (!acpi_processor_get_power_info(pr))
1311 		pr->flags.power_setup_done = 1;
1312 
1313 	/*
1314 	 * Install the idle handler if processor power management is supported.
1315 	 * Note that we use previously set idle handler will be used on
1316 	 * platforms that only support C1.
1317 	 */
1318 	if (pr->flags.power) {
1319 		/* Register acpi_idle_driver if not already registered */
1320 		if (!acpi_processor_registered) {
1321 			acpi_processor_setup_cpuidle_states(pr);
1322 			retval = cpuidle_register_driver(&acpi_idle_driver);
1323 			if (retval)
1324 				return retval;
1325 			pr_debug("%s registered with cpuidle\n",
1326 				 acpi_idle_driver.name);
1327 		}
1328 
1329 		dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1330 		if (!dev)
1331 			return -ENOMEM;
1332 		per_cpu(acpi_cpuidle_device, pr->id) = dev;
1333 
1334 		acpi_processor_setup_cpuidle_dev(pr, dev);
1335 
1336 		/* Register per-cpu cpuidle_device. Cpuidle driver
1337 		 * must already be registered before registering device
1338 		 */
1339 		retval = cpuidle_register_device(dev);
1340 		if (retval) {
1341 			if (acpi_processor_registered == 0)
1342 				cpuidle_unregister_driver(&acpi_idle_driver);
1343 			return retval;
1344 		}
1345 		acpi_processor_registered++;
1346 	}
1347 	return 0;
1348 }
1349 
1350 int acpi_processor_power_exit(struct acpi_processor *pr)
1351 {
1352 	struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1353 
1354 	if (disabled_by_idle_boot_param())
1355 		return 0;
1356 
1357 	if (pr->flags.power) {
1358 		cpuidle_unregister_device(dev);
1359 		acpi_processor_registered--;
1360 		if (acpi_processor_registered == 0)
1361 			cpuidle_unregister_driver(&acpi_idle_driver);
1362 	}
1363 
1364 	pr->flags.power_setup_done = 0;
1365 	return 0;
1366 }
1367