1 /* 2 * processor_idle - idle state submodule to the ACPI processor driver 3 * 4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> 7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> 8 * - Added processor hotplug support 9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> 10 * - Added support for C3 on SMP 11 * 12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License as published by 16 * the Free Software Foundation; either version 2 of the License, or (at 17 * your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, but 20 * WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 * General Public License for more details. 23 * 24 * You should have received a copy of the GNU General Public License along 25 * with this program; if not, write to the Free Software Foundation, Inc., 26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. 27 * 28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 29 */ 30 31 #include <linux/module.h> 32 #include <linux/acpi.h> 33 #include <linux/dmi.h> 34 #include <linux/sched.h> /* need_resched() */ 35 #include <linux/clockchips.h> 36 #include <linux/cpuidle.h> 37 #include <linux/syscore_ops.h> 38 39 /* 40 * Include the apic definitions for x86 to have the APIC timer related defines 41 * available also for UP (on SMP it gets magically included via linux/smp.h). 42 * asm/acpi.h is not an option, as it would require more include magic. Also 43 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. 44 */ 45 #ifdef CONFIG_X86 46 #include <asm/apic.h> 47 #endif 48 49 #include <acpi/acpi_bus.h> 50 #include <acpi/processor.h> 51 52 #define PREFIX "ACPI: " 53 54 #define ACPI_PROCESSOR_CLASS "processor" 55 #define _COMPONENT ACPI_PROCESSOR_COMPONENT 56 ACPI_MODULE_NAME("processor_idle"); 57 58 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; 59 module_param(max_cstate, uint, 0000); 60 static unsigned int nocst __read_mostly; 61 module_param(nocst, uint, 0000); 62 static int bm_check_disable __read_mostly; 63 module_param(bm_check_disable, uint, 0000); 64 65 static unsigned int latency_factor __read_mostly = 2; 66 module_param(latency_factor, uint, 0644); 67 68 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); 69 70 static DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], 71 acpi_cstate); 72 73 static int disabled_by_idle_boot_param(void) 74 { 75 return boot_option_idle_override == IDLE_POLL || 76 boot_option_idle_override == IDLE_HALT; 77 } 78 79 /* 80 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. 81 * For now disable this. Probably a bug somewhere else. 82 * 83 * To skip this limit, boot/load with a large max_cstate limit. 84 */ 85 static int set_max_cstate(const struct dmi_system_id *id) 86 { 87 if (max_cstate > ACPI_PROCESSOR_MAX_POWER) 88 return 0; 89 90 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." 91 " Override with \"processor.max_cstate=%d\"\n", id->ident, 92 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); 93 94 max_cstate = (long)id->driver_data; 95 96 return 0; 97 } 98 99 /* Actually this shouldn't be __cpuinitdata, would be better to fix the 100 callers to only run once -AK */ 101 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = { 102 { set_max_cstate, "Clevo 5600D", { 103 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), 104 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, 105 (void *)2}, 106 { set_max_cstate, "Pavilion zv5000", { 107 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 108 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, 109 (void *)1}, 110 { set_max_cstate, "Asus L8400B", { 111 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), 112 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, 113 (void *)1}, 114 {}, 115 }; 116 117 118 /* 119 * Callers should disable interrupts before the call and enable 120 * interrupts after return. 121 */ 122 static void acpi_safe_halt(void) 123 { 124 current_thread_info()->status &= ~TS_POLLING; 125 /* 126 * TS_POLLING-cleared state must be visible before we 127 * test NEED_RESCHED: 128 */ 129 smp_mb(); 130 if (!need_resched()) { 131 safe_halt(); 132 local_irq_disable(); 133 } 134 current_thread_info()->status |= TS_POLLING; 135 } 136 137 #ifdef ARCH_APICTIMER_STOPS_ON_C3 138 139 /* 140 * Some BIOS implementations switch to C3 in the published C2 state. 141 * This seems to be a common problem on AMD boxen, but other vendors 142 * are affected too. We pick the most conservative approach: we assume 143 * that the local APIC stops in both C2 and C3. 144 */ 145 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 146 struct acpi_processor_cx *cx) 147 { 148 struct acpi_processor_power *pwr = &pr->power; 149 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; 150 151 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) 152 return; 153 154 if (amd_e400_c1e_detected) 155 type = ACPI_STATE_C1; 156 157 /* 158 * Check, if one of the previous states already marked the lapic 159 * unstable 160 */ 161 if (pwr->timer_broadcast_on_state < state) 162 return; 163 164 if (cx->type >= type) 165 pr->power.timer_broadcast_on_state = state; 166 } 167 168 static void __lapic_timer_propagate_broadcast(void *arg) 169 { 170 struct acpi_processor *pr = (struct acpi_processor *) arg; 171 unsigned long reason; 172 173 reason = pr->power.timer_broadcast_on_state < INT_MAX ? 174 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF; 175 176 clockevents_notify(reason, &pr->id); 177 } 178 179 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) 180 { 181 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, 182 (void *)pr, 1); 183 } 184 185 /* Power(C) State timer broadcast control */ 186 static void lapic_timer_state_broadcast(struct acpi_processor *pr, 187 struct acpi_processor_cx *cx, 188 int broadcast) 189 { 190 int state = cx - pr->power.states; 191 192 if (state >= pr->power.timer_broadcast_on_state) { 193 unsigned long reason; 194 195 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER : 196 CLOCK_EVT_NOTIFY_BROADCAST_EXIT; 197 clockevents_notify(reason, &pr->id); 198 } 199 } 200 201 #else 202 203 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 204 struct acpi_processor_cx *cstate) { } 205 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } 206 static void lapic_timer_state_broadcast(struct acpi_processor *pr, 207 struct acpi_processor_cx *cx, 208 int broadcast) 209 { 210 } 211 212 #endif 213 214 #ifdef CONFIG_PM_SLEEP 215 static u32 saved_bm_rld; 216 217 static int acpi_processor_suspend(void) 218 { 219 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld); 220 return 0; 221 } 222 223 static void acpi_processor_resume(void) 224 { 225 u32 resumed_bm_rld; 226 227 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld); 228 if (resumed_bm_rld == saved_bm_rld) 229 return; 230 231 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld); 232 } 233 234 static struct syscore_ops acpi_processor_syscore_ops = { 235 .suspend = acpi_processor_suspend, 236 .resume = acpi_processor_resume, 237 }; 238 239 void acpi_processor_syscore_init(void) 240 { 241 register_syscore_ops(&acpi_processor_syscore_ops); 242 } 243 244 void acpi_processor_syscore_exit(void) 245 { 246 unregister_syscore_ops(&acpi_processor_syscore_ops); 247 } 248 #endif /* CONFIG_PM_SLEEP */ 249 250 #if defined(CONFIG_X86) 251 static void tsc_check_state(int state) 252 { 253 switch (boot_cpu_data.x86_vendor) { 254 case X86_VENDOR_AMD: 255 case X86_VENDOR_INTEL: 256 /* 257 * AMD Fam10h TSC will tick in all 258 * C/P/S0/S1 states when this bit is set. 259 */ 260 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) 261 return; 262 263 /*FALL THROUGH*/ 264 default: 265 /* TSC could halt in idle, so notify users */ 266 if (state > ACPI_STATE_C1) 267 mark_tsc_unstable("TSC halts in idle"); 268 } 269 } 270 #else 271 static void tsc_check_state(int state) { return; } 272 #endif 273 274 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) 275 { 276 277 if (!pr) 278 return -EINVAL; 279 280 if (!pr->pblk) 281 return -ENODEV; 282 283 /* if info is obtained from pblk/fadt, type equals state */ 284 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; 285 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; 286 287 #ifndef CONFIG_HOTPLUG_CPU 288 /* 289 * Check for P_LVL2_UP flag before entering C2 and above on 290 * an SMP system. 291 */ 292 if ((num_online_cpus() > 1) && 293 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 294 return -ENODEV; 295 #endif 296 297 /* determine C2 and C3 address from pblk */ 298 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; 299 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; 300 301 /* determine latencies from FADT */ 302 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; 303 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; 304 305 /* 306 * FADT specified C2 latency must be less than or equal to 307 * 100 microseconds. 308 */ 309 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { 310 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 311 "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency)); 312 /* invalidate C2 */ 313 pr->power.states[ACPI_STATE_C2].address = 0; 314 } 315 316 /* 317 * FADT supplied C3 latency must be less than or equal to 318 * 1000 microseconds. 319 */ 320 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { 321 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 322 "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency)); 323 /* invalidate C3 */ 324 pr->power.states[ACPI_STATE_C3].address = 0; 325 } 326 327 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 328 "lvl2[0x%08x] lvl3[0x%08x]\n", 329 pr->power.states[ACPI_STATE_C2].address, 330 pr->power.states[ACPI_STATE_C3].address)); 331 332 return 0; 333 } 334 335 static int acpi_processor_get_power_info_default(struct acpi_processor *pr) 336 { 337 if (!pr->power.states[ACPI_STATE_C1].valid) { 338 /* set the first C-State to C1 */ 339 /* all processors need to support C1 */ 340 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; 341 pr->power.states[ACPI_STATE_C1].valid = 1; 342 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; 343 } 344 /* the C0 state only exists as a filler in our array */ 345 pr->power.states[ACPI_STATE_C0].valid = 1; 346 return 0; 347 } 348 349 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) 350 { 351 acpi_status status = 0; 352 u64 count; 353 int current_count; 354 int i; 355 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 356 union acpi_object *cst; 357 358 359 if (nocst) 360 return -ENODEV; 361 362 current_count = 0; 363 364 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); 365 if (ACPI_FAILURE(status)) { 366 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); 367 return -ENODEV; 368 } 369 370 cst = buffer.pointer; 371 372 /* There must be at least 2 elements */ 373 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { 374 printk(KERN_ERR PREFIX "not enough elements in _CST\n"); 375 status = -EFAULT; 376 goto end; 377 } 378 379 count = cst->package.elements[0].integer.value; 380 381 /* Validate number of power states. */ 382 if (count < 1 || count != cst->package.count - 1) { 383 printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); 384 status = -EFAULT; 385 goto end; 386 } 387 388 /* Tell driver that at least _CST is supported. */ 389 pr->flags.has_cst = 1; 390 391 for (i = 1; i <= count; i++) { 392 union acpi_object *element; 393 union acpi_object *obj; 394 struct acpi_power_register *reg; 395 struct acpi_processor_cx cx; 396 397 memset(&cx, 0, sizeof(cx)); 398 399 element = &(cst->package.elements[i]); 400 if (element->type != ACPI_TYPE_PACKAGE) 401 continue; 402 403 if (element->package.count != 4) 404 continue; 405 406 obj = &(element->package.elements[0]); 407 408 if (obj->type != ACPI_TYPE_BUFFER) 409 continue; 410 411 reg = (struct acpi_power_register *)obj->buffer.pointer; 412 413 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && 414 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) 415 continue; 416 417 /* There should be an easy way to extract an integer... */ 418 obj = &(element->package.elements[1]); 419 if (obj->type != ACPI_TYPE_INTEGER) 420 continue; 421 422 cx.type = obj->integer.value; 423 /* 424 * Some buggy BIOSes won't list C1 in _CST - 425 * Let acpi_processor_get_power_info_default() handle them later 426 */ 427 if (i == 1 && cx.type != ACPI_STATE_C1) 428 current_count++; 429 430 cx.address = reg->address; 431 cx.index = current_count + 1; 432 433 cx.entry_method = ACPI_CSTATE_SYSTEMIO; 434 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { 435 if (acpi_processor_ffh_cstate_probe 436 (pr->id, &cx, reg) == 0) { 437 cx.entry_method = ACPI_CSTATE_FFH; 438 } else if (cx.type == ACPI_STATE_C1) { 439 /* 440 * C1 is a special case where FIXED_HARDWARE 441 * can be handled in non-MWAIT way as well. 442 * In that case, save this _CST entry info. 443 * Otherwise, ignore this info and continue. 444 */ 445 cx.entry_method = ACPI_CSTATE_HALT; 446 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); 447 } else { 448 continue; 449 } 450 if (cx.type == ACPI_STATE_C1 && 451 (boot_option_idle_override == IDLE_NOMWAIT)) { 452 /* 453 * In most cases the C1 space_id obtained from 454 * _CST object is FIXED_HARDWARE access mode. 455 * But when the option of idle=halt is added, 456 * the entry_method type should be changed from 457 * CSTATE_FFH to CSTATE_HALT. 458 * When the option of idle=nomwait is added, 459 * the C1 entry_method type should be 460 * CSTATE_HALT. 461 */ 462 cx.entry_method = ACPI_CSTATE_HALT; 463 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); 464 } 465 } else { 466 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x", 467 cx.address); 468 } 469 470 if (cx.type == ACPI_STATE_C1) { 471 cx.valid = 1; 472 } 473 474 obj = &(element->package.elements[2]); 475 if (obj->type != ACPI_TYPE_INTEGER) 476 continue; 477 478 cx.latency = obj->integer.value; 479 480 obj = &(element->package.elements[3]); 481 if (obj->type != ACPI_TYPE_INTEGER) 482 continue; 483 484 current_count++; 485 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); 486 487 /* 488 * We support total ACPI_PROCESSOR_MAX_POWER - 1 489 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) 490 */ 491 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { 492 printk(KERN_WARNING 493 "Limiting number of power states to max (%d)\n", 494 ACPI_PROCESSOR_MAX_POWER); 495 printk(KERN_WARNING 496 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); 497 break; 498 } 499 } 500 501 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", 502 current_count)); 503 504 /* Validate number of power states discovered */ 505 if (current_count < 2) 506 status = -EFAULT; 507 508 end: 509 kfree(buffer.pointer); 510 511 return status; 512 } 513 514 static void acpi_processor_power_verify_c3(struct acpi_processor *pr, 515 struct acpi_processor_cx *cx) 516 { 517 static int bm_check_flag = -1; 518 static int bm_control_flag = -1; 519 520 521 if (!cx->address) 522 return; 523 524 /* 525 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) 526 * DMA transfers are used by any ISA device to avoid livelock. 527 * Note that we could disable Type-F DMA (as recommended by 528 * the erratum), but this is known to disrupt certain ISA 529 * devices thus we take the conservative approach. 530 */ 531 else if (errata.piix4.fdma) { 532 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 533 "C3 not supported on PIIX4 with Type-F DMA\n")); 534 return; 535 } 536 537 /* All the logic here assumes flags.bm_check is same across all CPUs */ 538 if (bm_check_flag == -1) { 539 /* Determine whether bm_check is needed based on CPU */ 540 acpi_processor_power_init_bm_check(&(pr->flags), pr->id); 541 bm_check_flag = pr->flags.bm_check; 542 bm_control_flag = pr->flags.bm_control; 543 } else { 544 pr->flags.bm_check = bm_check_flag; 545 pr->flags.bm_control = bm_control_flag; 546 } 547 548 if (pr->flags.bm_check) { 549 if (!pr->flags.bm_control) { 550 if (pr->flags.has_cst != 1) { 551 /* bus mastering control is necessary */ 552 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 553 "C3 support requires BM control\n")); 554 return; 555 } else { 556 /* Here we enter C3 without bus mastering */ 557 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 558 "C3 support without BM control\n")); 559 } 560 } 561 } else { 562 /* 563 * WBINVD should be set in fadt, for C3 state to be 564 * supported on when bm_check is not required. 565 */ 566 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { 567 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 568 "Cache invalidation should work properly" 569 " for C3 to be enabled on SMP systems\n")); 570 return; 571 } 572 } 573 574 /* 575 * Otherwise we've met all of our C3 requirements. 576 * Normalize the C3 latency to expidite policy. Enable 577 * checking of bus mastering status (bm_check) so we can 578 * use this in our C3 policy 579 */ 580 cx->valid = 1; 581 582 /* 583 * On older chipsets, BM_RLD needs to be set 584 * in order for Bus Master activity to wake the 585 * system from C3. Newer chipsets handle DMA 586 * during C3 automatically and BM_RLD is a NOP. 587 * In either case, the proper way to 588 * handle BM_RLD is to set it and leave it set. 589 */ 590 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); 591 592 return; 593 } 594 595 static int acpi_processor_power_verify(struct acpi_processor *pr) 596 { 597 unsigned int i; 598 unsigned int working = 0; 599 600 pr->power.timer_broadcast_on_state = INT_MAX; 601 602 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 603 struct acpi_processor_cx *cx = &pr->power.states[i]; 604 605 switch (cx->type) { 606 case ACPI_STATE_C1: 607 cx->valid = 1; 608 break; 609 610 case ACPI_STATE_C2: 611 if (!cx->address) 612 break; 613 cx->valid = 1; 614 break; 615 616 case ACPI_STATE_C3: 617 acpi_processor_power_verify_c3(pr, cx); 618 break; 619 } 620 if (!cx->valid) 621 continue; 622 623 lapic_timer_check_state(i, pr, cx); 624 tsc_check_state(cx->type); 625 working++; 626 } 627 628 lapic_timer_propagate_broadcast(pr); 629 630 return (working); 631 } 632 633 static int acpi_processor_get_power_info(struct acpi_processor *pr) 634 { 635 unsigned int i; 636 int result; 637 638 639 /* NOTE: the idle thread may not be running while calling 640 * this function */ 641 642 /* Zero initialize all the C-states info. */ 643 memset(pr->power.states, 0, sizeof(pr->power.states)); 644 645 result = acpi_processor_get_power_info_cst(pr); 646 if (result == -ENODEV) 647 result = acpi_processor_get_power_info_fadt(pr); 648 649 if (result) 650 return result; 651 652 acpi_processor_get_power_info_default(pr); 653 654 pr->power.count = acpi_processor_power_verify(pr); 655 656 /* 657 * if one state of type C2 or C3 is available, mark this 658 * CPU as being "idle manageable" 659 */ 660 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { 661 if (pr->power.states[i].valid) { 662 pr->power.count = i; 663 if (pr->power.states[i].type >= ACPI_STATE_C2) 664 pr->flags.power = 1; 665 } 666 } 667 668 return 0; 669 } 670 671 /** 672 * acpi_idle_bm_check - checks if bus master activity was detected 673 */ 674 static int acpi_idle_bm_check(void) 675 { 676 u32 bm_status = 0; 677 678 if (bm_check_disable) 679 return 0; 680 681 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); 682 if (bm_status) 683 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); 684 /* 685 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect 686 * the true state of bus mastering activity; forcing us to 687 * manually check the BMIDEA bit of each IDE channel. 688 */ 689 else if (errata.piix4.bmisx) { 690 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) 691 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) 692 bm_status = 1; 693 } 694 return bm_status; 695 } 696 697 /** 698 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry 699 * @cx: cstate data 700 * 701 * Caller disables interrupt before call and enables interrupt after return. 702 */ 703 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx) 704 { 705 /* Don't trace irqs off for idle */ 706 stop_critical_timings(); 707 if (cx->entry_method == ACPI_CSTATE_FFH) { 708 /* Call into architectural FFH based C-state */ 709 acpi_processor_ffh_cstate_enter(cx); 710 } else if (cx->entry_method == ACPI_CSTATE_HALT) { 711 acpi_safe_halt(); 712 } else { 713 /* IO port based C-state */ 714 inb(cx->address); 715 /* Dummy wait op - must do something useless after P_LVL2 read 716 because chipsets cannot guarantee that STPCLK# signal 717 gets asserted in time to freeze execution properly. */ 718 inl(acpi_gbl_FADT.xpm_timer_block.address); 719 } 720 start_critical_timings(); 721 } 722 723 /** 724 * acpi_idle_enter_c1 - enters an ACPI C1 state-type 725 * @dev: the target CPU 726 * @drv: cpuidle driver containing cpuidle state info 727 * @index: index of target state 728 * 729 * This is equivalent to the HALT instruction. 730 */ 731 static int acpi_idle_enter_c1(struct cpuidle_device *dev, 732 struct cpuidle_driver *drv, int index) 733 { 734 struct acpi_processor *pr; 735 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 736 737 pr = __this_cpu_read(processors); 738 739 if (unlikely(!pr)) 740 return -EINVAL; 741 742 lapic_timer_state_broadcast(pr, cx, 1); 743 acpi_idle_do_entry(cx); 744 745 lapic_timer_state_broadcast(pr, cx, 0); 746 747 return index; 748 } 749 750 751 /** 752 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) 753 * @dev: the target CPU 754 * @index: the index of suggested state 755 */ 756 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) 757 { 758 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 759 760 ACPI_FLUSH_CPU_CACHE(); 761 762 while (1) { 763 764 if (cx->entry_method == ACPI_CSTATE_HALT) 765 safe_halt(); 766 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { 767 inb(cx->address); 768 /* See comment in acpi_idle_do_entry() */ 769 inl(acpi_gbl_FADT.xpm_timer_block.address); 770 } else 771 return -ENODEV; 772 } 773 774 /* Never reached */ 775 return 0; 776 } 777 778 /** 779 * acpi_idle_enter_simple - enters an ACPI state without BM handling 780 * @dev: the target CPU 781 * @drv: cpuidle driver with cpuidle state information 782 * @index: the index of suggested state 783 */ 784 static int acpi_idle_enter_simple(struct cpuidle_device *dev, 785 struct cpuidle_driver *drv, int index) 786 { 787 struct acpi_processor *pr; 788 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 789 790 pr = __this_cpu_read(processors); 791 792 if (unlikely(!pr)) 793 return -EINVAL; 794 795 if (cx->entry_method != ACPI_CSTATE_FFH) { 796 current_thread_info()->status &= ~TS_POLLING; 797 /* 798 * TS_POLLING-cleared state must be visible before we test 799 * NEED_RESCHED: 800 */ 801 smp_mb(); 802 803 if (unlikely(need_resched())) { 804 current_thread_info()->status |= TS_POLLING; 805 return -EINVAL; 806 } 807 } 808 809 /* 810 * Must be done before busmaster disable as we might need to 811 * access HPET ! 812 */ 813 lapic_timer_state_broadcast(pr, cx, 1); 814 815 if (cx->type == ACPI_STATE_C3) 816 ACPI_FLUSH_CPU_CACHE(); 817 818 /* Tell the scheduler that we are going deep-idle: */ 819 sched_clock_idle_sleep_event(); 820 acpi_idle_do_entry(cx); 821 822 sched_clock_idle_wakeup_event(0); 823 824 if (cx->entry_method != ACPI_CSTATE_FFH) 825 current_thread_info()->status |= TS_POLLING; 826 827 lapic_timer_state_broadcast(pr, cx, 0); 828 return index; 829 } 830 831 static int c3_cpu_count; 832 static DEFINE_RAW_SPINLOCK(c3_lock); 833 834 /** 835 * acpi_idle_enter_bm - enters C3 with proper BM handling 836 * @dev: the target CPU 837 * @drv: cpuidle driver containing state data 838 * @index: the index of suggested state 839 * 840 * If BM is detected, the deepest non-C3 idle state is entered instead. 841 */ 842 static int acpi_idle_enter_bm(struct cpuidle_device *dev, 843 struct cpuidle_driver *drv, int index) 844 { 845 struct acpi_processor *pr; 846 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 847 848 pr = __this_cpu_read(processors); 849 850 if (unlikely(!pr)) 851 return -EINVAL; 852 853 if (!cx->bm_sts_skip && acpi_idle_bm_check()) { 854 if (drv->safe_state_index >= 0) { 855 return drv->states[drv->safe_state_index].enter(dev, 856 drv, drv->safe_state_index); 857 } else { 858 acpi_safe_halt(); 859 return -EBUSY; 860 } 861 } 862 863 if (cx->entry_method != ACPI_CSTATE_FFH) { 864 current_thread_info()->status &= ~TS_POLLING; 865 /* 866 * TS_POLLING-cleared state must be visible before we test 867 * NEED_RESCHED: 868 */ 869 smp_mb(); 870 871 if (unlikely(need_resched())) { 872 current_thread_info()->status |= TS_POLLING; 873 return -EINVAL; 874 } 875 } 876 877 acpi_unlazy_tlb(smp_processor_id()); 878 879 /* Tell the scheduler that we are going deep-idle: */ 880 sched_clock_idle_sleep_event(); 881 /* 882 * Must be done before busmaster disable as we might need to 883 * access HPET ! 884 */ 885 lapic_timer_state_broadcast(pr, cx, 1); 886 887 /* 888 * disable bus master 889 * bm_check implies we need ARB_DIS 890 * !bm_check implies we need cache flush 891 * bm_control implies whether we can do ARB_DIS 892 * 893 * That leaves a case where bm_check is set and bm_control is 894 * not set. In that case we cannot do much, we enter C3 895 * without doing anything. 896 */ 897 if (pr->flags.bm_check && pr->flags.bm_control) { 898 raw_spin_lock(&c3_lock); 899 c3_cpu_count++; 900 /* Disable bus master arbitration when all CPUs are in C3 */ 901 if (c3_cpu_count == num_online_cpus()) 902 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); 903 raw_spin_unlock(&c3_lock); 904 } else if (!pr->flags.bm_check) { 905 ACPI_FLUSH_CPU_CACHE(); 906 } 907 908 acpi_idle_do_entry(cx); 909 910 /* Re-enable bus master arbitration */ 911 if (pr->flags.bm_check && pr->flags.bm_control) { 912 raw_spin_lock(&c3_lock); 913 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); 914 c3_cpu_count--; 915 raw_spin_unlock(&c3_lock); 916 } 917 918 sched_clock_idle_wakeup_event(0); 919 920 if (cx->entry_method != ACPI_CSTATE_FFH) 921 current_thread_info()->status |= TS_POLLING; 922 923 lapic_timer_state_broadcast(pr, cx, 0); 924 return index; 925 } 926 927 struct cpuidle_driver acpi_idle_driver = { 928 .name = "acpi_idle", 929 .owner = THIS_MODULE, 930 }; 931 932 /** 933 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE 934 * device i.e. per-cpu data 935 * 936 * @pr: the ACPI processor 937 * @dev : the cpuidle device 938 */ 939 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, 940 struct cpuidle_device *dev) 941 { 942 int i, count = CPUIDLE_DRIVER_STATE_START; 943 struct acpi_processor_cx *cx; 944 945 if (!pr->flags.power_setup_done) 946 return -EINVAL; 947 948 if (pr->flags.power == 0) { 949 return -EINVAL; 950 } 951 952 if (!dev) 953 return -EINVAL; 954 955 dev->cpu = pr->id; 956 957 if (max_cstate == 0) 958 max_cstate = 1; 959 960 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 961 cx = &pr->power.states[i]; 962 963 if (!cx->valid) 964 continue; 965 966 #ifdef CONFIG_HOTPLUG_CPU 967 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && 968 !pr->flags.has_cst && 969 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 970 continue; 971 #endif 972 per_cpu(acpi_cstate[count], dev->cpu) = cx; 973 974 count++; 975 if (count == CPUIDLE_STATE_MAX) 976 break; 977 } 978 979 dev->state_count = count; 980 981 if (!count) 982 return -EINVAL; 983 984 return 0; 985 } 986 987 /** 988 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle 989 * global state data i.e. idle routines 990 * 991 * @pr: the ACPI processor 992 */ 993 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) 994 { 995 int i, count = CPUIDLE_DRIVER_STATE_START; 996 struct acpi_processor_cx *cx; 997 struct cpuidle_state *state; 998 struct cpuidle_driver *drv = &acpi_idle_driver; 999 1000 if (!pr->flags.power_setup_done) 1001 return -EINVAL; 1002 1003 if (pr->flags.power == 0) 1004 return -EINVAL; 1005 1006 drv->safe_state_index = -1; 1007 for (i = 0; i < CPUIDLE_STATE_MAX; i++) { 1008 drv->states[i].name[0] = '\0'; 1009 drv->states[i].desc[0] = '\0'; 1010 } 1011 1012 if (max_cstate == 0) 1013 max_cstate = 1; 1014 1015 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 1016 cx = &pr->power.states[i]; 1017 1018 if (!cx->valid) 1019 continue; 1020 1021 #ifdef CONFIG_HOTPLUG_CPU 1022 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && 1023 !pr->flags.has_cst && 1024 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 1025 continue; 1026 #endif 1027 1028 state = &drv->states[count]; 1029 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); 1030 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); 1031 state->exit_latency = cx->latency; 1032 state->target_residency = cx->latency * latency_factor; 1033 1034 state->flags = 0; 1035 switch (cx->type) { 1036 case ACPI_STATE_C1: 1037 if (cx->entry_method == ACPI_CSTATE_FFH) 1038 state->flags |= CPUIDLE_FLAG_TIME_VALID; 1039 1040 state->enter = acpi_idle_enter_c1; 1041 state->enter_dead = acpi_idle_play_dead; 1042 drv->safe_state_index = count; 1043 break; 1044 1045 case ACPI_STATE_C2: 1046 state->flags |= CPUIDLE_FLAG_TIME_VALID; 1047 state->enter = acpi_idle_enter_simple; 1048 state->enter_dead = acpi_idle_play_dead; 1049 drv->safe_state_index = count; 1050 break; 1051 1052 case ACPI_STATE_C3: 1053 state->flags |= CPUIDLE_FLAG_TIME_VALID; 1054 state->enter = pr->flags.bm_check ? 1055 acpi_idle_enter_bm : 1056 acpi_idle_enter_simple; 1057 break; 1058 } 1059 1060 count++; 1061 if (count == CPUIDLE_STATE_MAX) 1062 break; 1063 } 1064 1065 drv->state_count = count; 1066 1067 if (!count) 1068 return -EINVAL; 1069 1070 return 0; 1071 } 1072 1073 int acpi_processor_hotplug(struct acpi_processor *pr) 1074 { 1075 int ret = 0; 1076 struct cpuidle_device *dev; 1077 1078 if (disabled_by_idle_boot_param()) 1079 return 0; 1080 1081 if (!pr) 1082 return -EINVAL; 1083 1084 if (nocst) { 1085 return -ENODEV; 1086 } 1087 1088 if (!pr->flags.power_setup_done) 1089 return -ENODEV; 1090 1091 dev = per_cpu(acpi_cpuidle_device, pr->id); 1092 cpuidle_pause_and_lock(); 1093 cpuidle_disable_device(dev); 1094 acpi_processor_get_power_info(pr); 1095 if (pr->flags.power) { 1096 acpi_processor_setup_cpuidle_cx(pr, dev); 1097 ret = cpuidle_enable_device(dev); 1098 } 1099 cpuidle_resume_and_unlock(); 1100 1101 return ret; 1102 } 1103 1104 int acpi_processor_cst_has_changed(struct acpi_processor *pr) 1105 { 1106 int cpu; 1107 struct acpi_processor *_pr; 1108 struct cpuidle_device *dev; 1109 1110 if (disabled_by_idle_boot_param()) 1111 return 0; 1112 1113 if (!pr) 1114 return -EINVAL; 1115 1116 if (nocst) 1117 return -ENODEV; 1118 1119 if (!pr->flags.power_setup_done) 1120 return -ENODEV; 1121 1122 /* 1123 * FIXME: Design the ACPI notification to make it once per 1124 * system instead of once per-cpu. This condition is a hack 1125 * to make the code that updates C-States be called once. 1126 */ 1127 1128 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { 1129 1130 cpuidle_pause_and_lock(); 1131 /* Protect against cpu-hotplug */ 1132 get_online_cpus(); 1133 1134 /* Disable all cpuidle devices */ 1135 for_each_online_cpu(cpu) { 1136 _pr = per_cpu(processors, cpu); 1137 if (!_pr || !_pr->flags.power_setup_done) 1138 continue; 1139 dev = per_cpu(acpi_cpuidle_device, cpu); 1140 cpuidle_disable_device(dev); 1141 } 1142 1143 /* Populate Updated C-state information */ 1144 acpi_processor_get_power_info(pr); 1145 acpi_processor_setup_cpuidle_states(pr); 1146 1147 /* Enable all cpuidle devices */ 1148 for_each_online_cpu(cpu) { 1149 _pr = per_cpu(processors, cpu); 1150 if (!_pr || !_pr->flags.power_setup_done) 1151 continue; 1152 acpi_processor_get_power_info(_pr); 1153 if (_pr->flags.power) { 1154 dev = per_cpu(acpi_cpuidle_device, cpu); 1155 acpi_processor_setup_cpuidle_cx(_pr, dev); 1156 cpuidle_enable_device(dev); 1157 } 1158 } 1159 put_online_cpus(); 1160 cpuidle_resume_and_unlock(); 1161 } 1162 1163 return 0; 1164 } 1165 1166 static int acpi_processor_registered; 1167 1168 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr) 1169 { 1170 acpi_status status = 0; 1171 int retval; 1172 struct cpuidle_device *dev; 1173 static int first_run; 1174 1175 if (disabled_by_idle_boot_param()) 1176 return 0; 1177 1178 if (!first_run) { 1179 dmi_check_system(processor_power_dmi_table); 1180 max_cstate = acpi_processor_cstate_check(max_cstate); 1181 if (max_cstate < ACPI_C_STATES_MAX) 1182 printk(KERN_NOTICE 1183 "ACPI: processor limited to max C-state %d\n", 1184 max_cstate); 1185 first_run++; 1186 } 1187 1188 if (!pr) 1189 return -EINVAL; 1190 1191 if (acpi_gbl_FADT.cst_control && !nocst) { 1192 status = 1193 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8); 1194 if (ACPI_FAILURE(status)) { 1195 ACPI_EXCEPTION((AE_INFO, status, 1196 "Notifying BIOS of _CST ability failed")); 1197 } 1198 } 1199 1200 acpi_processor_get_power_info(pr); 1201 pr->flags.power_setup_done = 1; 1202 1203 /* 1204 * Install the idle handler if processor power management is supported. 1205 * Note that we use previously set idle handler will be used on 1206 * platforms that only support C1. 1207 */ 1208 if (pr->flags.power) { 1209 /* Register acpi_idle_driver if not already registered */ 1210 if (!acpi_processor_registered) { 1211 acpi_processor_setup_cpuidle_states(pr); 1212 retval = cpuidle_register_driver(&acpi_idle_driver); 1213 if (retval) 1214 return retval; 1215 printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n", 1216 acpi_idle_driver.name); 1217 } 1218 1219 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1220 if (!dev) 1221 return -ENOMEM; 1222 per_cpu(acpi_cpuidle_device, pr->id) = dev; 1223 1224 acpi_processor_setup_cpuidle_cx(pr, dev); 1225 1226 /* Register per-cpu cpuidle_device. Cpuidle driver 1227 * must already be registered before registering device 1228 */ 1229 retval = cpuidle_register_device(dev); 1230 if (retval) { 1231 if (acpi_processor_registered == 0) 1232 cpuidle_unregister_driver(&acpi_idle_driver); 1233 return retval; 1234 } 1235 acpi_processor_registered++; 1236 } 1237 return 0; 1238 } 1239 1240 int acpi_processor_power_exit(struct acpi_processor *pr) 1241 { 1242 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); 1243 1244 if (disabled_by_idle_boot_param()) 1245 return 0; 1246 1247 if (pr->flags.power) { 1248 cpuidle_unregister_device(dev); 1249 acpi_processor_registered--; 1250 if (acpi_processor_registered == 0) 1251 cpuidle_unregister_driver(&acpi_idle_driver); 1252 } 1253 1254 pr->flags.power_setup_done = 0; 1255 return 0; 1256 } 1257