1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * processor_idle - idle state submodule to the ACPI processor driver 4 * 5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 7 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> 8 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> 9 * - Added processor hotplug support 10 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> 11 * - Added support for C3 on SMP 12 */ 13 #define pr_fmt(fmt) "ACPI: " fmt 14 15 #include <linux/module.h> 16 #include <linux/acpi.h> 17 #include <linux/dmi.h> 18 #include <linux/sched.h> /* need_resched() */ 19 #include <linux/sort.h> 20 #include <linux/tick.h> 21 #include <linux/cpuidle.h> 22 #include <linux/cpu.h> 23 #include <linux/minmax.h> 24 #include <acpi/processor.h> 25 26 /* 27 * Include the apic definitions for x86 to have the APIC timer related defines 28 * available also for UP (on SMP it gets magically included via linux/smp.h). 29 * asm/acpi.h is not an option, as it would require more include magic. Also 30 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. 31 */ 32 #ifdef CONFIG_X86 33 #include <asm/apic.h> 34 #include <asm/cpu.h> 35 #endif 36 37 #define ACPI_IDLE_STATE_START (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0) 38 39 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; 40 module_param(max_cstate, uint, 0000); 41 static unsigned int nocst __read_mostly; 42 module_param(nocst, uint, 0000); 43 static int bm_check_disable __read_mostly; 44 module_param(bm_check_disable, uint, 0000); 45 46 static unsigned int latency_factor __read_mostly = 2; 47 module_param(latency_factor, uint, 0644); 48 49 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); 50 51 struct cpuidle_driver acpi_idle_driver = { 52 .name = "acpi_idle", 53 .owner = THIS_MODULE, 54 }; 55 56 #ifdef CONFIG_ACPI_PROCESSOR_CSTATE 57 static 58 DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate); 59 60 static int disabled_by_idle_boot_param(void) 61 { 62 return boot_option_idle_override == IDLE_POLL || 63 boot_option_idle_override == IDLE_HALT; 64 } 65 66 /* 67 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. 68 * For now disable this. Probably a bug somewhere else. 69 * 70 * To skip this limit, boot/load with a large max_cstate limit. 71 */ 72 static int set_max_cstate(const struct dmi_system_id *id) 73 { 74 if (max_cstate > ACPI_PROCESSOR_MAX_POWER) 75 return 0; 76 77 pr_notice("%s detected - limiting to C%ld max_cstate." 78 " Override with \"processor.max_cstate=%d\"\n", id->ident, 79 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); 80 81 max_cstate = (long)id->driver_data; 82 83 return 0; 84 } 85 86 static const struct dmi_system_id processor_power_dmi_table[] = { 87 { set_max_cstate, "Clevo 5600D", { 88 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), 89 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, 90 (void *)2}, 91 { set_max_cstate, "Pavilion zv5000", { 92 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 93 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, 94 (void *)1}, 95 { set_max_cstate, "Asus L8400B", { 96 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), 97 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, 98 (void *)1}, 99 /* T40 can not handle C3 idle state */ 100 { set_max_cstate, "IBM ThinkPad T40", { 101 DMI_MATCH(DMI_SYS_VENDOR, "IBM"), 102 DMI_MATCH(DMI_PRODUCT_NAME, "23737CU")}, 103 (void *)2}, 104 {}, 105 }; 106 107 108 /* 109 * Callers should disable interrupts before the call and enable 110 * interrupts after return. 111 */ 112 static void __cpuidle acpi_safe_halt(void) 113 { 114 if (!tif_need_resched()) { 115 safe_halt(); 116 local_irq_disable(); 117 } 118 } 119 120 #ifdef ARCH_APICTIMER_STOPS_ON_C3 121 122 /* 123 * Some BIOS implementations switch to C3 in the published C2 state. 124 * This seems to be a common problem on AMD boxen, but other vendors 125 * are affected too. We pick the most conservative approach: we assume 126 * that the local APIC stops in both C2 and C3. 127 */ 128 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 129 struct acpi_processor_cx *cx) 130 { 131 struct acpi_processor_power *pwr = &pr->power; 132 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; 133 134 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) 135 return; 136 137 if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E)) 138 type = ACPI_STATE_C1; 139 140 /* 141 * Check, if one of the previous states already marked the lapic 142 * unstable 143 */ 144 if (pwr->timer_broadcast_on_state < state) 145 return; 146 147 if (cx->type >= type) 148 pr->power.timer_broadcast_on_state = state; 149 } 150 151 static void __lapic_timer_propagate_broadcast(void *arg) 152 { 153 struct acpi_processor *pr = (struct acpi_processor *) arg; 154 155 if (pr->power.timer_broadcast_on_state < INT_MAX) 156 tick_broadcast_enable(); 157 else 158 tick_broadcast_disable(); 159 } 160 161 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) 162 { 163 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, 164 (void *)pr, 1); 165 } 166 167 /* Power(C) State timer broadcast control */ 168 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr, 169 struct acpi_processor_cx *cx) 170 { 171 return cx - pr->power.states >= pr->power.timer_broadcast_on_state; 172 } 173 174 #else 175 176 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 177 struct acpi_processor_cx *cstate) { } 178 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } 179 180 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr, 181 struct acpi_processor_cx *cx) 182 { 183 return false; 184 } 185 186 #endif 187 188 #if defined(CONFIG_X86) 189 static void tsc_check_state(int state) 190 { 191 switch (boot_cpu_data.x86_vendor) { 192 case X86_VENDOR_HYGON: 193 case X86_VENDOR_AMD: 194 case X86_VENDOR_INTEL: 195 case X86_VENDOR_CENTAUR: 196 case X86_VENDOR_ZHAOXIN: 197 /* 198 * AMD Fam10h TSC will tick in all 199 * C/P/S0/S1 states when this bit is set. 200 */ 201 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) 202 return; 203 fallthrough; 204 default: 205 /* TSC could halt in idle, so notify users */ 206 if (state > ACPI_STATE_C1) 207 mark_tsc_unstable("TSC halts in idle"); 208 } 209 } 210 #else 211 static void tsc_check_state(int state) { return; } 212 #endif 213 214 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) 215 { 216 217 if (!pr->pblk) 218 return -ENODEV; 219 220 /* if info is obtained from pblk/fadt, type equals state */ 221 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; 222 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; 223 224 #ifndef CONFIG_HOTPLUG_CPU 225 /* 226 * Check for P_LVL2_UP flag before entering C2 and above on 227 * an SMP system. 228 */ 229 if ((num_online_cpus() > 1) && 230 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 231 return -ENODEV; 232 #endif 233 234 /* determine C2 and C3 address from pblk */ 235 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; 236 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; 237 238 /* determine latencies from FADT */ 239 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; 240 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; 241 242 /* 243 * FADT specified C2 latency must be less than or equal to 244 * 100 microseconds. 245 */ 246 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { 247 acpi_handle_debug(pr->handle, "C2 latency too large [%d]\n", 248 acpi_gbl_FADT.c2_latency); 249 /* invalidate C2 */ 250 pr->power.states[ACPI_STATE_C2].address = 0; 251 } 252 253 /* 254 * FADT supplied C3 latency must be less than or equal to 255 * 1000 microseconds. 256 */ 257 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { 258 acpi_handle_debug(pr->handle, "C3 latency too large [%d]\n", 259 acpi_gbl_FADT.c3_latency); 260 /* invalidate C3 */ 261 pr->power.states[ACPI_STATE_C3].address = 0; 262 } 263 264 acpi_handle_debug(pr->handle, "lvl2[0x%08x] lvl3[0x%08x]\n", 265 pr->power.states[ACPI_STATE_C2].address, 266 pr->power.states[ACPI_STATE_C3].address); 267 268 snprintf(pr->power.states[ACPI_STATE_C2].desc, 269 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x", 270 pr->power.states[ACPI_STATE_C2].address); 271 snprintf(pr->power.states[ACPI_STATE_C3].desc, 272 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x", 273 pr->power.states[ACPI_STATE_C3].address); 274 275 return 0; 276 } 277 278 static int acpi_processor_get_power_info_default(struct acpi_processor *pr) 279 { 280 if (!pr->power.states[ACPI_STATE_C1].valid) { 281 /* set the first C-State to C1 */ 282 /* all processors need to support C1 */ 283 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; 284 pr->power.states[ACPI_STATE_C1].valid = 1; 285 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; 286 287 snprintf(pr->power.states[ACPI_STATE_C1].desc, 288 ACPI_CX_DESC_LEN, "ACPI HLT"); 289 } 290 /* the C0 state only exists as a filler in our array */ 291 pr->power.states[ACPI_STATE_C0].valid = 1; 292 return 0; 293 } 294 295 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) 296 { 297 int ret; 298 299 if (nocst) 300 return -ENODEV; 301 302 ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power); 303 if (ret) 304 return ret; 305 306 if (!pr->power.count) 307 return -EFAULT; 308 309 pr->flags.has_cst = 1; 310 return 0; 311 } 312 313 static void acpi_processor_power_verify_c3(struct acpi_processor *pr, 314 struct acpi_processor_cx *cx) 315 { 316 static int bm_check_flag = -1; 317 static int bm_control_flag = -1; 318 319 320 if (!cx->address) 321 return; 322 323 /* 324 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) 325 * DMA transfers are used by any ISA device to avoid livelock. 326 * Note that we could disable Type-F DMA (as recommended by 327 * the erratum), but this is known to disrupt certain ISA 328 * devices thus we take the conservative approach. 329 */ 330 else if (errata.piix4.fdma) { 331 acpi_handle_debug(pr->handle, 332 "C3 not supported on PIIX4 with Type-F DMA\n"); 333 return; 334 } 335 336 /* All the logic here assumes flags.bm_check is same across all CPUs */ 337 if (bm_check_flag == -1) { 338 /* Determine whether bm_check is needed based on CPU */ 339 acpi_processor_power_init_bm_check(&(pr->flags), pr->id); 340 bm_check_flag = pr->flags.bm_check; 341 bm_control_flag = pr->flags.bm_control; 342 } else { 343 pr->flags.bm_check = bm_check_flag; 344 pr->flags.bm_control = bm_control_flag; 345 } 346 347 if (pr->flags.bm_check) { 348 if (!pr->flags.bm_control) { 349 if (pr->flags.has_cst != 1) { 350 /* bus mastering control is necessary */ 351 acpi_handle_debug(pr->handle, 352 "C3 support requires BM control\n"); 353 return; 354 } else { 355 /* Here we enter C3 without bus mastering */ 356 acpi_handle_debug(pr->handle, 357 "C3 support without BM control\n"); 358 } 359 } 360 } else { 361 /* 362 * WBINVD should be set in fadt, for C3 state to be 363 * supported on when bm_check is not required. 364 */ 365 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { 366 acpi_handle_debug(pr->handle, 367 "Cache invalidation should work properly" 368 " for C3 to be enabled on SMP systems\n"); 369 return; 370 } 371 } 372 373 /* 374 * Otherwise we've met all of our C3 requirements. 375 * Normalize the C3 latency to expidite policy. Enable 376 * checking of bus mastering status (bm_check) so we can 377 * use this in our C3 policy 378 */ 379 cx->valid = 1; 380 381 /* 382 * On older chipsets, BM_RLD needs to be set 383 * in order for Bus Master activity to wake the 384 * system from C3. Newer chipsets handle DMA 385 * during C3 automatically and BM_RLD is a NOP. 386 * In either case, the proper way to 387 * handle BM_RLD is to set it and leave it set. 388 */ 389 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); 390 391 return; 392 } 393 394 static int acpi_cst_latency_cmp(const void *a, const void *b) 395 { 396 const struct acpi_processor_cx *x = a, *y = b; 397 398 if (!(x->valid && y->valid)) 399 return 0; 400 if (x->latency > y->latency) 401 return 1; 402 if (x->latency < y->latency) 403 return -1; 404 return 0; 405 } 406 static void acpi_cst_latency_swap(void *a, void *b, int n) 407 { 408 struct acpi_processor_cx *x = a, *y = b; 409 410 if (!(x->valid && y->valid)) 411 return; 412 swap(x->latency, y->latency); 413 } 414 415 static int acpi_processor_power_verify(struct acpi_processor *pr) 416 { 417 unsigned int i; 418 unsigned int working = 0; 419 unsigned int last_latency = 0; 420 unsigned int last_type = 0; 421 bool buggy_latency = false; 422 423 pr->power.timer_broadcast_on_state = INT_MAX; 424 425 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 426 struct acpi_processor_cx *cx = &pr->power.states[i]; 427 428 switch (cx->type) { 429 case ACPI_STATE_C1: 430 cx->valid = 1; 431 break; 432 433 case ACPI_STATE_C2: 434 if (!cx->address) 435 break; 436 cx->valid = 1; 437 break; 438 439 case ACPI_STATE_C3: 440 acpi_processor_power_verify_c3(pr, cx); 441 break; 442 } 443 if (!cx->valid) 444 continue; 445 if (cx->type >= last_type && cx->latency < last_latency) 446 buggy_latency = true; 447 last_latency = cx->latency; 448 last_type = cx->type; 449 450 lapic_timer_check_state(i, pr, cx); 451 tsc_check_state(cx->type); 452 working++; 453 } 454 455 if (buggy_latency) { 456 pr_notice("FW issue: working around C-state latencies out of order\n"); 457 sort(&pr->power.states[1], max_cstate, 458 sizeof(struct acpi_processor_cx), 459 acpi_cst_latency_cmp, 460 acpi_cst_latency_swap); 461 } 462 463 lapic_timer_propagate_broadcast(pr); 464 465 return (working); 466 } 467 468 static int acpi_processor_get_cstate_info(struct acpi_processor *pr) 469 { 470 unsigned int i; 471 int result; 472 473 474 /* NOTE: the idle thread may not be running while calling 475 * this function */ 476 477 /* Zero initialize all the C-states info. */ 478 memset(pr->power.states, 0, sizeof(pr->power.states)); 479 480 result = acpi_processor_get_power_info_cst(pr); 481 if (result == -ENODEV) 482 result = acpi_processor_get_power_info_fadt(pr); 483 484 if (result) 485 return result; 486 487 acpi_processor_get_power_info_default(pr); 488 489 pr->power.count = acpi_processor_power_verify(pr); 490 491 /* 492 * if one state of type C2 or C3 is available, mark this 493 * CPU as being "idle manageable" 494 */ 495 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { 496 if (pr->power.states[i].valid) { 497 pr->power.count = i; 498 pr->flags.power = 1; 499 } 500 } 501 502 return 0; 503 } 504 505 /** 506 * acpi_idle_bm_check - checks if bus master activity was detected 507 */ 508 static int acpi_idle_bm_check(void) 509 { 510 u32 bm_status = 0; 511 512 if (bm_check_disable) 513 return 0; 514 515 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); 516 if (bm_status) 517 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); 518 /* 519 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect 520 * the true state of bus mastering activity; forcing us to 521 * manually check the BMIDEA bit of each IDE channel. 522 */ 523 else if (errata.piix4.bmisx) { 524 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) 525 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) 526 bm_status = 1; 527 } 528 return bm_status; 529 } 530 531 static void wait_for_freeze(void) 532 { 533 #ifdef CONFIG_X86 534 /* No delay is needed if we are in guest */ 535 if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) 536 return; 537 #endif 538 /* Dummy wait op - must do something useless after P_LVL2 read 539 because chipsets cannot guarantee that STPCLK# signal 540 gets asserted in time to freeze execution properly. */ 541 inl(acpi_gbl_FADT.xpm_timer_block.address); 542 } 543 544 /** 545 * acpi_idle_do_entry - enter idle state using the appropriate method 546 * @cx: cstate data 547 * 548 * Caller disables interrupt before call and enables interrupt after return. 549 */ 550 static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx) 551 { 552 if (cx->entry_method == ACPI_CSTATE_FFH) { 553 /* Call into architectural FFH based C-state */ 554 acpi_processor_ffh_cstate_enter(cx); 555 } else if (cx->entry_method == ACPI_CSTATE_HALT) { 556 acpi_safe_halt(); 557 } else { 558 /* IO port based C-state */ 559 inb(cx->address); 560 wait_for_freeze(); 561 } 562 } 563 564 /** 565 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) 566 * @dev: the target CPU 567 * @index: the index of suggested state 568 */ 569 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) 570 { 571 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 572 573 ACPI_FLUSH_CPU_CACHE(); 574 575 while (1) { 576 577 if (cx->entry_method == ACPI_CSTATE_HALT) 578 safe_halt(); 579 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { 580 inb(cx->address); 581 wait_for_freeze(); 582 } else 583 return -ENODEV; 584 585 #if defined(CONFIG_X86) && defined(CONFIG_HOTPLUG_CPU) 586 cond_wakeup_cpu0(); 587 #endif 588 } 589 590 /* Never reached */ 591 return 0; 592 } 593 594 static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr) 595 { 596 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst && 597 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED); 598 } 599 600 static int c3_cpu_count; 601 static DEFINE_RAW_SPINLOCK(c3_lock); 602 603 /** 604 * acpi_idle_enter_bm - enters C3 with proper BM handling 605 * @drv: cpuidle driver 606 * @pr: Target processor 607 * @cx: Target state context 608 * @index: index of target state 609 */ 610 static int acpi_idle_enter_bm(struct cpuidle_driver *drv, 611 struct acpi_processor *pr, 612 struct acpi_processor_cx *cx, 613 int index) 614 { 615 static struct acpi_processor_cx safe_cx = { 616 .entry_method = ACPI_CSTATE_HALT, 617 }; 618 619 /* 620 * disable bus master 621 * bm_check implies we need ARB_DIS 622 * bm_control implies whether we can do ARB_DIS 623 * 624 * That leaves a case where bm_check is set and bm_control is not set. 625 * In that case we cannot do much, we enter C3 without doing anything. 626 */ 627 bool dis_bm = pr->flags.bm_control; 628 629 /* If we can skip BM, demote to a safe state. */ 630 if (!cx->bm_sts_skip && acpi_idle_bm_check()) { 631 dis_bm = false; 632 index = drv->safe_state_index; 633 if (index >= 0) { 634 cx = this_cpu_read(acpi_cstate[index]); 635 } else { 636 cx = &safe_cx; 637 index = -EBUSY; 638 } 639 } 640 641 if (dis_bm) { 642 raw_spin_lock(&c3_lock); 643 c3_cpu_count++; 644 /* Disable bus master arbitration when all CPUs are in C3 */ 645 if (c3_cpu_count == num_online_cpus()) 646 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); 647 raw_spin_unlock(&c3_lock); 648 } 649 650 rcu_idle_enter(); 651 652 acpi_idle_do_entry(cx); 653 654 rcu_idle_exit(); 655 656 /* Re-enable bus master arbitration */ 657 if (dis_bm) { 658 raw_spin_lock(&c3_lock); 659 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); 660 c3_cpu_count--; 661 raw_spin_unlock(&c3_lock); 662 } 663 664 return index; 665 } 666 667 static int acpi_idle_enter(struct cpuidle_device *dev, 668 struct cpuidle_driver *drv, int index) 669 { 670 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 671 struct acpi_processor *pr; 672 673 pr = __this_cpu_read(processors); 674 if (unlikely(!pr)) 675 return -EINVAL; 676 677 if (cx->type != ACPI_STATE_C1) { 678 if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) 679 return acpi_idle_enter_bm(drv, pr, cx, index); 680 681 /* C2 to C1 demotion. */ 682 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) { 683 index = ACPI_IDLE_STATE_START; 684 cx = per_cpu(acpi_cstate[index], dev->cpu); 685 } 686 } 687 688 if (cx->type == ACPI_STATE_C3) 689 ACPI_FLUSH_CPU_CACHE(); 690 691 acpi_idle_do_entry(cx); 692 693 return index; 694 } 695 696 static int acpi_idle_enter_s2idle(struct cpuidle_device *dev, 697 struct cpuidle_driver *drv, int index) 698 { 699 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 700 701 if (cx->type == ACPI_STATE_C3) { 702 struct acpi_processor *pr = __this_cpu_read(processors); 703 704 if (unlikely(!pr)) 705 return 0; 706 707 if (pr->flags.bm_check) { 708 u8 bm_sts_skip = cx->bm_sts_skip; 709 710 /* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */ 711 cx->bm_sts_skip = 1; 712 acpi_idle_enter_bm(drv, pr, cx, index); 713 cx->bm_sts_skip = bm_sts_skip; 714 715 return 0; 716 } else { 717 ACPI_FLUSH_CPU_CACHE(); 718 } 719 } 720 acpi_idle_do_entry(cx); 721 722 return 0; 723 } 724 725 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, 726 struct cpuidle_device *dev) 727 { 728 int i, count = ACPI_IDLE_STATE_START; 729 struct acpi_processor_cx *cx; 730 struct cpuidle_state *state; 731 732 if (max_cstate == 0) 733 max_cstate = 1; 734 735 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 736 state = &acpi_idle_driver.states[count]; 737 cx = &pr->power.states[i]; 738 739 if (!cx->valid) 740 continue; 741 742 per_cpu(acpi_cstate[count], dev->cpu) = cx; 743 744 if (lapic_timer_needs_broadcast(pr, cx)) 745 state->flags |= CPUIDLE_FLAG_TIMER_STOP; 746 747 if (cx->type == ACPI_STATE_C3) { 748 state->flags |= CPUIDLE_FLAG_TLB_FLUSHED; 749 if (pr->flags.bm_check) 750 state->flags |= CPUIDLE_FLAG_RCU_IDLE; 751 } 752 753 count++; 754 if (count == CPUIDLE_STATE_MAX) 755 break; 756 } 757 758 if (!count) 759 return -EINVAL; 760 761 return 0; 762 } 763 764 static int acpi_processor_setup_cstates(struct acpi_processor *pr) 765 { 766 int i, count; 767 struct acpi_processor_cx *cx; 768 struct cpuidle_state *state; 769 struct cpuidle_driver *drv = &acpi_idle_driver; 770 771 if (max_cstate == 0) 772 max_cstate = 1; 773 774 if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) { 775 cpuidle_poll_state_init(drv); 776 count = 1; 777 } else { 778 count = 0; 779 } 780 781 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 782 cx = &pr->power.states[i]; 783 784 if (!cx->valid) 785 continue; 786 787 state = &drv->states[count]; 788 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); 789 strlcpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); 790 state->exit_latency = cx->latency; 791 state->target_residency = cx->latency * latency_factor; 792 state->enter = acpi_idle_enter; 793 794 state->flags = 0; 795 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2 || 796 cx->type == ACPI_STATE_C3) { 797 state->enter_dead = acpi_idle_play_dead; 798 drv->safe_state_index = count; 799 } 800 /* 801 * Halt-induced C1 is not good for ->enter_s2idle, because it 802 * re-enables interrupts on exit. Moreover, C1 is generally not 803 * particularly interesting from the suspend-to-idle angle, so 804 * avoid C1 and the situations in which we may need to fall back 805 * to it altogether. 806 */ 807 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr)) 808 state->enter_s2idle = acpi_idle_enter_s2idle; 809 810 count++; 811 if (count == CPUIDLE_STATE_MAX) 812 break; 813 } 814 815 drv->state_count = count; 816 817 if (!count) 818 return -EINVAL; 819 820 return 0; 821 } 822 823 static inline void acpi_processor_cstate_first_run_checks(void) 824 { 825 static int first_run; 826 827 if (first_run) 828 return; 829 dmi_check_system(processor_power_dmi_table); 830 max_cstate = acpi_processor_cstate_check(max_cstate); 831 if (max_cstate < ACPI_C_STATES_MAX) 832 pr_notice("processor limited to max C-state %d\n", max_cstate); 833 834 first_run++; 835 836 if (nocst) 837 return; 838 839 acpi_processor_claim_cst_control(); 840 } 841 #else 842 843 static inline int disabled_by_idle_boot_param(void) { return 0; } 844 static inline void acpi_processor_cstate_first_run_checks(void) { } 845 static int acpi_processor_get_cstate_info(struct acpi_processor *pr) 846 { 847 return -ENODEV; 848 } 849 850 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, 851 struct cpuidle_device *dev) 852 { 853 return -EINVAL; 854 } 855 856 static int acpi_processor_setup_cstates(struct acpi_processor *pr) 857 { 858 return -EINVAL; 859 } 860 861 #endif /* CONFIG_ACPI_PROCESSOR_CSTATE */ 862 863 struct acpi_lpi_states_array { 864 unsigned int size; 865 unsigned int composite_states_size; 866 struct acpi_lpi_state *entries; 867 struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER]; 868 }; 869 870 static int obj_get_integer(union acpi_object *obj, u32 *value) 871 { 872 if (obj->type != ACPI_TYPE_INTEGER) 873 return -EINVAL; 874 875 *value = obj->integer.value; 876 return 0; 877 } 878 879 static int acpi_processor_evaluate_lpi(acpi_handle handle, 880 struct acpi_lpi_states_array *info) 881 { 882 acpi_status status; 883 int ret = 0; 884 int pkg_count, state_idx = 1, loop; 885 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 886 union acpi_object *lpi_data; 887 struct acpi_lpi_state *lpi_state; 888 889 status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer); 890 if (ACPI_FAILURE(status)) { 891 acpi_handle_debug(handle, "No _LPI, giving up\n"); 892 return -ENODEV; 893 } 894 895 lpi_data = buffer.pointer; 896 897 /* There must be at least 4 elements = 3 elements + 1 package */ 898 if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE || 899 lpi_data->package.count < 4) { 900 pr_debug("not enough elements in _LPI\n"); 901 ret = -ENODATA; 902 goto end; 903 } 904 905 pkg_count = lpi_data->package.elements[2].integer.value; 906 907 /* Validate number of power states. */ 908 if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) { 909 pr_debug("count given by _LPI is not valid\n"); 910 ret = -ENODATA; 911 goto end; 912 } 913 914 lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL); 915 if (!lpi_state) { 916 ret = -ENOMEM; 917 goto end; 918 } 919 920 info->size = pkg_count; 921 info->entries = lpi_state; 922 923 /* LPI States start at index 3 */ 924 for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) { 925 union acpi_object *element, *pkg_elem, *obj; 926 927 element = &lpi_data->package.elements[loop]; 928 if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7) 929 continue; 930 931 pkg_elem = element->package.elements; 932 933 obj = pkg_elem + 6; 934 if (obj->type == ACPI_TYPE_BUFFER) { 935 struct acpi_power_register *reg; 936 937 reg = (struct acpi_power_register *)obj->buffer.pointer; 938 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && 939 reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) 940 continue; 941 942 lpi_state->address = reg->address; 943 lpi_state->entry_method = 944 reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ? 945 ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO; 946 } else if (obj->type == ACPI_TYPE_INTEGER) { 947 lpi_state->entry_method = ACPI_CSTATE_INTEGER; 948 lpi_state->address = obj->integer.value; 949 } else { 950 continue; 951 } 952 953 /* elements[7,8] skipped for now i.e. Residency/Usage counter*/ 954 955 obj = pkg_elem + 9; 956 if (obj->type == ACPI_TYPE_STRING) 957 strlcpy(lpi_state->desc, obj->string.pointer, 958 ACPI_CX_DESC_LEN); 959 960 lpi_state->index = state_idx; 961 if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) { 962 pr_debug("No min. residency found, assuming 10 us\n"); 963 lpi_state->min_residency = 10; 964 } 965 966 if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) { 967 pr_debug("No wakeup residency found, assuming 10 us\n"); 968 lpi_state->wake_latency = 10; 969 } 970 971 if (obj_get_integer(pkg_elem + 2, &lpi_state->flags)) 972 lpi_state->flags = 0; 973 974 if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags)) 975 lpi_state->arch_flags = 0; 976 977 if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq)) 978 lpi_state->res_cnt_freq = 1; 979 980 if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state)) 981 lpi_state->enable_parent_state = 0; 982 } 983 984 acpi_handle_debug(handle, "Found %d power states\n", state_idx); 985 end: 986 kfree(buffer.pointer); 987 return ret; 988 } 989 990 /* 991 * flat_state_cnt - the number of composite LPI states after the process of flattening 992 */ 993 static int flat_state_cnt; 994 995 /** 996 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state 997 * 998 * @local: local LPI state 999 * @parent: parent LPI state 1000 * @result: composite LPI state 1001 */ 1002 static bool combine_lpi_states(struct acpi_lpi_state *local, 1003 struct acpi_lpi_state *parent, 1004 struct acpi_lpi_state *result) 1005 { 1006 if (parent->entry_method == ACPI_CSTATE_INTEGER) { 1007 if (!parent->address) /* 0 means autopromotable */ 1008 return false; 1009 result->address = local->address + parent->address; 1010 } else { 1011 result->address = parent->address; 1012 } 1013 1014 result->min_residency = max(local->min_residency, parent->min_residency); 1015 result->wake_latency = local->wake_latency + parent->wake_latency; 1016 result->enable_parent_state = parent->enable_parent_state; 1017 result->entry_method = local->entry_method; 1018 1019 result->flags = parent->flags; 1020 result->arch_flags = parent->arch_flags; 1021 result->index = parent->index; 1022 1023 strlcpy(result->desc, local->desc, ACPI_CX_DESC_LEN); 1024 strlcat(result->desc, "+", ACPI_CX_DESC_LEN); 1025 strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN); 1026 return true; 1027 } 1028 1029 #define ACPI_LPI_STATE_FLAGS_ENABLED BIT(0) 1030 1031 static void stash_composite_state(struct acpi_lpi_states_array *curr_level, 1032 struct acpi_lpi_state *t) 1033 { 1034 curr_level->composite_states[curr_level->composite_states_size++] = t; 1035 } 1036 1037 static int flatten_lpi_states(struct acpi_processor *pr, 1038 struct acpi_lpi_states_array *curr_level, 1039 struct acpi_lpi_states_array *prev_level) 1040 { 1041 int i, j, state_count = curr_level->size; 1042 struct acpi_lpi_state *p, *t = curr_level->entries; 1043 1044 curr_level->composite_states_size = 0; 1045 for (j = 0; j < state_count; j++, t++) { 1046 struct acpi_lpi_state *flpi; 1047 1048 if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED)) 1049 continue; 1050 1051 if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) { 1052 pr_warn("Limiting number of LPI states to max (%d)\n", 1053 ACPI_PROCESSOR_MAX_POWER); 1054 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); 1055 break; 1056 } 1057 1058 flpi = &pr->power.lpi_states[flat_state_cnt]; 1059 1060 if (!prev_level) { /* leaf/processor node */ 1061 memcpy(flpi, t, sizeof(*t)); 1062 stash_composite_state(curr_level, flpi); 1063 flat_state_cnt++; 1064 continue; 1065 } 1066 1067 for (i = 0; i < prev_level->composite_states_size; i++) { 1068 p = prev_level->composite_states[i]; 1069 if (t->index <= p->enable_parent_state && 1070 combine_lpi_states(p, t, flpi)) { 1071 stash_composite_state(curr_level, flpi); 1072 flat_state_cnt++; 1073 flpi++; 1074 } 1075 } 1076 } 1077 1078 kfree(curr_level->entries); 1079 return 0; 1080 } 1081 1082 int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu) 1083 { 1084 return -EOPNOTSUPP; 1085 } 1086 1087 static int acpi_processor_get_lpi_info(struct acpi_processor *pr) 1088 { 1089 int ret, i; 1090 acpi_status status; 1091 acpi_handle handle = pr->handle, pr_ahandle; 1092 struct acpi_device *d = NULL; 1093 struct acpi_lpi_states_array info[2], *tmp, *prev, *curr; 1094 1095 /* make sure our architecture has support */ 1096 ret = acpi_processor_ffh_lpi_probe(pr->id); 1097 if (ret == -EOPNOTSUPP) 1098 return ret; 1099 1100 if (!osc_pc_lpi_support_confirmed) 1101 return -EOPNOTSUPP; 1102 1103 if (!acpi_has_method(handle, "_LPI")) 1104 return -EINVAL; 1105 1106 flat_state_cnt = 0; 1107 prev = &info[0]; 1108 curr = &info[1]; 1109 handle = pr->handle; 1110 ret = acpi_processor_evaluate_lpi(handle, prev); 1111 if (ret) 1112 return ret; 1113 flatten_lpi_states(pr, prev, NULL); 1114 1115 status = acpi_get_parent(handle, &pr_ahandle); 1116 while (ACPI_SUCCESS(status)) { 1117 d = acpi_fetch_acpi_dev(pr_ahandle); 1118 handle = pr_ahandle; 1119 1120 if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID)) 1121 break; 1122 1123 /* can be optional ? */ 1124 if (!acpi_has_method(handle, "_LPI")) 1125 break; 1126 1127 ret = acpi_processor_evaluate_lpi(handle, curr); 1128 if (ret) 1129 break; 1130 1131 /* flatten all the LPI states in this level of hierarchy */ 1132 flatten_lpi_states(pr, curr, prev); 1133 1134 tmp = prev, prev = curr, curr = tmp; 1135 1136 status = acpi_get_parent(handle, &pr_ahandle); 1137 } 1138 1139 pr->power.count = flat_state_cnt; 1140 /* reset the index after flattening */ 1141 for (i = 0; i < pr->power.count; i++) 1142 pr->power.lpi_states[i].index = i; 1143 1144 /* Tell driver that _LPI is supported. */ 1145 pr->flags.has_lpi = 1; 1146 pr->flags.power = 1; 1147 1148 return 0; 1149 } 1150 1151 int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) 1152 { 1153 return -ENODEV; 1154 } 1155 1156 /** 1157 * acpi_idle_lpi_enter - enters an ACPI any LPI state 1158 * @dev: the target CPU 1159 * @drv: cpuidle driver containing cpuidle state info 1160 * @index: index of target state 1161 * 1162 * Return: 0 for success or negative value for error 1163 */ 1164 static int acpi_idle_lpi_enter(struct cpuidle_device *dev, 1165 struct cpuidle_driver *drv, int index) 1166 { 1167 struct acpi_processor *pr; 1168 struct acpi_lpi_state *lpi; 1169 1170 pr = __this_cpu_read(processors); 1171 1172 if (unlikely(!pr)) 1173 return -EINVAL; 1174 1175 lpi = &pr->power.lpi_states[index]; 1176 if (lpi->entry_method == ACPI_CSTATE_FFH) 1177 return acpi_processor_ffh_lpi_enter(lpi); 1178 1179 return -EINVAL; 1180 } 1181 1182 static int acpi_processor_setup_lpi_states(struct acpi_processor *pr) 1183 { 1184 int i; 1185 struct acpi_lpi_state *lpi; 1186 struct cpuidle_state *state; 1187 struct cpuidle_driver *drv = &acpi_idle_driver; 1188 1189 if (!pr->flags.has_lpi) 1190 return -EOPNOTSUPP; 1191 1192 for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) { 1193 lpi = &pr->power.lpi_states[i]; 1194 1195 state = &drv->states[i]; 1196 snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i); 1197 strlcpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN); 1198 state->exit_latency = lpi->wake_latency; 1199 state->target_residency = lpi->min_residency; 1200 if (lpi->arch_flags) 1201 state->flags |= CPUIDLE_FLAG_TIMER_STOP; 1202 state->enter = acpi_idle_lpi_enter; 1203 drv->safe_state_index = i; 1204 } 1205 1206 drv->state_count = i; 1207 1208 return 0; 1209 } 1210 1211 /** 1212 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle 1213 * global state data i.e. idle routines 1214 * 1215 * @pr: the ACPI processor 1216 */ 1217 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) 1218 { 1219 int i; 1220 struct cpuidle_driver *drv = &acpi_idle_driver; 1221 1222 if (!pr->flags.power_setup_done || !pr->flags.power) 1223 return -EINVAL; 1224 1225 drv->safe_state_index = -1; 1226 for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) { 1227 drv->states[i].name[0] = '\0'; 1228 drv->states[i].desc[0] = '\0'; 1229 } 1230 1231 if (pr->flags.has_lpi) 1232 return acpi_processor_setup_lpi_states(pr); 1233 1234 return acpi_processor_setup_cstates(pr); 1235 } 1236 1237 /** 1238 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE 1239 * device i.e. per-cpu data 1240 * 1241 * @pr: the ACPI processor 1242 * @dev : the cpuidle device 1243 */ 1244 static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr, 1245 struct cpuidle_device *dev) 1246 { 1247 if (!pr->flags.power_setup_done || !pr->flags.power || !dev) 1248 return -EINVAL; 1249 1250 dev->cpu = pr->id; 1251 if (pr->flags.has_lpi) 1252 return acpi_processor_ffh_lpi_probe(pr->id); 1253 1254 return acpi_processor_setup_cpuidle_cx(pr, dev); 1255 } 1256 1257 static int acpi_processor_get_power_info(struct acpi_processor *pr) 1258 { 1259 int ret; 1260 1261 ret = acpi_processor_get_lpi_info(pr); 1262 if (ret) 1263 ret = acpi_processor_get_cstate_info(pr); 1264 1265 return ret; 1266 } 1267 1268 int acpi_processor_hotplug(struct acpi_processor *pr) 1269 { 1270 int ret = 0; 1271 struct cpuidle_device *dev; 1272 1273 if (disabled_by_idle_boot_param()) 1274 return 0; 1275 1276 if (!pr->flags.power_setup_done) 1277 return -ENODEV; 1278 1279 dev = per_cpu(acpi_cpuidle_device, pr->id); 1280 cpuidle_pause_and_lock(); 1281 cpuidle_disable_device(dev); 1282 ret = acpi_processor_get_power_info(pr); 1283 if (!ret && pr->flags.power) { 1284 acpi_processor_setup_cpuidle_dev(pr, dev); 1285 ret = cpuidle_enable_device(dev); 1286 } 1287 cpuidle_resume_and_unlock(); 1288 1289 return ret; 1290 } 1291 1292 int acpi_processor_power_state_has_changed(struct acpi_processor *pr) 1293 { 1294 int cpu; 1295 struct acpi_processor *_pr; 1296 struct cpuidle_device *dev; 1297 1298 if (disabled_by_idle_boot_param()) 1299 return 0; 1300 1301 if (!pr->flags.power_setup_done) 1302 return -ENODEV; 1303 1304 /* 1305 * FIXME: Design the ACPI notification to make it once per 1306 * system instead of once per-cpu. This condition is a hack 1307 * to make the code that updates C-States be called once. 1308 */ 1309 1310 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { 1311 1312 /* Protect against cpu-hotplug */ 1313 cpus_read_lock(); 1314 cpuidle_pause_and_lock(); 1315 1316 /* Disable all cpuidle devices */ 1317 for_each_online_cpu(cpu) { 1318 _pr = per_cpu(processors, cpu); 1319 if (!_pr || !_pr->flags.power_setup_done) 1320 continue; 1321 dev = per_cpu(acpi_cpuidle_device, cpu); 1322 cpuidle_disable_device(dev); 1323 } 1324 1325 /* Populate Updated C-state information */ 1326 acpi_processor_get_power_info(pr); 1327 acpi_processor_setup_cpuidle_states(pr); 1328 1329 /* Enable all cpuidle devices */ 1330 for_each_online_cpu(cpu) { 1331 _pr = per_cpu(processors, cpu); 1332 if (!_pr || !_pr->flags.power_setup_done) 1333 continue; 1334 acpi_processor_get_power_info(_pr); 1335 if (_pr->flags.power) { 1336 dev = per_cpu(acpi_cpuidle_device, cpu); 1337 acpi_processor_setup_cpuidle_dev(_pr, dev); 1338 cpuidle_enable_device(dev); 1339 } 1340 } 1341 cpuidle_resume_and_unlock(); 1342 cpus_read_unlock(); 1343 } 1344 1345 return 0; 1346 } 1347 1348 static int acpi_processor_registered; 1349 1350 int acpi_processor_power_init(struct acpi_processor *pr) 1351 { 1352 int retval; 1353 struct cpuidle_device *dev; 1354 1355 if (disabled_by_idle_boot_param()) 1356 return 0; 1357 1358 acpi_processor_cstate_first_run_checks(); 1359 1360 if (!acpi_processor_get_power_info(pr)) 1361 pr->flags.power_setup_done = 1; 1362 1363 /* 1364 * Install the idle handler if processor power management is supported. 1365 * Note that we use previously set idle handler will be used on 1366 * platforms that only support C1. 1367 */ 1368 if (pr->flags.power) { 1369 /* Register acpi_idle_driver if not already registered */ 1370 if (!acpi_processor_registered) { 1371 acpi_processor_setup_cpuidle_states(pr); 1372 retval = cpuidle_register_driver(&acpi_idle_driver); 1373 if (retval) 1374 return retval; 1375 pr_debug("%s registered with cpuidle\n", 1376 acpi_idle_driver.name); 1377 } 1378 1379 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1380 if (!dev) 1381 return -ENOMEM; 1382 per_cpu(acpi_cpuidle_device, pr->id) = dev; 1383 1384 acpi_processor_setup_cpuidle_dev(pr, dev); 1385 1386 /* Register per-cpu cpuidle_device. Cpuidle driver 1387 * must already be registered before registering device 1388 */ 1389 retval = cpuidle_register_device(dev); 1390 if (retval) { 1391 if (acpi_processor_registered == 0) 1392 cpuidle_unregister_driver(&acpi_idle_driver); 1393 return retval; 1394 } 1395 acpi_processor_registered++; 1396 } 1397 return 0; 1398 } 1399 1400 int acpi_processor_power_exit(struct acpi_processor *pr) 1401 { 1402 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); 1403 1404 if (disabled_by_idle_boot_param()) 1405 return 0; 1406 1407 if (pr->flags.power) { 1408 cpuidle_unregister_device(dev); 1409 acpi_processor_registered--; 1410 if (acpi_processor_registered == 0) 1411 cpuidle_unregister_driver(&acpi_idle_driver); 1412 } 1413 1414 pr->flags.power_setup_done = 0; 1415 return 0; 1416 } 1417