1 /* 2 * NVDIMM Firmware Interface Table - NFIT 3 * 4 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of version 2 of the GNU General Public License as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * General Public License for more details. 14 */ 15 #ifndef __NFIT_H__ 16 #define __NFIT_H__ 17 #include <linux/workqueue.h> 18 #include <linux/libnvdimm.h> 19 #include <linux/ndctl.h> 20 #include <linux/types.h> 21 #include <linux/acpi.h> 22 #include <acpi/acuuid.h> 23 24 /* ACPI 6.1 */ 25 #define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba" 26 27 /* http://pmem.io/documents/NVDIMM_DSM_Interface-V1.6.pdf */ 28 #define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66" 29 30 /* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */ 31 #define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6" 32 #define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e" 33 34 /* https://msdn.microsoft.com/library/windows/hardware/mt604741 */ 35 #define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05" 36 37 /* http://www.uefi.org/RFIC_LIST (see "Virtual NVDIMM 0x1901") */ 38 #define UUID_NFIT_DIMM_N_HYPERV "5746c5f2-a9a2-4264-ad0e-e4ddc9e09e80" 39 40 #define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \ 41 | ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \ 42 | ACPI_NFIT_MEM_NOT_ARMED | ACPI_NFIT_MEM_MAP_FAILED) 43 44 #define NVDIMM_FAMILY_MAX NVDIMM_FAMILY_HYPERV 45 46 #define NVDIMM_STANDARD_CMDMASK \ 47 (1 << ND_CMD_SMART | 1 << ND_CMD_SMART_THRESHOLD | 1 << ND_CMD_DIMM_FLAGS \ 48 | 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA \ 49 | 1 << ND_CMD_SET_CONFIG_DATA | 1 << ND_CMD_VENDOR_EFFECT_LOG_SIZE \ 50 | 1 << ND_CMD_VENDOR_EFFECT_LOG | 1 << ND_CMD_VENDOR) 51 52 /* 53 * Command numbers that the kernel needs to know about to handle 54 * non-default DSM revision ids 55 */ 56 enum nvdimm_family_cmds { 57 NVDIMM_INTEL_LATCH_SHUTDOWN = 10, 58 NVDIMM_INTEL_GET_MODES = 11, 59 NVDIMM_INTEL_GET_FWINFO = 12, 60 NVDIMM_INTEL_START_FWUPDATE = 13, 61 NVDIMM_INTEL_SEND_FWUPDATE = 14, 62 NVDIMM_INTEL_FINISH_FWUPDATE = 15, 63 NVDIMM_INTEL_QUERY_FWUPDATE = 16, 64 NVDIMM_INTEL_SET_THRESHOLD = 17, 65 NVDIMM_INTEL_INJECT_ERROR = 18, 66 NVDIMM_INTEL_GET_SECURITY_STATE = 19, 67 NVDIMM_INTEL_SET_PASSPHRASE = 20, 68 NVDIMM_INTEL_DISABLE_PASSPHRASE = 21, 69 NVDIMM_INTEL_UNLOCK_UNIT = 22, 70 NVDIMM_INTEL_FREEZE_LOCK = 23, 71 NVDIMM_INTEL_SECURE_ERASE = 24, 72 NVDIMM_INTEL_OVERWRITE = 25, 73 NVDIMM_INTEL_QUERY_OVERWRITE = 26, 74 NVDIMM_INTEL_SET_MASTER_PASSPHRASE = 27, 75 NVDIMM_INTEL_MASTER_SECURE_ERASE = 28, 76 }; 77 78 #define NVDIMM_INTEL_SECURITY_CMDMASK \ 79 (1 << NVDIMM_INTEL_GET_SECURITY_STATE | 1 << NVDIMM_INTEL_SET_PASSPHRASE \ 80 | 1 << NVDIMM_INTEL_DISABLE_PASSPHRASE | 1 << NVDIMM_INTEL_UNLOCK_UNIT \ 81 | 1 << NVDIMM_INTEL_FREEZE_LOCK | 1 << NVDIMM_INTEL_SECURE_ERASE \ 82 | 1 << NVDIMM_INTEL_OVERWRITE | 1 << NVDIMM_INTEL_QUERY_OVERWRITE \ 83 | 1 << NVDIMM_INTEL_SET_MASTER_PASSPHRASE \ 84 | 1 << NVDIMM_INTEL_MASTER_SECURE_ERASE) 85 86 #define NVDIMM_INTEL_CMDMASK \ 87 (NVDIMM_STANDARD_CMDMASK | 1 << NVDIMM_INTEL_GET_MODES \ 88 | 1 << NVDIMM_INTEL_GET_FWINFO | 1 << NVDIMM_INTEL_START_FWUPDATE \ 89 | 1 << NVDIMM_INTEL_SEND_FWUPDATE | 1 << NVDIMM_INTEL_FINISH_FWUPDATE \ 90 | 1 << NVDIMM_INTEL_QUERY_FWUPDATE | 1 << NVDIMM_INTEL_SET_THRESHOLD \ 91 | 1 << NVDIMM_INTEL_INJECT_ERROR | 1 << NVDIMM_INTEL_LATCH_SHUTDOWN \ 92 | NVDIMM_INTEL_SECURITY_CMDMASK) 93 94 enum nfit_uuids { 95 /* for simplicity alias the uuid index with the family id */ 96 NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL, 97 NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1, 98 NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2, 99 NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT, 100 NFIT_DEV_DIMM_N_HYPERV = NVDIMM_FAMILY_HYPERV, 101 NFIT_SPA_VOLATILE, 102 NFIT_SPA_PM, 103 NFIT_SPA_DCR, 104 NFIT_SPA_BDW, 105 NFIT_SPA_VDISK, 106 NFIT_SPA_VCD, 107 NFIT_SPA_PDISK, 108 NFIT_SPA_PCD, 109 NFIT_DEV_BUS, 110 NFIT_UUID_MAX, 111 }; 112 113 /* 114 * Region format interface codes are stored with the interface as the 115 * LSB and the function as the MSB. 116 */ 117 #define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */ 118 #define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */ 119 #define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */ 120 121 enum { 122 NFIT_BLK_READ_FLUSH = 1, 123 NFIT_BLK_DCR_LATCH = 2, 124 NFIT_ARS_STATUS_DONE = 0, 125 NFIT_ARS_STATUS_BUSY = 1 << 16, 126 NFIT_ARS_STATUS_NONE = 2 << 16, 127 NFIT_ARS_STATUS_INTR = 3 << 16, 128 NFIT_ARS_START_BUSY = 6, 129 NFIT_ARS_CAP_NONE = 1, 130 NFIT_ARS_F_OVERFLOW = 1, 131 NFIT_ARS_TIMEOUT = 90, 132 }; 133 134 enum nfit_root_notifiers { 135 NFIT_NOTIFY_UPDATE = 0x80, 136 NFIT_NOTIFY_UC_MEMORY_ERROR = 0x81, 137 }; 138 139 enum nfit_dimm_notifiers { 140 NFIT_NOTIFY_DIMM_HEALTH = 0x81, 141 }; 142 143 enum nfit_ars_state { 144 ARS_REQ_SHORT, 145 ARS_REQ_LONG, 146 ARS_FAILED, 147 }; 148 149 struct nfit_spa { 150 struct list_head list; 151 struct nd_region *nd_region; 152 unsigned long ars_state; 153 u32 clear_err_unit; 154 u32 max_ars; 155 struct acpi_nfit_system_address spa[0]; 156 }; 157 158 struct nfit_dcr { 159 struct list_head list; 160 struct acpi_nfit_control_region dcr[0]; 161 }; 162 163 struct nfit_bdw { 164 struct list_head list; 165 struct acpi_nfit_data_region bdw[0]; 166 }; 167 168 struct nfit_idt { 169 struct list_head list; 170 struct acpi_nfit_interleave idt[0]; 171 }; 172 173 struct nfit_flush { 174 struct list_head list; 175 struct acpi_nfit_flush_address flush[0]; 176 }; 177 178 struct nfit_memdev { 179 struct list_head list; 180 struct acpi_nfit_memory_map memdev[0]; 181 }; 182 183 enum nfit_mem_flags { 184 NFIT_MEM_LSR, 185 NFIT_MEM_LSW, 186 NFIT_MEM_DIRTY, 187 NFIT_MEM_DIRTY_COUNT, 188 }; 189 190 #define NFIT_DIMM_ID_LEN 22 191 192 /* assembled tables for a given dimm/memory-device */ 193 struct nfit_mem { 194 struct nvdimm *nvdimm; 195 struct acpi_nfit_memory_map *memdev_dcr; 196 struct acpi_nfit_memory_map *memdev_pmem; 197 struct acpi_nfit_memory_map *memdev_bdw; 198 struct acpi_nfit_control_region *dcr; 199 struct acpi_nfit_data_region *bdw; 200 struct acpi_nfit_system_address *spa_dcr; 201 struct acpi_nfit_system_address *spa_bdw; 202 struct acpi_nfit_interleave *idt_dcr; 203 struct acpi_nfit_interleave *idt_bdw; 204 struct kernfs_node *flags_attr; 205 struct nfit_flush *nfit_flush; 206 struct list_head list; 207 struct acpi_device *adev; 208 struct acpi_nfit_desc *acpi_desc; 209 char id[NFIT_DIMM_ID_LEN+1]; 210 struct resource *flush_wpq; 211 unsigned long dsm_mask; 212 unsigned long flags; 213 u32 dirty_shutdown; 214 int family; 215 }; 216 217 enum scrub_flags { 218 ARS_BUSY, 219 ARS_CANCEL, 220 ARS_VALID, 221 ARS_POLL, 222 }; 223 224 struct acpi_nfit_desc { 225 struct nvdimm_bus_descriptor nd_desc; 226 struct acpi_table_header acpi_header; 227 struct mutex init_mutex; 228 struct list_head memdevs; 229 struct list_head flushes; 230 struct list_head dimms; 231 struct list_head spas; 232 struct list_head dcrs; 233 struct list_head bdws; 234 struct list_head idts; 235 struct nvdimm_bus *nvdimm_bus; 236 struct device *dev; 237 struct nd_cmd_ars_status *ars_status; 238 struct nfit_spa *scrub_spa; 239 struct delayed_work dwork; 240 struct list_head list; 241 struct kernfs_node *scrub_count_state; 242 unsigned int max_ars; 243 unsigned int scrub_count; 244 unsigned int scrub_mode; 245 unsigned long scrub_flags; 246 unsigned long dimm_cmd_force_en; 247 unsigned long bus_cmd_force_en; 248 unsigned long bus_nfit_cmd_force_en; 249 unsigned int platform_cap; 250 unsigned int scrub_tmo; 251 int (*blk_do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, 252 void *iobuf, u64 len, int rw); 253 }; 254 255 enum scrub_mode { 256 HW_ERROR_SCRUB_OFF, 257 HW_ERROR_SCRUB_ON, 258 }; 259 260 enum nd_blk_mmio_selector { 261 BDW, 262 DCR, 263 }; 264 265 struct nd_blk_addr { 266 union { 267 void __iomem *base; 268 void *aperture; 269 }; 270 }; 271 272 struct nfit_blk { 273 struct nfit_blk_mmio { 274 struct nd_blk_addr addr; 275 u64 size; 276 u64 base_offset; 277 u32 line_size; 278 u32 num_lines; 279 u32 table_size; 280 struct acpi_nfit_interleave *idt; 281 struct acpi_nfit_system_address *spa; 282 } mmio[2]; 283 struct nd_region *nd_region; 284 u64 bdw_offset; /* post interleave offset */ 285 u64 stat_offset; 286 u64 cmd_offset; 287 u32 dimm_flags; 288 }; 289 290 extern struct list_head acpi_descs; 291 extern struct mutex acpi_desc_lock; 292 int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc, 293 enum nfit_ars_state req_type); 294 295 #ifdef CONFIG_X86_MCE 296 void nfit_mce_register(void); 297 void nfit_mce_unregister(void); 298 #else 299 static inline void nfit_mce_register(void) 300 { 301 } 302 static inline void nfit_mce_unregister(void) 303 { 304 } 305 #endif 306 307 int nfit_spa_type(struct acpi_nfit_system_address *spa); 308 309 static inline struct acpi_nfit_memory_map *__to_nfit_memdev( 310 struct nfit_mem *nfit_mem) 311 { 312 if (nfit_mem->memdev_dcr) 313 return nfit_mem->memdev_dcr; 314 return nfit_mem->memdev_pmem; 315 } 316 317 static inline struct acpi_nfit_desc *to_acpi_desc( 318 struct nvdimm_bus_descriptor *nd_desc) 319 { 320 return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); 321 } 322 323 const guid_t *to_nfit_uuid(enum nfit_uuids id); 324 int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *nfit, acpi_size sz); 325 void acpi_nfit_shutdown(void *data); 326 void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event); 327 void __acpi_nvdimm_notify(struct device *dev, u32 event); 328 int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, 329 unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc); 330 void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev); 331 #endif /* __NFIT_H__ */ 332