1 /******************************************************************************* 2 * 3 * Module Name: hwregs - Read/write access functions for the various ACPI 4 * control and status registers. 5 * 6 ******************************************************************************/ 7 8 /* 9 * Copyright (C) 2000 - 2014, Intel Corp. 10 * All rights reserved. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions, and the following disclaimer, 17 * without modification. 18 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 19 * substantially similar to the "NO WARRANTY" disclaimer below 20 * ("Disclaimer") and any redistribution must be conditioned upon 21 * including a substantially similar Disclaimer requirement for further 22 * binary redistribution. 23 * 3. Neither the names of the above-listed copyright holders nor the names 24 * of any contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * Alternatively, this software may be distributed under the terms of the 28 * GNU General Public License ("GPL") version 2 as published by the Free 29 * Software Foundation. 30 * 31 * NO WARRANTY 32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 33 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 34 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 35 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 36 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 40 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 41 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 42 * POSSIBILITY OF SUCH DAMAGES. 43 */ 44 45 #include <acpi/acpi.h> 46 #include "accommon.h" 47 #include "acevents.h" 48 49 #define _COMPONENT ACPI_HARDWARE 50 ACPI_MODULE_NAME("hwregs") 51 52 #if (!ACPI_REDUCED_HARDWARE) 53 /* Local Prototypes */ 54 static acpi_status 55 acpi_hw_read_multiple(u32 *value, 56 struct acpi_generic_address *register_a, 57 struct acpi_generic_address *register_b); 58 59 static acpi_status 60 acpi_hw_write_multiple(u32 value, 61 struct acpi_generic_address *register_a, 62 struct acpi_generic_address *register_b); 63 64 #endif /* !ACPI_REDUCED_HARDWARE */ 65 66 /****************************************************************************** 67 * 68 * FUNCTION: acpi_hw_validate_register 69 * 70 * PARAMETERS: reg - GAS register structure 71 * max_bit_width - Max bit_width supported (32 or 64) 72 * address - Pointer to where the gas->address 73 * is returned 74 * 75 * RETURN: Status 76 * 77 * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS 78 * pointer, Address, space_id, bit_width, and bit_offset. 79 * 80 ******************************************************************************/ 81 82 acpi_status 83 acpi_hw_validate_register(struct acpi_generic_address *reg, 84 u8 max_bit_width, u64 *address) 85 { 86 87 /* Must have a valid pointer to a GAS structure */ 88 89 if (!reg) { 90 return (AE_BAD_PARAMETER); 91 } 92 93 /* 94 * Copy the target address. This handles possible alignment issues. 95 * Address must not be null. A null address also indicates an optional 96 * ACPI register that is not supported, so no error message. 97 */ 98 ACPI_MOVE_64_TO_64(address, ®->address); 99 if (!(*address)) { 100 return (AE_BAD_ADDRESS); 101 } 102 103 /* Validate the space_ID */ 104 105 if ((reg->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) && 106 (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) { 107 ACPI_ERROR((AE_INFO, 108 "Unsupported address space: 0x%X", reg->space_id)); 109 return (AE_SUPPORT); 110 } 111 112 /* Validate the bit_width */ 113 114 if ((reg->bit_width != 8) && 115 (reg->bit_width != 16) && 116 (reg->bit_width != 32) && (reg->bit_width != max_bit_width)) { 117 ACPI_ERROR((AE_INFO, 118 "Unsupported register bit width: 0x%X", 119 reg->bit_width)); 120 return (AE_SUPPORT); 121 } 122 123 /* Validate the bit_offset. Just a warning for now. */ 124 125 if (reg->bit_offset != 0) { 126 ACPI_WARNING((AE_INFO, 127 "Unsupported register bit offset: 0x%X", 128 reg->bit_offset)); 129 } 130 131 return (AE_OK); 132 } 133 134 /****************************************************************************** 135 * 136 * FUNCTION: acpi_hw_read 137 * 138 * PARAMETERS: value - Where the value is returned 139 * reg - GAS register structure 140 * 141 * RETURN: Status 142 * 143 * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max 144 * version of acpi_read, used internally since the overhead of 145 * 64-bit values is not needed. 146 * 147 * LIMITATIONS: <These limitations also apply to acpi_hw_write> 148 * bit_width must be exactly 8, 16, or 32. 149 * space_ID must be system_memory or system_IO. 150 * bit_offset and access_width are currently ignored, as there has 151 * not been a need to implement these. 152 * 153 ******************************************************************************/ 154 155 acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg) 156 { 157 u64 address; 158 u64 value64; 159 acpi_status status; 160 161 ACPI_FUNCTION_NAME(hw_read); 162 163 /* Validate contents of the GAS register */ 164 165 status = acpi_hw_validate_register(reg, 32, &address); 166 if (ACPI_FAILURE(status)) { 167 return (status); 168 } 169 170 /* Initialize entire 32-bit return value to zero */ 171 172 *value = 0; 173 174 /* 175 * Two address spaces supported: Memory or IO. PCI_Config is 176 * not supported here because the GAS structure is insufficient 177 */ 178 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) { 179 status = acpi_os_read_memory((acpi_physical_address) 180 address, &value64, reg->bit_width); 181 182 *value = (u32)value64; 183 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */ 184 185 status = acpi_hw_read_port((acpi_io_address) 186 address, value, reg->bit_width); 187 } 188 189 ACPI_DEBUG_PRINT((ACPI_DB_IO, 190 "Read: %8.8X width %2d from %8.8X%8.8X (%s)\n", 191 *value, reg->bit_width, ACPI_FORMAT_UINT64(address), 192 acpi_ut_get_region_name(reg->space_id))); 193 194 return (status); 195 } 196 197 /****************************************************************************** 198 * 199 * FUNCTION: acpi_hw_write 200 * 201 * PARAMETERS: value - Value to be written 202 * reg - GAS register structure 203 * 204 * RETURN: Status 205 * 206 * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max 207 * version of acpi_write, used internally since the overhead of 208 * 64-bit values is not needed. 209 * 210 ******************************************************************************/ 211 212 acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg) 213 { 214 u64 address; 215 acpi_status status; 216 217 ACPI_FUNCTION_NAME(hw_write); 218 219 /* Validate contents of the GAS register */ 220 221 status = acpi_hw_validate_register(reg, 32, &address); 222 if (ACPI_FAILURE(status)) { 223 return (status); 224 } 225 226 /* 227 * Two address spaces supported: Memory or IO. PCI_Config is 228 * not supported here because the GAS structure is insufficient 229 */ 230 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) { 231 status = acpi_os_write_memory((acpi_physical_address) 232 address, (u64)value, 233 reg->bit_width); 234 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */ 235 236 status = acpi_hw_write_port((acpi_io_address) 237 address, value, reg->bit_width); 238 } 239 240 ACPI_DEBUG_PRINT((ACPI_DB_IO, 241 "Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n", 242 value, reg->bit_width, ACPI_FORMAT_UINT64(address), 243 acpi_ut_get_region_name(reg->space_id))); 244 245 return (status); 246 } 247 248 #if (!ACPI_REDUCED_HARDWARE) 249 /******************************************************************************* 250 * 251 * FUNCTION: acpi_hw_clear_acpi_status 252 * 253 * PARAMETERS: None 254 * 255 * RETURN: Status 256 * 257 * DESCRIPTION: Clears all fixed and general purpose status bits 258 * 259 ******************************************************************************/ 260 261 acpi_status acpi_hw_clear_acpi_status(void) 262 { 263 acpi_status status; 264 acpi_cpu_flags lock_flags = 0; 265 266 ACPI_FUNCTION_TRACE(hw_clear_acpi_status); 267 268 ACPI_DEBUG_PRINT((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n", 269 ACPI_BITMASK_ALL_FIXED_STATUS, 270 ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status.address))); 271 272 lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock); 273 274 /* Clear the fixed events in PM1 A/B */ 275 276 status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS, 277 ACPI_BITMASK_ALL_FIXED_STATUS); 278 279 acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags); 280 281 if (ACPI_FAILURE(status)) 282 goto exit; 283 284 /* Clear the GPE Bits in all GPE registers in all GPE blocks */ 285 286 status = acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block, NULL); 287 288 exit: 289 return_ACPI_STATUS(status); 290 } 291 292 /******************************************************************************* 293 * 294 * FUNCTION: acpi_hw_get_bit_register_info 295 * 296 * PARAMETERS: register_id - Index of ACPI Register to access 297 * 298 * RETURN: The bitmask to be used when accessing the register 299 * 300 * DESCRIPTION: Map register_id into a register bitmask. 301 * 302 ******************************************************************************/ 303 304 struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id) 305 { 306 ACPI_FUNCTION_ENTRY(); 307 308 if (register_id > ACPI_BITREG_MAX) { 309 ACPI_ERROR((AE_INFO, "Invalid BitRegister ID: 0x%X", 310 register_id)); 311 return (NULL); 312 } 313 314 return (&acpi_gbl_bit_register_info[register_id]); 315 } 316 317 /****************************************************************************** 318 * 319 * FUNCTION: acpi_hw_write_pm1_control 320 * 321 * PARAMETERS: pm1a_control - Value to be written to PM1A control 322 * pm1b_control - Value to be written to PM1B control 323 * 324 * RETURN: Status 325 * 326 * DESCRIPTION: Write the PM1 A/B control registers. These registers are 327 * different than than the PM1 A/B status and enable registers 328 * in that different values can be written to the A/B registers. 329 * Most notably, the SLP_TYP bits can be different, as per the 330 * values returned from the _Sx predefined methods. 331 * 332 ******************************************************************************/ 333 334 acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control) 335 { 336 acpi_status status; 337 338 ACPI_FUNCTION_TRACE(hw_write_pm1_control); 339 340 status = 341 acpi_hw_write(pm1a_control, &acpi_gbl_FADT.xpm1a_control_block); 342 if (ACPI_FAILURE(status)) { 343 return_ACPI_STATUS(status); 344 } 345 346 if (acpi_gbl_FADT.xpm1b_control_block.address) { 347 status = 348 acpi_hw_write(pm1b_control, 349 &acpi_gbl_FADT.xpm1b_control_block); 350 } 351 return_ACPI_STATUS(status); 352 } 353 354 /****************************************************************************** 355 * 356 * FUNCTION: acpi_hw_register_read 357 * 358 * PARAMETERS: register_id - ACPI Register ID 359 * return_value - Where the register value is returned 360 * 361 * RETURN: Status and the value read. 362 * 363 * DESCRIPTION: Read from the specified ACPI register 364 * 365 ******************************************************************************/ 366 acpi_status acpi_hw_register_read(u32 register_id, u32 *return_value) 367 { 368 u32 value = 0; 369 acpi_status status; 370 371 ACPI_FUNCTION_TRACE(hw_register_read); 372 373 switch (register_id) { 374 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */ 375 376 status = acpi_hw_read_multiple(&value, 377 &acpi_gbl_xpm1a_status, 378 &acpi_gbl_xpm1b_status); 379 break; 380 381 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */ 382 383 status = acpi_hw_read_multiple(&value, 384 &acpi_gbl_xpm1a_enable, 385 &acpi_gbl_xpm1b_enable); 386 break; 387 388 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */ 389 390 status = acpi_hw_read_multiple(&value, 391 &acpi_gbl_FADT. 392 xpm1a_control_block, 393 &acpi_gbl_FADT. 394 xpm1b_control_block); 395 396 /* 397 * Zero the write-only bits. From the ACPI specification, "Hardware 398 * Write-Only Bits": "Upon reads to registers with write-only bits, 399 * software masks out all write-only bits." 400 */ 401 value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS; 402 break; 403 404 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */ 405 406 status = 407 acpi_hw_read(&value, &acpi_gbl_FADT.xpm2_control_block); 408 break; 409 410 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */ 411 412 status = acpi_hw_read(&value, &acpi_gbl_FADT.xpm_timer_block); 413 break; 414 415 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */ 416 417 status = 418 acpi_hw_read_port(acpi_gbl_FADT.smi_command, &value, 8); 419 break; 420 421 default: 422 423 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id)); 424 status = AE_BAD_PARAMETER; 425 break; 426 } 427 428 if (ACPI_SUCCESS(status)) { 429 *return_value = value; 430 } 431 432 return_ACPI_STATUS(status); 433 } 434 435 /****************************************************************************** 436 * 437 * FUNCTION: acpi_hw_register_write 438 * 439 * PARAMETERS: register_id - ACPI Register ID 440 * value - The value to write 441 * 442 * RETURN: Status 443 * 444 * DESCRIPTION: Write to the specified ACPI register 445 * 446 * NOTE: In accordance with the ACPI specification, this function automatically 447 * preserves the value of the following bits, meaning that these bits cannot be 448 * changed via this interface: 449 * 450 * PM1_CONTROL[0] = SCI_EN 451 * PM1_CONTROL[9] 452 * PM1_STATUS[11] 453 * 454 * ACPI References: 455 * 1) Hardware Ignored Bits: When software writes to a register with ignored 456 * bit fields, it preserves the ignored bit fields 457 * 2) SCI_EN: OSPM always preserves this bit position 458 * 459 ******************************************************************************/ 460 461 acpi_status acpi_hw_register_write(u32 register_id, u32 value) 462 { 463 acpi_status status; 464 u32 read_value; 465 466 ACPI_FUNCTION_TRACE(hw_register_write); 467 468 switch (register_id) { 469 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */ 470 /* 471 * Handle the "ignored" bit in PM1 Status. According to the ACPI 472 * specification, ignored bits are to be preserved when writing. 473 * Normally, this would mean a read/modify/write sequence. However, 474 * preserving a bit in the status register is different. Writing a 475 * one clears the status, and writing a zero preserves the status. 476 * Therefore, we must always write zero to the ignored bit. 477 * 478 * This behavior is clarified in the ACPI 4.0 specification. 479 */ 480 value &= ~ACPI_PM1_STATUS_PRESERVED_BITS; 481 482 status = acpi_hw_write_multiple(value, 483 &acpi_gbl_xpm1a_status, 484 &acpi_gbl_xpm1b_status); 485 break; 486 487 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */ 488 489 status = acpi_hw_write_multiple(value, 490 &acpi_gbl_xpm1a_enable, 491 &acpi_gbl_xpm1b_enable); 492 break; 493 494 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */ 495 /* 496 * Perform a read first to preserve certain bits (per ACPI spec) 497 * Note: This includes SCI_EN, we never want to change this bit 498 */ 499 status = acpi_hw_read_multiple(&read_value, 500 &acpi_gbl_FADT. 501 xpm1a_control_block, 502 &acpi_gbl_FADT. 503 xpm1b_control_block); 504 if (ACPI_FAILURE(status)) { 505 goto exit; 506 } 507 508 /* Insert the bits to be preserved */ 509 510 ACPI_INSERT_BITS(value, ACPI_PM1_CONTROL_PRESERVED_BITS, 511 read_value); 512 513 /* Now we can write the data */ 514 515 status = acpi_hw_write_multiple(value, 516 &acpi_gbl_FADT. 517 xpm1a_control_block, 518 &acpi_gbl_FADT. 519 xpm1b_control_block); 520 break; 521 522 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */ 523 /* 524 * For control registers, all reserved bits must be preserved, 525 * as per the ACPI spec. 526 */ 527 status = 528 acpi_hw_read(&read_value, 529 &acpi_gbl_FADT.xpm2_control_block); 530 if (ACPI_FAILURE(status)) { 531 goto exit; 532 } 533 534 /* Insert the bits to be preserved */ 535 536 ACPI_INSERT_BITS(value, ACPI_PM2_CONTROL_PRESERVED_BITS, 537 read_value); 538 539 status = 540 acpi_hw_write(value, &acpi_gbl_FADT.xpm2_control_block); 541 break; 542 543 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */ 544 545 status = acpi_hw_write(value, &acpi_gbl_FADT.xpm_timer_block); 546 break; 547 548 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */ 549 550 /* SMI_CMD is currently always in IO space */ 551 552 status = 553 acpi_hw_write_port(acpi_gbl_FADT.smi_command, value, 8); 554 break; 555 556 default: 557 558 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id)); 559 status = AE_BAD_PARAMETER; 560 break; 561 } 562 563 exit: 564 return_ACPI_STATUS(status); 565 } 566 567 /****************************************************************************** 568 * 569 * FUNCTION: acpi_hw_read_multiple 570 * 571 * PARAMETERS: value - Where the register value is returned 572 * register_a - First ACPI register (required) 573 * register_b - Second ACPI register (optional) 574 * 575 * RETURN: Status 576 * 577 * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B) 578 * 579 ******************************************************************************/ 580 581 static acpi_status 582 acpi_hw_read_multiple(u32 *value, 583 struct acpi_generic_address *register_a, 584 struct acpi_generic_address *register_b) 585 { 586 u32 value_a = 0; 587 u32 value_b = 0; 588 acpi_status status; 589 590 /* The first register is always required */ 591 592 status = acpi_hw_read(&value_a, register_a); 593 if (ACPI_FAILURE(status)) { 594 return (status); 595 } 596 597 /* Second register is optional */ 598 599 if (register_b->address) { 600 status = acpi_hw_read(&value_b, register_b); 601 if (ACPI_FAILURE(status)) { 602 return (status); 603 } 604 } 605 606 /* 607 * OR the two return values together. No shifting or masking is necessary, 608 * because of how the PM1 registers are defined in the ACPI specification: 609 * 610 * "Although the bits can be split between the two register blocks (each 611 * register block has a unique pointer within the FADT), the bit positions 612 * are maintained. The register block with unimplemented bits (that is, 613 * those implemented in the other register block) always returns zeros, 614 * and writes have no side effects" 615 */ 616 *value = (value_a | value_b); 617 return (AE_OK); 618 } 619 620 /****************************************************************************** 621 * 622 * FUNCTION: acpi_hw_write_multiple 623 * 624 * PARAMETERS: value - The value to write 625 * register_a - First ACPI register (required) 626 * register_b - Second ACPI register (optional) 627 * 628 * RETURN: Status 629 * 630 * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B) 631 * 632 ******************************************************************************/ 633 634 static acpi_status 635 acpi_hw_write_multiple(u32 value, 636 struct acpi_generic_address *register_a, 637 struct acpi_generic_address *register_b) 638 { 639 acpi_status status; 640 641 /* The first register is always required */ 642 643 status = acpi_hw_write(value, register_a); 644 if (ACPI_FAILURE(status)) { 645 return (status); 646 } 647 648 /* 649 * Second register is optional 650 * 651 * No bit shifting or clearing is necessary, because of how the PM1 652 * registers are defined in the ACPI specification: 653 * 654 * "Although the bits can be split between the two register blocks (each 655 * register block has a unique pointer within the FADT), the bit positions 656 * are maintained. The register block with unimplemented bits (that is, 657 * those implemented in the other register block) always returns zeros, 658 * and writes have no side effects" 659 */ 660 if (register_b->address) { 661 status = acpi_hw_write(value, register_b); 662 } 663 664 return (status); 665 } 666 667 #endif /* !ACPI_REDUCED_HARDWARE */ 668