1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * ACPI support for Intel Lynxpoint LPSS. 4 * 5 * Copyright (C) 2013, Intel Corporation 6 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com> 7 * Rafael J. Wysocki <rafael.j.wysocki@intel.com> 8 */ 9 10 #include <linux/acpi.h> 11 #include <linux/clkdev.h> 12 #include <linux/clk-provider.h> 13 #include <linux/err.h> 14 #include <linux/io.h> 15 #include <linux/mutex.h> 16 #include <linux/pci.h> 17 #include <linux/platform_device.h> 18 #include <linux/platform_data/x86/clk-lpss.h> 19 #include <linux/platform_data/x86/pmc_atom.h> 20 #include <linux/pm_domain.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/pwm.h> 23 #include <linux/suspend.h> 24 #include <linux/delay.h> 25 26 #include "internal.h" 27 28 ACPI_MODULE_NAME("acpi_lpss"); 29 30 #ifdef CONFIG_X86_INTEL_LPSS 31 32 #include <asm/cpu_device_id.h> 33 #include <asm/intel-family.h> 34 #include <asm/iosf_mbi.h> 35 36 #define LPSS_ADDR(desc) ((unsigned long)&desc) 37 38 #define LPSS_CLK_SIZE 0x04 39 #define LPSS_LTR_SIZE 0x18 40 41 /* Offsets relative to LPSS_PRIVATE_OFFSET */ 42 #define LPSS_CLK_DIVIDER_DEF_MASK (BIT(1) | BIT(16)) 43 #define LPSS_RESETS 0x04 44 #define LPSS_RESETS_RESET_FUNC BIT(0) 45 #define LPSS_RESETS_RESET_APB BIT(1) 46 #define LPSS_GENERAL 0x08 47 #define LPSS_GENERAL_LTR_MODE_SW BIT(2) 48 #define LPSS_GENERAL_UART_RTS_OVRD BIT(3) 49 #define LPSS_SW_LTR 0x10 50 #define LPSS_AUTO_LTR 0x14 51 #define LPSS_LTR_SNOOP_REQ BIT(15) 52 #define LPSS_LTR_SNOOP_MASK 0x0000FFFF 53 #define LPSS_LTR_SNOOP_LAT_1US 0x800 54 #define LPSS_LTR_SNOOP_LAT_32US 0xC00 55 #define LPSS_LTR_SNOOP_LAT_SHIFT 5 56 #define LPSS_LTR_SNOOP_LAT_CUTOFF 3000 57 #define LPSS_LTR_MAX_VAL 0x3FF 58 #define LPSS_TX_INT 0x20 59 #define LPSS_TX_INT_MASK BIT(1) 60 61 #define LPSS_PRV_REG_COUNT 9 62 63 /* LPSS Flags */ 64 #define LPSS_CLK BIT(0) 65 #define LPSS_CLK_GATE BIT(1) 66 #define LPSS_CLK_DIVIDER BIT(2) 67 #define LPSS_LTR BIT(3) 68 #define LPSS_SAVE_CTX BIT(4) 69 #define LPSS_NO_D3_DELAY BIT(5) 70 71 /* Crystal Cove PMIC shares same ACPI ID between different platforms */ 72 #define BYT_CRC_HRV 2 73 #define CHT_CRC_HRV 3 74 75 struct lpss_private_data; 76 77 struct lpss_device_desc { 78 unsigned int flags; 79 const char *clk_con_id; 80 unsigned int prv_offset; 81 size_t prv_size_override; 82 struct property_entry *properties; 83 void (*setup)(struct lpss_private_data *pdata); 84 bool resume_from_noirq; 85 }; 86 87 static const struct lpss_device_desc lpss_dma_desc = { 88 .flags = LPSS_CLK, 89 }; 90 91 struct lpss_private_data { 92 struct acpi_device *adev; 93 void __iomem *mmio_base; 94 resource_size_t mmio_size; 95 unsigned int fixed_clk_rate; 96 struct clk *clk; 97 const struct lpss_device_desc *dev_desc; 98 u32 prv_reg_ctx[LPSS_PRV_REG_COUNT]; 99 }; 100 101 /* Devices which need to be in D3 before lpss_iosf_enter_d3_state() proceeds */ 102 static u32 pmc_atom_d3_mask = 0xfe000ffe; 103 104 /* LPSS run time quirks */ 105 static unsigned int lpss_quirks; 106 107 /* 108 * LPSS_QUIRK_ALWAYS_POWER_ON: override power state for LPSS DMA device. 109 * 110 * The LPSS DMA controller has neither _PS0 nor _PS3 method. Moreover 111 * it can be powered off automatically whenever the last LPSS device goes down. 112 * In case of no power any access to the DMA controller will hang the system. 113 * The behaviour is reproduced on some HP laptops based on Intel BayTrail as 114 * well as on ASuS T100TA transformer. 115 * 116 * This quirk overrides power state of entire LPSS island to keep DMA powered 117 * on whenever we have at least one other device in use. 118 */ 119 #define LPSS_QUIRK_ALWAYS_POWER_ON BIT(0) 120 121 /* UART Component Parameter Register */ 122 #define LPSS_UART_CPR 0xF4 123 #define LPSS_UART_CPR_AFCE BIT(4) 124 125 static void lpss_uart_setup(struct lpss_private_data *pdata) 126 { 127 unsigned int offset; 128 u32 val; 129 130 offset = pdata->dev_desc->prv_offset + LPSS_TX_INT; 131 val = readl(pdata->mmio_base + offset); 132 writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset); 133 134 val = readl(pdata->mmio_base + LPSS_UART_CPR); 135 if (!(val & LPSS_UART_CPR_AFCE)) { 136 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL; 137 val = readl(pdata->mmio_base + offset); 138 val |= LPSS_GENERAL_UART_RTS_OVRD; 139 writel(val, pdata->mmio_base + offset); 140 } 141 } 142 143 static void lpss_deassert_reset(struct lpss_private_data *pdata) 144 { 145 unsigned int offset; 146 u32 val; 147 148 offset = pdata->dev_desc->prv_offset + LPSS_RESETS; 149 val = readl(pdata->mmio_base + offset); 150 val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC; 151 writel(val, pdata->mmio_base + offset); 152 } 153 154 /* 155 * BYT PWM used for backlight control by the i915 driver on systems without 156 * the Crystal Cove PMIC. 157 */ 158 static struct pwm_lookup byt_pwm_lookup[] = { 159 PWM_LOOKUP_WITH_MODULE("80860F09:00", 0, "0000:00:02.0", 160 "pwm_backlight", 0, PWM_POLARITY_NORMAL, 161 "pwm-lpss-platform"), 162 }; 163 164 static void byt_pwm_setup(struct lpss_private_data *pdata) 165 { 166 struct acpi_device *adev = pdata->adev; 167 168 /* Only call pwm_add_table for the first PWM controller */ 169 if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1")) 170 return; 171 172 if (!acpi_dev_present("INT33FD", NULL, BYT_CRC_HRV)) 173 pwm_add_table(byt_pwm_lookup, ARRAY_SIZE(byt_pwm_lookup)); 174 } 175 176 #define LPSS_I2C_ENABLE 0x6c 177 178 static void byt_i2c_setup(struct lpss_private_data *pdata) 179 { 180 const char *uid_str = acpi_device_uid(pdata->adev); 181 acpi_handle handle = pdata->adev->handle; 182 unsigned long long shared_host = 0; 183 acpi_status status; 184 long uid = 0; 185 186 /* Expected to always be true, but better safe then sorry */ 187 if (uid_str) 188 uid = simple_strtol(uid_str, NULL, 10); 189 190 /* Detect I2C bus shared with PUNIT and ignore its d3 status */ 191 status = acpi_evaluate_integer(handle, "_SEM", NULL, &shared_host); 192 if (ACPI_SUCCESS(status) && shared_host && uid) 193 pmc_atom_d3_mask &= ~(BIT_LPSS2_F1_I2C1 << (uid - 1)); 194 195 lpss_deassert_reset(pdata); 196 197 if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset)) 198 pdata->fixed_clk_rate = 133000000; 199 200 writel(0, pdata->mmio_base + LPSS_I2C_ENABLE); 201 } 202 203 /* BSW PWM used for backlight control by the i915 driver */ 204 static struct pwm_lookup bsw_pwm_lookup[] = { 205 PWM_LOOKUP_WITH_MODULE("80862288:00", 0, "0000:00:02.0", 206 "pwm_backlight", 0, PWM_POLARITY_NORMAL, 207 "pwm-lpss-platform"), 208 }; 209 210 static void bsw_pwm_setup(struct lpss_private_data *pdata) 211 { 212 struct acpi_device *adev = pdata->adev; 213 214 /* Only call pwm_add_table for the first PWM controller */ 215 if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1")) 216 return; 217 218 pwm_add_table(bsw_pwm_lookup, ARRAY_SIZE(bsw_pwm_lookup)); 219 } 220 221 static const struct lpss_device_desc lpt_dev_desc = { 222 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR, 223 .prv_offset = 0x800, 224 }; 225 226 static const struct lpss_device_desc lpt_i2c_dev_desc = { 227 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR, 228 .prv_offset = 0x800, 229 }; 230 231 static struct property_entry uart_properties[] = { 232 PROPERTY_ENTRY_U32("reg-io-width", 4), 233 PROPERTY_ENTRY_U32("reg-shift", 2), 234 PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"), 235 { }, 236 }; 237 238 static const struct lpss_device_desc lpt_uart_dev_desc = { 239 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR, 240 .clk_con_id = "baudclk", 241 .prv_offset = 0x800, 242 .setup = lpss_uart_setup, 243 .properties = uart_properties, 244 }; 245 246 static const struct lpss_device_desc lpt_sdio_dev_desc = { 247 .flags = LPSS_LTR, 248 .prv_offset = 0x1000, 249 .prv_size_override = 0x1018, 250 }; 251 252 static const struct lpss_device_desc byt_pwm_dev_desc = { 253 .flags = LPSS_SAVE_CTX, 254 .prv_offset = 0x800, 255 .setup = byt_pwm_setup, 256 }; 257 258 static const struct lpss_device_desc bsw_pwm_dev_desc = { 259 .flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY, 260 .prv_offset = 0x800, 261 .setup = bsw_pwm_setup, 262 }; 263 264 static const struct lpss_device_desc byt_uart_dev_desc = { 265 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX, 266 .clk_con_id = "baudclk", 267 .prv_offset = 0x800, 268 .setup = lpss_uart_setup, 269 .properties = uart_properties, 270 }; 271 272 static const struct lpss_device_desc bsw_uart_dev_desc = { 273 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX 274 | LPSS_NO_D3_DELAY, 275 .clk_con_id = "baudclk", 276 .prv_offset = 0x800, 277 .setup = lpss_uart_setup, 278 .properties = uart_properties, 279 }; 280 281 static const struct lpss_device_desc byt_spi_dev_desc = { 282 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX, 283 .prv_offset = 0x400, 284 }; 285 286 static const struct lpss_device_desc byt_sdio_dev_desc = { 287 .flags = LPSS_CLK, 288 }; 289 290 static const struct lpss_device_desc byt_i2c_dev_desc = { 291 .flags = LPSS_CLK | LPSS_SAVE_CTX, 292 .prv_offset = 0x800, 293 .setup = byt_i2c_setup, 294 .resume_from_noirq = true, 295 }; 296 297 static const struct lpss_device_desc bsw_i2c_dev_desc = { 298 .flags = LPSS_CLK | LPSS_SAVE_CTX | LPSS_NO_D3_DELAY, 299 .prv_offset = 0x800, 300 .setup = byt_i2c_setup, 301 .resume_from_noirq = true, 302 }; 303 304 static const struct lpss_device_desc bsw_spi_dev_desc = { 305 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX 306 | LPSS_NO_D3_DELAY, 307 .prv_offset = 0x400, 308 .setup = lpss_deassert_reset, 309 }; 310 311 #define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, } 312 313 static const struct x86_cpu_id lpss_cpu_ids[] = { 314 ICPU(INTEL_FAM6_ATOM_SILVERMONT), /* Valleyview, Bay Trail */ 315 ICPU(INTEL_FAM6_ATOM_AIRMONT), /* Braswell, Cherry Trail */ 316 {} 317 }; 318 319 #else 320 321 #define LPSS_ADDR(desc) (0UL) 322 323 #endif /* CONFIG_X86_INTEL_LPSS */ 324 325 static const struct acpi_device_id acpi_lpss_device_ids[] = { 326 /* Generic LPSS devices */ 327 { "INTL9C60", LPSS_ADDR(lpss_dma_desc) }, 328 329 /* Lynxpoint LPSS devices */ 330 { "INT33C0", LPSS_ADDR(lpt_dev_desc) }, 331 { "INT33C1", LPSS_ADDR(lpt_dev_desc) }, 332 { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) }, 333 { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) }, 334 { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) }, 335 { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) }, 336 { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) }, 337 { "INT33C7", }, 338 339 /* BayTrail LPSS devices */ 340 { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) }, 341 { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) }, 342 { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) }, 343 { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) }, 344 { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) }, 345 { "INT33B2", }, 346 { "INT33FC", }, 347 348 /* Braswell LPSS devices */ 349 { "80862286", LPSS_ADDR(lpss_dma_desc) }, 350 { "80862288", LPSS_ADDR(bsw_pwm_dev_desc) }, 351 { "8086228A", LPSS_ADDR(bsw_uart_dev_desc) }, 352 { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) }, 353 { "808622C0", LPSS_ADDR(lpss_dma_desc) }, 354 { "808622C1", LPSS_ADDR(bsw_i2c_dev_desc) }, 355 356 /* Broadwell LPSS devices */ 357 { "INT3430", LPSS_ADDR(lpt_dev_desc) }, 358 { "INT3431", LPSS_ADDR(lpt_dev_desc) }, 359 { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) }, 360 { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) }, 361 { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) }, 362 { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) }, 363 { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) }, 364 { "INT3437", }, 365 366 /* Wildcat Point LPSS devices */ 367 { "INT3438", LPSS_ADDR(lpt_dev_desc) }, 368 369 { } 370 }; 371 372 #ifdef CONFIG_X86_INTEL_LPSS 373 374 static int is_memory(struct acpi_resource *res, void *not_used) 375 { 376 struct resource r; 377 return !acpi_dev_resource_memory(res, &r); 378 } 379 380 /* LPSS main clock device. */ 381 static struct platform_device *lpss_clk_dev; 382 383 static inline void lpt_register_clock_device(void) 384 { 385 lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0); 386 } 387 388 static int register_device_clock(struct acpi_device *adev, 389 struct lpss_private_data *pdata) 390 { 391 const struct lpss_device_desc *dev_desc = pdata->dev_desc; 392 const char *devname = dev_name(&adev->dev); 393 struct clk *clk; 394 struct lpss_clk_data *clk_data; 395 const char *parent, *clk_name; 396 void __iomem *prv_base; 397 398 if (!lpss_clk_dev) 399 lpt_register_clock_device(); 400 401 clk_data = platform_get_drvdata(lpss_clk_dev); 402 if (!clk_data) 403 return -ENODEV; 404 clk = clk_data->clk; 405 406 if (!pdata->mmio_base 407 || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE) 408 return -ENODATA; 409 410 parent = clk_data->name; 411 prv_base = pdata->mmio_base + dev_desc->prv_offset; 412 413 if (pdata->fixed_clk_rate) { 414 clk = clk_register_fixed_rate(NULL, devname, parent, 0, 415 pdata->fixed_clk_rate); 416 goto out; 417 } 418 419 if (dev_desc->flags & LPSS_CLK_GATE) { 420 clk = clk_register_gate(NULL, devname, parent, 0, 421 prv_base, 0, 0, NULL); 422 parent = devname; 423 } 424 425 if (dev_desc->flags & LPSS_CLK_DIVIDER) { 426 /* Prevent division by zero */ 427 if (!readl(prv_base)) 428 writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base); 429 430 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname); 431 if (!clk_name) 432 return -ENOMEM; 433 clk = clk_register_fractional_divider(NULL, clk_name, parent, 434 0, prv_base, 435 1, 15, 16, 15, 0, NULL); 436 parent = clk_name; 437 438 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname); 439 if (!clk_name) { 440 kfree(parent); 441 return -ENOMEM; 442 } 443 clk = clk_register_gate(NULL, clk_name, parent, 444 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, 445 prv_base, 31, 0, NULL); 446 kfree(parent); 447 kfree(clk_name); 448 } 449 out: 450 if (IS_ERR(clk)) 451 return PTR_ERR(clk); 452 453 pdata->clk = clk; 454 clk_register_clkdev(clk, dev_desc->clk_con_id, devname); 455 return 0; 456 } 457 458 struct lpss_device_links { 459 const char *supplier_hid; 460 const char *supplier_uid; 461 const char *consumer_hid; 462 const char *consumer_uid; 463 u32 flags; 464 }; 465 466 /* 467 * The _DEP method is used to identify dependencies but instead of creating 468 * device links for every handle in _DEP, only links in the following list are 469 * created. That is necessary because, in the general case, _DEP can refer to 470 * devices that might not have drivers, or that are on different buses, or where 471 * the supplier is not enumerated until after the consumer is probed. 472 */ 473 static const struct lpss_device_links lpss_device_links[] = { 474 {"808622C1", "7", "80860F14", "3", DL_FLAG_PM_RUNTIME}, 475 {"808622C1", "7", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME}, 476 {"80860F41", "5", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME}, 477 }; 478 479 static bool hid_uid_match(struct acpi_device *adev, 480 const char *hid2, const char *uid2) 481 { 482 const char *hid1 = acpi_device_hid(adev); 483 const char *uid1 = acpi_device_uid(adev); 484 485 if (strcmp(hid1, hid2)) 486 return false; 487 488 if (!uid2) 489 return true; 490 491 return uid1 && !strcmp(uid1, uid2); 492 } 493 494 static bool acpi_lpss_is_supplier(struct acpi_device *adev, 495 const struct lpss_device_links *link) 496 { 497 return hid_uid_match(adev, link->supplier_hid, link->supplier_uid); 498 } 499 500 static bool acpi_lpss_is_consumer(struct acpi_device *adev, 501 const struct lpss_device_links *link) 502 { 503 return hid_uid_match(adev, link->consumer_hid, link->consumer_uid); 504 } 505 506 struct hid_uid { 507 const char *hid; 508 const char *uid; 509 }; 510 511 static int match_hid_uid(struct device *dev, const void *data) 512 { 513 struct acpi_device *adev = ACPI_COMPANION(dev); 514 const struct hid_uid *id = data; 515 516 if (!adev) 517 return 0; 518 519 return hid_uid_match(adev, id->hid, id->uid); 520 } 521 522 static struct device *acpi_lpss_find_device(const char *hid, const char *uid) 523 { 524 struct device *dev; 525 526 struct hid_uid data = { 527 .hid = hid, 528 .uid = uid, 529 }; 530 531 dev = bus_find_device(&platform_bus_type, NULL, &data, match_hid_uid); 532 if (dev) 533 return dev; 534 535 return bus_find_device(&pci_bus_type, NULL, &data, match_hid_uid); 536 } 537 538 static bool acpi_lpss_dep(struct acpi_device *adev, acpi_handle handle) 539 { 540 struct acpi_handle_list dep_devices; 541 acpi_status status; 542 int i; 543 544 if (!acpi_has_method(adev->handle, "_DEP")) 545 return false; 546 547 status = acpi_evaluate_reference(adev->handle, "_DEP", NULL, 548 &dep_devices); 549 if (ACPI_FAILURE(status)) { 550 dev_dbg(&adev->dev, "Failed to evaluate _DEP.\n"); 551 return false; 552 } 553 554 for (i = 0; i < dep_devices.count; i++) { 555 if (dep_devices.handles[i] == handle) 556 return true; 557 } 558 559 return false; 560 } 561 562 static void acpi_lpss_link_consumer(struct device *dev1, 563 const struct lpss_device_links *link) 564 { 565 struct device *dev2; 566 567 dev2 = acpi_lpss_find_device(link->consumer_hid, link->consumer_uid); 568 if (!dev2) 569 return; 570 571 if (acpi_lpss_dep(ACPI_COMPANION(dev2), ACPI_HANDLE(dev1))) 572 device_link_add(dev2, dev1, link->flags); 573 574 put_device(dev2); 575 } 576 577 static void acpi_lpss_link_supplier(struct device *dev1, 578 const struct lpss_device_links *link) 579 { 580 struct device *dev2; 581 582 dev2 = acpi_lpss_find_device(link->supplier_hid, link->supplier_uid); 583 if (!dev2) 584 return; 585 586 if (acpi_lpss_dep(ACPI_COMPANION(dev1), ACPI_HANDLE(dev2))) 587 device_link_add(dev1, dev2, link->flags); 588 589 put_device(dev2); 590 } 591 592 static void acpi_lpss_create_device_links(struct acpi_device *adev, 593 struct platform_device *pdev) 594 { 595 int i; 596 597 for (i = 0; i < ARRAY_SIZE(lpss_device_links); i++) { 598 const struct lpss_device_links *link = &lpss_device_links[i]; 599 600 if (acpi_lpss_is_supplier(adev, link)) 601 acpi_lpss_link_consumer(&pdev->dev, link); 602 603 if (acpi_lpss_is_consumer(adev, link)) 604 acpi_lpss_link_supplier(&pdev->dev, link); 605 } 606 } 607 608 static int acpi_lpss_create_device(struct acpi_device *adev, 609 const struct acpi_device_id *id) 610 { 611 const struct lpss_device_desc *dev_desc; 612 struct lpss_private_data *pdata; 613 struct resource_entry *rentry; 614 struct list_head resource_list; 615 struct platform_device *pdev; 616 int ret; 617 618 dev_desc = (const struct lpss_device_desc *)id->driver_data; 619 if (!dev_desc) { 620 pdev = acpi_create_platform_device(adev, NULL); 621 return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1; 622 } 623 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); 624 if (!pdata) 625 return -ENOMEM; 626 627 INIT_LIST_HEAD(&resource_list); 628 ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL); 629 if (ret < 0) 630 goto err_out; 631 632 list_for_each_entry(rentry, &resource_list, node) 633 if (resource_type(rentry->res) == IORESOURCE_MEM) { 634 if (dev_desc->prv_size_override) 635 pdata->mmio_size = dev_desc->prv_size_override; 636 else 637 pdata->mmio_size = resource_size(rentry->res); 638 pdata->mmio_base = ioremap(rentry->res->start, 639 pdata->mmio_size); 640 break; 641 } 642 643 acpi_dev_free_resource_list(&resource_list); 644 645 if (!pdata->mmio_base) { 646 /* Avoid acpi_bus_attach() instantiating a pdev for this dev. */ 647 adev->pnp.type.platform_id = 0; 648 /* Skip the device, but continue the namespace scan. */ 649 ret = 0; 650 goto err_out; 651 } 652 653 pdata->adev = adev; 654 pdata->dev_desc = dev_desc; 655 656 if (dev_desc->setup) 657 dev_desc->setup(pdata); 658 659 if (dev_desc->flags & LPSS_CLK) { 660 ret = register_device_clock(adev, pdata); 661 if (ret) { 662 /* Skip the device, but continue the namespace scan. */ 663 ret = 0; 664 goto err_out; 665 } 666 } 667 668 /* 669 * This works around a known issue in ACPI tables where LPSS devices 670 * have _PS0 and _PS3 without _PSC (and no power resources), so 671 * acpi_bus_init_power() will assume that the BIOS has put them into D0. 672 */ 673 acpi_device_fix_up_power(adev); 674 675 adev->driver_data = pdata; 676 pdev = acpi_create_platform_device(adev, dev_desc->properties); 677 if (!IS_ERR_OR_NULL(pdev)) { 678 acpi_lpss_create_device_links(adev, pdev); 679 return 1; 680 } 681 682 ret = PTR_ERR(pdev); 683 adev->driver_data = NULL; 684 685 err_out: 686 kfree(pdata); 687 return ret; 688 } 689 690 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg) 691 { 692 return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg); 693 } 694 695 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata, 696 unsigned int reg) 697 { 698 writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg); 699 } 700 701 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val) 702 { 703 struct acpi_device *adev; 704 struct lpss_private_data *pdata; 705 unsigned long flags; 706 int ret; 707 708 ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev); 709 if (WARN_ON(ret)) 710 return ret; 711 712 spin_lock_irqsave(&dev->power.lock, flags); 713 if (pm_runtime_suspended(dev)) { 714 ret = -EAGAIN; 715 goto out; 716 } 717 pdata = acpi_driver_data(adev); 718 if (WARN_ON(!pdata || !pdata->mmio_base)) { 719 ret = -ENODEV; 720 goto out; 721 } 722 *val = __lpss_reg_read(pdata, reg); 723 724 out: 725 spin_unlock_irqrestore(&dev->power.lock, flags); 726 return ret; 727 } 728 729 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr, 730 char *buf) 731 { 732 u32 ltr_value = 0; 733 unsigned int reg; 734 int ret; 735 736 reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR; 737 ret = lpss_reg_read(dev, reg, <r_value); 738 if (ret) 739 return ret; 740 741 return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value); 742 } 743 744 static ssize_t lpss_ltr_mode_show(struct device *dev, 745 struct device_attribute *attr, char *buf) 746 { 747 u32 ltr_mode = 0; 748 char *outstr; 749 int ret; 750 751 ret = lpss_reg_read(dev, LPSS_GENERAL, <r_mode); 752 if (ret) 753 return ret; 754 755 outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto"; 756 return sprintf(buf, "%s\n", outstr); 757 } 758 759 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL); 760 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL); 761 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL); 762 763 static struct attribute *lpss_attrs[] = { 764 &dev_attr_auto_ltr.attr, 765 &dev_attr_sw_ltr.attr, 766 &dev_attr_ltr_mode.attr, 767 NULL, 768 }; 769 770 static const struct attribute_group lpss_attr_group = { 771 .attrs = lpss_attrs, 772 .name = "lpss_ltr", 773 }; 774 775 static void acpi_lpss_set_ltr(struct device *dev, s32 val) 776 { 777 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 778 u32 ltr_mode, ltr_val; 779 780 ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL); 781 if (val < 0) { 782 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) { 783 ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW; 784 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL); 785 } 786 return; 787 } 788 ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK; 789 if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) { 790 ltr_val |= LPSS_LTR_SNOOP_LAT_32US; 791 val = LPSS_LTR_MAX_VAL; 792 } else if (val > LPSS_LTR_MAX_VAL) { 793 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ; 794 val >>= LPSS_LTR_SNOOP_LAT_SHIFT; 795 } else { 796 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ; 797 } 798 ltr_val |= val; 799 __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR); 800 if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) { 801 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW; 802 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL); 803 } 804 } 805 806 #ifdef CONFIG_PM 807 /** 808 * acpi_lpss_save_ctx() - Save the private registers of LPSS device 809 * @dev: LPSS device 810 * @pdata: pointer to the private data of the LPSS device 811 * 812 * Most LPSS devices have private registers which may loose their context when 813 * the device is powered down. acpi_lpss_save_ctx() saves those registers into 814 * prv_reg_ctx array. 815 */ 816 static void acpi_lpss_save_ctx(struct device *dev, 817 struct lpss_private_data *pdata) 818 { 819 unsigned int i; 820 821 for (i = 0; i < LPSS_PRV_REG_COUNT; i++) { 822 unsigned long offset = i * sizeof(u32); 823 824 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset); 825 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n", 826 pdata->prv_reg_ctx[i], offset); 827 } 828 } 829 830 /** 831 * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device 832 * @dev: LPSS device 833 * @pdata: pointer to the private data of the LPSS device 834 * 835 * Restores the registers that were previously stored with acpi_lpss_save_ctx(). 836 */ 837 static void acpi_lpss_restore_ctx(struct device *dev, 838 struct lpss_private_data *pdata) 839 { 840 unsigned int i; 841 842 for (i = 0; i < LPSS_PRV_REG_COUNT; i++) { 843 unsigned long offset = i * sizeof(u32); 844 845 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset); 846 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n", 847 pdata->prv_reg_ctx[i], offset); 848 } 849 } 850 851 static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata) 852 { 853 /* 854 * The following delay is needed or the subsequent write operations may 855 * fail. The LPSS devices are actually PCI devices and the PCI spec 856 * expects 10ms delay before the device can be accessed after D3 to D0 857 * transition. However some platforms like BSW does not need this delay. 858 */ 859 unsigned int delay = 10; /* default 10ms delay */ 860 861 if (pdata->dev_desc->flags & LPSS_NO_D3_DELAY) 862 delay = 0; 863 864 msleep(delay); 865 } 866 867 static int acpi_lpss_activate(struct device *dev) 868 { 869 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 870 int ret; 871 872 ret = acpi_dev_resume(dev); 873 if (ret) 874 return ret; 875 876 acpi_lpss_d3_to_d0_delay(pdata); 877 878 /* 879 * This is called only on ->probe() stage where a device is either in 880 * known state defined by BIOS or most likely powered off. Due to this 881 * we have to deassert reset line to be sure that ->probe() will 882 * recognize the device. 883 */ 884 if (pdata->dev_desc->flags & LPSS_SAVE_CTX) 885 lpss_deassert_reset(pdata); 886 887 return 0; 888 } 889 890 static void acpi_lpss_dismiss(struct device *dev) 891 { 892 acpi_dev_suspend(dev, false); 893 } 894 895 /* IOSF SB for LPSS island */ 896 #define LPSS_IOSF_UNIT_LPIOEP 0xA0 897 #define LPSS_IOSF_UNIT_LPIO1 0xAB 898 #define LPSS_IOSF_UNIT_LPIO2 0xAC 899 900 #define LPSS_IOSF_PMCSR 0x84 901 #define LPSS_PMCSR_D0 0 902 #define LPSS_PMCSR_D3hot 3 903 #define LPSS_PMCSR_Dx_MASK GENMASK(1, 0) 904 905 #define LPSS_IOSF_GPIODEF0 0x154 906 #define LPSS_GPIODEF0_DMA1_D3 BIT(2) 907 #define LPSS_GPIODEF0_DMA2_D3 BIT(3) 908 #define LPSS_GPIODEF0_DMA_D3_MASK GENMASK(3, 2) 909 #define LPSS_GPIODEF0_DMA_LLP BIT(13) 910 911 static DEFINE_MUTEX(lpss_iosf_mutex); 912 static bool lpss_iosf_d3_entered = true; 913 914 static void lpss_iosf_enter_d3_state(void) 915 { 916 u32 value1 = 0; 917 u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP; 918 u32 value2 = LPSS_PMCSR_D3hot; 919 u32 mask2 = LPSS_PMCSR_Dx_MASK; 920 /* 921 * PMC provides an information about actual status of the LPSS devices. 922 * Here we read the values related to LPSS power island, i.e. LPSS 923 * devices, excluding both LPSS DMA controllers, along with SCC domain. 924 */ 925 u32 func_dis, d3_sts_0, pmc_status; 926 int ret; 927 928 ret = pmc_atom_read(PMC_FUNC_DIS, &func_dis); 929 if (ret) 930 return; 931 932 mutex_lock(&lpss_iosf_mutex); 933 934 ret = pmc_atom_read(PMC_D3_STS_0, &d3_sts_0); 935 if (ret) 936 goto exit; 937 938 /* 939 * Get the status of entire LPSS power island per device basis. 940 * Shutdown both LPSS DMA controllers if and only if all other devices 941 * are already in D3hot. 942 */ 943 pmc_status = (~(d3_sts_0 | func_dis)) & pmc_atom_d3_mask; 944 if (pmc_status) 945 goto exit; 946 947 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE, 948 LPSS_IOSF_PMCSR, value2, mask2); 949 950 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE, 951 LPSS_IOSF_PMCSR, value2, mask2); 952 953 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE, 954 LPSS_IOSF_GPIODEF0, value1, mask1); 955 956 lpss_iosf_d3_entered = true; 957 958 exit: 959 mutex_unlock(&lpss_iosf_mutex); 960 } 961 962 static void lpss_iosf_exit_d3_state(void) 963 { 964 u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3 | 965 LPSS_GPIODEF0_DMA_LLP; 966 u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP; 967 u32 value2 = LPSS_PMCSR_D0; 968 u32 mask2 = LPSS_PMCSR_Dx_MASK; 969 970 mutex_lock(&lpss_iosf_mutex); 971 972 if (!lpss_iosf_d3_entered) 973 goto exit; 974 975 lpss_iosf_d3_entered = false; 976 977 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE, 978 LPSS_IOSF_GPIODEF0, value1, mask1); 979 980 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE, 981 LPSS_IOSF_PMCSR, value2, mask2); 982 983 iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE, 984 LPSS_IOSF_PMCSR, value2, mask2); 985 986 exit: 987 mutex_unlock(&lpss_iosf_mutex); 988 } 989 990 static int acpi_lpss_suspend(struct device *dev, bool wakeup) 991 { 992 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 993 int ret; 994 995 if (pdata->dev_desc->flags & LPSS_SAVE_CTX) 996 acpi_lpss_save_ctx(dev, pdata); 997 998 ret = acpi_dev_suspend(dev, wakeup); 999 1000 /* 1001 * This call must be last in the sequence, otherwise PMC will return 1002 * wrong status for devices being about to be powered off. See 1003 * lpss_iosf_enter_d3_state() for further information. 1004 */ 1005 if (acpi_target_system_state() == ACPI_STATE_S0 && 1006 lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available()) 1007 lpss_iosf_enter_d3_state(); 1008 1009 return ret; 1010 } 1011 1012 static int acpi_lpss_resume(struct device *dev) 1013 { 1014 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 1015 int ret; 1016 1017 /* 1018 * This call is kept first to be in symmetry with 1019 * acpi_lpss_runtime_suspend() one. 1020 */ 1021 if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available()) 1022 lpss_iosf_exit_d3_state(); 1023 1024 ret = acpi_dev_resume(dev); 1025 if (ret) 1026 return ret; 1027 1028 acpi_lpss_d3_to_d0_delay(pdata); 1029 1030 if (pdata->dev_desc->flags & LPSS_SAVE_CTX) 1031 acpi_lpss_restore_ctx(dev, pdata); 1032 1033 return 0; 1034 } 1035 1036 #ifdef CONFIG_PM_SLEEP 1037 static int acpi_lpss_do_suspend_late(struct device *dev) 1038 { 1039 int ret; 1040 1041 if (dev_pm_smart_suspend_and_suspended(dev)) 1042 return 0; 1043 1044 ret = pm_generic_suspend_late(dev); 1045 return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev)); 1046 } 1047 1048 static int acpi_lpss_suspend_late(struct device *dev) 1049 { 1050 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 1051 1052 if (pdata->dev_desc->resume_from_noirq) 1053 return 0; 1054 1055 return acpi_lpss_do_suspend_late(dev); 1056 } 1057 1058 static int acpi_lpss_suspend_noirq(struct device *dev) 1059 { 1060 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 1061 int ret; 1062 1063 if (pdata->dev_desc->resume_from_noirq) { 1064 /* 1065 * The driver's ->suspend_late callback will be invoked by 1066 * acpi_lpss_do_suspend_late(), with the assumption that the 1067 * driver really wanted to run that code in ->suspend_noirq, but 1068 * it could not run after acpi_dev_suspend() and the driver 1069 * expected the latter to be called in the "late" phase. 1070 */ 1071 ret = acpi_lpss_do_suspend_late(dev); 1072 if (ret) 1073 return ret; 1074 } 1075 1076 return acpi_subsys_suspend_noirq(dev); 1077 } 1078 1079 static int acpi_lpss_do_resume_early(struct device *dev) 1080 { 1081 int ret = acpi_lpss_resume(dev); 1082 1083 return ret ? ret : pm_generic_resume_early(dev); 1084 } 1085 1086 static int acpi_lpss_resume_early(struct device *dev) 1087 { 1088 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 1089 1090 if (pdata->dev_desc->resume_from_noirq) 1091 return 0; 1092 1093 return acpi_lpss_do_resume_early(dev); 1094 } 1095 1096 static int acpi_lpss_resume_noirq(struct device *dev) 1097 { 1098 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 1099 int ret; 1100 1101 /* Follow acpi_subsys_resume_noirq(). */ 1102 if (dev_pm_may_skip_resume(dev)) 1103 return 0; 1104 1105 if (dev_pm_smart_suspend_and_suspended(dev)) 1106 pm_runtime_set_active(dev); 1107 1108 ret = pm_generic_resume_noirq(dev); 1109 if (ret) 1110 return ret; 1111 1112 if (!pdata->dev_desc->resume_from_noirq) 1113 return 0; 1114 1115 /* 1116 * The driver's ->resume_early callback will be invoked by 1117 * acpi_lpss_do_resume_early(), with the assumption that the driver 1118 * really wanted to run that code in ->resume_noirq, but it could not 1119 * run before acpi_dev_resume() and the driver expected the latter to be 1120 * called in the "early" phase. 1121 */ 1122 return acpi_lpss_do_resume_early(dev); 1123 } 1124 1125 static int acpi_lpss_do_restore_early(struct device *dev) 1126 { 1127 int ret = acpi_lpss_resume(dev); 1128 1129 return ret ? ret : pm_generic_restore_early(dev); 1130 } 1131 1132 static int acpi_lpss_restore_early(struct device *dev) 1133 { 1134 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 1135 1136 if (pdata->dev_desc->resume_from_noirq) 1137 return 0; 1138 1139 return acpi_lpss_do_restore_early(dev); 1140 } 1141 1142 static int acpi_lpss_restore_noirq(struct device *dev) 1143 { 1144 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 1145 int ret; 1146 1147 ret = pm_generic_restore_noirq(dev); 1148 if (ret) 1149 return ret; 1150 1151 if (!pdata->dev_desc->resume_from_noirq) 1152 return 0; 1153 1154 /* This is analogous to what happens in acpi_lpss_resume_noirq(). */ 1155 return acpi_lpss_do_restore_early(dev); 1156 } 1157 1158 static int acpi_lpss_do_poweroff_late(struct device *dev) 1159 { 1160 int ret = pm_generic_poweroff_late(dev); 1161 1162 return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev)); 1163 } 1164 1165 static int acpi_lpss_poweroff_late(struct device *dev) 1166 { 1167 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 1168 1169 if (dev_pm_smart_suspend_and_suspended(dev)) 1170 return 0; 1171 1172 if (pdata->dev_desc->resume_from_noirq) 1173 return 0; 1174 1175 return acpi_lpss_do_poweroff_late(dev); 1176 } 1177 1178 static int acpi_lpss_poweroff_noirq(struct device *dev) 1179 { 1180 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 1181 1182 if (dev_pm_smart_suspend_and_suspended(dev)) 1183 return 0; 1184 1185 if (pdata->dev_desc->resume_from_noirq) { 1186 /* This is analogous to the acpi_lpss_suspend_noirq() case. */ 1187 int ret = acpi_lpss_do_poweroff_late(dev); 1188 if (ret) 1189 return ret; 1190 } 1191 1192 return pm_generic_poweroff_noirq(dev); 1193 } 1194 #endif /* CONFIG_PM_SLEEP */ 1195 1196 static int acpi_lpss_runtime_suspend(struct device *dev) 1197 { 1198 int ret = pm_generic_runtime_suspend(dev); 1199 1200 return ret ? ret : acpi_lpss_suspend(dev, true); 1201 } 1202 1203 static int acpi_lpss_runtime_resume(struct device *dev) 1204 { 1205 int ret = acpi_lpss_resume(dev); 1206 1207 return ret ? ret : pm_generic_runtime_resume(dev); 1208 } 1209 #endif /* CONFIG_PM */ 1210 1211 static struct dev_pm_domain acpi_lpss_pm_domain = { 1212 #ifdef CONFIG_PM 1213 .activate = acpi_lpss_activate, 1214 .dismiss = acpi_lpss_dismiss, 1215 #endif 1216 .ops = { 1217 #ifdef CONFIG_PM 1218 #ifdef CONFIG_PM_SLEEP 1219 .prepare = acpi_subsys_prepare, 1220 .complete = acpi_subsys_complete, 1221 .suspend = acpi_subsys_suspend, 1222 .suspend_late = acpi_lpss_suspend_late, 1223 .suspend_noirq = acpi_lpss_suspend_noirq, 1224 .resume_noirq = acpi_lpss_resume_noirq, 1225 .resume_early = acpi_lpss_resume_early, 1226 .freeze = acpi_subsys_freeze, 1227 .poweroff = acpi_subsys_poweroff, 1228 .poweroff_late = acpi_lpss_poweroff_late, 1229 .poweroff_noirq = acpi_lpss_poweroff_noirq, 1230 .restore_noirq = acpi_lpss_restore_noirq, 1231 .restore_early = acpi_lpss_restore_early, 1232 #endif 1233 .runtime_suspend = acpi_lpss_runtime_suspend, 1234 .runtime_resume = acpi_lpss_runtime_resume, 1235 #endif 1236 }, 1237 }; 1238 1239 static int acpi_lpss_platform_notify(struct notifier_block *nb, 1240 unsigned long action, void *data) 1241 { 1242 struct platform_device *pdev = to_platform_device(data); 1243 struct lpss_private_data *pdata; 1244 struct acpi_device *adev; 1245 const struct acpi_device_id *id; 1246 1247 id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev); 1248 if (!id || !id->driver_data) 1249 return 0; 1250 1251 if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev)) 1252 return 0; 1253 1254 pdata = acpi_driver_data(adev); 1255 if (!pdata) 1256 return 0; 1257 1258 if (pdata->mmio_base && 1259 pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) { 1260 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n"); 1261 return 0; 1262 } 1263 1264 switch (action) { 1265 case BUS_NOTIFY_BIND_DRIVER: 1266 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain); 1267 break; 1268 case BUS_NOTIFY_DRIVER_NOT_BOUND: 1269 case BUS_NOTIFY_UNBOUND_DRIVER: 1270 dev_pm_domain_set(&pdev->dev, NULL); 1271 break; 1272 case BUS_NOTIFY_ADD_DEVICE: 1273 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain); 1274 if (pdata->dev_desc->flags & LPSS_LTR) 1275 return sysfs_create_group(&pdev->dev.kobj, 1276 &lpss_attr_group); 1277 break; 1278 case BUS_NOTIFY_DEL_DEVICE: 1279 if (pdata->dev_desc->flags & LPSS_LTR) 1280 sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group); 1281 dev_pm_domain_set(&pdev->dev, NULL); 1282 break; 1283 default: 1284 break; 1285 } 1286 1287 return 0; 1288 } 1289 1290 static struct notifier_block acpi_lpss_nb = { 1291 .notifier_call = acpi_lpss_platform_notify, 1292 }; 1293 1294 static void acpi_lpss_bind(struct device *dev) 1295 { 1296 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 1297 1298 if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR)) 1299 return; 1300 1301 if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) 1302 dev->power.set_latency_tolerance = acpi_lpss_set_ltr; 1303 else 1304 dev_err(dev, "MMIO size insufficient to access LTR\n"); 1305 } 1306 1307 static void acpi_lpss_unbind(struct device *dev) 1308 { 1309 dev->power.set_latency_tolerance = NULL; 1310 } 1311 1312 static struct acpi_scan_handler lpss_handler = { 1313 .ids = acpi_lpss_device_ids, 1314 .attach = acpi_lpss_create_device, 1315 .bind = acpi_lpss_bind, 1316 .unbind = acpi_lpss_unbind, 1317 }; 1318 1319 void __init acpi_lpss_init(void) 1320 { 1321 const struct x86_cpu_id *id; 1322 int ret; 1323 1324 ret = lpt_clk_init(); 1325 if (ret) 1326 return; 1327 1328 id = x86_match_cpu(lpss_cpu_ids); 1329 if (id) 1330 lpss_quirks |= LPSS_QUIRK_ALWAYS_POWER_ON; 1331 1332 bus_register_notifier(&platform_bus_type, &acpi_lpss_nb); 1333 acpi_scan_add_handler(&lpss_handler); 1334 } 1335 1336 #else 1337 1338 static struct acpi_scan_handler lpss_handler = { 1339 .ids = acpi_lpss_device_ids, 1340 }; 1341 1342 void __init acpi_lpss_init(void) 1343 { 1344 acpi_scan_add_handler(&lpss_handler); 1345 } 1346 1347 #endif /* CONFIG_X86_INTEL_LPSS */ 1348