1 /* 2 * ACPI support for Intel Lynxpoint LPSS. 3 * 4 * Copyright (C) 2013, Intel Corporation 5 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com> 6 * Rafael J. Wysocki <rafael.j.wysocki@intel.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/acpi.h> 14 #include <linux/clk.h> 15 #include <linux/clkdev.h> 16 #include <linux/clk-provider.h> 17 #include <linux/err.h> 18 #include <linux/io.h> 19 #include <linux/platform_device.h> 20 #include <linux/platform_data/clk-lpss.h> 21 #include <linux/pm_runtime.h> 22 23 #include "internal.h" 24 25 ACPI_MODULE_NAME("acpi_lpss"); 26 27 #define LPSS_CLK_SIZE 0x04 28 #define LPSS_LTR_SIZE 0x18 29 30 /* Offsets relative to LPSS_PRIVATE_OFFSET */ 31 #define LPSS_GENERAL 0x08 32 #define LPSS_GENERAL_LTR_MODE_SW BIT(2) 33 #define LPSS_GENERAL_UART_RTS_OVRD BIT(3) 34 #define LPSS_SW_LTR 0x10 35 #define LPSS_AUTO_LTR 0x14 36 #define LPSS_TX_INT 0x20 37 #define LPSS_TX_INT_MASK BIT(1) 38 39 struct lpss_shared_clock { 40 const char *name; 41 unsigned long rate; 42 struct clk *clk; 43 }; 44 45 struct lpss_private_data; 46 47 struct lpss_device_desc { 48 bool clk_required; 49 const char *clkdev_name; 50 bool ltr_required; 51 unsigned int prv_offset; 52 size_t prv_size_override; 53 bool clk_gate; 54 struct lpss_shared_clock *shared_clock; 55 void (*setup)(struct lpss_private_data *pdata); 56 }; 57 58 static struct lpss_device_desc lpss_dma_desc = { 59 .clk_required = true, 60 .clkdev_name = "hclk", 61 }; 62 63 struct lpss_private_data { 64 void __iomem *mmio_base; 65 resource_size_t mmio_size; 66 struct clk *clk; 67 const struct lpss_device_desc *dev_desc; 68 }; 69 70 static void lpss_uart_setup(struct lpss_private_data *pdata) 71 { 72 unsigned int offset; 73 u32 reg; 74 75 offset = pdata->dev_desc->prv_offset + LPSS_TX_INT; 76 reg = readl(pdata->mmio_base + offset); 77 writel(reg | LPSS_TX_INT_MASK, pdata->mmio_base + offset); 78 79 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL; 80 reg = readl(pdata->mmio_base + offset); 81 writel(reg | LPSS_GENERAL_UART_RTS_OVRD, pdata->mmio_base + offset); 82 } 83 84 static struct lpss_device_desc lpt_dev_desc = { 85 .clk_required = true, 86 .prv_offset = 0x800, 87 .ltr_required = true, 88 .clk_gate = true, 89 }; 90 91 static struct lpss_device_desc lpt_uart_dev_desc = { 92 .clk_required = true, 93 .prv_offset = 0x800, 94 .ltr_required = true, 95 .clk_gate = true, 96 .setup = lpss_uart_setup, 97 }; 98 99 static struct lpss_device_desc lpt_sdio_dev_desc = { 100 .prv_offset = 0x1000, 101 .prv_size_override = 0x1018, 102 .ltr_required = true, 103 }; 104 105 static struct lpss_shared_clock uart_clock = { 106 .name = "uart_clk", 107 .rate = 44236800, 108 }; 109 110 static struct lpss_device_desc byt_uart_dev_desc = { 111 .clk_required = true, 112 .prv_offset = 0x800, 113 .clk_gate = true, 114 .shared_clock = &uart_clock, 115 .setup = lpss_uart_setup, 116 }; 117 118 static struct lpss_shared_clock spi_clock = { 119 .name = "spi_clk", 120 .rate = 50000000, 121 }; 122 123 static struct lpss_device_desc byt_spi_dev_desc = { 124 .clk_required = true, 125 .prv_offset = 0x400, 126 .clk_gate = true, 127 .shared_clock = &spi_clock, 128 }; 129 130 static struct lpss_device_desc byt_sdio_dev_desc = { 131 .clk_required = true, 132 }; 133 134 static struct lpss_shared_clock i2c_clock = { 135 .name = "i2c_clk", 136 .rate = 100000000, 137 }; 138 139 static struct lpss_device_desc byt_i2c_dev_desc = { 140 .clk_required = true, 141 .prv_offset = 0x800, 142 .shared_clock = &i2c_clock, 143 }; 144 145 static const struct acpi_device_id acpi_lpss_device_ids[] = { 146 /* Generic LPSS devices */ 147 { "INTL9C60", (unsigned long)&lpss_dma_desc }, 148 149 /* Lynxpoint LPSS devices */ 150 { "INT33C0", (unsigned long)&lpt_dev_desc }, 151 { "INT33C1", (unsigned long)&lpt_dev_desc }, 152 { "INT33C2", (unsigned long)&lpt_dev_desc }, 153 { "INT33C3", (unsigned long)&lpt_dev_desc }, 154 { "INT33C4", (unsigned long)&lpt_uart_dev_desc }, 155 { "INT33C5", (unsigned long)&lpt_uart_dev_desc }, 156 { "INT33C6", (unsigned long)&lpt_sdio_dev_desc }, 157 { "INT33C7", }, 158 159 /* BayTrail LPSS devices */ 160 { "80860F0A", (unsigned long)&byt_uart_dev_desc }, 161 { "80860F0E", (unsigned long)&byt_spi_dev_desc }, 162 { "80860F14", (unsigned long)&byt_sdio_dev_desc }, 163 { "80860F41", (unsigned long)&byt_i2c_dev_desc }, 164 { "INT33B2", }, 165 { "INT33FC", }, 166 167 { "INT3430", (unsigned long)&lpt_dev_desc }, 168 { "INT3431", (unsigned long)&lpt_dev_desc }, 169 { "INT3432", (unsigned long)&lpt_dev_desc }, 170 { "INT3433", (unsigned long)&lpt_dev_desc }, 171 { "INT3434", (unsigned long)&lpt_uart_dev_desc }, 172 { "INT3435", (unsigned long)&lpt_uart_dev_desc }, 173 { "INT3436", (unsigned long)&lpt_sdio_dev_desc }, 174 { "INT3437", }, 175 176 { } 177 }; 178 179 static int is_memory(struct acpi_resource *res, void *not_used) 180 { 181 struct resource r; 182 return !acpi_dev_resource_memory(res, &r); 183 } 184 185 /* LPSS main clock device. */ 186 static struct platform_device *lpss_clk_dev; 187 188 static inline void lpt_register_clock_device(void) 189 { 190 lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0); 191 } 192 193 static int register_device_clock(struct acpi_device *adev, 194 struct lpss_private_data *pdata) 195 { 196 const struct lpss_device_desc *dev_desc = pdata->dev_desc; 197 struct lpss_shared_clock *shared_clock = dev_desc->shared_clock; 198 struct clk *clk = ERR_PTR(-ENODEV); 199 struct lpss_clk_data *clk_data; 200 const char *parent; 201 202 if (!lpss_clk_dev) 203 lpt_register_clock_device(); 204 205 clk_data = platform_get_drvdata(lpss_clk_dev); 206 if (!clk_data) 207 return -ENODEV; 208 209 if (dev_desc->clkdev_name) { 210 clk_register_clkdev(clk_data->clk, dev_desc->clkdev_name, 211 dev_name(&adev->dev)); 212 return 0; 213 } 214 215 if (!pdata->mmio_base 216 || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE) 217 return -ENODATA; 218 219 parent = clk_data->name; 220 221 if (shared_clock) { 222 clk = shared_clock->clk; 223 if (!clk) { 224 clk = clk_register_fixed_rate(NULL, shared_clock->name, 225 "lpss_clk", 0, 226 shared_clock->rate); 227 shared_clock->clk = clk; 228 } 229 parent = shared_clock->name; 230 } 231 232 if (dev_desc->clk_gate) { 233 clk = clk_register_gate(NULL, dev_name(&adev->dev), parent, 0, 234 pdata->mmio_base + dev_desc->prv_offset, 235 0, 0, NULL); 236 pdata->clk = clk; 237 } 238 239 if (IS_ERR(clk)) 240 return PTR_ERR(clk); 241 242 clk_register_clkdev(clk, NULL, dev_name(&adev->dev)); 243 return 0; 244 } 245 246 static int acpi_lpss_create_device(struct acpi_device *adev, 247 const struct acpi_device_id *id) 248 { 249 struct lpss_device_desc *dev_desc; 250 struct lpss_private_data *pdata; 251 struct resource_list_entry *rentry; 252 struct list_head resource_list; 253 int ret; 254 255 dev_desc = (struct lpss_device_desc *)id->driver_data; 256 if (!dev_desc) 257 return acpi_create_platform_device(adev, id); 258 259 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); 260 if (!pdata) 261 return -ENOMEM; 262 263 INIT_LIST_HEAD(&resource_list); 264 ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL); 265 if (ret < 0) 266 goto err_out; 267 268 list_for_each_entry(rentry, &resource_list, node) 269 if (resource_type(&rentry->res) == IORESOURCE_MEM) { 270 if (dev_desc->prv_size_override) 271 pdata->mmio_size = dev_desc->prv_size_override; 272 else 273 pdata->mmio_size = resource_size(&rentry->res); 274 pdata->mmio_base = ioremap(rentry->res.start, 275 pdata->mmio_size); 276 break; 277 } 278 279 acpi_dev_free_resource_list(&resource_list); 280 281 pdata->dev_desc = dev_desc; 282 283 if (dev_desc->clk_required) { 284 ret = register_device_clock(adev, pdata); 285 if (ret) { 286 /* Skip the device, but continue the namespace scan. */ 287 ret = 0; 288 goto err_out; 289 } 290 } 291 292 /* 293 * This works around a known issue in ACPI tables where LPSS devices 294 * have _PS0 and _PS3 without _PSC (and no power resources), so 295 * acpi_bus_init_power() will assume that the BIOS has put them into D0. 296 */ 297 ret = acpi_device_fix_up_power(adev); 298 if (ret) { 299 /* Skip the device, but continue the namespace scan. */ 300 ret = 0; 301 goto err_out; 302 } 303 304 if (dev_desc->setup) 305 dev_desc->setup(pdata); 306 307 adev->driver_data = pdata; 308 ret = acpi_create_platform_device(adev, id); 309 if (ret > 0) 310 return ret; 311 312 adev->driver_data = NULL; 313 314 err_out: 315 kfree(pdata); 316 return ret; 317 } 318 319 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val) 320 { 321 struct acpi_device *adev; 322 struct lpss_private_data *pdata; 323 unsigned long flags; 324 int ret; 325 326 ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev); 327 if (WARN_ON(ret)) 328 return ret; 329 330 spin_lock_irqsave(&dev->power.lock, flags); 331 if (pm_runtime_suspended(dev)) { 332 ret = -EAGAIN; 333 goto out; 334 } 335 pdata = acpi_driver_data(adev); 336 if (WARN_ON(!pdata || !pdata->mmio_base)) { 337 ret = -ENODEV; 338 goto out; 339 } 340 *val = readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg); 341 342 out: 343 spin_unlock_irqrestore(&dev->power.lock, flags); 344 return ret; 345 } 346 347 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr, 348 char *buf) 349 { 350 u32 ltr_value = 0; 351 unsigned int reg; 352 int ret; 353 354 reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR; 355 ret = lpss_reg_read(dev, reg, <r_value); 356 if (ret) 357 return ret; 358 359 return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value); 360 } 361 362 static ssize_t lpss_ltr_mode_show(struct device *dev, 363 struct device_attribute *attr, char *buf) 364 { 365 u32 ltr_mode = 0; 366 char *outstr; 367 int ret; 368 369 ret = lpss_reg_read(dev, LPSS_GENERAL, <r_mode); 370 if (ret) 371 return ret; 372 373 outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto"; 374 return sprintf(buf, "%s\n", outstr); 375 } 376 377 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL); 378 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL); 379 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL); 380 381 static struct attribute *lpss_attrs[] = { 382 &dev_attr_auto_ltr.attr, 383 &dev_attr_sw_ltr.attr, 384 &dev_attr_ltr_mode.attr, 385 NULL, 386 }; 387 388 static struct attribute_group lpss_attr_group = { 389 .attrs = lpss_attrs, 390 .name = "lpss_ltr", 391 }; 392 393 static int acpi_lpss_platform_notify(struct notifier_block *nb, 394 unsigned long action, void *data) 395 { 396 struct platform_device *pdev = to_platform_device(data); 397 struct lpss_private_data *pdata; 398 struct acpi_device *adev; 399 const struct acpi_device_id *id; 400 int ret = 0; 401 402 id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev); 403 if (!id || !id->driver_data) 404 return 0; 405 406 if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev)) 407 return 0; 408 409 pdata = acpi_driver_data(adev); 410 if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required) 411 return 0; 412 413 if (pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) { 414 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n"); 415 return 0; 416 } 417 418 if (action == BUS_NOTIFY_ADD_DEVICE) 419 ret = sysfs_create_group(&pdev->dev.kobj, &lpss_attr_group); 420 else if (action == BUS_NOTIFY_DEL_DEVICE) 421 sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group); 422 423 return ret; 424 } 425 426 static struct notifier_block acpi_lpss_nb = { 427 .notifier_call = acpi_lpss_platform_notify, 428 }; 429 430 static struct acpi_scan_handler lpss_handler = { 431 .ids = acpi_lpss_device_ids, 432 .attach = acpi_lpss_create_device, 433 }; 434 435 void __init acpi_lpss_init(void) 436 { 437 if (!lpt_clk_init()) { 438 bus_register_notifier(&platform_bus_type, &acpi_lpss_nb); 439 acpi_scan_add_handler(&lpss_handler); 440 } 441 } 442