1 /* 2 * ACPI support for Intel Lynxpoint LPSS. 3 * 4 * Copyright (C) 2013, Intel Corporation 5 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com> 6 * Rafael J. Wysocki <rafael.j.wysocki@intel.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/acpi.h> 14 #include <linux/clk.h> 15 #include <linux/clkdev.h> 16 #include <linux/clk-provider.h> 17 #include <linux/err.h> 18 #include <linux/io.h> 19 #include <linux/platform_device.h> 20 #include <linux/platform_data/clk-lpss.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/delay.h> 23 24 #include "internal.h" 25 26 ACPI_MODULE_NAME("acpi_lpss"); 27 28 #ifdef CONFIG_X86_INTEL_LPSS 29 30 #define LPSS_ADDR(desc) ((unsigned long)&desc) 31 32 #define LPSS_CLK_SIZE 0x04 33 #define LPSS_LTR_SIZE 0x18 34 35 /* Offsets relative to LPSS_PRIVATE_OFFSET */ 36 #define LPSS_CLK_DIVIDER_DEF_MASK (BIT(1) | BIT(16)) 37 #define LPSS_RESETS 0x04 38 #define LPSS_RESETS_RESET_FUNC BIT(0) 39 #define LPSS_RESETS_RESET_APB BIT(1) 40 #define LPSS_GENERAL 0x08 41 #define LPSS_GENERAL_LTR_MODE_SW BIT(2) 42 #define LPSS_GENERAL_UART_RTS_OVRD BIT(3) 43 #define LPSS_SW_LTR 0x10 44 #define LPSS_AUTO_LTR 0x14 45 #define LPSS_LTR_SNOOP_REQ BIT(15) 46 #define LPSS_LTR_SNOOP_MASK 0x0000FFFF 47 #define LPSS_LTR_SNOOP_LAT_1US 0x800 48 #define LPSS_LTR_SNOOP_LAT_32US 0xC00 49 #define LPSS_LTR_SNOOP_LAT_SHIFT 5 50 #define LPSS_LTR_SNOOP_LAT_CUTOFF 3000 51 #define LPSS_LTR_MAX_VAL 0x3FF 52 #define LPSS_TX_INT 0x20 53 #define LPSS_TX_INT_MASK BIT(1) 54 55 #define LPSS_PRV_REG_COUNT 9 56 57 /* LPSS Flags */ 58 #define LPSS_CLK BIT(0) 59 #define LPSS_CLK_GATE BIT(1) 60 #define LPSS_CLK_DIVIDER BIT(2) 61 #define LPSS_LTR BIT(3) 62 #define LPSS_SAVE_CTX BIT(4) 63 64 struct lpss_private_data; 65 66 struct lpss_device_desc { 67 unsigned int flags; 68 unsigned int prv_offset; 69 size_t prv_size_override; 70 void (*setup)(struct lpss_private_data *pdata); 71 }; 72 73 static struct lpss_device_desc lpss_dma_desc = { 74 .flags = LPSS_CLK, 75 }; 76 77 struct lpss_private_data { 78 void __iomem *mmio_base; 79 resource_size_t mmio_size; 80 unsigned int fixed_clk_rate; 81 struct clk *clk; 82 const struct lpss_device_desc *dev_desc; 83 u32 prv_reg_ctx[LPSS_PRV_REG_COUNT]; 84 }; 85 86 /* UART Component Parameter Register */ 87 #define LPSS_UART_CPR 0xF4 88 #define LPSS_UART_CPR_AFCE BIT(4) 89 90 static void lpss_uart_setup(struct lpss_private_data *pdata) 91 { 92 unsigned int offset; 93 u32 val; 94 95 offset = pdata->dev_desc->prv_offset + LPSS_TX_INT; 96 val = readl(pdata->mmio_base + offset); 97 writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset); 98 99 val = readl(pdata->mmio_base + LPSS_UART_CPR); 100 if (!(val & LPSS_UART_CPR_AFCE)) { 101 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL; 102 val = readl(pdata->mmio_base + offset); 103 val |= LPSS_GENERAL_UART_RTS_OVRD; 104 writel(val, pdata->mmio_base + offset); 105 } 106 } 107 108 static void lpss_deassert_reset(struct lpss_private_data *pdata) 109 { 110 unsigned int offset; 111 u32 val; 112 113 offset = pdata->dev_desc->prv_offset + LPSS_RESETS; 114 val = readl(pdata->mmio_base + offset); 115 val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC; 116 writel(val, pdata->mmio_base + offset); 117 } 118 119 #define LPSS_I2C_ENABLE 0x6c 120 121 static void byt_i2c_setup(struct lpss_private_data *pdata) 122 { 123 lpss_deassert_reset(pdata); 124 125 if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset)) 126 pdata->fixed_clk_rate = 133000000; 127 128 writel(0, pdata->mmio_base + LPSS_I2C_ENABLE); 129 } 130 131 static struct lpss_device_desc lpt_dev_desc = { 132 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR, 133 .prv_offset = 0x800, 134 }; 135 136 static struct lpss_device_desc lpt_i2c_dev_desc = { 137 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR, 138 .prv_offset = 0x800, 139 }; 140 141 static struct lpss_device_desc lpt_uart_dev_desc = { 142 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR, 143 .prv_offset = 0x800, 144 .setup = lpss_uart_setup, 145 }; 146 147 static struct lpss_device_desc lpt_sdio_dev_desc = { 148 .flags = LPSS_LTR, 149 .prv_offset = 0x1000, 150 .prv_size_override = 0x1018, 151 }; 152 153 static struct lpss_device_desc byt_pwm_dev_desc = { 154 .flags = LPSS_SAVE_CTX, 155 }; 156 157 static struct lpss_device_desc byt_uart_dev_desc = { 158 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX, 159 .prv_offset = 0x800, 160 .setup = lpss_uart_setup, 161 }; 162 163 static struct lpss_device_desc byt_spi_dev_desc = { 164 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX, 165 .prv_offset = 0x400, 166 }; 167 168 static struct lpss_device_desc byt_sdio_dev_desc = { 169 .flags = LPSS_CLK, 170 }; 171 172 static struct lpss_device_desc byt_i2c_dev_desc = { 173 .flags = LPSS_CLK | LPSS_SAVE_CTX, 174 .prv_offset = 0x800, 175 .setup = byt_i2c_setup, 176 }; 177 178 static struct lpss_device_desc bsw_spi_dev_desc = { 179 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX, 180 .prv_offset = 0x400, 181 .setup = lpss_deassert_reset, 182 }; 183 184 #else 185 186 #define LPSS_ADDR(desc) (0UL) 187 188 #endif /* CONFIG_X86_INTEL_LPSS */ 189 190 static const struct acpi_device_id acpi_lpss_device_ids[] = { 191 /* Generic LPSS devices */ 192 { "INTL9C60", LPSS_ADDR(lpss_dma_desc) }, 193 194 /* Lynxpoint LPSS devices */ 195 { "INT33C0", LPSS_ADDR(lpt_dev_desc) }, 196 { "INT33C1", LPSS_ADDR(lpt_dev_desc) }, 197 { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) }, 198 { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) }, 199 { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) }, 200 { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) }, 201 { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) }, 202 { "INT33C7", }, 203 204 /* BayTrail LPSS devices */ 205 { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) }, 206 { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) }, 207 { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) }, 208 { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) }, 209 { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) }, 210 { "INT33B2", }, 211 { "INT33FC", }, 212 213 /* Braswell LPSS devices */ 214 { "80862288", LPSS_ADDR(byt_pwm_dev_desc) }, 215 { "8086228A", LPSS_ADDR(byt_uart_dev_desc) }, 216 { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) }, 217 { "808622C1", LPSS_ADDR(byt_i2c_dev_desc) }, 218 219 { "INT3430", LPSS_ADDR(lpt_dev_desc) }, 220 { "INT3431", LPSS_ADDR(lpt_dev_desc) }, 221 { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) }, 222 { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) }, 223 { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) }, 224 { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) }, 225 { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) }, 226 { "INT3437", }, 227 228 /* Wildcat Point LPSS devices */ 229 { "INT3438", LPSS_ADDR(lpt_dev_desc) }, 230 231 { } 232 }; 233 234 #ifdef CONFIG_X86_INTEL_LPSS 235 236 static int is_memory(struct acpi_resource *res, void *not_used) 237 { 238 struct resource r; 239 return !acpi_dev_resource_memory(res, &r); 240 } 241 242 /* LPSS main clock device. */ 243 static struct platform_device *lpss_clk_dev; 244 245 static inline void lpt_register_clock_device(void) 246 { 247 lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0); 248 } 249 250 static int register_device_clock(struct acpi_device *adev, 251 struct lpss_private_data *pdata) 252 { 253 const struct lpss_device_desc *dev_desc = pdata->dev_desc; 254 const char *devname = dev_name(&adev->dev); 255 struct clk *clk = ERR_PTR(-ENODEV); 256 struct lpss_clk_data *clk_data; 257 const char *parent, *clk_name; 258 void __iomem *prv_base; 259 260 if (!lpss_clk_dev) 261 lpt_register_clock_device(); 262 263 clk_data = platform_get_drvdata(lpss_clk_dev); 264 if (!clk_data) 265 return -ENODEV; 266 clk = clk_data->clk; 267 268 if (!pdata->mmio_base 269 || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE) 270 return -ENODATA; 271 272 parent = clk_data->name; 273 prv_base = pdata->mmio_base + dev_desc->prv_offset; 274 275 if (pdata->fixed_clk_rate) { 276 clk = clk_register_fixed_rate(NULL, devname, parent, 0, 277 pdata->fixed_clk_rate); 278 goto out; 279 } 280 281 if (dev_desc->flags & LPSS_CLK_GATE) { 282 clk = clk_register_gate(NULL, devname, parent, 0, 283 prv_base, 0, 0, NULL); 284 parent = devname; 285 } 286 287 if (dev_desc->flags & LPSS_CLK_DIVIDER) { 288 /* Prevent division by zero */ 289 if (!readl(prv_base)) 290 writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base); 291 292 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname); 293 if (!clk_name) 294 return -ENOMEM; 295 clk = clk_register_fractional_divider(NULL, clk_name, parent, 296 0, prv_base, 297 1, 15, 16, 15, 0, NULL); 298 parent = clk_name; 299 300 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname); 301 if (!clk_name) { 302 kfree(parent); 303 return -ENOMEM; 304 } 305 clk = clk_register_gate(NULL, clk_name, parent, 306 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, 307 prv_base, 31, 0, NULL); 308 kfree(parent); 309 kfree(clk_name); 310 } 311 out: 312 if (IS_ERR(clk)) 313 return PTR_ERR(clk); 314 315 pdata->clk = clk; 316 clk_register_clkdev(clk, NULL, devname); 317 return 0; 318 } 319 320 static int acpi_lpss_create_device(struct acpi_device *adev, 321 const struct acpi_device_id *id) 322 { 323 struct lpss_device_desc *dev_desc; 324 struct lpss_private_data *pdata; 325 struct resource_entry *rentry; 326 struct list_head resource_list; 327 struct platform_device *pdev; 328 int ret; 329 330 dev_desc = (struct lpss_device_desc *)id->driver_data; 331 if (!dev_desc) { 332 pdev = acpi_create_platform_device(adev); 333 return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1; 334 } 335 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); 336 if (!pdata) 337 return -ENOMEM; 338 339 INIT_LIST_HEAD(&resource_list); 340 ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL); 341 if (ret < 0) 342 goto err_out; 343 344 list_for_each_entry(rentry, &resource_list, node) 345 if (resource_type(rentry->res) == IORESOURCE_MEM) { 346 if (dev_desc->prv_size_override) 347 pdata->mmio_size = dev_desc->prv_size_override; 348 else 349 pdata->mmio_size = resource_size(rentry->res); 350 pdata->mmio_base = ioremap(rentry->res->start, 351 pdata->mmio_size); 352 if (!pdata->mmio_base) 353 goto err_out; 354 break; 355 } 356 357 acpi_dev_free_resource_list(&resource_list); 358 359 pdata->dev_desc = dev_desc; 360 361 if (dev_desc->setup) 362 dev_desc->setup(pdata); 363 364 if (dev_desc->flags & LPSS_CLK) { 365 ret = register_device_clock(adev, pdata); 366 if (ret) { 367 /* Skip the device, but continue the namespace scan. */ 368 ret = 0; 369 goto err_out; 370 } 371 } 372 373 /* 374 * This works around a known issue in ACPI tables where LPSS devices 375 * have _PS0 and _PS3 without _PSC (and no power resources), so 376 * acpi_bus_init_power() will assume that the BIOS has put them into D0. 377 */ 378 ret = acpi_device_fix_up_power(adev); 379 if (ret) { 380 /* Skip the device, but continue the namespace scan. */ 381 ret = 0; 382 goto err_out; 383 } 384 385 adev->driver_data = pdata; 386 pdev = acpi_create_platform_device(adev); 387 if (!IS_ERR_OR_NULL(pdev)) { 388 return 1; 389 } 390 391 ret = PTR_ERR(pdev); 392 adev->driver_data = NULL; 393 394 err_out: 395 kfree(pdata); 396 return ret; 397 } 398 399 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg) 400 { 401 return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg); 402 } 403 404 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata, 405 unsigned int reg) 406 { 407 writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg); 408 } 409 410 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val) 411 { 412 struct acpi_device *adev; 413 struct lpss_private_data *pdata; 414 unsigned long flags; 415 int ret; 416 417 ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev); 418 if (WARN_ON(ret)) 419 return ret; 420 421 spin_lock_irqsave(&dev->power.lock, flags); 422 if (pm_runtime_suspended(dev)) { 423 ret = -EAGAIN; 424 goto out; 425 } 426 pdata = acpi_driver_data(adev); 427 if (WARN_ON(!pdata || !pdata->mmio_base)) { 428 ret = -ENODEV; 429 goto out; 430 } 431 *val = __lpss_reg_read(pdata, reg); 432 433 out: 434 spin_unlock_irqrestore(&dev->power.lock, flags); 435 return ret; 436 } 437 438 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr, 439 char *buf) 440 { 441 u32 ltr_value = 0; 442 unsigned int reg; 443 int ret; 444 445 reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR; 446 ret = lpss_reg_read(dev, reg, <r_value); 447 if (ret) 448 return ret; 449 450 return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value); 451 } 452 453 static ssize_t lpss_ltr_mode_show(struct device *dev, 454 struct device_attribute *attr, char *buf) 455 { 456 u32 ltr_mode = 0; 457 char *outstr; 458 int ret; 459 460 ret = lpss_reg_read(dev, LPSS_GENERAL, <r_mode); 461 if (ret) 462 return ret; 463 464 outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto"; 465 return sprintf(buf, "%s\n", outstr); 466 } 467 468 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL); 469 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL); 470 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL); 471 472 static struct attribute *lpss_attrs[] = { 473 &dev_attr_auto_ltr.attr, 474 &dev_attr_sw_ltr.attr, 475 &dev_attr_ltr_mode.attr, 476 NULL, 477 }; 478 479 static struct attribute_group lpss_attr_group = { 480 .attrs = lpss_attrs, 481 .name = "lpss_ltr", 482 }; 483 484 static void acpi_lpss_set_ltr(struct device *dev, s32 val) 485 { 486 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 487 u32 ltr_mode, ltr_val; 488 489 ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL); 490 if (val < 0) { 491 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) { 492 ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW; 493 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL); 494 } 495 return; 496 } 497 ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK; 498 if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) { 499 ltr_val |= LPSS_LTR_SNOOP_LAT_32US; 500 val = LPSS_LTR_MAX_VAL; 501 } else if (val > LPSS_LTR_MAX_VAL) { 502 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ; 503 val >>= LPSS_LTR_SNOOP_LAT_SHIFT; 504 } else { 505 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ; 506 } 507 ltr_val |= val; 508 __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR); 509 if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) { 510 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW; 511 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL); 512 } 513 } 514 515 #ifdef CONFIG_PM 516 /** 517 * acpi_lpss_save_ctx() - Save the private registers of LPSS device 518 * @dev: LPSS device 519 * @pdata: pointer to the private data of the LPSS device 520 * 521 * Most LPSS devices have private registers which may loose their context when 522 * the device is powered down. acpi_lpss_save_ctx() saves those registers into 523 * prv_reg_ctx array. 524 */ 525 static void acpi_lpss_save_ctx(struct device *dev, 526 struct lpss_private_data *pdata) 527 { 528 unsigned int i; 529 530 for (i = 0; i < LPSS_PRV_REG_COUNT; i++) { 531 unsigned long offset = i * sizeof(u32); 532 533 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset); 534 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n", 535 pdata->prv_reg_ctx[i], offset); 536 } 537 } 538 539 /** 540 * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device 541 * @dev: LPSS device 542 * @pdata: pointer to the private data of the LPSS device 543 * 544 * Restores the registers that were previously stored with acpi_lpss_save_ctx(). 545 */ 546 static void acpi_lpss_restore_ctx(struct device *dev, 547 struct lpss_private_data *pdata) 548 { 549 unsigned int i; 550 551 /* 552 * The following delay is needed or the subsequent write operations may 553 * fail. The LPSS devices are actually PCI devices and the PCI spec 554 * expects 10ms delay before the device can be accessed after D3 to D0 555 * transition. 556 */ 557 msleep(10); 558 559 for (i = 0; i < LPSS_PRV_REG_COUNT; i++) { 560 unsigned long offset = i * sizeof(u32); 561 562 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset); 563 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n", 564 pdata->prv_reg_ctx[i], offset); 565 } 566 } 567 568 #ifdef CONFIG_PM_SLEEP 569 static int acpi_lpss_suspend_late(struct device *dev) 570 { 571 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 572 int ret; 573 574 ret = pm_generic_suspend_late(dev); 575 if (ret) 576 return ret; 577 578 if (pdata->dev_desc->flags & LPSS_SAVE_CTX) 579 acpi_lpss_save_ctx(dev, pdata); 580 581 return acpi_dev_suspend_late(dev); 582 } 583 584 static int acpi_lpss_resume_early(struct device *dev) 585 { 586 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 587 int ret; 588 589 ret = acpi_dev_resume_early(dev); 590 if (ret) 591 return ret; 592 593 if (pdata->dev_desc->flags & LPSS_SAVE_CTX) 594 acpi_lpss_restore_ctx(dev, pdata); 595 596 return pm_generic_resume_early(dev); 597 } 598 #endif /* CONFIG_PM_SLEEP */ 599 600 static int acpi_lpss_runtime_suspend(struct device *dev) 601 { 602 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 603 int ret; 604 605 ret = pm_generic_runtime_suspend(dev); 606 if (ret) 607 return ret; 608 609 if (pdata->dev_desc->flags & LPSS_SAVE_CTX) 610 acpi_lpss_save_ctx(dev, pdata); 611 612 return acpi_dev_runtime_suspend(dev); 613 } 614 615 static int acpi_lpss_runtime_resume(struct device *dev) 616 { 617 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 618 int ret; 619 620 ret = acpi_dev_runtime_resume(dev); 621 if (ret) 622 return ret; 623 624 if (pdata->dev_desc->flags & LPSS_SAVE_CTX) 625 acpi_lpss_restore_ctx(dev, pdata); 626 627 return pm_generic_runtime_resume(dev); 628 } 629 #endif /* CONFIG_PM */ 630 631 static struct dev_pm_domain acpi_lpss_pm_domain = { 632 .ops = { 633 #ifdef CONFIG_PM 634 #ifdef CONFIG_PM_SLEEP 635 .prepare = acpi_subsys_prepare, 636 .complete = acpi_subsys_complete, 637 .suspend = acpi_subsys_suspend, 638 .suspend_late = acpi_lpss_suspend_late, 639 .resume_early = acpi_lpss_resume_early, 640 .freeze = acpi_subsys_freeze, 641 .poweroff = acpi_subsys_suspend, 642 .poweroff_late = acpi_lpss_suspend_late, 643 .restore_early = acpi_lpss_resume_early, 644 #endif 645 .runtime_suspend = acpi_lpss_runtime_suspend, 646 .runtime_resume = acpi_lpss_runtime_resume, 647 #endif 648 }, 649 }; 650 651 static int acpi_lpss_platform_notify(struct notifier_block *nb, 652 unsigned long action, void *data) 653 { 654 struct platform_device *pdev = to_platform_device(data); 655 struct lpss_private_data *pdata; 656 struct acpi_device *adev; 657 const struct acpi_device_id *id; 658 659 id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev); 660 if (!id || !id->driver_data) 661 return 0; 662 663 if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev)) 664 return 0; 665 666 pdata = acpi_driver_data(adev); 667 if (!pdata) 668 return 0; 669 670 if (pdata->mmio_base && 671 pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) { 672 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n"); 673 return 0; 674 } 675 676 switch (action) { 677 case BUS_NOTIFY_ADD_DEVICE: 678 pdev->dev.pm_domain = &acpi_lpss_pm_domain; 679 if (pdata->dev_desc->flags & LPSS_LTR) 680 return sysfs_create_group(&pdev->dev.kobj, 681 &lpss_attr_group); 682 break; 683 case BUS_NOTIFY_DEL_DEVICE: 684 if (pdata->dev_desc->flags & LPSS_LTR) 685 sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group); 686 pdev->dev.pm_domain = NULL; 687 break; 688 default: 689 break; 690 } 691 692 return 0; 693 } 694 695 static struct notifier_block acpi_lpss_nb = { 696 .notifier_call = acpi_lpss_platform_notify, 697 }; 698 699 static void acpi_lpss_bind(struct device *dev) 700 { 701 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev)); 702 703 if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR)) 704 return; 705 706 if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) 707 dev->power.set_latency_tolerance = acpi_lpss_set_ltr; 708 else 709 dev_err(dev, "MMIO size insufficient to access LTR\n"); 710 } 711 712 static void acpi_lpss_unbind(struct device *dev) 713 { 714 dev->power.set_latency_tolerance = NULL; 715 } 716 717 static struct acpi_scan_handler lpss_handler = { 718 .ids = acpi_lpss_device_ids, 719 .attach = acpi_lpss_create_device, 720 .bind = acpi_lpss_bind, 721 .unbind = acpi_lpss_unbind, 722 }; 723 724 void __init acpi_lpss_init(void) 725 { 726 if (!lpt_clk_init()) { 727 bus_register_notifier(&platform_bus_type, &acpi_lpss_nb); 728 acpi_scan_add_handler(&lpss_handler); 729 } 730 } 731 732 #else 733 734 static struct acpi_scan_handler lpss_handler = { 735 .ids = acpi_lpss_device_ids, 736 }; 737 738 void __init acpi_lpss_init(void) 739 { 740 acpi_scan_add_handler(&lpss_handler); 741 } 742 743 #endif /* CONFIG_X86_INTEL_LPSS */ 744