1 // SPDX-License-Identifier: GPL-2.0-only 2 3 /* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved. */ 4 /* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */ 5 6 #include <linux/delay.h> 7 #include <linux/dma-mapping.h> 8 #include <linux/idr.h> 9 #include <linux/interrupt.h> 10 #include <linux/list.h> 11 #include <linux/kref.h> 12 #include <linux/mhi.h> 13 #include <linux/module.h> 14 #include <linux/msi.h> 15 #include <linux/mutex.h> 16 #include <linux/pci.h> 17 #include <linux/spinlock.h> 18 #include <linux/workqueue.h> 19 #include <linux/wait.h> 20 #include <drm/drm_accel.h> 21 #include <drm/drm_drv.h> 22 #include <drm/drm_file.h> 23 #include <drm/drm_gem.h> 24 #include <drm/drm_ioctl.h> 25 #include <uapi/drm/qaic_accel.h> 26 27 #include "mhi_controller.h" 28 #include "mhi_qaic_ctrl.h" 29 #include "qaic.h" 30 31 MODULE_IMPORT_NS(DMA_BUF); 32 33 #define PCI_DEV_AIC100 0xa100 34 #define QAIC_NAME "qaic" 35 #define QAIC_DESC "Qualcomm Cloud AI Accelerators" 36 #define CNTL_MAJOR 5 37 #define CNTL_MINOR 0 38 39 bool datapath_polling; 40 module_param(datapath_polling, bool, 0400); 41 MODULE_PARM_DESC(datapath_polling, "Operate the datapath in polling mode"); 42 static bool link_up; 43 static DEFINE_IDA(qaic_usrs); 44 45 static int qaic_create_drm_device(struct qaic_device *qdev, s32 partition_id); 46 static void qaic_destroy_drm_device(struct qaic_device *qdev, s32 partition_id); 47 48 static void free_usr(struct kref *kref) 49 { 50 struct qaic_user *usr = container_of(kref, struct qaic_user, ref_count); 51 52 cleanup_srcu_struct(&usr->qddev_lock); 53 ida_free(&qaic_usrs, usr->handle); 54 kfree(usr); 55 } 56 57 static int qaic_open(struct drm_device *dev, struct drm_file *file) 58 { 59 struct qaic_drm_device *qddev = dev->dev_private; 60 struct qaic_device *qdev = qddev->qdev; 61 struct qaic_user *usr; 62 int rcu_id; 63 int ret; 64 65 rcu_id = srcu_read_lock(&qdev->dev_lock); 66 if (qdev->in_reset) { 67 ret = -ENODEV; 68 goto dev_unlock; 69 } 70 71 usr = kmalloc(sizeof(*usr), GFP_KERNEL); 72 if (!usr) { 73 ret = -ENOMEM; 74 goto dev_unlock; 75 } 76 77 usr->handle = ida_alloc(&qaic_usrs, GFP_KERNEL); 78 if (usr->handle < 0) { 79 ret = usr->handle; 80 goto free_usr; 81 } 82 usr->qddev = qddev; 83 atomic_set(&usr->chunk_id, 0); 84 init_srcu_struct(&usr->qddev_lock); 85 kref_init(&usr->ref_count); 86 87 ret = mutex_lock_interruptible(&qddev->users_mutex); 88 if (ret) 89 goto cleanup_usr; 90 91 list_add(&usr->node, &qddev->users); 92 mutex_unlock(&qddev->users_mutex); 93 94 file->driver_priv = usr; 95 96 srcu_read_unlock(&qdev->dev_lock, rcu_id); 97 return 0; 98 99 cleanup_usr: 100 cleanup_srcu_struct(&usr->qddev_lock); 101 free_usr: 102 kfree(usr); 103 dev_unlock: 104 srcu_read_unlock(&qdev->dev_lock, rcu_id); 105 return ret; 106 } 107 108 static void qaic_postclose(struct drm_device *dev, struct drm_file *file) 109 { 110 struct qaic_user *usr = file->driver_priv; 111 struct qaic_drm_device *qddev; 112 struct qaic_device *qdev; 113 int qdev_rcu_id; 114 int usr_rcu_id; 115 int i; 116 117 qddev = usr->qddev; 118 usr_rcu_id = srcu_read_lock(&usr->qddev_lock); 119 if (qddev) { 120 qdev = qddev->qdev; 121 qdev_rcu_id = srcu_read_lock(&qdev->dev_lock); 122 if (!qdev->in_reset) { 123 qaic_release_usr(qdev, usr); 124 for (i = 0; i < qdev->num_dbc; ++i) 125 if (qdev->dbc[i].usr && qdev->dbc[i].usr->handle == usr->handle) 126 release_dbc(qdev, i); 127 } 128 srcu_read_unlock(&qdev->dev_lock, qdev_rcu_id); 129 130 mutex_lock(&qddev->users_mutex); 131 if (!list_empty(&usr->node)) 132 list_del_init(&usr->node); 133 mutex_unlock(&qddev->users_mutex); 134 } 135 136 srcu_read_unlock(&usr->qddev_lock, usr_rcu_id); 137 kref_put(&usr->ref_count, free_usr); 138 139 file->driver_priv = NULL; 140 } 141 142 DEFINE_DRM_ACCEL_FOPS(qaic_accel_fops); 143 144 static const struct drm_ioctl_desc qaic_drm_ioctls[] = { 145 DRM_IOCTL_DEF_DRV(QAIC_MANAGE, qaic_manage_ioctl, 0), 146 DRM_IOCTL_DEF_DRV(QAIC_CREATE_BO, qaic_create_bo_ioctl, 0), 147 DRM_IOCTL_DEF_DRV(QAIC_MMAP_BO, qaic_mmap_bo_ioctl, 0), 148 DRM_IOCTL_DEF_DRV(QAIC_ATTACH_SLICE_BO, qaic_attach_slice_bo_ioctl, 0), 149 DRM_IOCTL_DEF_DRV(QAIC_EXECUTE_BO, qaic_execute_bo_ioctl, 0), 150 DRM_IOCTL_DEF_DRV(QAIC_PARTIAL_EXECUTE_BO, qaic_partial_execute_bo_ioctl, 0), 151 DRM_IOCTL_DEF_DRV(QAIC_WAIT_BO, qaic_wait_bo_ioctl, 0), 152 DRM_IOCTL_DEF_DRV(QAIC_PERF_STATS_BO, qaic_perf_stats_bo_ioctl, 0), 153 }; 154 155 static const struct drm_driver qaic_accel_driver = { 156 .driver_features = DRIVER_GEM | DRIVER_COMPUTE_ACCEL, 157 158 .name = QAIC_NAME, 159 .desc = QAIC_DESC, 160 .date = "20190618", 161 162 .fops = &qaic_accel_fops, 163 .open = qaic_open, 164 .postclose = qaic_postclose, 165 166 .ioctls = qaic_drm_ioctls, 167 .num_ioctls = ARRAY_SIZE(qaic_drm_ioctls), 168 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 169 .gem_prime_import = qaic_gem_prime_import, 170 }; 171 172 static int qaic_create_drm_device(struct qaic_device *qdev, s32 partition_id) 173 { 174 struct qaic_drm_device *qddev; 175 struct drm_device *ddev; 176 struct device *pdev; 177 int ret; 178 179 /* Hold off implementing partitions until the uapi is determined */ 180 if (partition_id != QAIC_NO_PARTITION) 181 return -EINVAL; 182 183 pdev = &qdev->pdev->dev; 184 185 qddev = kzalloc(sizeof(*qddev), GFP_KERNEL); 186 if (!qddev) 187 return -ENOMEM; 188 189 ddev = drm_dev_alloc(&qaic_accel_driver, pdev); 190 if (IS_ERR(ddev)) { 191 ret = PTR_ERR(ddev); 192 goto ddev_fail; 193 } 194 195 ddev->dev_private = qddev; 196 qddev->ddev = ddev; 197 198 qddev->qdev = qdev; 199 qddev->partition_id = partition_id; 200 INIT_LIST_HEAD(&qddev->users); 201 mutex_init(&qddev->users_mutex); 202 203 qdev->qddev = qddev; 204 205 ret = drm_dev_register(ddev, 0); 206 if (ret) { 207 pci_dbg(qdev->pdev, "%s: drm_dev_register failed %d\n", __func__, ret); 208 goto drm_reg_fail; 209 } 210 211 return 0; 212 213 drm_reg_fail: 214 mutex_destroy(&qddev->users_mutex); 215 qdev->qddev = NULL; 216 drm_dev_put(ddev); 217 ddev_fail: 218 kfree(qddev); 219 return ret; 220 } 221 222 static void qaic_destroy_drm_device(struct qaic_device *qdev, s32 partition_id) 223 { 224 struct qaic_drm_device *qddev; 225 struct qaic_user *usr; 226 227 qddev = qdev->qddev; 228 229 /* 230 * Existing users get unresolvable errors till they close FDs. 231 * Need to sync carefully with users calling close(). The 232 * list of users can be modified elsewhere when the lock isn't 233 * held here, but the sync'ing the srcu with the mutex held 234 * could deadlock. Grab the mutex so that the list will be 235 * unmodified. The user we get will exist as long as the 236 * lock is held. Signal that the qcdev is going away, and 237 * grab a reference to the user so they don't go away for 238 * synchronize_srcu(). Then release the mutex to avoid 239 * deadlock and make sure the user has observed the signal. 240 * With the lock released, we cannot maintain any state of the 241 * user list. 242 */ 243 mutex_lock(&qddev->users_mutex); 244 while (!list_empty(&qddev->users)) { 245 usr = list_first_entry(&qddev->users, struct qaic_user, node); 246 list_del_init(&usr->node); 247 kref_get(&usr->ref_count); 248 usr->qddev = NULL; 249 mutex_unlock(&qddev->users_mutex); 250 synchronize_srcu(&usr->qddev_lock); 251 kref_put(&usr->ref_count, free_usr); 252 mutex_lock(&qddev->users_mutex); 253 } 254 mutex_unlock(&qddev->users_mutex); 255 256 if (qddev->ddev) { 257 drm_dev_unregister(qddev->ddev); 258 drm_dev_put(qddev->ddev); 259 } 260 261 kfree(qddev); 262 } 263 264 static int qaic_mhi_probe(struct mhi_device *mhi_dev, const struct mhi_device_id *id) 265 { 266 struct qaic_device *qdev; 267 u16 major, minor; 268 int ret; 269 270 /* 271 * Invoking this function indicates that the control channel to the 272 * device is available. We use that as a signal to indicate that 273 * the device side firmware has booted. The device side firmware 274 * manages the device resources, so we need to communicate with it 275 * via the control channel in order to utilize the device. Therefore 276 * we wait until this signal to create the drm dev that userspace will 277 * use to control the device, because without the device side firmware, 278 * userspace can't do anything useful. 279 */ 280 281 qdev = pci_get_drvdata(to_pci_dev(mhi_dev->mhi_cntrl->cntrl_dev)); 282 283 qdev->in_reset = false; 284 285 dev_set_drvdata(&mhi_dev->dev, qdev); 286 qdev->cntl_ch = mhi_dev; 287 288 ret = qaic_control_open(qdev); 289 if (ret) { 290 pci_dbg(qdev->pdev, "%s: control_open failed %d\n", __func__, ret); 291 return ret; 292 } 293 294 ret = get_cntl_version(qdev, NULL, &major, &minor); 295 if (ret || major != CNTL_MAJOR || minor > CNTL_MINOR) { 296 pci_err(qdev->pdev, "%s: Control protocol version (%d.%d) not supported. Supported version is (%d.%d). Ret: %d\n", 297 __func__, major, minor, CNTL_MAJOR, CNTL_MINOR, ret); 298 ret = -EINVAL; 299 goto close_control; 300 } 301 302 ret = qaic_create_drm_device(qdev, QAIC_NO_PARTITION); 303 304 return ret; 305 306 close_control: 307 qaic_control_close(qdev); 308 return ret; 309 } 310 311 static void qaic_mhi_remove(struct mhi_device *mhi_dev) 312 { 313 /* This is redundant since we have already observed the device crash */ 314 } 315 316 static void qaic_notify_reset(struct qaic_device *qdev) 317 { 318 int i; 319 320 qdev->in_reset = true; 321 /* wake up any waiters to avoid waiting for timeouts at sync */ 322 wake_all_cntl(qdev); 323 for (i = 0; i < qdev->num_dbc; ++i) 324 wakeup_dbc(qdev, i); 325 synchronize_srcu(&qdev->dev_lock); 326 } 327 328 void qaic_dev_reset_clean_local_state(struct qaic_device *qdev, bool exit_reset) 329 { 330 int i; 331 332 qaic_notify_reset(qdev); 333 334 /* remove drmdevs to prevent new users from coming in */ 335 qaic_destroy_drm_device(qdev, QAIC_NO_PARTITION); 336 337 /* start tearing things down */ 338 for (i = 0; i < qdev->num_dbc; ++i) 339 release_dbc(qdev, i); 340 341 if (exit_reset) 342 qdev->in_reset = false; 343 } 344 345 static struct qaic_device *create_qdev(struct pci_dev *pdev, const struct pci_device_id *id) 346 { 347 struct qaic_device *qdev; 348 int i; 349 350 qdev = devm_kzalloc(&pdev->dev, sizeof(*qdev), GFP_KERNEL); 351 if (!qdev) 352 return NULL; 353 354 if (id->device == PCI_DEV_AIC100) { 355 qdev->num_dbc = 16; 356 qdev->dbc = devm_kcalloc(&pdev->dev, qdev->num_dbc, sizeof(*qdev->dbc), GFP_KERNEL); 357 if (!qdev->dbc) 358 return NULL; 359 } 360 361 qdev->cntl_wq = alloc_workqueue("qaic_cntl", WQ_UNBOUND, 0); 362 if (!qdev->cntl_wq) 363 return NULL; 364 365 pci_set_drvdata(pdev, qdev); 366 qdev->pdev = pdev; 367 368 mutex_init(&qdev->cntl_mutex); 369 INIT_LIST_HEAD(&qdev->cntl_xfer_list); 370 init_srcu_struct(&qdev->dev_lock); 371 372 for (i = 0; i < qdev->num_dbc; ++i) { 373 spin_lock_init(&qdev->dbc[i].xfer_lock); 374 qdev->dbc[i].qdev = qdev; 375 qdev->dbc[i].id = i; 376 INIT_LIST_HEAD(&qdev->dbc[i].xfer_list); 377 init_srcu_struct(&qdev->dbc[i].ch_lock); 378 init_waitqueue_head(&qdev->dbc[i].dbc_release); 379 INIT_LIST_HEAD(&qdev->dbc[i].bo_lists); 380 } 381 382 return qdev; 383 } 384 385 static void cleanup_qdev(struct qaic_device *qdev) 386 { 387 int i; 388 389 for (i = 0; i < qdev->num_dbc; ++i) 390 cleanup_srcu_struct(&qdev->dbc[i].ch_lock); 391 cleanup_srcu_struct(&qdev->dev_lock); 392 pci_set_drvdata(qdev->pdev, NULL); 393 destroy_workqueue(qdev->cntl_wq); 394 } 395 396 static int init_pci(struct qaic_device *qdev, struct pci_dev *pdev) 397 { 398 int bars; 399 int ret; 400 401 bars = pci_select_bars(pdev, IORESOURCE_MEM); 402 403 /* make sure the device has the expected BARs */ 404 if (bars != (BIT(0) | BIT(2) | BIT(4))) { 405 pci_dbg(pdev, "%s: expected BARs 0, 2, and 4 not found in device. Found 0x%x\n", 406 __func__, bars); 407 return -EINVAL; 408 } 409 410 ret = pcim_enable_device(pdev); 411 if (ret) 412 return ret; 413 414 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 415 if (ret) 416 return ret; 417 ret = dma_set_max_seg_size(&pdev->dev, UINT_MAX); 418 if (ret) 419 return ret; 420 421 qdev->bar_0 = devm_ioremap_resource(&pdev->dev, &pdev->resource[0]); 422 if (IS_ERR(qdev->bar_0)) 423 return PTR_ERR(qdev->bar_0); 424 425 qdev->bar_2 = devm_ioremap_resource(&pdev->dev, &pdev->resource[2]); 426 if (IS_ERR(qdev->bar_2)) 427 return PTR_ERR(qdev->bar_2); 428 429 /* Managed release since we use pcim_enable_device above */ 430 pci_set_master(pdev); 431 432 return 0; 433 } 434 435 static int init_msi(struct qaic_device *qdev, struct pci_dev *pdev) 436 { 437 int mhi_irq; 438 int ret; 439 int i; 440 441 /* Managed release since we use pcim_enable_device */ 442 ret = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI); 443 if (ret < 0) 444 return ret; 445 446 if (ret < 32) { 447 pci_err(pdev, "%s: Requested 32 MSIs. Obtained %d MSIs which is less than the 32 required.\n", 448 __func__, ret); 449 return -ENODEV; 450 } 451 452 mhi_irq = pci_irq_vector(pdev, 0); 453 if (mhi_irq < 0) 454 return mhi_irq; 455 456 for (i = 0; i < qdev->num_dbc; ++i) { 457 ret = devm_request_threaded_irq(&pdev->dev, pci_irq_vector(pdev, i + 1), 458 dbc_irq_handler, dbc_irq_threaded_fn, IRQF_SHARED, 459 "qaic_dbc", &qdev->dbc[i]); 460 if (ret) 461 return ret; 462 463 if (datapath_polling) { 464 qdev->dbc[i].irq = pci_irq_vector(pdev, i + 1); 465 disable_irq_nosync(qdev->dbc[i].irq); 466 INIT_WORK(&qdev->dbc[i].poll_work, irq_polling_work); 467 } 468 } 469 470 return mhi_irq; 471 } 472 473 static int qaic_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) 474 { 475 struct qaic_device *qdev; 476 int mhi_irq; 477 int ret; 478 int i; 479 480 qdev = create_qdev(pdev, id); 481 if (!qdev) 482 return -ENOMEM; 483 484 ret = init_pci(qdev, pdev); 485 if (ret) 486 goto cleanup_qdev; 487 488 for (i = 0; i < qdev->num_dbc; ++i) 489 qdev->dbc[i].dbc_base = qdev->bar_2 + QAIC_DBC_OFF(i); 490 491 mhi_irq = init_msi(qdev, pdev); 492 if (mhi_irq < 0) { 493 ret = mhi_irq; 494 goto cleanup_qdev; 495 } 496 497 qdev->mhi_cntrl = qaic_mhi_register_controller(pdev, qdev->bar_0, mhi_irq); 498 if (IS_ERR(qdev->mhi_cntrl)) { 499 ret = PTR_ERR(qdev->mhi_cntrl); 500 goto cleanup_qdev; 501 } 502 503 return 0; 504 505 cleanup_qdev: 506 cleanup_qdev(qdev); 507 return ret; 508 } 509 510 static void qaic_pci_remove(struct pci_dev *pdev) 511 { 512 struct qaic_device *qdev = pci_get_drvdata(pdev); 513 514 if (!qdev) 515 return; 516 517 qaic_dev_reset_clean_local_state(qdev, false); 518 qaic_mhi_free_controller(qdev->mhi_cntrl, link_up); 519 cleanup_qdev(qdev); 520 } 521 522 static void qaic_pci_shutdown(struct pci_dev *pdev) 523 { 524 /* see qaic_exit for what link_up is doing */ 525 link_up = true; 526 qaic_pci_remove(pdev); 527 } 528 529 static pci_ers_result_t qaic_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t error) 530 { 531 return PCI_ERS_RESULT_NEED_RESET; 532 } 533 534 static void qaic_pci_reset_prepare(struct pci_dev *pdev) 535 { 536 struct qaic_device *qdev = pci_get_drvdata(pdev); 537 538 qaic_notify_reset(qdev); 539 qaic_mhi_start_reset(qdev->mhi_cntrl); 540 qaic_dev_reset_clean_local_state(qdev, false); 541 } 542 543 static void qaic_pci_reset_done(struct pci_dev *pdev) 544 { 545 struct qaic_device *qdev = pci_get_drvdata(pdev); 546 547 qdev->in_reset = false; 548 qaic_mhi_reset_done(qdev->mhi_cntrl); 549 } 550 551 static const struct mhi_device_id qaic_mhi_match_table[] = { 552 { .chan = "QAIC_CONTROL", }, 553 {}, 554 }; 555 556 static struct mhi_driver qaic_mhi_driver = { 557 .id_table = qaic_mhi_match_table, 558 .remove = qaic_mhi_remove, 559 .probe = qaic_mhi_probe, 560 .ul_xfer_cb = qaic_mhi_ul_xfer_cb, 561 .dl_xfer_cb = qaic_mhi_dl_xfer_cb, 562 .driver = { 563 .name = "qaic_mhi", 564 }, 565 }; 566 567 static const struct pci_device_id qaic_ids[] = { 568 { PCI_DEVICE(PCI_VENDOR_ID_QCOM, PCI_DEV_AIC100), }, 569 { } 570 }; 571 MODULE_DEVICE_TABLE(pci, qaic_ids); 572 573 static const struct pci_error_handlers qaic_pci_err_handler = { 574 .error_detected = qaic_pci_error_detected, 575 .reset_prepare = qaic_pci_reset_prepare, 576 .reset_done = qaic_pci_reset_done, 577 }; 578 579 static struct pci_driver qaic_pci_driver = { 580 .name = QAIC_NAME, 581 .id_table = qaic_ids, 582 .probe = qaic_pci_probe, 583 .remove = qaic_pci_remove, 584 .shutdown = qaic_pci_shutdown, 585 .err_handler = &qaic_pci_err_handler, 586 }; 587 588 static int __init qaic_init(void) 589 { 590 int ret; 591 592 ret = mhi_driver_register(&qaic_mhi_driver); 593 if (ret) { 594 pr_debug("qaic: mhi_driver_register failed %d\n", ret); 595 return ret; 596 } 597 598 ret = pci_register_driver(&qaic_pci_driver); 599 if (ret) { 600 pr_debug("qaic: pci_register_driver failed %d\n", ret); 601 goto free_mhi; 602 } 603 604 ret = mhi_qaic_ctrl_init(); 605 if (ret) { 606 pr_debug("qaic: mhi_qaic_ctrl_init failed %d\n", ret); 607 goto free_pci; 608 } 609 610 return 0; 611 612 free_pci: 613 pci_unregister_driver(&qaic_pci_driver); 614 free_mhi: 615 mhi_driver_unregister(&qaic_mhi_driver); 616 return ret; 617 } 618 619 static void __exit qaic_exit(void) 620 { 621 /* 622 * We assume that qaic_pci_remove() is called due to a hotplug event 623 * which would mean that the link is down, and thus 624 * qaic_mhi_free_controller() should not try to access the device during 625 * cleanup. 626 * We call pci_unregister_driver() below, which also triggers 627 * qaic_pci_remove(), but since this is module exit, we expect the link 628 * to the device to be up, in which case qaic_mhi_free_controller() 629 * should try to access the device during cleanup to put the device in 630 * a sane state. 631 * For that reason, we set link_up here to let qaic_mhi_free_controller 632 * know the expected link state. Since the module is going to be 633 * removed at the end of this, we don't need to worry about 634 * reinitializing the link_up state after the cleanup is done. 635 */ 636 link_up = true; 637 mhi_qaic_ctrl_deinit(); 638 pci_unregister_driver(&qaic_pci_driver); 639 mhi_driver_unregister(&qaic_mhi_driver); 640 } 641 642 module_init(qaic_init); 643 module_exit(qaic_exit); 644 645 MODULE_AUTHOR(QAIC_DESC " Kernel Driver Team"); 646 MODULE_DESCRIPTION(QAIC_DESC " Accel Driver"); 647 MODULE_LICENSE("GPL"); 648