xref: /openbmc/linux/drivers/accel/qaic/qaic_drv.c (revision 6aeadf78)
1 // SPDX-License-Identifier: GPL-2.0-only
2 
3 /* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved. */
4 /* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */
5 
6 #include <linux/delay.h>
7 #include <linux/dma-mapping.h>
8 #include <linux/idr.h>
9 #include <linux/interrupt.h>
10 #include <linux/list.h>
11 #include <linux/kref.h>
12 #include <linux/mhi.h>
13 #include <linux/module.h>
14 #include <linux/msi.h>
15 #include <linux/mutex.h>
16 #include <linux/pci.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
19 #include <linux/wait.h>
20 #include <drm/drm_accel.h>
21 #include <drm/drm_drv.h>
22 #include <drm/drm_file.h>
23 #include <drm/drm_gem.h>
24 #include <drm/drm_ioctl.h>
25 #include <uapi/drm/qaic_accel.h>
26 
27 #include "mhi_controller.h"
28 #include "qaic.h"
29 
30 MODULE_IMPORT_NS(DMA_BUF);
31 
32 #define PCI_DEV_AIC100			0xa100
33 #define QAIC_NAME			"qaic"
34 #define QAIC_DESC			"Qualcomm Cloud AI Accelerators"
35 #define CNTL_MAJOR			5
36 #define CNTL_MINOR			0
37 
38 bool datapath_polling;
39 module_param(datapath_polling, bool, 0400);
40 MODULE_PARM_DESC(datapath_polling, "Operate the datapath in polling mode");
41 static bool link_up;
42 static DEFINE_IDA(qaic_usrs);
43 
44 static int qaic_create_drm_device(struct qaic_device *qdev, s32 partition_id);
45 static void qaic_destroy_drm_device(struct qaic_device *qdev, s32 partition_id);
46 
47 static void free_usr(struct kref *kref)
48 {
49 	struct qaic_user *usr = container_of(kref, struct qaic_user, ref_count);
50 
51 	cleanup_srcu_struct(&usr->qddev_lock);
52 	ida_free(&qaic_usrs, usr->handle);
53 	kfree(usr);
54 }
55 
56 static int qaic_open(struct drm_device *dev, struct drm_file *file)
57 {
58 	struct qaic_drm_device *qddev = dev->dev_private;
59 	struct qaic_device *qdev = qddev->qdev;
60 	struct qaic_user *usr;
61 	int rcu_id;
62 	int ret;
63 
64 	rcu_id = srcu_read_lock(&qdev->dev_lock);
65 	if (qdev->in_reset) {
66 		ret = -ENODEV;
67 		goto dev_unlock;
68 	}
69 
70 	usr = kmalloc(sizeof(*usr), GFP_KERNEL);
71 	if (!usr) {
72 		ret = -ENOMEM;
73 		goto dev_unlock;
74 	}
75 
76 	usr->handle = ida_alloc(&qaic_usrs, GFP_KERNEL);
77 	if (usr->handle < 0) {
78 		ret = usr->handle;
79 		goto free_usr;
80 	}
81 	usr->qddev = qddev;
82 	atomic_set(&usr->chunk_id, 0);
83 	init_srcu_struct(&usr->qddev_lock);
84 	kref_init(&usr->ref_count);
85 
86 	ret = mutex_lock_interruptible(&qddev->users_mutex);
87 	if (ret)
88 		goto cleanup_usr;
89 
90 	list_add(&usr->node, &qddev->users);
91 	mutex_unlock(&qddev->users_mutex);
92 
93 	file->driver_priv = usr;
94 
95 	srcu_read_unlock(&qdev->dev_lock, rcu_id);
96 	return 0;
97 
98 cleanup_usr:
99 	cleanup_srcu_struct(&usr->qddev_lock);
100 	ida_free(&qaic_usrs, usr->handle);
101 free_usr:
102 	kfree(usr);
103 dev_unlock:
104 	srcu_read_unlock(&qdev->dev_lock, rcu_id);
105 	return ret;
106 }
107 
108 static void qaic_postclose(struct drm_device *dev, struct drm_file *file)
109 {
110 	struct qaic_user *usr = file->driver_priv;
111 	struct qaic_drm_device *qddev;
112 	struct qaic_device *qdev;
113 	int qdev_rcu_id;
114 	int usr_rcu_id;
115 	int i;
116 
117 	qddev = usr->qddev;
118 	usr_rcu_id = srcu_read_lock(&usr->qddev_lock);
119 	if (qddev) {
120 		qdev = qddev->qdev;
121 		qdev_rcu_id = srcu_read_lock(&qdev->dev_lock);
122 		if (!qdev->in_reset) {
123 			qaic_release_usr(qdev, usr);
124 			for (i = 0; i < qdev->num_dbc; ++i)
125 				if (qdev->dbc[i].usr && qdev->dbc[i].usr->handle == usr->handle)
126 					release_dbc(qdev, i);
127 		}
128 		srcu_read_unlock(&qdev->dev_lock, qdev_rcu_id);
129 
130 		mutex_lock(&qddev->users_mutex);
131 		if (!list_empty(&usr->node))
132 			list_del_init(&usr->node);
133 		mutex_unlock(&qddev->users_mutex);
134 	}
135 
136 	srcu_read_unlock(&usr->qddev_lock, usr_rcu_id);
137 	kref_put(&usr->ref_count, free_usr);
138 
139 	file->driver_priv = NULL;
140 }
141 
142 DEFINE_DRM_ACCEL_FOPS(qaic_accel_fops);
143 
144 static const struct drm_ioctl_desc qaic_drm_ioctls[] = {
145 	DRM_IOCTL_DEF_DRV(QAIC_MANAGE, qaic_manage_ioctl, 0),
146 	DRM_IOCTL_DEF_DRV(QAIC_CREATE_BO, qaic_create_bo_ioctl, 0),
147 	DRM_IOCTL_DEF_DRV(QAIC_MMAP_BO, qaic_mmap_bo_ioctl, 0),
148 	DRM_IOCTL_DEF_DRV(QAIC_ATTACH_SLICE_BO, qaic_attach_slice_bo_ioctl, 0),
149 	DRM_IOCTL_DEF_DRV(QAIC_EXECUTE_BO, qaic_execute_bo_ioctl, 0),
150 	DRM_IOCTL_DEF_DRV(QAIC_PARTIAL_EXECUTE_BO, qaic_partial_execute_bo_ioctl, 0),
151 	DRM_IOCTL_DEF_DRV(QAIC_WAIT_BO, qaic_wait_bo_ioctl, 0),
152 	DRM_IOCTL_DEF_DRV(QAIC_PERF_STATS_BO, qaic_perf_stats_bo_ioctl, 0),
153 };
154 
155 static const struct drm_driver qaic_accel_driver = {
156 	.driver_features	= DRIVER_GEM | DRIVER_COMPUTE_ACCEL,
157 
158 	.name			= QAIC_NAME,
159 	.desc			= QAIC_DESC,
160 	.date			= "20190618",
161 
162 	.fops			= &qaic_accel_fops,
163 	.open			= qaic_open,
164 	.postclose		= qaic_postclose,
165 
166 	.ioctls			= qaic_drm_ioctls,
167 	.num_ioctls		= ARRAY_SIZE(qaic_drm_ioctls),
168 	.prime_fd_to_handle	= drm_gem_prime_fd_to_handle,
169 	.gem_prime_import	= qaic_gem_prime_import,
170 };
171 
172 static int qaic_create_drm_device(struct qaic_device *qdev, s32 partition_id)
173 {
174 	struct qaic_drm_device *qddev;
175 	struct drm_device *ddev;
176 	struct device *pdev;
177 	int ret;
178 
179 	/* Hold off implementing partitions until the uapi is determined */
180 	if (partition_id != QAIC_NO_PARTITION)
181 		return -EINVAL;
182 
183 	pdev = &qdev->pdev->dev;
184 
185 	qddev = kzalloc(sizeof(*qddev), GFP_KERNEL);
186 	if (!qddev)
187 		return -ENOMEM;
188 
189 	ddev = drm_dev_alloc(&qaic_accel_driver, pdev);
190 	if (IS_ERR(ddev)) {
191 		ret = PTR_ERR(ddev);
192 		goto ddev_fail;
193 	}
194 
195 	ddev->dev_private = qddev;
196 	qddev->ddev = ddev;
197 
198 	qddev->qdev = qdev;
199 	qddev->partition_id = partition_id;
200 	INIT_LIST_HEAD(&qddev->users);
201 	mutex_init(&qddev->users_mutex);
202 
203 	qdev->qddev = qddev;
204 
205 	ret = drm_dev_register(ddev, 0);
206 	if (ret) {
207 		pci_dbg(qdev->pdev, "%s: drm_dev_register failed %d\n", __func__, ret);
208 		goto drm_reg_fail;
209 	}
210 
211 	return 0;
212 
213 drm_reg_fail:
214 	mutex_destroy(&qddev->users_mutex);
215 	qdev->qddev = NULL;
216 	drm_dev_put(ddev);
217 ddev_fail:
218 	kfree(qddev);
219 	return ret;
220 }
221 
222 static void qaic_destroy_drm_device(struct qaic_device *qdev, s32 partition_id)
223 {
224 	struct qaic_drm_device *qddev;
225 	struct qaic_user *usr;
226 
227 	qddev = qdev->qddev;
228 	qdev->qddev = NULL;
229 	if (!qddev)
230 		return;
231 
232 	/*
233 	 * Existing users get unresolvable errors till they close FDs.
234 	 * Need to sync carefully with users calling close(). The
235 	 * list of users can be modified elsewhere when the lock isn't
236 	 * held here, but the sync'ing the srcu with the mutex held
237 	 * could deadlock. Grab the mutex so that the list will be
238 	 * unmodified. The user we get will exist as long as the
239 	 * lock is held. Signal that the qcdev is going away, and
240 	 * grab a reference to the user so they don't go away for
241 	 * synchronize_srcu(). Then release the mutex to avoid
242 	 * deadlock and make sure the user has observed the signal.
243 	 * With the lock released, we cannot maintain any state of the
244 	 * user list.
245 	 */
246 	mutex_lock(&qddev->users_mutex);
247 	while (!list_empty(&qddev->users)) {
248 		usr = list_first_entry(&qddev->users, struct qaic_user, node);
249 		list_del_init(&usr->node);
250 		kref_get(&usr->ref_count);
251 		usr->qddev = NULL;
252 		mutex_unlock(&qddev->users_mutex);
253 		synchronize_srcu(&usr->qddev_lock);
254 		kref_put(&usr->ref_count, free_usr);
255 		mutex_lock(&qddev->users_mutex);
256 	}
257 	mutex_unlock(&qddev->users_mutex);
258 
259 	if (qddev->ddev) {
260 		drm_dev_unregister(qddev->ddev);
261 		drm_dev_put(qddev->ddev);
262 	}
263 
264 	kfree(qddev);
265 }
266 
267 static int qaic_mhi_probe(struct mhi_device *mhi_dev, const struct mhi_device_id *id)
268 {
269 	u16 major = -1, minor = -1;
270 	struct qaic_device *qdev;
271 	int ret;
272 
273 	/*
274 	 * Invoking this function indicates that the control channel to the
275 	 * device is available. We use that as a signal to indicate that
276 	 * the device side firmware has booted. The device side firmware
277 	 * manages the device resources, so we need to communicate with it
278 	 * via the control channel in order to utilize the device. Therefore
279 	 * we wait until this signal to create the drm dev that userspace will
280 	 * use to control the device, because without the device side firmware,
281 	 * userspace can't do anything useful.
282 	 */
283 
284 	qdev = pci_get_drvdata(to_pci_dev(mhi_dev->mhi_cntrl->cntrl_dev));
285 
286 	qdev->in_reset = false;
287 
288 	dev_set_drvdata(&mhi_dev->dev, qdev);
289 	qdev->cntl_ch = mhi_dev;
290 
291 	ret = qaic_control_open(qdev);
292 	if (ret) {
293 		pci_dbg(qdev->pdev, "%s: control_open failed %d\n", __func__, ret);
294 		return ret;
295 	}
296 
297 	ret = get_cntl_version(qdev, NULL, &major, &minor);
298 	if (ret || major != CNTL_MAJOR || minor > CNTL_MINOR) {
299 		pci_err(qdev->pdev, "%s: Control protocol version (%d.%d) not supported. Supported version is (%d.%d). Ret: %d\n",
300 			__func__, major, minor, CNTL_MAJOR, CNTL_MINOR, ret);
301 		ret = -EINVAL;
302 		goto close_control;
303 	}
304 
305 	ret = qaic_create_drm_device(qdev, QAIC_NO_PARTITION);
306 
307 	return ret;
308 
309 close_control:
310 	qaic_control_close(qdev);
311 	return ret;
312 }
313 
314 static void qaic_mhi_remove(struct mhi_device *mhi_dev)
315 {
316 /* This is redundant since we have already observed the device crash */
317 }
318 
319 static void qaic_notify_reset(struct qaic_device *qdev)
320 {
321 	int i;
322 
323 	qdev->in_reset = true;
324 	/* wake up any waiters to avoid waiting for timeouts at sync */
325 	wake_all_cntl(qdev);
326 	for (i = 0; i < qdev->num_dbc; ++i)
327 		wakeup_dbc(qdev, i);
328 	synchronize_srcu(&qdev->dev_lock);
329 }
330 
331 void qaic_dev_reset_clean_local_state(struct qaic_device *qdev, bool exit_reset)
332 {
333 	int i;
334 
335 	qaic_notify_reset(qdev);
336 
337 	/* remove drmdevs to prevent new users from coming in */
338 	qaic_destroy_drm_device(qdev, QAIC_NO_PARTITION);
339 
340 	/* start tearing things down */
341 	for (i = 0; i < qdev->num_dbc; ++i)
342 		release_dbc(qdev, i);
343 
344 	if (exit_reset)
345 		qdev->in_reset = false;
346 }
347 
348 static struct qaic_device *create_qdev(struct pci_dev *pdev, const struct pci_device_id *id)
349 {
350 	struct qaic_device *qdev;
351 	int i;
352 
353 	qdev = devm_kzalloc(&pdev->dev, sizeof(*qdev), GFP_KERNEL);
354 	if (!qdev)
355 		return NULL;
356 
357 	if (id->device == PCI_DEV_AIC100) {
358 		qdev->num_dbc = 16;
359 		qdev->dbc = devm_kcalloc(&pdev->dev, qdev->num_dbc, sizeof(*qdev->dbc), GFP_KERNEL);
360 		if (!qdev->dbc)
361 			return NULL;
362 	}
363 
364 	qdev->cntl_wq = alloc_workqueue("qaic_cntl", WQ_UNBOUND, 0);
365 	if (!qdev->cntl_wq)
366 		return NULL;
367 
368 	pci_set_drvdata(pdev, qdev);
369 	qdev->pdev = pdev;
370 
371 	mutex_init(&qdev->cntl_mutex);
372 	INIT_LIST_HEAD(&qdev->cntl_xfer_list);
373 	init_srcu_struct(&qdev->dev_lock);
374 
375 	for (i = 0; i < qdev->num_dbc; ++i) {
376 		spin_lock_init(&qdev->dbc[i].xfer_lock);
377 		qdev->dbc[i].qdev = qdev;
378 		qdev->dbc[i].id = i;
379 		INIT_LIST_HEAD(&qdev->dbc[i].xfer_list);
380 		init_srcu_struct(&qdev->dbc[i].ch_lock);
381 		init_waitqueue_head(&qdev->dbc[i].dbc_release);
382 		INIT_LIST_HEAD(&qdev->dbc[i].bo_lists);
383 	}
384 
385 	return qdev;
386 }
387 
388 static void cleanup_qdev(struct qaic_device *qdev)
389 {
390 	int i;
391 
392 	for (i = 0; i < qdev->num_dbc; ++i)
393 		cleanup_srcu_struct(&qdev->dbc[i].ch_lock);
394 	cleanup_srcu_struct(&qdev->dev_lock);
395 	pci_set_drvdata(qdev->pdev, NULL);
396 	destroy_workqueue(qdev->cntl_wq);
397 }
398 
399 static int init_pci(struct qaic_device *qdev, struct pci_dev *pdev)
400 {
401 	int bars;
402 	int ret;
403 
404 	bars = pci_select_bars(pdev, IORESOURCE_MEM);
405 
406 	/* make sure the device has the expected BARs */
407 	if (bars != (BIT(0) | BIT(2) | BIT(4))) {
408 		pci_dbg(pdev, "%s: expected BARs 0, 2, and 4 not found in device. Found 0x%x\n",
409 			__func__, bars);
410 		return -EINVAL;
411 	}
412 
413 	ret = pcim_enable_device(pdev);
414 	if (ret)
415 		return ret;
416 
417 	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
418 	if (ret)
419 		return ret;
420 	ret = dma_set_max_seg_size(&pdev->dev, UINT_MAX);
421 	if (ret)
422 		return ret;
423 
424 	qdev->bar_0 = devm_ioremap_resource(&pdev->dev, &pdev->resource[0]);
425 	if (IS_ERR(qdev->bar_0))
426 		return PTR_ERR(qdev->bar_0);
427 
428 	qdev->bar_2 = devm_ioremap_resource(&pdev->dev, &pdev->resource[2]);
429 	if (IS_ERR(qdev->bar_2))
430 		return PTR_ERR(qdev->bar_2);
431 
432 	/* Managed release since we use pcim_enable_device above */
433 	pci_set_master(pdev);
434 
435 	return 0;
436 }
437 
438 static int init_msi(struct qaic_device *qdev, struct pci_dev *pdev)
439 {
440 	int mhi_irq;
441 	int ret;
442 	int i;
443 
444 	/* Managed release since we use pcim_enable_device */
445 	ret = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI);
446 	if (ret < 0)
447 		return ret;
448 
449 	if (ret < 32) {
450 		pci_err(pdev, "%s: Requested 32 MSIs. Obtained %d MSIs which is less than the 32 required.\n",
451 			__func__, ret);
452 		return -ENODEV;
453 	}
454 
455 	mhi_irq = pci_irq_vector(pdev, 0);
456 	if (mhi_irq < 0)
457 		return mhi_irq;
458 
459 	for (i = 0; i < qdev->num_dbc; ++i) {
460 		ret = devm_request_threaded_irq(&pdev->dev, pci_irq_vector(pdev, i + 1),
461 						dbc_irq_handler, dbc_irq_threaded_fn, IRQF_SHARED,
462 						"qaic_dbc", &qdev->dbc[i]);
463 		if (ret)
464 			return ret;
465 
466 		if (datapath_polling) {
467 			qdev->dbc[i].irq = pci_irq_vector(pdev, i + 1);
468 			disable_irq_nosync(qdev->dbc[i].irq);
469 			INIT_WORK(&qdev->dbc[i].poll_work, irq_polling_work);
470 		}
471 	}
472 
473 	return mhi_irq;
474 }
475 
476 static int qaic_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
477 {
478 	struct qaic_device *qdev;
479 	int mhi_irq;
480 	int ret;
481 	int i;
482 
483 	qdev = create_qdev(pdev, id);
484 	if (!qdev)
485 		return -ENOMEM;
486 
487 	ret = init_pci(qdev, pdev);
488 	if (ret)
489 		goto cleanup_qdev;
490 
491 	for (i = 0; i < qdev->num_dbc; ++i)
492 		qdev->dbc[i].dbc_base = qdev->bar_2 + QAIC_DBC_OFF(i);
493 
494 	mhi_irq = init_msi(qdev, pdev);
495 	if (mhi_irq < 0) {
496 		ret = mhi_irq;
497 		goto cleanup_qdev;
498 	}
499 
500 	qdev->mhi_cntrl = qaic_mhi_register_controller(pdev, qdev->bar_0, mhi_irq);
501 	if (IS_ERR(qdev->mhi_cntrl)) {
502 		ret = PTR_ERR(qdev->mhi_cntrl);
503 		goto cleanup_qdev;
504 	}
505 
506 	return 0;
507 
508 cleanup_qdev:
509 	cleanup_qdev(qdev);
510 	return ret;
511 }
512 
513 static void qaic_pci_remove(struct pci_dev *pdev)
514 {
515 	struct qaic_device *qdev = pci_get_drvdata(pdev);
516 
517 	if (!qdev)
518 		return;
519 
520 	qaic_dev_reset_clean_local_state(qdev, false);
521 	qaic_mhi_free_controller(qdev->mhi_cntrl, link_up);
522 	cleanup_qdev(qdev);
523 }
524 
525 static void qaic_pci_shutdown(struct pci_dev *pdev)
526 {
527 	/* see qaic_exit for what link_up is doing */
528 	link_up = true;
529 	qaic_pci_remove(pdev);
530 }
531 
532 static pci_ers_result_t qaic_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t error)
533 {
534 	return PCI_ERS_RESULT_NEED_RESET;
535 }
536 
537 static void qaic_pci_reset_prepare(struct pci_dev *pdev)
538 {
539 	struct qaic_device *qdev = pci_get_drvdata(pdev);
540 
541 	qaic_notify_reset(qdev);
542 	qaic_mhi_start_reset(qdev->mhi_cntrl);
543 	qaic_dev_reset_clean_local_state(qdev, false);
544 }
545 
546 static void qaic_pci_reset_done(struct pci_dev *pdev)
547 {
548 	struct qaic_device *qdev = pci_get_drvdata(pdev);
549 
550 	qdev->in_reset = false;
551 	qaic_mhi_reset_done(qdev->mhi_cntrl);
552 }
553 
554 static const struct mhi_device_id qaic_mhi_match_table[] = {
555 	{ .chan = "QAIC_CONTROL", },
556 	{},
557 };
558 
559 static struct mhi_driver qaic_mhi_driver = {
560 	.id_table = qaic_mhi_match_table,
561 	.remove = qaic_mhi_remove,
562 	.probe = qaic_mhi_probe,
563 	.ul_xfer_cb = qaic_mhi_ul_xfer_cb,
564 	.dl_xfer_cb = qaic_mhi_dl_xfer_cb,
565 	.driver = {
566 		.name = "qaic_mhi",
567 	},
568 };
569 
570 static const struct pci_device_id qaic_ids[] = {
571 	{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, PCI_DEV_AIC100), },
572 	{ }
573 };
574 MODULE_DEVICE_TABLE(pci, qaic_ids);
575 
576 static const struct pci_error_handlers qaic_pci_err_handler = {
577 	.error_detected = qaic_pci_error_detected,
578 	.reset_prepare = qaic_pci_reset_prepare,
579 	.reset_done = qaic_pci_reset_done,
580 };
581 
582 static struct pci_driver qaic_pci_driver = {
583 	.name = QAIC_NAME,
584 	.id_table = qaic_ids,
585 	.probe = qaic_pci_probe,
586 	.remove = qaic_pci_remove,
587 	.shutdown = qaic_pci_shutdown,
588 	.err_handler = &qaic_pci_err_handler,
589 };
590 
591 static int __init qaic_init(void)
592 {
593 	int ret;
594 
595 	ret = mhi_driver_register(&qaic_mhi_driver);
596 	if (ret) {
597 		pr_debug("qaic: mhi_driver_register failed %d\n", ret);
598 		return ret;
599 	}
600 
601 	ret = pci_register_driver(&qaic_pci_driver);
602 	if (ret) {
603 		pr_debug("qaic: pci_register_driver failed %d\n", ret);
604 		goto free_mhi;
605 	}
606 
607 	return 0;
608 
609 free_mhi:
610 	mhi_driver_unregister(&qaic_mhi_driver);
611 	return ret;
612 }
613 
614 static void __exit qaic_exit(void)
615 {
616 	/*
617 	 * We assume that qaic_pci_remove() is called due to a hotplug event
618 	 * which would mean that the link is down, and thus
619 	 * qaic_mhi_free_controller() should not try to access the device during
620 	 * cleanup.
621 	 * We call pci_unregister_driver() below, which also triggers
622 	 * qaic_pci_remove(), but since this is module exit, we expect the link
623 	 * to the device to be up, in which case qaic_mhi_free_controller()
624 	 * should try to access the device during cleanup to put the device in
625 	 * a sane state.
626 	 * For that reason, we set link_up here to let qaic_mhi_free_controller
627 	 * know the expected link state. Since the module is going to be
628 	 * removed at the end of this, we don't need to worry about
629 	 * reinitializing the link_up state after the cleanup is done.
630 	 */
631 	link_up = true;
632 	pci_unregister_driver(&qaic_pci_driver);
633 	mhi_driver_unregister(&qaic_mhi_driver);
634 }
635 
636 module_init(qaic_init);
637 module_exit(qaic_exit);
638 
639 MODULE_AUTHOR(QAIC_DESC " Kernel Driver Team");
640 MODULE_DESCRIPTION(QAIC_DESC " Accel Driver");
641 MODULE_LICENSE("GPL");
642