1*e65e175bSOded Gabbay /* SPDX-License-Identifier: GPL-2.0 2*e65e175bSOded Gabbay * 3*e65e175bSOded Gabbay * Copyright 2016-2019 HabanaLabs, Ltd. 4*e65e175bSOded Gabbay * All Rights Reserved. 5*e65e175bSOded Gabbay * 6*e65e175bSOded Gabbay */ 7*e65e175bSOded Gabbay 8*e65e175bSOded Gabbay #ifndef GOYA_H 9*e65e175bSOded Gabbay #define GOYA_H 10*e65e175bSOded Gabbay 11*e65e175bSOded Gabbay #define SRAM_CFG_BAR_ID 0 12*e65e175bSOded Gabbay #define MSIX_BAR_ID 2 13*e65e175bSOded Gabbay #define DDR_BAR_ID 4 14*e65e175bSOded Gabbay 15*e65e175bSOded Gabbay #define CFG_BAR_SIZE 0x10000000ull /* 256MB */ 16*e65e175bSOded Gabbay #define MSIX_BAR_SIZE 0x1000ull /* 4KB */ 17*e65e175bSOded Gabbay 18*e65e175bSOded Gabbay #define CFG_BASE 0x7FFC000000ull 19*e65e175bSOded Gabbay #define CFG_SIZE 0x4000000 /* 32MB CFG + 32MB DBG*/ 20*e65e175bSOded Gabbay 21*e65e175bSOded Gabbay #define SRAM_BASE_ADDR 0x7FF0000000ull 22*e65e175bSOded Gabbay #define SRAM_SIZE 0x32A0000 /* 50.625MB */ 23*e65e175bSOded Gabbay 24*e65e175bSOded Gabbay #define DRAM_PHYS_BASE 0x0ull 25*e65e175bSOded Gabbay 26*e65e175bSOded Gabbay #define HOST_PHYS_BASE 0x8000000000ull /* 0.5TB */ 27*e65e175bSOded Gabbay #define HOST_PHYS_SIZE 0x1000000000000ull /* 0.25PB (48 bits) */ 28*e65e175bSOded Gabbay 29*e65e175bSOded Gabbay #define GOYA_MSIX_ENTRIES 8 30*e65e175bSOded Gabbay 31*e65e175bSOded Gabbay #define QMAN_PQ_ENTRY_SIZE 16 /* Bytes */ 32*e65e175bSOded Gabbay 33*e65e175bSOded Gabbay #define MAX_ASID 2 34*e65e175bSOded Gabbay 35*e65e175bSOded Gabbay #define PROT_BITS_OFFS 0xF80 36*e65e175bSOded Gabbay 37*e65e175bSOded Gabbay #define DMA_MAX_NUM 5 38*e65e175bSOded Gabbay 39*e65e175bSOded Gabbay #define TPC_MAX_NUM 8 40*e65e175bSOded Gabbay 41*e65e175bSOded Gabbay #define MME_MAX_NUM 1 42*e65e175bSOded Gabbay 43*e65e175bSOded Gabbay #endif /* GOYA_H */ 44