1e65e175bSOded Gabbay /* SPDX-License-Identifier: GPL-2.0 2e65e175bSOded Gabbay * 3e65e175bSOded Gabbay * Copyright 2016-2020 HabanaLabs, Ltd. 4e65e175bSOded Gabbay * All Rights Reserved. 5e65e175bSOded Gabbay * 6e65e175bSOded Gabbay */ 7e65e175bSOded Gabbay 8e65e175bSOded Gabbay /************************************ 9e65e175bSOded Gabbay ** This is an auto-generated file ** 10e65e175bSOded Gabbay ** DO NOT EDIT BELOW ** 11e65e175bSOded Gabbay ************************************/ 12e65e175bSOded Gabbay 13e65e175bSOded Gabbay #ifndef ASIC_REG_DCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_REGS_H_ 14e65e175bSOded Gabbay #define ASIC_REG_DCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_REGS_H_ 15e65e175bSOded Gabbay 16e65e175bSOded Gabbay /* 17e65e175bSOded Gabbay ***************************************** 18e65e175bSOded Gabbay * DCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END 19e65e175bSOded Gabbay * (Prototype: MME_NON_TENSOR_DESCRIPTOR) 20e65e175bSOded Gabbay ***************************************** 21e65e175bSOded Gabbay */ 22e65e175bSOded Gabbay 23*2fd7db3cSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_CONV_KERNEL_SIZE_MINUS_1 0x40CB280 24e65e175bSOded Gabbay 25e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_CONV_LOW 0x40CB284 26e65e175bSOded Gabbay 27e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_CONV_HIGH 0x40CB288 28e65e175bSOded Gabbay 29e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_OUTER_LOOP 0x40CB28C 30e65e175bSOded Gabbay 31*2fd7db3cSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_NUM_ITERATIONS_MINUS_1 0x40CB290 32e65e175bSOded Gabbay 33e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_SB_REPEAT 0x40CB294 34e65e175bSOded Gabbay 35e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_FP8_BIAS 0x40CB298 36e65e175bSOded Gabbay 37e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_RATE_LIMITER 0x40CB29C 38e65e175bSOded Gabbay 39e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_USER_DATA 0x40CB2A0 40e65e175bSOded Gabbay 41e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_PERF_EVT_IN 0x40CB2A4 42e65e175bSOded Gabbay 43e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_PERF_EVT_OUT 0x40CB2A8 44e65e175bSOded Gabbay 45e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_PCU 0x40CB2AC 46e65e175bSOded Gabbay 47e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_SLAVE_SYNC_OBJ0_ADDR 0x40CB2B0 48e65e175bSOded Gabbay 49e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_SLAVE_SYNC_OBJ1_ADDR 0x40CB2B4 50e65e175bSOded Gabbay 51e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_POWER_LOOP 0x40CB2B8 52e65e175bSOded Gabbay 53e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_SPARE0_MASTER 0x40CB2BC 54e65e175bSOded Gabbay 55e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_SPARE1_MASTER 0x40CB2C0 56e65e175bSOded Gabbay 57e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_SPARE2_MASTER 0x40CB2C4 58e65e175bSOded Gabbay 59e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_SPARE3_MASTER 0x40CB2C8 60e65e175bSOded Gabbay 61e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_SPARE0_SLAVE 0x40CB2CC 62e65e175bSOded Gabbay 63e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_SPARE1_SLAVE 0x40CB2D0 64e65e175bSOded Gabbay 65e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_SPARE2_SLAVE 0x40CB2D4 66e65e175bSOded Gabbay 67e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_SPARE3_SLAVE 0x40CB2D8 68e65e175bSOded Gabbay 69e65e175bSOded Gabbay #define mmDCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_WKL_ID 0x40CB2DC 70e65e175bSOded Gabbay 71e65e175bSOded Gabbay #endif /* ASIC_REG_DCORE0_MME_CTRL_LO_ARCH_NON_TENSOR_END_REGS_H_ */ 72