1*e65e175bSOded Gabbay /* SPDX-License-Identifier: GPL-2.0
2*e65e175bSOded Gabbay  *
3*e65e175bSOded Gabbay  * Copyright 2016-2018 HabanaLabs, Ltd.
4*e65e175bSOded Gabbay  * All Rights Reserved.
5*e65e175bSOded Gabbay  *
6*e65e175bSOded Gabbay  */
7*e65e175bSOded Gabbay 
8*e65e175bSOded Gabbay /************************************
9*e65e175bSOded Gabbay  ** This is an auto-generated file **
10*e65e175bSOded Gabbay  **       DO NOT EDIT BELOW        **
11*e65e175bSOded Gabbay  ************************************/
12*e65e175bSOded Gabbay 
13*e65e175bSOded Gabbay #ifndef ASIC_REG_STLB_REGS_H_
14*e65e175bSOded Gabbay #define ASIC_REG_STLB_REGS_H_
15*e65e175bSOded Gabbay 
16*e65e175bSOded Gabbay /*
17*e65e175bSOded Gabbay  *****************************************
18*e65e175bSOded Gabbay  *   STLB (Prototype: STLB)
19*e65e175bSOded Gabbay  *****************************************
20*e65e175bSOded Gabbay  */
21*e65e175bSOded Gabbay 
22*e65e175bSOded Gabbay #define mmSTLB_CACHE_INV                                             0xC12010
23*e65e175bSOded Gabbay 
24*e65e175bSOded Gabbay #define mmSTLB_CACHE_INV_BASE_39_8                                   0xC12014
25*e65e175bSOded Gabbay 
26*e65e175bSOded Gabbay #define mmSTLB_CACHE_INV_BASE_49_40                                  0xC12018
27*e65e175bSOded Gabbay 
28*e65e175bSOded Gabbay #define mmSTLB_STLB_FEATURE_EN                                       0xC1201C
29*e65e175bSOded Gabbay 
30*e65e175bSOded Gabbay #define mmSTLB_STLB_AXI_CACHE                                        0xC12020
31*e65e175bSOded Gabbay 
32*e65e175bSOded Gabbay #define mmSTLB_HOP_CONFIGURATION                                     0xC12024
33*e65e175bSOded Gabbay 
34*e65e175bSOded Gabbay #define mmSTLB_LINK_LIST_LOOKUP_MASK_49_32                           0xC12028
35*e65e175bSOded Gabbay 
36*e65e175bSOded Gabbay #define mmSTLB_LINK_LIST_LOOKUP_MASK_31_0                            0xC1202C
37*e65e175bSOded Gabbay 
38*e65e175bSOded Gabbay #define mmSTLB_LINK_LIST                                             0xC12030
39*e65e175bSOded Gabbay 
40*e65e175bSOded Gabbay #define mmSTLB_INV_ALL_START                                         0xC12034
41*e65e175bSOded Gabbay 
42*e65e175bSOded Gabbay #define mmSTLB_INV_ALL_SET                                           0xC12038
43*e65e175bSOded Gabbay 
44*e65e175bSOded Gabbay #define mmSTLB_INV_PS                                                0xC1203C
45*e65e175bSOded Gabbay 
46*e65e175bSOded Gabbay #define mmSTLB_INV_CONSUMER_INDEX                                    0xC12040
47*e65e175bSOded Gabbay 
48*e65e175bSOded Gabbay #define mmSTLB_INV_HIT_COUNT                                         0xC12044
49*e65e175bSOded Gabbay 
50*e65e175bSOded Gabbay #define mmSTLB_INV_SET                                               0xC12048
51*e65e175bSOded Gabbay 
52*e65e175bSOded Gabbay #define mmSTLB_SRAM_INIT                                             0xC1204C
53*e65e175bSOded Gabbay 
54*e65e175bSOded Gabbay #define mmSTLB_MEM_CACHE_INVALIDATION                                0xC12050
55*e65e175bSOded Gabbay 
56*e65e175bSOded Gabbay #define mmSTLB_MEM_CACHE_INV_STATUS                                  0xC12054
57*e65e175bSOded Gabbay 
58*e65e175bSOded Gabbay #define mmSTLB_MEM_CACHE_BASE_38_7                                   0xC12058
59*e65e175bSOded Gabbay 
60*e65e175bSOded Gabbay #define mmSTLB_MEM_CACHE_BASE_49_39                                  0xC1205C
61*e65e175bSOded Gabbay 
62*e65e175bSOded Gabbay #define mmSTLB_MEM_CACHE_CONFIG                                      0xC12060
63*e65e175bSOded Gabbay 
64*e65e175bSOded Gabbay #define mmSTLB_SET_THRESHOLD_HOP4                                    0xC12064
65*e65e175bSOded Gabbay 
66*e65e175bSOded Gabbay #define mmSTLB_SET_THRESHOLD_HOP3                                    0xC12068
67*e65e175bSOded Gabbay 
68*e65e175bSOded Gabbay #define mmSTLB_SET_THRESHOLD_HOP2                                    0xC1206C
69*e65e175bSOded Gabbay 
70*e65e175bSOded Gabbay #define mmSTLB_SET_THRESHOLD_HOP1                                    0xC12070
71*e65e175bSOded Gabbay 
72*e65e175bSOded Gabbay #define mmSTLB_SET_THRESHOLD_HOP0                                    0xC12074
73*e65e175bSOded Gabbay 
74*e65e175bSOded Gabbay #define mmSTLB_MULTI_HIT_INTERRUPT_CLR                               0xC12078
75*e65e175bSOded Gabbay 
76*e65e175bSOded Gabbay #define mmSTLB_MULTI_HIT_INTERRUPT_MASK                              0xC1207C
77*e65e175bSOded Gabbay 
78*e65e175bSOded Gabbay #define mmSTLB_MEM_L0_CACHE_CFG                                      0xC12080
79*e65e175bSOded Gabbay 
80*e65e175bSOded Gabbay #define mmSTLB_MEM_READ_ARPROT                                       0xC12084
81*e65e175bSOded Gabbay 
82*e65e175bSOded Gabbay #endif /* ASIC_REG_STLB_REGS_H_ */
83