xref: /openbmc/linux/crypto/async_tx/async_pq.c (revision 7476bd79)
1b2f46fd8SDan Williams /*
2b2f46fd8SDan Williams  * Copyright(c) 2007 Yuri Tikhonov <yur@emcraft.com>
3b2f46fd8SDan Williams  * Copyright(c) 2009 Intel Corporation
4b2f46fd8SDan Williams  *
5b2f46fd8SDan Williams  * This program is free software; you can redistribute it and/or modify it
6b2f46fd8SDan Williams  * under the terms of the GNU General Public License as published by the Free
7b2f46fd8SDan Williams  * Software Foundation; either version 2 of the License, or (at your option)
8b2f46fd8SDan Williams  * any later version.
9b2f46fd8SDan Williams  *
10b2f46fd8SDan Williams  * This program is distributed in the hope that it will be useful, but WITHOUT
11b2f46fd8SDan Williams  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12b2f46fd8SDan Williams  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13b2f46fd8SDan Williams  * more details.
14b2f46fd8SDan Williams  *
15b2f46fd8SDan Williams  * You should have received a copy of the GNU General Public License along with
16b2f46fd8SDan Williams  * this program; if not, write to the Free Software Foundation, Inc., 59
17b2f46fd8SDan Williams  * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
18b2f46fd8SDan Williams  *
19b2f46fd8SDan Williams  * The full GNU General Public License is included in this distribution in the
20b2f46fd8SDan Williams  * file called COPYING.
21b2f46fd8SDan Williams  */
22b2f46fd8SDan Williams #include <linux/kernel.h>
23b2f46fd8SDan Williams #include <linux/interrupt.h>
244bb33cc8SPaul Gortmaker #include <linux/module.h>
25b2f46fd8SDan Williams #include <linux/dma-mapping.h>
26b2f46fd8SDan Williams #include <linux/raid/pq.h>
27b2f46fd8SDan Williams #include <linux/async_tx.h>
285a0e3ad6STejun Heo #include <linux/gfp.h>
29b2f46fd8SDan Williams 
30b2f46fd8SDan Williams /**
31030b0772SDan Williams  * pq_scribble_page - space to hold throwaway P or Q buffer for
32030b0772SDan Williams  * synchronous gen_syndrome
33b2f46fd8SDan Williams  */
34030b0772SDan Williams static struct page *pq_scribble_page;
35b2f46fd8SDan Williams 
36b2f46fd8SDan Williams /* the struct page *blocks[] parameter passed to async_gen_syndrome()
37b2f46fd8SDan Williams  * and async_syndrome_val() contains the 'P' destination address at
38b2f46fd8SDan Williams  * blocks[disks-2] and the 'Q' destination address at blocks[disks-1]
39b2f46fd8SDan Williams  *
40b2f46fd8SDan Williams  * note: these are macros as they are used as lvalues
41b2f46fd8SDan Williams  */
42b2f46fd8SDan Williams #define P(b, d) (b[d-2])
43b2f46fd8SDan Williams #define Q(b, d) (b[d-1])
44b2f46fd8SDan Williams 
45b2f46fd8SDan Williams /**
46b2f46fd8SDan Williams  * do_async_gen_syndrome - asynchronously calculate P and/or Q
47b2f46fd8SDan Williams  */
48b2f46fd8SDan Williams static __async_inline struct dma_async_tx_descriptor *
497476bd79SDan Williams do_async_gen_syndrome(struct dma_chan *chan,
507476bd79SDan Williams 		      const unsigned char *scfs, int disks,
517476bd79SDan Williams 		      struct dmaengine_unmap_data *unmap,
527476bd79SDan Williams 		      enum dma_ctrl_flags dma_flags,
53b2f46fd8SDan Williams 		      struct async_submit_ctl *submit)
54b2f46fd8SDan Williams {
55b2f46fd8SDan Williams 	struct dma_async_tx_descriptor *tx = NULL;
56b2f46fd8SDan Williams 	struct dma_device *dma = chan->device;
57b2f46fd8SDan Williams 	enum async_tx_flags flags_orig = submit->flags;
58b2f46fd8SDan Williams 	dma_async_tx_callback cb_fn_orig = submit->cb_fn;
59b2f46fd8SDan Williams 	dma_async_tx_callback cb_param_orig = submit->cb_param;
60b2f46fd8SDan Williams 	int src_cnt = disks - 2;
61b2f46fd8SDan Williams 	unsigned short pq_src_cnt;
62b2f46fd8SDan Williams 	dma_addr_t dma_dest[2];
63b2f46fd8SDan Williams 	int src_off = 0;
64b2f46fd8SDan Williams 
657476bd79SDan Williams 	dma_flags |= DMA_COMPL_SKIP_SRC_UNMAP | DMA_COMPL_SKIP_DEST_UNMAP;
667476bd79SDan Williams 	if (submit->flags & ASYNC_TX_FENCE)
677476bd79SDan Williams 		dma_flags |= DMA_PREP_FENCE;
68b2f46fd8SDan Williams 
69b2f46fd8SDan Williams 	while (src_cnt > 0) {
70b2f46fd8SDan Williams 		submit->flags = flags_orig;
71b2f46fd8SDan Williams 		pq_src_cnt = min(src_cnt, dma_maxpq(dma, dma_flags));
72b2f46fd8SDan Williams 		/* if we are submitting additional pqs, leave the chain open,
73b2f46fd8SDan Williams 		 * clear the callback parameters, and leave the destination
74b2f46fd8SDan Williams 		 * buffers mapped
75b2f46fd8SDan Williams 		 */
76b2f46fd8SDan Williams 		if (src_cnt > pq_src_cnt) {
77b2f46fd8SDan Williams 			submit->flags &= ~ASYNC_TX_ACK;
780403e382SDan Williams 			submit->flags |= ASYNC_TX_FENCE;
79b2f46fd8SDan Williams 			submit->cb_fn = NULL;
80b2f46fd8SDan Williams 			submit->cb_param = NULL;
81b2f46fd8SDan Williams 		} else {
82b2f46fd8SDan Williams 			submit->cb_fn = cb_fn_orig;
83b2f46fd8SDan Williams 			submit->cb_param = cb_param_orig;
84b2f46fd8SDan Williams 			if (cb_fn_orig)
85b2f46fd8SDan Williams 				dma_flags |= DMA_PREP_INTERRUPT;
86b2f46fd8SDan Williams 		}
87b2f46fd8SDan Williams 
887476bd79SDan Williams 		/* Drivers force forward progress in case they can not provide
897476bd79SDan Williams 		 * a descriptor
90b2f46fd8SDan Williams 		 */
91b2f46fd8SDan Williams 		for (;;) {
927476bd79SDan Williams 			dma_dest[0] = unmap->addr[disks - 2];
937476bd79SDan Williams 			dma_dest[1] = unmap->addr[disks - 1];
94b2f46fd8SDan Williams 			tx = dma->device_prep_dma_pq(chan, dma_dest,
957476bd79SDan Williams 						     &unmap->addr[src_off],
96b2f46fd8SDan Williams 						     pq_src_cnt,
977476bd79SDan Williams 						     &scfs[src_off], unmap->len,
98b2f46fd8SDan Williams 						     dma_flags);
99b2f46fd8SDan Williams 			if (likely(tx))
100b2f46fd8SDan Williams 				break;
101b2f46fd8SDan Williams 			async_tx_quiesce(&submit->depend_tx);
102b2f46fd8SDan Williams 			dma_async_issue_pending(chan);
103b2f46fd8SDan Williams 		}
104b2f46fd8SDan Williams 
1057476bd79SDan Williams 		dma_set_unmap(tx, unmap);
106b2f46fd8SDan Williams 		async_tx_submit(chan, tx, submit);
107b2f46fd8SDan Williams 		submit->depend_tx = tx;
108b2f46fd8SDan Williams 
109b2f46fd8SDan Williams 		/* drop completed sources */
110b2f46fd8SDan Williams 		src_cnt -= pq_src_cnt;
111b2f46fd8SDan Williams 		src_off += pq_src_cnt;
112b2f46fd8SDan Williams 
113b2f46fd8SDan Williams 		dma_flags |= DMA_PREP_CONTINUE;
114b2f46fd8SDan Williams 	}
115b2f46fd8SDan Williams 
116b2f46fd8SDan Williams 	return tx;
117b2f46fd8SDan Williams }
118b2f46fd8SDan Williams 
119b2f46fd8SDan Williams /**
120b2f46fd8SDan Williams  * do_sync_gen_syndrome - synchronously calculate a raid6 syndrome
121b2f46fd8SDan Williams  */
122b2f46fd8SDan Williams static void
123b2f46fd8SDan Williams do_sync_gen_syndrome(struct page **blocks, unsigned int offset, int disks,
124b2f46fd8SDan Williams 		     size_t len, struct async_submit_ctl *submit)
125b2f46fd8SDan Williams {
126b2f46fd8SDan Williams 	void **srcs;
127b2f46fd8SDan Williams 	int i;
128b2f46fd8SDan Williams 
129b2f46fd8SDan Williams 	if (submit->scribble)
130b2f46fd8SDan Williams 		srcs = submit->scribble;
131b2f46fd8SDan Williams 	else
132b2f46fd8SDan Williams 		srcs = (void **) blocks;
133b2f46fd8SDan Williams 
134b2f46fd8SDan Williams 	for (i = 0; i < disks; i++) {
1355dd33c9aSNeilBrown 		if (blocks[i] == NULL) {
136b2f46fd8SDan Williams 			BUG_ON(i > disks - 3); /* P or Q can't be zero */
1375dd33c9aSNeilBrown 			srcs[i] = (void*)raid6_empty_zero_page;
138b2f46fd8SDan Williams 		} else
139b2f46fd8SDan Williams 			srcs[i] = page_address(blocks[i]) + offset;
140b2f46fd8SDan Williams 	}
141b2f46fd8SDan Williams 	raid6_call.gen_syndrome(disks, len, srcs);
142b2f46fd8SDan Williams 	async_tx_sync_epilog(submit);
143b2f46fd8SDan Williams }
144b2f46fd8SDan Williams 
145b2f46fd8SDan Williams /**
146b2f46fd8SDan Williams  * async_gen_syndrome - asynchronously calculate a raid6 syndrome
147b2f46fd8SDan Williams  * @blocks: source blocks from idx 0..disks-3, P @ disks-2 and Q @ disks-1
148b2f46fd8SDan Williams  * @offset: common offset into each block (src and dest) to start transaction
149b2f46fd8SDan Williams  * @disks: number of blocks (including missing P or Q, see below)
150b2f46fd8SDan Williams  * @len: length of operation in bytes
151b2f46fd8SDan Williams  * @submit: submission/completion modifiers
152b2f46fd8SDan Williams  *
153b2f46fd8SDan Williams  * General note: This routine assumes a field of GF(2^8) with a
154b2f46fd8SDan Williams  * primitive polynomial of 0x11d and a generator of {02}.
155b2f46fd8SDan Williams  *
156b2f46fd8SDan Williams  * 'disks' note: callers can optionally omit either P or Q (but not
157b2f46fd8SDan Williams  * both) from the calculation by setting blocks[disks-2] or
158b2f46fd8SDan Williams  * blocks[disks-1] to NULL.  When P or Q is omitted 'len' must be <=
159b2f46fd8SDan Williams  * PAGE_SIZE as a temporary buffer of this size is used in the
160b2f46fd8SDan Williams  * synchronous path.  'disks' always accounts for both destination
1615676470fSDan Williams  * buffers.  If any source buffers (blocks[i] where i < disks - 2) are
1625676470fSDan Williams  * set to NULL those buffers will be replaced with the raid6_zero_page
1635676470fSDan Williams  * in the synchronous path and omitted in the hardware-asynchronous
1645676470fSDan Williams  * path.
165b2f46fd8SDan Williams  */
166b2f46fd8SDan Williams struct dma_async_tx_descriptor *
167b2f46fd8SDan Williams async_gen_syndrome(struct page **blocks, unsigned int offset, int disks,
168b2f46fd8SDan Williams 		   size_t len, struct async_submit_ctl *submit)
169b2f46fd8SDan Williams {
170b2f46fd8SDan Williams 	int src_cnt = disks - 2;
171b2f46fd8SDan Williams 	struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ,
172b2f46fd8SDan Williams 						      &P(blocks, disks), 2,
173b2f46fd8SDan Williams 						      blocks, src_cnt, len);
174b2f46fd8SDan Williams 	struct dma_device *device = chan ? chan->device : NULL;
1757476bd79SDan Williams 	struct dmaengine_unmap_data *unmap = NULL;
176b2f46fd8SDan Williams 
177b2f46fd8SDan Williams 	BUG_ON(disks > 255 || !(P(blocks, disks) || Q(blocks, disks)));
178b2f46fd8SDan Williams 
1797476bd79SDan Williams 	if (device)
1807476bd79SDan Williams 		unmap = dmaengine_get_unmap_data(device->dev, disks, GFP_NOIO);
181b2f46fd8SDan Williams 
1827476bd79SDan Williams 	if (unmap &&
183b2f46fd8SDan Williams 	    (src_cnt <= dma_maxpq(device, 0) ||
18483544ae9SDan Williams 	     dma_maxpq(device, DMA_PREP_CONTINUE) > 0) &&
18583544ae9SDan Williams 	    is_dma_pq_aligned(device, offset, 0, len)) {
1867476bd79SDan Williams 		struct dma_async_tx_descriptor *tx;
1877476bd79SDan Williams 		enum dma_ctrl_flags dma_flags = 0;
1887476bd79SDan Williams 		unsigned char coefs[src_cnt];
1897476bd79SDan Williams 		int i, j;
1907476bd79SDan Williams 
191b2f46fd8SDan Williams 		/* run the p+q asynchronously */
192b2f46fd8SDan Williams 		pr_debug("%s: (async) disks: %d len: %zu\n",
193b2f46fd8SDan Williams 			 __func__, disks, len);
1947476bd79SDan Williams 
1957476bd79SDan Williams 		/* convert source addresses being careful to collapse 'empty'
1967476bd79SDan Williams 		 * sources and update the coefficients accordingly
1977476bd79SDan Williams 		 */
1987476bd79SDan Williams 		unmap->len = len;
1997476bd79SDan Williams 		for (i = 0, j = 0; i < src_cnt; i++) {
2007476bd79SDan Williams 			if (blocks[i] == NULL)
2017476bd79SDan Williams 				continue;
2027476bd79SDan Williams 			unmap->addr[j] = dma_map_page(device->dev, blocks[i], offset,
2037476bd79SDan Williams 						      len, DMA_TO_DEVICE);
2047476bd79SDan Williams 			coefs[j] = raid6_gfexp[i];
2057476bd79SDan Williams 			unmap->to_cnt++;
2067476bd79SDan Williams 			j++;
207b2f46fd8SDan Williams 		}
208b2f46fd8SDan Williams 
2097476bd79SDan Williams 		/*
2107476bd79SDan Williams 		 * DMAs use destinations as sources,
2117476bd79SDan Williams 		 * so use BIDIRECTIONAL mapping
2127476bd79SDan Williams 		 */
2137476bd79SDan Williams 		unmap->bidi_cnt++;
2147476bd79SDan Williams 		if (P(blocks, disks))
2157476bd79SDan Williams 			unmap->addr[j++] = dma_map_page(device->dev, P(blocks, disks),
2167476bd79SDan Williams 							offset, len, DMA_BIDIRECTIONAL);
2177476bd79SDan Williams 		else {
2187476bd79SDan Williams 			unmap->addr[j++] = 0;
2197476bd79SDan Williams 			dma_flags |= DMA_PREP_PQ_DISABLE_P;
2207476bd79SDan Williams 		}
2217476bd79SDan Williams 
2227476bd79SDan Williams 		unmap->bidi_cnt++;
2237476bd79SDan Williams 		if (Q(blocks, disks))
2247476bd79SDan Williams 			unmap->addr[j++] = dma_map_page(device->dev, Q(blocks, disks),
2257476bd79SDan Williams 						       offset, len, DMA_BIDIRECTIONAL);
2267476bd79SDan Williams 		else {
2277476bd79SDan Williams 			unmap->addr[j++] = 0;
2287476bd79SDan Williams 			dma_flags |= DMA_PREP_PQ_DISABLE_Q;
2297476bd79SDan Williams 		}
2307476bd79SDan Williams 
2317476bd79SDan Williams 		tx = do_async_gen_syndrome(chan, coefs, j, unmap, dma_flags, submit);
2327476bd79SDan Williams 		dmaengine_unmap_put(unmap);
2337476bd79SDan Williams 		return tx;
2347476bd79SDan Williams 	}
2357476bd79SDan Williams 
2367476bd79SDan Williams 	dmaengine_unmap_put(unmap);
2377476bd79SDan Williams 
238b2f46fd8SDan Williams 	/* run the pq synchronously */
239b2f46fd8SDan Williams 	pr_debug("%s: (sync) disks: %d len: %zu\n", __func__, disks, len);
240b2f46fd8SDan Williams 
241b2f46fd8SDan Williams 	/* wait for any prerequisite operations */
242b2f46fd8SDan Williams 	async_tx_quiesce(&submit->depend_tx);
243b2f46fd8SDan Williams 
244b2f46fd8SDan Williams 	if (!P(blocks, disks)) {
245030b0772SDan Williams 		P(blocks, disks) = pq_scribble_page;
246b2f46fd8SDan Williams 		BUG_ON(len + offset > PAGE_SIZE);
247b2f46fd8SDan Williams 	}
248b2f46fd8SDan Williams 	if (!Q(blocks, disks)) {
249030b0772SDan Williams 		Q(blocks, disks) = pq_scribble_page;
250b2f46fd8SDan Williams 		BUG_ON(len + offset > PAGE_SIZE);
251b2f46fd8SDan Williams 	}
252b2f46fd8SDan Williams 	do_sync_gen_syndrome(blocks, offset, disks, len, submit);
253b2f46fd8SDan Williams 
254b2f46fd8SDan Williams 	return NULL;
255b2f46fd8SDan Williams }
256b2f46fd8SDan Williams EXPORT_SYMBOL_GPL(async_gen_syndrome);
257b2f46fd8SDan Williams 
2587b3cc2b1SDan Williams static inline struct dma_chan *
2597b3cc2b1SDan Williams pq_val_chan(struct async_submit_ctl *submit, struct page **blocks, int disks, size_t len)
2607b3cc2b1SDan Williams {
2617b3cc2b1SDan Williams 	#ifdef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
2627b3cc2b1SDan Williams 	return NULL;
2637b3cc2b1SDan Williams 	#endif
2647b3cc2b1SDan Williams 	return async_tx_find_channel(submit, DMA_PQ_VAL, NULL, 0,  blocks,
2657b3cc2b1SDan Williams 				     disks, len);
2667b3cc2b1SDan Williams }
2677b3cc2b1SDan Williams 
268b2f46fd8SDan Williams /**
269b2f46fd8SDan Williams  * async_syndrome_val - asynchronously validate a raid6 syndrome
270b2f46fd8SDan Williams  * @blocks: source blocks from idx 0..disks-3, P @ disks-2 and Q @ disks-1
271b2f46fd8SDan Williams  * @offset: common offset into each block (src and dest) to start transaction
272b2f46fd8SDan Williams  * @disks: number of blocks (including missing P or Q, see below)
273b2f46fd8SDan Williams  * @len: length of operation in bytes
274b2f46fd8SDan Williams  * @pqres: on val failure SUM_CHECK_P_RESULT and/or SUM_CHECK_Q_RESULT are set
275b2f46fd8SDan Williams  * @spare: temporary result buffer for the synchronous case
276b2f46fd8SDan Williams  * @submit: submission / completion modifiers
277b2f46fd8SDan Williams  *
278b2f46fd8SDan Williams  * The same notes from async_gen_syndrome apply to the 'blocks',
279b2f46fd8SDan Williams  * and 'disks' parameters of this routine.  The synchronous path
280b2f46fd8SDan Williams  * requires a temporary result buffer and submit->scribble to be
281b2f46fd8SDan Williams  * specified.
282b2f46fd8SDan Williams  */
283b2f46fd8SDan Williams struct dma_async_tx_descriptor *
284b2f46fd8SDan Williams async_syndrome_val(struct page **blocks, unsigned int offset, int disks,
285b2f46fd8SDan Williams 		   size_t len, enum sum_check_flags *pqres, struct page *spare,
286b2f46fd8SDan Williams 		   struct async_submit_ctl *submit)
287b2f46fd8SDan Williams {
2887b3cc2b1SDan Williams 	struct dma_chan *chan = pq_val_chan(submit, blocks, disks, len);
289b2f46fd8SDan Williams 	struct dma_device *device = chan ? chan->device : NULL;
290b2f46fd8SDan Williams 	struct dma_async_tx_descriptor *tx;
291b2141e69SNeilBrown 	unsigned char coefs[disks-2];
292b2f46fd8SDan Williams 	enum dma_ctrl_flags dma_flags = submit->cb_fn ? DMA_PREP_INTERRUPT : 0;
293b2f46fd8SDan Williams 	dma_addr_t *dma_src = NULL;
294b2141e69SNeilBrown 	int src_cnt = 0;
295b2f46fd8SDan Williams 
296b2f46fd8SDan Williams 	BUG_ON(disks < 4);
297b2f46fd8SDan Williams 
298b2f46fd8SDan Williams 	if (submit->scribble)
299b2f46fd8SDan Williams 		dma_src = submit->scribble;
300b2f46fd8SDan Williams 	else if (sizeof(dma_addr_t) <= sizeof(struct page *))
301b2f46fd8SDan Williams 		dma_src = (dma_addr_t *) blocks;
302b2f46fd8SDan Williams 
30383544ae9SDan Williams 	if (dma_src && device && disks <= dma_maxpq(device, 0) &&
30483544ae9SDan Williams 	    is_dma_pq_aligned(device, offset, 0, len)) {
305b2f46fd8SDan Williams 		struct device *dev = device->dev;
306b2f46fd8SDan Williams 		dma_addr_t *pq = &dma_src[disks-2];
307b2f46fd8SDan Williams 		int i;
308b2f46fd8SDan Williams 
309b2f46fd8SDan Williams 		pr_debug("%s: (async) disks: %d len: %zu\n",
310b2f46fd8SDan Williams 			 __func__, disks, len);
311b2f46fd8SDan Williams 		if (!P(blocks, disks))
312b2f46fd8SDan Williams 			dma_flags |= DMA_PREP_PQ_DISABLE_P;
313b2141e69SNeilBrown 		else
314b2141e69SNeilBrown 			pq[0] = dma_map_page(dev, P(blocks, disks),
315b2141e69SNeilBrown 					     offset, len,
316b2141e69SNeilBrown 					     DMA_TO_DEVICE);
317b2f46fd8SDan Williams 		if (!Q(blocks, disks))
318b2f46fd8SDan Williams 			dma_flags |= DMA_PREP_PQ_DISABLE_Q;
319b2141e69SNeilBrown 		else
320b2141e69SNeilBrown 			pq[1] = dma_map_page(dev, Q(blocks, disks),
321b2141e69SNeilBrown 					     offset, len,
322b2141e69SNeilBrown 					     DMA_TO_DEVICE);
323b2141e69SNeilBrown 
3240403e382SDan Williams 		if (submit->flags & ASYNC_TX_FENCE)
3250403e382SDan Williams 			dma_flags |= DMA_PREP_FENCE;
326b2141e69SNeilBrown 		for (i = 0; i < disks-2; i++)
327b2141e69SNeilBrown 			if (likely(blocks[i])) {
328b2141e69SNeilBrown 				dma_src[src_cnt] = dma_map_page(dev, blocks[i],
329b2141e69SNeilBrown 								offset, len,
330b2141e69SNeilBrown 								DMA_TO_DEVICE);
331b2141e69SNeilBrown 				coefs[src_cnt] = raid6_gfexp[i];
332b2141e69SNeilBrown 				src_cnt++;
333b2141e69SNeilBrown 			}
334b2f46fd8SDan Williams 
335b2f46fd8SDan Williams 		for (;;) {
336b2f46fd8SDan Williams 			tx = device->device_prep_dma_pq_val(chan, pq, dma_src,
337b2141e69SNeilBrown 							    src_cnt,
338b2141e69SNeilBrown 							    coefs,
339b2f46fd8SDan Williams 							    len, pqres,
340b2f46fd8SDan Williams 							    dma_flags);
341b2f46fd8SDan Williams 			if (likely(tx))
342b2f46fd8SDan Williams 				break;
343b2f46fd8SDan Williams 			async_tx_quiesce(&submit->depend_tx);
344b2f46fd8SDan Williams 			dma_async_issue_pending(chan);
345b2f46fd8SDan Williams 		}
346b2f46fd8SDan Williams 		async_tx_submit(chan, tx, submit);
347b2f46fd8SDan Williams 
348b2f46fd8SDan Williams 		return tx;
349b2f46fd8SDan Williams 	} else {
350b2f46fd8SDan Williams 		struct page *p_src = P(blocks, disks);
351b2f46fd8SDan Williams 		struct page *q_src = Q(blocks, disks);
352b2f46fd8SDan Williams 		enum async_tx_flags flags_orig = submit->flags;
353b2f46fd8SDan Williams 		dma_async_tx_callback cb_fn_orig = submit->cb_fn;
354b2f46fd8SDan Williams 		void *scribble = submit->scribble;
355b2f46fd8SDan Williams 		void *cb_param_orig = submit->cb_param;
356b2f46fd8SDan Williams 		void *p, *q, *s;
357b2f46fd8SDan Williams 
358b2f46fd8SDan Williams 		pr_debug("%s: (sync) disks: %d len: %zu\n",
359b2f46fd8SDan Williams 			 __func__, disks, len);
360b2f46fd8SDan Williams 
361b2f46fd8SDan Williams 		/* caller must provide a temporary result buffer and
362b2f46fd8SDan Williams 		 * allow the input parameters to be preserved
363b2f46fd8SDan Williams 		 */
364b2f46fd8SDan Williams 		BUG_ON(!spare || !scribble);
365b2f46fd8SDan Williams 
366b2f46fd8SDan Williams 		/* wait for any prerequisite operations */
367b2f46fd8SDan Williams 		async_tx_quiesce(&submit->depend_tx);
368b2f46fd8SDan Williams 
369b2f46fd8SDan Williams 		/* recompute p and/or q into the temporary buffer and then
370b2f46fd8SDan Williams 		 * check to see the result matches the current value
371b2f46fd8SDan Williams 		 */
372b2f46fd8SDan Williams 		tx = NULL;
373b2f46fd8SDan Williams 		*pqres = 0;
374b2f46fd8SDan Williams 		if (p_src) {
375b2f46fd8SDan Williams 			init_async_submit(submit, ASYNC_TX_XOR_ZERO_DST, NULL,
376b2f46fd8SDan Williams 					  NULL, NULL, scribble);
377b2f46fd8SDan Williams 			tx = async_xor(spare, blocks, offset, disks-2, len, submit);
378b2f46fd8SDan Williams 			async_tx_quiesce(&tx);
379b2f46fd8SDan Williams 			p = page_address(p_src) + offset;
380b2f46fd8SDan Williams 			s = page_address(spare) + offset;
381b2f46fd8SDan Williams 			*pqres |= !!memcmp(p, s, len) << SUM_CHECK_P;
382b2f46fd8SDan Williams 		}
383b2f46fd8SDan Williams 
384b2f46fd8SDan Williams 		if (q_src) {
385b2f46fd8SDan Williams 			P(blocks, disks) = NULL;
386b2f46fd8SDan Williams 			Q(blocks, disks) = spare;
387b2f46fd8SDan Williams 			init_async_submit(submit, 0, NULL, NULL, NULL, scribble);
388b2f46fd8SDan Williams 			tx = async_gen_syndrome(blocks, offset, disks, len, submit);
389b2f46fd8SDan Williams 			async_tx_quiesce(&tx);
390b2f46fd8SDan Williams 			q = page_address(q_src) + offset;
391b2f46fd8SDan Williams 			s = page_address(spare) + offset;
392b2f46fd8SDan Williams 			*pqres |= !!memcmp(q, s, len) << SUM_CHECK_Q;
393b2f46fd8SDan Williams 		}
394b2f46fd8SDan Williams 
395b2f46fd8SDan Williams 		/* restore P, Q and submit */
396b2f46fd8SDan Williams 		P(blocks, disks) = p_src;
397b2f46fd8SDan Williams 		Q(blocks, disks) = q_src;
398b2f46fd8SDan Williams 
399b2f46fd8SDan Williams 		submit->cb_fn = cb_fn_orig;
400b2f46fd8SDan Williams 		submit->cb_param = cb_param_orig;
401b2f46fd8SDan Williams 		submit->flags = flags_orig;
402b2f46fd8SDan Williams 		async_tx_sync_epilog(submit);
403b2f46fd8SDan Williams 
404b2f46fd8SDan Williams 		return NULL;
405b2f46fd8SDan Williams 	}
406b2f46fd8SDan Williams }
407b2f46fd8SDan Williams EXPORT_SYMBOL_GPL(async_syndrome_val);
408b2f46fd8SDan Williams 
409b2f46fd8SDan Williams static int __init async_pq_init(void)
410b2f46fd8SDan Williams {
411030b0772SDan Williams 	pq_scribble_page = alloc_page(GFP_KERNEL);
412b2f46fd8SDan Williams 
413030b0772SDan Williams 	if (pq_scribble_page)
414b2f46fd8SDan Williams 		return 0;
415b2f46fd8SDan Williams 
416b2f46fd8SDan Williams 	pr_err("%s: failed to allocate required spare page\n", __func__);
417b2f46fd8SDan Williams 
418b2f46fd8SDan Williams 	return -ENOMEM;
419b2f46fd8SDan Williams }
420b2f46fd8SDan Williams 
421b2f46fd8SDan Williams static void __exit async_pq_exit(void)
422b2f46fd8SDan Williams {
423030b0772SDan Williams 	put_page(pq_scribble_page);
424b2f46fd8SDan Williams }
425b2f46fd8SDan Williams 
426b2f46fd8SDan Williams module_init(async_pq_init);
427b2f46fd8SDan Williams module_exit(async_pq_exit);
428b2f46fd8SDan Williams 
429b2f46fd8SDan Williams MODULE_DESCRIPTION("asynchronous raid6 syndrome generation/validation");
430b2f46fd8SDan Williams MODULE_LICENSE("GPL");
431